aspeed: calculate the RAM size bits at realize time
[qemu/ar7.git] / hw / i386 / x86-iommu.c
blobce26b2a71d9348ce881bd5c11261a0e6c7334a14
1 /*
2 * QEMU emulation of common X86 IOMMU
4 * Copyright (C) 2016 Peter Xu, Red Hat <peterx@redhat.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, see <http://www.gnu.org/licenses/>.
20 #include "qemu/osdep.h"
21 #include "hw/sysbus.h"
22 #include "hw/boards.h"
23 #include "hw/i386/x86-iommu.h"
24 #include "qemu/error-report.h"
25 #include "trace.h"
27 void x86_iommu_iec_register_notifier(X86IOMMUState *iommu,
28 iec_notify_fn fn, void *data)
30 IEC_Notifier *notifier = g_new0(IEC_Notifier, 1);
32 notifier->iec_notify = fn;
33 notifier->private = data;
35 QLIST_INSERT_HEAD(&iommu->iec_notifiers, notifier, list);
38 void x86_iommu_iec_notify_all(X86IOMMUState *iommu, bool global,
39 uint32_t index, uint32_t mask)
41 IEC_Notifier *notifier;
43 trace_x86_iommu_iec_notify(global, index, mask);
45 QLIST_FOREACH(notifier, &iommu->iec_notifiers, list) {
46 if (notifier->iec_notify) {
47 notifier->iec_notify(notifier->private, global,
48 index, mask);
53 /* Default X86 IOMMU device */
54 static X86IOMMUState *x86_iommu_default = NULL;
56 static void x86_iommu_set_default(X86IOMMUState *x86_iommu)
58 assert(x86_iommu);
60 if (x86_iommu_default) {
61 error_report("QEMU does not support multiple vIOMMUs "
62 "for x86 yet.");
63 exit(1);
66 x86_iommu_default = x86_iommu;
69 X86IOMMUState *x86_iommu_get_default(void)
71 return x86_iommu_default;
74 static void x86_iommu_realize(DeviceState *dev, Error **errp)
76 X86IOMMUState *x86_iommu = X86_IOMMU_DEVICE(dev);
77 X86IOMMUClass *x86_class = X86_IOMMU_GET_CLASS(dev);
78 QLIST_INIT(&x86_iommu->iec_notifiers);
79 if (x86_class->realize) {
80 x86_class->realize(dev, errp);
82 x86_iommu_set_default(X86_IOMMU_DEVICE(dev));
85 static void x86_iommu_class_init(ObjectClass *klass, void *data)
87 DeviceClass *dc = DEVICE_CLASS(klass);
88 dc->realize = x86_iommu_realize;
91 static bool x86_iommu_intremap_prop_get(Object *o, Error **errp)
93 X86IOMMUState *s = X86_IOMMU_DEVICE(o);
94 return s->intr_supported;
97 static void x86_iommu_intremap_prop_set(Object *o, bool value, Error **errp)
99 X86IOMMUState *s = X86_IOMMU_DEVICE(o);
100 s->intr_supported = value;
103 static void x86_iommu_instance_init(Object *o)
105 X86IOMMUState *s = X86_IOMMU_DEVICE(o);
107 /* By default, do not support IR */
108 s->intr_supported = false;
109 object_property_add_bool(o, "intremap", x86_iommu_intremap_prop_get,
110 x86_iommu_intremap_prop_set, NULL);
113 static const TypeInfo x86_iommu_info = {
114 .name = TYPE_X86_IOMMU_DEVICE,
115 .parent = TYPE_SYS_BUS_DEVICE,
116 .instance_init = x86_iommu_instance_init,
117 .instance_size = sizeof(X86IOMMUState),
118 .class_init = x86_iommu_class_init,
119 .class_size = sizeof(X86IOMMUClass),
120 .abstract = true,
123 static void x86_iommu_register_types(void)
125 type_register_static(&x86_iommu_info);
128 type_init(x86_iommu_register_types)