target/m68k/cpu.c

   1 /*
   2  * QEMU Motorola 68k CPU
   3  *
   4  * Copyright (c) 2012 SUSE LINUX Products GmbH
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2.1 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see
  18  * <http://www.gnu.org/licenses/lgpl-2.1.html>
  19  */
  20
  21 #include "qemu/osdep.h"
  22 #include "qapi/error.h"
  23 #include "cpu.h"
  24 #include "migration/vmstate.h"
  25 #include "fpu/softfloat.h"
  26
  27 static void m68k_cpu_set_pc(CPUState *cs, vaddr value)
  28 {
  29     M68kCPU *cpu = M68K_CPU(cs);
  30
  31     cpu->env.pc = value;
  32 }
  33
  34 static bool m68k_cpu_has_work(CPUState *cs)
  35 {
  36     return cs->interrupt_request & CPU_INTERRUPT_HARD;
  37 }
  38
  39 static void m68k_set_feature(CPUM68KState *env, int feature)
  40 {
  41     env->features |= (1u << feature);
  42 }
  43
  44 static void m68k_unset_feature(CPUM68KState *env, int feature)
  45 {
  46     env->features &= (-1u - (1u << feature));
  47 }
  48
  49 static void m68k_cpu_reset(DeviceState *dev)
  50 {
  51     CPUState *s = CPU(dev);
  52     M68kCPU *cpu = M68K_CPU(s);
  53     M68kCPUClass *mcc = M68K_CPU_GET_CLASS(cpu);
  54     CPUM68KState *env = &cpu->env;
  55     floatx80 nan = floatx80_default_nan(NULL);
  56     int i;
  57
  58     mcc->parent_reset(dev);
  59
  60     memset(env, 0, offsetof(CPUM68KState, end_reset_fields));
  61 #ifdef CONFIG_SOFTMMU
  62     cpu_m68k_set_sr(env, SR_S | SR_I);
  63 #else
  64     cpu_m68k_set_sr(env, 0);
  65 #endif
  66     for (i = 0; i < 8; i++) {
  67         env->fregs[i].d = nan;
  68     }
  69     cpu_m68k_set_fpcr(env, 0);
  70     env->fpsr = 0;
  71
  72     /* TODO: We should set PC from the interrupt vector.  */
  73     env->pc = 0;
  74 }
  75
  76 static void m68k_cpu_disas_set_info(CPUState *s, disassemble_info *info)
  77 {
  78     M68kCPU *cpu = M68K_CPU(s);
  79     CPUM68KState *env = &cpu->env;
  80     info->print_insn = print_insn_m68k;
  81     if (m68k_feature(env, M68K_FEATURE_M68000)) {
  82         info->mach = bfd_mach_m68040;
  83     }
  84 }
  85
  86 /* CPU models */
  87
  88 static ObjectClass *m68k_cpu_class_by_name(const char *cpu_model)
  89 {
  90     ObjectClass *oc;
  91     char *typename;
  92
  93     typename = g_strdup_printf(M68K_CPU_TYPE_NAME("%s"), cpu_model);
  94     oc = object_class_by_name(typename);
  95     g_free(typename);
  96     if (oc != NULL && (object_class_dynamic_cast(oc, TYPE_M68K_CPU) == NULL ||
  97                        object_class_is_abstract(oc))) {
  98         return NULL;
  99     }
 100     return oc;
 101 }
 102
 103 static void m5206_cpu_initfn(Object *obj)
 104 {
 105     M68kCPU *cpu = M68K_CPU(obj);
 106     CPUM68KState *env = &cpu->env;
 107
 108     m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
 109 }
 110
 111 /* Base feature set, including isns. for m68k family */
 112 static void m68000_cpu_initfn(Object *obj)
 113 {
 114     M68kCPU *cpu = M68K_CPU(obj);
 115     CPUM68KState *env = &cpu->env;
 116
 117     m68k_set_feature(env, M68K_FEATURE_M68000);
 118     m68k_set_feature(env, M68K_FEATURE_USP);
 119     m68k_set_feature(env, M68K_FEATURE_WORD_INDEX);
 120     m68k_set_feature(env, M68K_FEATURE_MOVEP);
 121 }
 122
 123 /*
 124  * Adds BKPT, MOVE-from-SR *now priv instr, and MOVEC, MOVES, RTD
 125  */
 126 static void m68010_cpu_initfn(Object *obj)
 127 {
 128     M68kCPU *cpu = M68K_CPU(obj);
 129     CPUM68KState *env = &cpu->env;
 130
 131     m68000_cpu_initfn(obj);
 132     m68k_set_feature(env, M68K_FEATURE_M68010);
 133     m68k_set_feature(env, M68K_FEATURE_RTD);
 134     m68k_set_feature(env, M68K_FEATURE_BKPT);
 135     m68k_set_feature(env, M68K_FEATURE_MOVEC);
 136 }
 137
 138 /*
 139  * Adds BFCHG, BFCLR, BFEXTS, BFEXTU, BFFFO, BFINS, BFSET, BFTST, CAS, CAS2,
 140  *      CHK2, CMP2, DIVSL, DIVUL, EXTB, PACK, TRAPcc, UNPK.
 141  *
 142  * 68020/30 only:
 143  *      CALLM, cpBcc, cpDBcc, cpGEN, cpRESTORE, cpSAVE, cpScc, cpTRAPcc
 144  */
 145 static void m68020_cpu_initfn(Object *obj)
 146 {
 147     M68kCPU *cpu = M68K_CPU(obj);
 148     CPUM68KState *env = &cpu->env;
 149
 150     m68010_cpu_initfn(obj);
 151     m68k_unset_feature(env, M68K_FEATURE_M68010);
 152     m68k_set_feature(env, M68K_FEATURE_M68020);
 153     m68k_set_feature(env, M68K_FEATURE_QUAD_MULDIV);
 154     m68k_set_feature(env, M68K_FEATURE_BRAL);
 155     m68k_set_feature(env, M68K_FEATURE_BCCL);
 156     m68k_set_feature(env, M68K_FEATURE_BITFIELD);
 157     m68k_set_feature(env, M68K_FEATURE_EXT_FULL);
 158     m68k_set_feature(env, M68K_FEATURE_SCALED_INDEX);
 159     m68k_set_feature(env, M68K_FEATURE_LONG_MULDIV);
 160     m68k_set_feature(env, M68K_FEATURE_FPU);
 161     m68k_set_feature(env, M68K_FEATURE_CAS);
 162     m68k_set_feature(env, M68K_FEATURE_CHK2);
 163     m68k_set_feature(env, M68K_FEATURE_MSP);
 164 }
 165
 166 /*
 167  * Adds: PFLUSH (*5)
 168  * 68030 Only: PFLUSHA (*5), PLOAD (*5), PMOVE
 169  * 68030/40 Only: PTEST
 170  *
 171  * NOTES:
 172  *  5. Not valid on MC68EC030
 173  */
 174 static void m68030_cpu_initfn(Object *obj)
 175 {
 176     M68kCPU *cpu = M68K_CPU(obj);
 177     CPUM68KState *env = &cpu->env;
 178
 179     m68020_cpu_initfn(obj);
 180     m68k_unset_feature(env, M68K_FEATURE_M68020);
 181     m68k_set_feature(env, M68K_FEATURE_M68030);
 182 }
 183
 184 /*
 185  * Adds: CINV, CPUSH
 186  * Adds all with Note *2: FABS, FSABS, FDABS, FADD, FSADD, FDADD, FBcc, FCMP,
 187  *                        FDBcc, FDIV, FSDIV, FDDIV, FMOVE, FSMOVE, FDMOVE,
 188  *                        FMOVEM, FMUL, FSMUL, FDMUL, FNEG, FSNEG, FDNEG, FNOP,
 189  *                        FRESTORE, FSAVE, FScc, FSQRT, FSSQRT, FDSQRT, FSUB,
 190  *                        FSSUB, FDSUB, FTRAPcc, FTST
 191  *
 192  * Adds with Notes *2, and *3: FACOS, FASIN, FATAN, FATANH, FCOS, FCOSH, FETOX,
 193  *                             FETOXM, FGETEXP, FGETMAN, FINT, FINTRZ, FLOG10,
 194  *                             FLOG2, FLOGN, FLOGNP1, FMOD, FMOVECR, FREM,
 195  *                             FSCALE, FSGLDIV, FSGLMUL, FSIN, FSINCOS, FSINH,
 196  *                             FTAN, FTANH, FTENTOX, FTWOTOX
 197  * NOTES:
 198  * 2. Not applicable to the MC68EC040, MC68LC040, MC68EC060, and MC68LC060.
 199  * 3. These are software-supported instructions on the MC68040 and MC68060.
 200  */
 201 static void m68040_cpu_initfn(Object *obj)
 202 {
 203     M68kCPU *cpu = M68K_CPU(obj);
 204     CPUM68KState *env = &cpu->env;
 205
 206     m68030_cpu_initfn(obj);
 207     m68k_unset_feature(env, M68K_FEATURE_M68030);
 208     m68k_set_feature(env, M68K_FEATURE_M68040);
 209 }
 210
 211 /*
 212  * Adds: PLPA
 213  * Adds all with Note *2: CAS, CAS2, MULS, MULU, CHK2, CMP2, DIVS, DIVU
 214  * All Fxxxx instructions are as per m68040 with exception to; FMOVEM NOTE3
 215  *
 216  * Does NOT implement MOVEP
 217  *
 218  * NOTES:
 219  * 2. Not applicable to the MC68EC040, MC68LC040, MC68EC060, and MC68LC060.
 220  * 3. These are software-supported instructions on the MC68040 and MC68060.
 221  */
 222 static void m68060_cpu_initfn(Object *obj)
 223 {
 224     M68kCPU *cpu = M68K_CPU(obj);
 225     CPUM68KState *env = &cpu->env;
 226
 227     m68040_cpu_initfn(obj);
 228     m68k_unset_feature(env, M68K_FEATURE_M68040);
 229     m68k_set_feature(env, M68K_FEATURE_M68060);
 230     m68k_unset_feature(env, M68K_FEATURE_MOVEP);
 231
 232     /* Implemented as a software feature */
 233     m68k_unset_feature(env, M68K_FEATURE_QUAD_MULDIV);
 234 }
 235
 236 static void m5208_cpu_initfn(Object *obj)
 237 {
 238     M68kCPU *cpu = M68K_CPU(obj);
 239     CPUM68KState *env = &cpu->env;
 240
 241     m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
 242     m68k_set_feature(env, M68K_FEATURE_CF_ISA_APLUSC);
 243     m68k_set_feature(env, M68K_FEATURE_BRAL);
 244     m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
 245     m68k_set_feature(env, M68K_FEATURE_USP);
 246 }
 247
 248 static void cfv4e_cpu_initfn(Object *obj)
 249 {
 250     M68kCPU *cpu = M68K_CPU(obj);
 251     CPUM68KState *env = &cpu->env;
 252
 253     m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
 254     m68k_set_feature(env, M68K_FEATURE_CF_ISA_B);
 255     m68k_set_feature(env, M68K_FEATURE_BRAL);
 256     m68k_set_feature(env, M68K_FEATURE_CF_FPU);
 257     m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
 258     m68k_set_feature(env, M68K_FEATURE_USP);
 259 }
 260
 261 static void any_cpu_initfn(Object *obj)
 262 {
 263     M68kCPU *cpu = M68K_CPU(obj);
 264     CPUM68KState *env = &cpu->env;
 265
 266     m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
 267     m68k_set_feature(env, M68K_FEATURE_CF_ISA_B);
 268     m68k_set_feature(env, M68K_FEATURE_CF_ISA_APLUSC);
 269     m68k_set_feature(env, M68K_FEATURE_BRAL);
 270     m68k_set_feature(env, M68K_FEATURE_CF_FPU);
 271     /*
 272      * MAC and EMAC are mututally exclusive, so pick EMAC.
 273      * It's mostly backwards compatible.
 274      */
 275     m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
 276     m68k_set_feature(env, M68K_FEATURE_CF_EMAC_B);
 277     m68k_set_feature(env, M68K_FEATURE_USP);
 278     m68k_set_feature(env, M68K_FEATURE_EXT_FULL);
 279     m68k_set_feature(env, M68K_FEATURE_WORD_INDEX);
 280 }
 281
 282 static void m68k_cpu_realizefn(DeviceState *dev, Error **errp)
 283 {
 284     CPUState *cs = CPU(dev);
 285     M68kCPU *cpu = M68K_CPU(dev);
 286     M68kCPUClass *mcc = M68K_CPU_GET_CLASS(dev);
 287     Error *local_err = NULL;
 288
 289     register_m68k_insns(&cpu->env);
 290
 291     cpu_exec_realizefn(cs, &local_err);
 292     if (local_err != NULL) {
 293         error_propagate(errp, local_err);
 294         return;
 295     }
 296
 297     m68k_cpu_init_gdb(cpu);
 298
 299     cpu_reset(cs);
 300     qemu_init_vcpu(cs);
 301
 302     mcc->parent_realize(dev, errp);
 303 }
 304
 305 static void m68k_cpu_initfn(Object *obj)
 306 {
 307     M68kCPU *cpu = M68K_CPU(obj);
 308
 309     cpu_set_cpustate_pointers(cpu);
 310 }
 311
 312 #if defined(CONFIG_SOFTMMU)
 313 static bool fpu_needed(void *opaque)
 314 {
 315     M68kCPU *s = opaque;
 316
 317     return m68k_feature(&s->env, M68K_FEATURE_CF_FPU) ||
 318            m68k_feature(&s->env, M68K_FEATURE_FPU);
 319 }
 320
 321 typedef struct m68k_FPReg_tmp {
 322     FPReg *parent;
 323     uint64_t tmp_mant;
 324     uint16_t tmp_exp;
 325 } m68k_FPReg_tmp;
 326
 327 static void cpu_get_fp80(uint64_t *pmant, uint16_t *pexp, floatx80 f)
 328 {
 329     CPU_LDoubleU temp;
 330
 331     temp.d = f;
 332     *pmant = temp.l.lower;
 333     *pexp = temp.l.upper;
 334 }
 335
 336 static floatx80 cpu_set_fp80(uint64_t mant, uint16_t upper)
 337 {
 338     CPU_LDoubleU temp;
 339
 340     temp.l.upper = upper;
 341     temp.l.lower = mant;
 342     return temp.d;
 343 }
 344
 345 static int freg_pre_save(void *opaque)
 346 {
 347     m68k_FPReg_tmp *tmp = opaque;
 348
 349     cpu_get_fp80(&tmp->tmp_mant, &tmp->tmp_exp, tmp->parent->d);
 350
 351     return 0;
 352 }
 353
 354 static int freg_post_load(void *opaque, int version)
 355 {
 356     m68k_FPReg_tmp *tmp = opaque;
 357
 358     tmp->parent->d = cpu_set_fp80(tmp->tmp_mant, tmp->tmp_exp);
 359
 360     return 0;
 361 }
 362
 363 static const VMStateDescription vmstate_freg_tmp = {
 364     .name = "freg_tmp",
 365     .post_load = freg_post_load,
 366     .pre_save  = freg_pre_save,
 367     .fields = (VMStateField[]) {
 368         VMSTATE_UINT64(tmp_mant, m68k_FPReg_tmp),
 369         VMSTATE_UINT16(tmp_exp, m68k_FPReg_tmp),
 370         VMSTATE_END_OF_LIST()
 371     }
 372 };
 373
 374 static const VMStateDescription vmstate_freg = {
 375     .name = "freg",
 376     .fields = (VMStateField[]) {
 377         VMSTATE_WITH_TMP(FPReg, m68k_FPReg_tmp, vmstate_freg_tmp),
 378         VMSTATE_END_OF_LIST()
 379     }
 380 };
 381
 382 static int fpu_post_load(void *opaque, int version)
 383 {
 384     M68kCPU *s = opaque;
 385
 386     cpu_m68k_restore_fp_status(&s->env);
 387
 388     return 0;
 389 }
 390
 391 const VMStateDescription vmmstate_fpu = {
 392     .name = "cpu/fpu",
 393     .version_id = 1,
 394     .minimum_version_id = 1,
 395     .needed = fpu_needed,
 396     .post_load = fpu_post_load,
 397     .fields = (VMStateField[]) {
 398         VMSTATE_UINT32(env.fpcr, M68kCPU),
 399         VMSTATE_UINT32(env.fpsr, M68kCPU),
 400         VMSTATE_STRUCT_ARRAY(env.fregs, M68kCPU, 8, 0, vmstate_freg, FPReg),
 401         VMSTATE_STRUCT(env.fp_result, M68kCPU, 0, vmstate_freg, FPReg),
 402         VMSTATE_END_OF_LIST()
 403     }
 404 };
 405
 406 static bool cf_spregs_needed(void *opaque)
 407 {
 408     M68kCPU *s = opaque;
 409
 410     return m68k_feature(&s->env, M68K_FEATURE_CF_ISA_A);
 411 }
 412
 413 const VMStateDescription vmstate_cf_spregs = {
 414     .name = "cpu/cf_spregs",
 415     .version_id = 1,
 416     .minimum_version_id = 1,
 417     .needed = cf_spregs_needed,
 418     .fields = (VMStateField[]) {
 419         VMSTATE_UINT64_ARRAY(env.macc, M68kCPU, 4),
 420         VMSTATE_UINT32(env.macsr, M68kCPU),
 421         VMSTATE_UINT32(env.mac_mask, M68kCPU),
 422         VMSTATE_UINT32(env.rambar0, M68kCPU),
 423         VMSTATE_UINT32(env.mbar, M68kCPU),
 424         VMSTATE_END_OF_LIST()
 425     }
 426 };
 427
 428 static bool cpu_68040_mmu_needed(void *opaque)
 429 {
 430     M68kCPU *s = opaque;
 431
 432     return m68k_feature(&s->env, M68K_FEATURE_M68040);
 433 }
 434
 435 const VMStateDescription vmstate_68040_mmu = {
 436     .name = "cpu/68040_mmu",
 437     .version_id = 1,
 438     .minimum_version_id = 1,
 439     .needed = cpu_68040_mmu_needed,
 440     .fields = (VMStateField[]) {
 441         VMSTATE_UINT32(env.mmu.ar, M68kCPU),
 442         VMSTATE_UINT32(env.mmu.ssw, M68kCPU),
 443         VMSTATE_UINT16(env.mmu.tcr, M68kCPU),
 444         VMSTATE_UINT32(env.mmu.urp, M68kCPU),
 445         VMSTATE_UINT32(env.mmu.srp, M68kCPU),
 446         VMSTATE_BOOL(env.mmu.fault, M68kCPU),
 447         VMSTATE_UINT32_ARRAY(env.mmu.ttr, M68kCPU, 4),
 448         VMSTATE_UINT32(env.mmu.mmusr, M68kCPU),
 449         VMSTATE_END_OF_LIST()
 450     }
 451 };
 452
 453 static bool cpu_68040_spregs_needed(void *opaque)
 454 {
 455     M68kCPU *s = opaque;
 456
 457     return m68k_feature(&s->env, M68K_FEATURE_M68040);
 458 }
 459
 460 const VMStateDescription vmstate_68040_spregs = {
 461     .name = "cpu/68040_spregs",
 462     .version_id = 1,
 463     .minimum_version_id = 1,
 464     .needed = cpu_68040_spregs_needed,
 465     .fields = (VMStateField[]) {
 466         VMSTATE_UINT32(env.vbr, M68kCPU),
 467         VMSTATE_UINT32(env.cacr, M68kCPU),
 468         VMSTATE_UINT32(env.sfc, M68kCPU),
 469         VMSTATE_UINT32(env.dfc, M68kCPU),
 470         VMSTATE_END_OF_LIST()
 471     }
 472 };
 473
 474 static const VMStateDescription vmstate_m68k_cpu = {
 475     .name = "cpu",
 476     .version_id = 1,
 477     .minimum_version_id = 1,
 478     .fields      = (VMStateField[]) {
 479         VMSTATE_UINT32_ARRAY(env.dregs, M68kCPU, 8),
 480         VMSTATE_UINT32_ARRAY(env.aregs, M68kCPU, 8),
 481         VMSTATE_UINT32(env.pc, M68kCPU),
 482         VMSTATE_UINT32(env.sr, M68kCPU),
 483         VMSTATE_INT32(env.current_sp, M68kCPU),
 484         VMSTATE_UINT32_ARRAY(env.sp, M68kCPU, 3),
 485         VMSTATE_UINT32(env.cc_op, M68kCPU),
 486         VMSTATE_UINT32(env.cc_x, M68kCPU),
 487         VMSTATE_UINT32(env.cc_n, M68kCPU),
 488         VMSTATE_UINT32(env.cc_v, M68kCPU),
 489         VMSTATE_UINT32(env.cc_c, M68kCPU),
 490         VMSTATE_UINT32(env.cc_z, M68kCPU),
 491         VMSTATE_INT32(env.pending_vector, M68kCPU),
 492         VMSTATE_INT32(env.pending_level, M68kCPU),
 493         VMSTATE_END_OF_LIST()
 494     },
 495     .subsections = (const VMStateDescription * []) {
 496         &vmmstate_fpu,
 497         &vmstate_cf_spregs,
 498         &vmstate_68040_mmu,
 499         &vmstate_68040_spregs,
 500         NULL
 501     },
 502 };
 503 #endif
 504
 505 #include "hw/core/tcg-cpu-ops.h"
 506
 507 static struct TCGCPUOps m68k_tcg_ops = {
 508     .initialize = m68k_tcg_init,
 509     .cpu_exec_interrupt = m68k_cpu_exec_interrupt,
 510     .tlb_fill = m68k_cpu_tlb_fill,
 511
 512 #ifndef CONFIG_USER_ONLY
 513     .do_interrupt = m68k_cpu_do_interrupt,
 514     .do_transaction_failed = m68k_cpu_transaction_failed,
 515 #endif /* !CONFIG_USER_ONLY */
 516 };
 517
 518 static void m68k_cpu_class_init(ObjectClass *c, void *data)
 519 {
 520     M68kCPUClass *mcc = M68K_CPU_CLASS(c);
 521     CPUClass *cc = CPU_CLASS(c);
 522     DeviceClass *dc = DEVICE_CLASS(c);
 523
 524     device_class_set_parent_realize(dc, m68k_cpu_realizefn,
 525                                     &mcc->parent_realize);
 526     device_class_set_parent_reset(dc, m68k_cpu_reset, &mcc->parent_reset);
 527
 528     cc->class_by_name = m68k_cpu_class_by_name;
 529     cc->has_work = m68k_cpu_has_work;
 530     cc->dump_state = m68k_cpu_dump_state;
 531     cc->set_pc = m68k_cpu_set_pc;
 532     cc->gdb_read_register = m68k_cpu_gdb_read_register;
 533     cc->gdb_write_register = m68k_cpu_gdb_write_register;
 534 #if defined(CONFIG_SOFTMMU)
 535     cc->get_phys_page_debug = m68k_cpu_get_phys_page_debug;
 536     dc->vmsd = &vmstate_m68k_cpu;
 537 #endif
 538     cc->disas_set_info = m68k_cpu_disas_set_info;
 539
 540     cc->gdb_num_core_regs = 18;
 541     cc->tcg_ops = &m68k_tcg_ops;
 542 }
 543
 544 static void m68k_cpu_class_init_cf_core(ObjectClass *c, void *data)
 545 {
 546     CPUClass *cc = CPU_CLASS(c);
 547
 548     cc->gdb_core_xml_file = "cf-core.xml";
 549 }
 550
 551 #define DEFINE_M68K_CPU_TYPE_CF(model)               \
 552     {                                                \
 553         .name = M68K_CPU_TYPE_NAME(#model),          \
 554         .instance_init = model##_cpu_initfn,         \
 555         .parent = TYPE_M68K_CPU,                     \
 556         .class_init = m68k_cpu_class_init_cf_core    \
 557     }
 558
 559 static void m68k_cpu_class_init_m68k_core(ObjectClass *c, void *data)
 560 {
 561     CPUClass *cc = CPU_CLASS(c);
 562
 563     cc->gdb_core_xml_file = "m68k-core.xml";
 564 }
 565
 566 #define DEFINE_M68K_CPU_TYPE_M68K(model)             \
 567     {                                                \
 568         .name = M68K_CPU_TYPE_NAME(#model),          \
 569         .instance_init = model##_cpu_initfn,         \
 570         .parent = TYPE_M68K_CPU,                     \
 571         .class_init = m68k_cpu_class_init_m68k_core  \
 572     }
 573
 574 static const TypeInfo m68k_cpus_type_infos[] = {
 575     { /* base class should be registered first */
 576         .name = TYPE_M68K_CPU,
 577         .parent = TYPE_CPU,
 578         .instance_size = sizeof(M68kCPU),
 579         .instance_init = m68k_cpu_initfn,
 580         .abstract = true,
 581         .class_size = sizeof(M68kCPUClass),
 582         .class_init = m68k_cpu_class_init,
 583     },
 584     DEFINE_M68K_CPU_TYPE_M68K(m68000),
 585     DEFINE_M68K_CPU_TYPE_M68K(m68010),
 586     DEFINE_M68K_CPU_TYPE_M68K(m68020),
 587     DEFINE_M68K_CPU_TYPE_M68K(m68030),
 588     DEFINE_M68K_CPU_TYPE_M68K(m68040),
 589     DEFINE_M68K_CPU_TYPE_M68K(m68060),
 590     DEFINE_M68K_CPU_TYPE_CF(m5206),
 591     DEFINE_M68K_CPU_TYPE_CF(m5208),
 592     DEFINE_M68K_CPU_TYPE_CF(cfv4e),
 593     DEFINE_M68K_CPU_TYPE_CF(any),
 594 };
 595
 596 DEFINE_TYPES(m68k_cpus_type_infos)