hw/display/virtio-gpu-base.c

   1 /*
   2  * Virtio GPU Device
   3  *
   4  * Copyright Red Hat, Inc. 2013-2014
   5  *
   6  * Authors:
   7  *     Dave Airlie <airlied@redhat.com>
   8  *     Gerd Hoffmann <kraxel@redhat.com>
   9  *
  10  * This work is licensed under the terms of the GNU GPL, version 2 or later.
  11  * See the COPYING file in the top-level directory.
  12  */
  13
  14 #include "qemu/osdep.h"
  15
  16 #include "hw/virtio/virtio-gpu.h"
  17 #include "migration/blocker.h"
  18 #include "qapi/error.h"
  19 #include "qemu/error-report.h"
  20 #include "trace.h"
  21
  22 void
  23 virtio_gpu_base_reset(VirtIOGPUBase *g)
  24 {
  25     int i;
  26
  27     g->enable = 0;
  28
  29     for (i = 0; i < g->conf.max_outputs; i++) {
  30         g->scanout[i].resource_id = 0;
  31         g->scanout[i].width = 0;
  32         g->scanout[i].height = 0;
  33         g->scanout[i].x = 0;
  34         g->scanout[i].y = 0;
  35         g->scanout[i].ds = NULL;
  36     }
  37 }
  38
  39 void
  40 virtio_gpu_base_fill_display_info(VirtIOGPUBase *g,
  41                                   struct virtio_gpu_resp_display_info *dpy_info)
  42 {
  43     int i;
  44
  45     for (i = 0; i < g->conf.max_outputs; i++) {
  46         if (g->enabled_output_bitmask & (1 << i)) {
  47             dpy_info->pmodes[i].enabled = 1;
  48             dpy_info->pmodes[i].r.width = cpu_to_le32(g->req_state[i].width);
  49             dpy_info->pmodes[i].r.height = cpu_to_le32(g->req_state[i].height);
  50         }
  51     }
  52 }
  53
  54 static void virtio_gpu_invalidate_display(void *opaque)
  55 {
  56 }
  57
  58 static void virtio_gpu_update_display(void *opaque)
  59 {
  60 }
  61
  62 static void virtio_gpu_text_update(void *opaque, console_ch_t *chardata)
  63 {
  64 }
  65
  66 static void virtio_gpu_notify_event(VirtIOGPUBase *g, uint32_t event_type)
  67 {
  68     g->virtio_config.events_read |= event_type;
  69     virtio_notify_config(&g->parent_obj);
  70 }
  71
  72 static void virtio_gpu_ui_info(void *opaque, uint32_t idx, QemuUIInfo *info)
  73 {
  74     VirtIOGPUBase *g = opaque;
  75
  76     if (idx >= g->conf.max_outputs) {
  77         return;
  78     }
  79
  80     g->req_state[idx].x = info->xoff;
  81     g->req_state[idx].y = info->yoff;
  82     g->req_state[idx].width = info->width;
  83     g->req_state[idx].height = info->height;
  84     g->req_state[idx].width_mm = info->width_mm;
  85     g->req_state[idx].height_mm = info->height_mm;
  86
  87     if (info->width && info->height) {
  88         g->enabled_output_bitmask |= (1 << idx);
  89     } else {
  90         g->enabled_output_bitmask &= ~(1 << idx);
  91     }
  92
  93     /* send event to guest */
  94     virtio_gpu_notify_event(g, VIRTIO_GPU_EVENT_DISPLAY);
  95     return;
  96 }
  97
  98 static void
  99 virtio_gpu_gl_flushed(void *opaque)
 100 {
 101     VirtIOGPUBase *g = opaque;
 102     VirtIOGPUBaseClass *vgc = VIRTIO_GPU_BASE_GET_CLASS(g);
 103
 104     if (vgc->gl_flushed) {
 105         vgc->gl_flushed(g);
 106     }
 107 }
 108
 109 static void
 110 virtio_gpu_gl_block(void *opaque, bool block)
 111 {
 112     VirtIOGPUBase *g = opaque;
 113
 114     if (block) {
 115         g->renderer_blocked++;
 116     } else {
 117         g->renderer_blocked--;
 118     }
 119     assert(g->renderer_blocked >= 0);
 120
 121     if (!block && g->renderer_blocked == 0) {
 122         virtio_gpu_gl_flushed(g);
 123     }
 124 }
 125
 126 static int
 127 virtio_gpu_get_flags(void *opaque)
 128 {
 129     VirtIOGPUBase *g = opaque;
 130     int flags = GRAPHIC_FLAGS_NONE;
 131
 132     if (virtio_gpu_virgl_enabled(g->conf)) {
 133         flags |= GRAPHIC_FLAGS_GL;
 134     }
 135
 136     if (virtio_gpu_dmabuf_enabled(g->conf)) {
 137         flags |= GRAPHIC_FLAGS_DMABUF;
 138     }
 139
 140     return flags;
 141 }
 142
 143 static const GraphicHwOps virtio_gpu_ops = {
 144     .get_flags = virtio_gpu_get_flags,
 145     .invalidate = virtio_gpu_invalidate_display,
 146     .gfx_update = virtio_gpu_update_display,
 147     .text_update = virtio_gpu_text_update,
 148     .ui_info = virtio_gpu_ui_info,
 149     .gl_block = virtio_gpu_gl_block,
 150 };
 151
 152 bool
 153 virtio_gpu_base_device_realize(DeviceState *qdev,
 154                                VirtIOHandleOutput ctrl_cb,
 155                                VirtIOHandleOutput cursor_cb,
 156                                Error **errp)
 157 {
 158     VirtIODevice *vdev = VIRTIO_DEVICE(qdev);
 159     VirtIOGPUBase *g = VIRTIO_GPU_BASE(qdev);
 160     int i;
 161
 162     if (g->conf.max_outputs > VIRTIO_GPU_MAX_SCANOUTS) {
 163         error_setg(errp, "invalid max_outputs > %d", VIRTIO_GPU_MAX_SCANOUTS);
 164         return false;
 165     }
 166
 167     if (virtio_gpu_virgl_enabled(g->conf)) {
 168         error_setg(&g->migration_blocker, "virgl is not yet migratable");
 169         if (migrate_add_blocker(g->migration_blocker, errp) < 0) {
 170             error_free(g->migration_blocker);
 171             return false;
 172         }
 173     }
 174
 175     g->virtio_config.num_scanouts = cpu_to_le32(g->conf.max_outputs);
 176     virtio_init(VIRTIO_DEVICE(g), VIRTIO_ID_GPU,
 177                 sizeof(struct virtio_gpu_config));
 178
 179     if (virtio_gpu_virgl_enabled(g->conf)) {
 180         /* use larger control queue in 3d mode */
 181         virtio_add_queue(vdev, 256, ctrl_cb);
 182         virtio_add_queue(vdev, 16, cursor_cb);
 183     } else {
 184         virtio_add_queue(vdev, 64, ctrl_cb);
 185         virtio_add_queue(vdev, 16, cursor_cb);
 186     }
 187
 188     g->enabled_output_bitmask = 1;
 189
 190     g->req_state[0].width = g->conf.xres;
 191     g->req_state[0].height = g->conf.yres;
 192
 193     g->hw_ops = &virtio_gpu_ops;
 194     for (i = 0; i < g->conf.max_outputs; i++) {
 195         g->scanout[i].con =
 196             graphic_console_init(DEVICE(g), i, &virtio_gpu_ops, g);
 197     }
 198
 199     return true;
 200 }
 201
 202 static uint64_t
 203 virtio_gpu_base_get_features(VirtIODevice *vdev, uint64_t features,
 204                              Error **errp)
 205 {
 206     VirtIOGPUBase *g = VIRTIO_GPU_BASE(vdev);
 207
 208     if (virtio_gpu_virgl_enabled(g->conf)) {
 209         features |= (1 << VIRTIO_GPU_F_VIRGL);
 210     }
 211     if (virtio_gpu_edid_enabled(g->conf)) {
 212         features |= (1 << VIRTIO_GPU_F_EDID);
 213     }
 214     if (virtio_gpu_blob_enabled(g->conf)) {
 215         features |= (1 << VIRTIO_GPU_F_RESOURCE_BLOB);
 216     }
 217
 218     return features;
 219 }
 220
 221 static void
 222 virtio_gpu_base_set_features(VirtIODevice *vdev, uint64_t features)
 223 {
 224     static const uint32_t virgl = (1 << VIRTIO_GPU_F_VIRGL);
 225
 226     trace_virtio_gpu_features(((features & virgl) == virgl));
 227 }
 228
 229 static void
 230 virtio_gpu_base_device_unrealize(DeviceState *qdev)
 231 {
 232     VirtIOGPUBase *g = VIRTIO_GPU_BASE(qdev);
 233
 234     if (g->migration_blocker) {
 235         migrate_del_blocker(g->migration_blocker);
 236         error_free(g->migration_blocker);
 237     }
 238 }
 239
 240 static void
 241 virtio_gpu_base_class_init(ObjectClass *klass, void *data)
 242 {
 243     DeviceClass *dc = DEVICE_CLASS(klass);
 244     VirtioDeviceClass *vdc = VIRTIO_DEVICE_CLASS(klass);
 245
 246     vdc->unrealize = virtio_gpu_base_device_unrealize;
 247     vdc->get_features = virtio_gpu_base_get_features;
 248     vdc->set_features = virtio_gpu_base_set_features;
 249
 250     set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
 251     dc->hotpluggable = false;
 252 }
 253
 254 static const TypeInfo virtio_gpu_base_info = {
 255     .name = TYPE_VIRTIO_GPU_BASE,
 256     .parent = TYPE_VIRTIO_DEVICE,
 257     .instance_size = sizeof(VirtIOGPUBase),
 258     .class_size = sizeof(VirtIOGPUBaseClass),
 259     .class_init = virtio_gpu_base_class_init,
 260     .abstract = true
 261 };
 262 module_obj(TYPE_VIRTIO_GPU_BASE);
 263 module_kconfig(VIRTIO_GPU);
 264
 265 static void
 266 virtio_register_types(void)
 267 {
 268     type_register_static(&virtio_gpu_base_info);
 269 }
 270
 271 type_init(virtio_register_types)
 272
 273 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_ctrl_hdr)                != 24);
 274 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_update_cursor)           != 56);
 275 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resource_unref)          != 32);
 276 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resource_create_2d)      != 40);
 277 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_set_scanout)             != 48);
 278 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resource_flush)          != 48);
 279 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_transfer_to_host_2d)     != 56);
 280 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_mem_entry)               != 16);
 281 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resource_attach_backing) != 32);
 282 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resource_detach_backing) != 32);
 283 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resp_display_info)       != 408);
 284
 285 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_transfer_host_3d)        != 72);
 286 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resource_create_3d)      != 72);
 287 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_ctx_create)              != 96);
 288 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_ctx_destroy)             != 24);
 289 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_ctx_resource)            != 32);
 290 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_cmd_submit)              != 32);
 291 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_get_capset_info)         != 32);
 292 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resp_capset_info)        != 40);
 293 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_get_capset)              != 32);
 294 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resp_capset)             != 24);