m68k: fix subx mem, mem instruction
[qemu/ar7.git] / target / hppa / machine.c
blob8e077788c3689b8cebfb261717fafa546d2babe8
1 /*
2 * HPPA interrupt helper routines
4 * Copyright (c) 2017 Richard Henderson
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 #include "qemu/osdep.h"
21 #include "qemu-common.h"
22 #include "cpu.h"
23 #include "hw/hw.h"
24 #include "hw/boards.h"
25 #include "migration/cpu.h"
27 #if TARGET_REGISTER_BITS == 64
28 #define qemu_put_betr qemu_put_be64
29 #define qemu_get_betr qemu_get_be64
30 #define VMSTATE_UINTTL_V(_f, _s, _v) \
31 VMSTATE_UINT64_V(_f, _s, _v)
32 #define VMSTATE_UINTTL_ARRAY_V(_f, _s, _n, _v) \
33 VMSTATE_UINT64_ARRAY_V(_f, _s, _n, _v)
34 #else
35 #define qemu_put_betr qemu_put_be32
36 #define qemu_get_betr qemu_get_be32
37 #define VMSTATE_UINTTR_V(_f, _s, _v) \
38 VMSTATE_UINT32_V(_f, _s, _v)
39 #define VMSTATE_UINTTR_ARRAY_V(_f, _s, _n, _v) \
40 VMSTATE_UINT32_ARRAY_V(_f, _s, _n, _v)
41 #endif
43 #define VMSTATE_UINTTR(_f, _s) \
44 VMSTATE_UINTTR_V(_f, _s, 0)
45 #define VMSTATE_UINTTR_ARRAY(_f, _s, _n) \
46 VMSTATE_UINTTR_ARRAY_V(_f, _s, _n, 0)
49 static int get_psw(QEMUFile *f, void *opaque, size_t size, VMStateField *field)
51 CPUHPPAState *env = opaque;
52 cpu_hppa_put_psw(env, qemu_get_betr(f));
53 return 0;
56 static int put_psw(QEMUFile *f, void *opaque, size_t size,
57 VMStateField *field, QJSON *vmdesc)
59 CPUHPPAState *env = opaque;
60 qemu_put_betr(f, cpu_hppa_get_psw(env));
61 return 0;
64 static const VMStateInfo vmstate_psw = {
65 .name = "psw",
66 .get = get_psw,
67 .put = put_psw,
70 /* FIXME: Use the PA2.0 format, which is a superset of the PA1.1 format. */
71 static int get_tlb(QEMUFile *f, void *opaque, size_t size, VMStateField *field)
73 hppa_tlb_entry *ent = opaque;
74 uint32_t val;
76 memset(ent, 0, sizeof(*ent));
78 ent->va_b = qemu_get_be64(f);
79 ent->pa = qemu_get_betr(f);
80 val = qemu_get_be32(f);
82 ent->entry_valid = extract32(val, 0, 1);
83 ent->access_id = extract32(val, 1, 18);
84 ent->u = extract32(val, 19, 1);
85 ent->ar_pl2 = extract32(val, 20, 2);
86 ent->ar_pl1 = extract32(val, 22, 2);
87 ent->ar_type = extract32(val, 24, 3);
88 ent->b = extract32(val, 27, 1);
89 ent->d = extract32(val, 28, 1);
90 ent->t = extract32(val, 29, 1);
92 ent->va_e = ent->va_b + TARGET_PAGE_SIZE - 1;
93 return 0;
96 static int put_tlb(QEMUFile *f, void *opaque, size_t size,
97 VMStateField *field, QJSON *vmdesc)
99 hppa_tlb_entry *ent = opaque;
100 uint32_t val = 0;
102 if (ent->entry_valid) {
103 val = 1;
104 val = deposit32(val, 1, 18, ent->access_id);
105 val = deposit32(val, 19, 1, ent->u);
106 val = deposit32(val, 20, 2, ent->ar_pl2);
107 val = deposit32(val, 22, 2, ent->ar_pl1);
108 val = deposit32(val, 24, 3, ent->ar_type);
109 val = deposit32(val, 27, 1, ent->b);
110 val = deposit32(val, 28, 1, ent->d);
111 val = deposit32(val, 29, 1, ent->t);
114 qemu_put_be64(f, ent->va_b);
115 qemu_put_betr(f, ent->pa);
116 qemu_put_be32(f, val);
117 return 0;
120 static const VMStateInfo vmstate_tlb = {
121 .name = "tlb entry",
122 .get = get_tlb,
123 .put = put_tlb,
126 static VMStateField vmstate_env_fields[] = {
127 VMSTATE_UINTTR_ARRAY(gr, CPUHPPAState, 32),
128 VMSTATE_UINT64_ARRAY(fr, CPUHPPAState, 32),
129 VMSTATE_UINT64_ARRAY(sr, CPUHPPAState, 8),
130 VMSTATE_UINTTR_ARRAY(cr, CPUHPPAState, 32),
131 VMSTATE_UINTTR_ARRAY(cr_back, CPUHPPAState, 2),
132 VMSTATE_UINTTR_ARRAY(shadow, CPUHPPAState, 7),
134 /* Save the architecture value of the psw, not the internally
135 expanded version. Since this architecture value does not
136 exist in memory to be stored, this requires a but of hoop
137 jumping. We want OFFSET=0 so that we effectively pass ENV
138 to the helper functions, and we need to fill in the name by
139 hand since there's no field of that name. */
141 .name = "psw",
142 .version_id = 0,
143 .size = sizeof(uint64_t),
144 .info = &vmstate_psw,
145 .flags = VMS_SINGLE,
146 .offset = 0
149 VMSTATE_UINTTR(iaoq_f, CPUHPPAState),
150 VMSTATE_UINTTR(iaoq_b, CPUHPPAState),
151 VMSTATE_UINT64(iasq_f, CPUHPPAState),
152 VMSTATE_UINT64(iasq_b, CPUHPPAState),
154 VMSTATE_UINT32(fr0_shadow, CPUHPPAState),
156 VMSTATE_ARRAY(tlb, CPUHPPAState, ARRAY_SIZE(((CPUHPPAState *)0)->tlb),
157 0, vmstate_tlb, hppa_tlb_entry),
158 VMSTATE_UINT32(tlb_last, CPUHPPAState),
160 VMSTATE_END_OF_LIST()
163 static const VMStateDescription vmstate_env = {
164 .name = "env",
165 .version_id = 1,
166 .minimum_version_id = 1,
167 .fields = vmstate_env_fields,
170 static VMStateField vmstate_cpu_fields[] = {
171 VMSTATE_CPU(),
172 VMSTATE_STRUCT(env, HPPACPU, 1, vmstate_env, CPUHPPAState),
173 VMSTATE_END_OF_LIST()
176 const VMStateDescription vmstate_hppa_cpu = {
177 .name = "cpu",
178 .version_id = 1,
179 .minimum_version_id = 1,
180 .fields = vmstate_cpu_fields,