hw/dma: Implement a Xilinx CSU DMA model
[qemu/ar7.git] / scripts / tracetool / backend / log.py
blob17ba1cd90ebb874e7818d2620cd6e2ccb15bccc6
1 # -*- coding: utf-8 -*-
3 """
4 Stderr built-in backend.
5 """
7 __author__ = "Lluís Vilanova <vilanova@ac.upc.edu>"
8 __copyright__ = "Copyright 2012-2017, Lluís Vilanova <vilanova@ac.upc.edu>"
9 __license__ = "GPL version 2 or (at your option) any later version"
11 __maintainer__ = "Stefan Hajnoczi"
12 __email__ = "stefanha@redhat.com"
15 from tracetool import out
18 PUBLIC = True
21 def generate_h_begin(events, group):
22 out('#include "qemu/log-for-trace.h"',
23 '#include "qemu/error-report.h"',
24 '')
27 def generate_h(event, group):
28 argnames = ", ".join(event.args.names())
29 if len(event.args) > 0:
30 argnames = ", " + argnames
32 if "vcpu" in event.properties:
33 # already checked on the generic format code
34 cond = "true"
35 else:
36 cond = "trace_event_get_state(%s)" % ("TRACE_" + event.name.upper())
38 out(' if (%(cond)s && qemu_loglevel_mask(LOG_TRACE)) {',
39 ' if (message_with_timestamp) {',
40 ' struct timeval _now;',
41 ' gettimeofday(&_now, NULL);',
42 '#line %(event_lineno)d "%(event_filename)s"',
43 ' qemu_log("%%d@%%zu.%%06zu:%(name)s " %(fmt)s "\\n",',
44 ' qemu_get_thread_id(),',
45 ' (size_t)_now.tv_sec, (size_t)_now.tv_usec',
46 ' %(argnames)s);',
47 '#line %(out_next_lineno)d "%(out_filename)s"',
48 ' } else {',
49 '#line %(event_lineno)d "%(event_filename)s"',
50 ' qemu_log("%(name)s " %(fmt)s "\\n"%(argnames)s);',
51 '#line %(out_next_lineno)d "%(out_filename)s"',
52 ' }',
53 ' }',
54 cond=cond,
55 event_lineno=event.lineno,
56 event_filename=event.filename,
57 name=event.name,
58 fmt=event.fmt.rstrip("\n"),
59 argnames=argnames)
62 def generate_h_backend_dstate(event, group):
63 out(' trace_event_get_state_dynamic_by_id(%(event_id)s) || \\',
64 event_id="TRACE_" + event.name.upper())