cpu-throttle: Remove timer_mod() from cpu_throttle_set()
[qemu/ar7.git] / target / cris / crisv10-decode.h
blob9c531f36b4242247c8bb4090aac7c27210eb0dc8
1 /*
2 * CRISv10 insn decoding macros.
4 * Copyright (c) 2010 AXIS Communications AB
5 * Written by Edgar E. Iglesias.
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2.1 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
21 #ifndef TARGET_CRIS_CRISV10_DECODE_H
22 #define TARGET_CRIS_CRISV10_DECODE_H
24 #define CRISV10_MODE_QIMMEDIATE 0
25 #define CRISV10_MODE_REG 1
26 #define CRISV10_MODE_INDIRECT 2
27 #define CRISV10_MODE_AUTOINC 3
29 /* Quick Immediate. */
30 #define CRISV10_QIMM_BCC_R0 0
31 #define CRISV10_QIMM_BCC_R1 1
32 #define CRISV10_QIMM_BCC_R2 2
33 #define CRISV10_QIMM_BCC_R3 3
35 #define CRISV10_QIMM_BDAP_R0 4
36 #define CRISV10_QIMM_BDAP_R1 5
37 #define CRISV10_QIMM_BDAP_R2 6
38 #define CRISV10_QIMM_BDAP_R3 7
40 #define CRISV10_QIMM_ADDQ 8
41 #define CRISV10_QIMM_MOVEQ 9
42 #define CRISV10_QIMM_SUBQ 10
43 #define CRISV10_QIMM_CMPQ 11
44 #define CRISV10_QIMM_ANDQ 12
45 #define CRISV10_QIMM_ORQ 13
46 #define CRISV10_QIMM_ASHQ 14
47 #define CRISV10_QIMM_LSHQ 15
50 #define CRISV10_REG_ADDX 0
51 #define CRISV10_REG_MOVX 1
52 #define CRISV10_REG_SUBX 2
53 #define CRISV10_REG_LSL 3
54 #define CRISV10_REG_ADDI 4
55 #define CRISV10_REG_BIAP 5
56 #define CRISV10_REG_NEG 6
57 #define CRISV10_REG_BOUND 7
58 #define CRISV10_REG_ADD 8
59 #define CRISV10_REG_MOVE_R 9
60 #define CRISV10_REG_MOVE_SPR_R 9
61 #define CRISV10_REG_MOVE_R_SPR 8
62 #define CRISV10_REG_SUB 10
63 #define CRISV10_REG_CMP 11
64 #define CRISV10_REG_AND 12
65 #define CRISV10_REG_OR 13
66 #define CRISV10_REG_ASR 14
67 #define CRISV10_REG_LSR 15
69 #define CRISV10_REG_BTST 3
70 #define CRISV10_REG_SCC 4
71 #define CRISV10_REG_SETF 6
72 #define CRISV10_REG_CLEARF 7
73 #define CRISV10_REG_BIAP 5
74 #define CRISV10_REG_ABS 10
75 #define CRISV10_REG_DSTEP 11
76 #define CRISV10_REG_LZ 12
77 #define CRISV10_REG_NOT 13
78 #define CRISV10_REG_SWAP 13
79 #define CRISV10_REG_XOR 14
80 #define CRISV10_REG_MSTEP 15
82 /* Indirect, var size. */
83 #define CRISV10_IND_TEST 14
84 #define CRISV10_IND_MUL 4
85 #define CRISV10_IND_BDAP_M 5
86 #define CRISV10_IND_ADD 8
87 #define CRISV10_IND_MOVE_M_R 9
90 /* indirect fixed size. */
91 #define CRISV10_IND_ADDX 0
92 #define CRISV10_IND_MOVX 1
93 #define CRISV10_IND_SUBX 2
94 #define CRISV10_IND_CMPX 3
95 #define CRISV10_IND_JUMP_M 4
96 #define CRISV10_IND_DIP 5
97 #define CRISV10_IND_JUMP_R 6
98 #define CRISV17_IND_ADDC 6
99 #define CRISV10_IND_BOUND 7
100 #define CRISV10_IND_BCC_M 7
101 #define CRISV10_IND_MOVE_M_SPR 8
102 #define CRISV10_IND_MOVE_SPR_M 9
103 #define CRISV10_IND_SUB 10
104 #define CRISV10_IND_CMP 11
105 #define CRISV10_IND_AND 12
106 #define CRISV10_IND_OR 13
107 #define CRISV10_IND_MOVE_R_M 15
109 #define CRISV10_IND_MOVEM_M_R 14
110 #define CRISV10_IND_MOVEM_R_M 15
112 #endif