ast2400: Integrate the SCU model and set silicon revision
[qemu/ar7.git] / include / hw / arm / ast2400.h
blobf1a64fd3893d4c5f42c683fa1ff83b70348702cf
1 /*
2 * ASPEED AST2400 SoC
4 * Andrew Jeffery <andrew@aj.id.au>
6 * Copyright 2016 IBM Corp.
8 * This code is licensed under the GPL version 2 or later. See
9 * the COPYING file in the top-level directory.
12 #ifndef AST2400_H
13 #define AST2400_H
15 #include "hw/arm/arm.h"
16 #include "hw/intc/aspeed_vic.h"
17 #include "hw/misc/aspeed_scu.h"
18 #include "hw/timer/aspeed_timer.h"
19 #include "hw/i2c/aspeed_i2c.h"
21 typedef struct AST2400State {
22 /*< private >*/
23 DeviceState parent;
25 /*< public >*/
26 ARMCPU *cpu;
27 MemoryRegion iomem;
28 AspeedVICState vic;
29 AspeedTimerCtrlState timerctrl;
30 AspeedI2CState i2c;
31 AspeedSCUState scu;
32 } AST2400State;
34 #define TYPE_AST2400 "ast2400"
35 #define AST2400(obj) OBJECT_CHECK(AST2400State, (obj), TYPE_AST2400)
37 #define AST2400_SDRAM_BASE 0x40000000
39 #endif /* AST2400_H */