2 * iwMMXt micro operations for XScale.
4 * Copyright (c) 2007 OpenedHand, Ltd.
5 * Written by Andrzej Zaborowski <andrew@openedhand.com>
6 * Copyright (c) 2008 CodeSourcery
8 * This library is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU Lesser General Public
10 * License as published by the Free Software Foundation; either
11 * version 2 of the License, or (at your option) any later version.
13 * This library is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * Lesser General Public License for more details.
18 * You should have received a copy of the GNU Lesser General Public
19 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
22 #include "qemu-common.h"
24 #include "exec/exec-all.h"
27 /* iwMMXt macros extracted from GNU gdb. */
29 /* Set the SIMD wCASF flags for 8, 16, 32 or 64-bit operations. */
30 #define SIMD8_SET( v, n, b) ((v != 0) << ((((b) + 1) * 4) + (n)))
31 #define SIMD16_SET(v, n, h) ((v != 0) << ((((h) + 1) * 8) + (n)))
32 #define SIMD32_SET(v, n, w) ((v != 0) << ((((w) + 1) * 16) + (n)))
33 #define SIMD64_SET(v, n) ((v != 0) << (32 + (n)))
34 /* Flags to pass as "n" above. */
39 /* Various status bit macros. */
40 #define NBIT8(x) ((x) & 0x80)
41 #define NBIT16(x) ((x) & 0x8000)
42 #define NBIT32(x) ((x) & 0x80000000)
43 #define NBIT64(x) ((x) & 0x8000000000000000ULL)
44 #define ZBIT8(x) (((x) & 0xff) == 0)
45 #define ZBIT16(x) (((x) & 0xffff) == 0)
46 #define ZBIT32(x) (((x) & 0xffffffff) == 0)
47 #define ZBIT64(x) (x == 0)
48 /* Sign extension macros. */
49 #define EXTEND8H(a) ((uint16_t) (int8_t) (a))
50 #define EXTEND8(a) ((uint32_t) (int8_t) (a))
51 #define EXTEND16(a) ((uint32_t) (int16_t) (a))
52 #define EXTEND16S(a) ((int32_t) (int16_t) (a))
53 #define EXTEND32(a) ((uint64_t) (int32_t) (a))
55 uint64_t HELPER(iwmmxt_maddsq
)(uint64_t a
, uint64_t b
)
58 EXTEND16S((a
>> 0) & 0xffff) * EXTEND16S((b
>> 0) & 0xffff) +
59 EXTEND16S((a
>> 16) & 0xffff) * EXTEND16S((b
>> 16) & 0xffff)
60 ) & 0xffffffff) | ((uint64_t) (
61 EXTEND16S((a
>> 32) & 0xffff) * EXTEND16S((b
>> 32) & 0xffff) +
62 EXTEND16S((a
>> 48) & 0xffff) * EXTEND16S((b
>> 48) & 0xffff)
67 uint64_t HELPER(iwmmxt_madduq
)(uint64_t a
, uint64_t b
)
70 ((a
>> 0) & 0xffff) * ((b
>> 0) & 0xffff) +
71 ((a
>> 16) & 0xffff) * ((b
>> 16) & 0xffff)
73 ((a
>> 32) & 0xffff) * ((b
>> 32) & 0xffff) +
74 ((a
>> 48) & 0xffff) * ((b
>> 48) & 0xffff)
79 uint64_t HELPER(iwmmxt_sadb
)(uint64_t a
, uint64_t b
)
81 #define abs(x) (((x) >= 0) ? x : -x)
82 #define SADB(SHR) abs((int) ((a >> SHR) & 0xff) - (int) ((b >> SHR) & 0xff))
84 SADB(0) + SADB(8) + SADB(16) + SADB(24) +
85 SADB(32) + SADB(40) + SADB(48) + SADB(56);
89 uint64_t HELPER(iwmmxt_sadw
)(uint64_t a
, uint64_t b
)
92 abs((int) ((a >> SHR) & 0xffff) - (int) ((b >> SHR) & 0xffff))
93 return SADW(0) + SADW(16) + SADW(32) + SADW(48);
97 uint64_t HELPER(iwmmxt_mulslw
)(uint64_t a
, uint64_t b
)
99 #define MULS(SHR) ((uint64_t) ((( \
100 EXTEND16S((a >> SHR) & 0xffff) * EXTEND16S((b >> SHR) & 0xffff) \
101 ) >> 0) & 0xffff) << SHR)
102 return MULS(0) | MULS(16) | MULS(32) | MULS(48);
106 uint64_t HELPER(iwmmxt_mulshw
)(uint64_t a
, uint64_t b
)
108 #define MULS(SHR) ((uint64_t) ((( \
109 EXTEND16S((a >> SHR) & 0xffff) * EXTEND16S((b >> SHR) & 0xffff) \
110 ) >> 16) & 0xffff) << SHR)
111 return MULS(0) | MULS(16) | MULS(32) | MULS(48);
115 uint64_t HELPER(iwmmxt_mululw
)(uint64_t a
, uint64_t b
)
117 #define MULU(SHR) ((uint64_t) ((( \
118 ((a >> SHR) & 0xffff) * ((b >> SHR) & 0xffff) \
119 ) >> 0) & 0xffff) << SHR)
120 return MULU(0) | MULU(16) | MULU(32) | MULU(48);
124 uint64_t HELPER(iwmmxt_muluhw
)(uint64_t a
, uint64_t b
)
126 #define MULU(SHR) ((uint64_t) ((( \
127 ((a >> SHR) & 0xffff) * ((b >> SHR) & 0xffff) \
128 ) >> 16) & 0xffff) << SHR)
129 return MULU(0) | MULU(16) | MULU(32) | MULU(48);
133 uint64_t HELPER(iwmmxt_macsw
)(uint64_t a
, uint64_t b
)
135 #define MACS(SHR) ( \
136 EXTEND16((a >> SHR) & 0xffff) * EXTEND16S((b >> SHR) & 0xffff))
137 return (int64_t) (MACS(0) + MACS(16) + MACS(32) + MACS(48));
141 uint64_t HELPER(iwmmxt_macuw
)(uint64_t a
, uint64_t b
)
143 #define MACU(SHR) ( \
144 (uint32_t) ((a >> SHR) & 0xffff) * \
145 (uint32_t) ((b >> SHR) & 0xffff))
146 return MACU(0) + MACU(16) + MACU(32) + MACU(48);
150 #define NZBIT8(x, i) \
151 SIMD8_SET(NBIT8((x) & 0xff), SIMD_NBIT, i) | \
152 SIMD8_SET(ZBIT8((x) & 0xff), SIMD_ZBIT, i)
153 #define NZBIT16(x, i) \
154 SIMD16_SET(NBIT16((x) & 0xffff), SIMD_NBIT, i) | \
155 SIMD16_SET(ZBIT16((x) & 0xffff), SIMD_ZBIT, i)
156 #define NZBIT32(x, i) \
157 SIMD32_SET(NBIT32((x) & 0xffffffff), SIMD_NBIT, i) | \
158 SIMD32_SET(ZBIT32((x) & 0xffffffff), SIMD_ZBIT, i)
160 SIMD64_SET(NBIT64(x), SIMD_NBIT) | \
161 SIMD64_SET(ZBIT64(x), SIMD_ZBIT)
162 #define IWMMXT_OP_UNPACK(S, SH0, SH1, SH2, SH3) \
163 uint64_t HELPER(glue(iwmmxt_unpack, glue(S, b)))(CPUARMState *env, \
164 uint64_t a, uint64_t b) \
167 (((a >> SH0) & 0xff) << 0) | (((b >> SH0) & 0xff) << 8) | \
168 (((a >> SH1) & 0xff) << 16) | (((b >> SH1) & 0xff) << 24) | \
169 (((a >> SH2) & 0xff) << 32) | (((b >> SH2) & 0xff) << 40) | \
170 (((a >> SH3) & 0xff) << 48) | (((b >> SH3) & 0xff) << 56); \
171 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \
172 NZBIT8(a >> 0, 0) | NZBIT8(a >> 8, 1) | \
173 NZBIT8(a >> 16, 2) | NZBIT8(a >> 24, 3) | \
174 NZBIT8(a >> 32, 4) | NZBIT8(a >> 40, 5) | \
175 NZBIT8(a >> 48, 6) | NZBIT8(a >> 56, 7); \
178 uint64_t HELPER(glue(iwmmxt_unpack, glue(S, w)))(CPUARMState *env, \
179 uint64_t a, uint64_t b) \
182 (((a >> SH0) & 0xffff) << 0) | \
183 (((b >> SH0) & 0xffff) << 16) | \
184 (((a >> SH2) & 0xffff) << 32) | \
185 (((b >> SH2) & 0xffff) << 48); \
186 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \
187 NZBIT8(a >> 0, 0) | NZBIT8(a >> 16, 1) | \
188 NZBIT8(a >> 32, 2) | NZBIT8(a >> 48, 3); \
191 uint64_t HELPER(glue(iwmmxt_unpack, glue(S, l)))(CPUARMState *env, \
192 uint64_t a, uint64_t b) \
195 (((a >> SH0) & 0xffffffff) << 0) | \
196 (((b >> SH0) & 0xffffffff) << 32); \
197 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \
198 NZBIT32(a >> 0, 0) | NZBIT32(a >> 32, 1); \
201 uint64_t HELPER(glue(iwmmxt_unpack, glue(S, ub)))(CPUARMState *env, \
205 (((x >> SH0) & 0xff) << 0) | \
206 (((x >> SH1) & 0xff) << 16) | \
207 (((x >> SH2) & 0xff) << 32) | \
208 (((x >> SH3) & 0xff) << 48); \
209 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \
210 NZBIT16(x >> 0, 0) | NZBIT16(x >> 16, 1) | \
211 NZBIT16(x >> 32, 2) | NZBIT16(x >> 48, 3); \
214 uint64_t HELPER(glue(iwmmxt_unpack, glue(S, uw)))(CPUARMState *env, \
218 (((x >> SH0) & 0xffff) << 0) | \
219 (((x >> SH2) & 0xffff) << 32); \
220 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \
221 NZBIT32(x >> 0, 0) | NZBIT32(x >> 32, 1); \
224 uint64_t HELPER(glue(iwmmxt_unpack, glue(S, ul)))(CPUARMState *env, \
227 x = (((x >> SH0) & 0xffffffff) << 0); \
228 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = NZBIT64(x >> 0); \
231 uint64_t HELPER(glue(iwmmxt_unpack, glue(S, sb)))(CPUARMState *env, \
235 ((uint64_t) EXTEND8H((x >> SH0) & 0xff) << 0) | \
236 ((uint64_t) EXTEND8H((x >> SH1) & 0xff) << 16) | \
237 ((uint64_t) EXTEND8H((x >> SH2) & 0xff) << 32) | \
238 ((uint64_t) EXTEND8H((x >> SH3) & 0xff) << 48); \
239 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \
240 NZBIT16(x >> 0, 0) | NZBIT16(x >> 16, 1) | \
241 NZBIT16(x >> 32, 2) | NZBIT16(x >> 48, 3); \
244 uint64_t HELPER(glue(iwmmxt_unpack, glue(S, sw)))(CPUARMState *env, \
248 ((uint64_t) EXTEND16((x >> SH0) & 0xffff) << 0) | \
249 ((uint64_t) EXTEND16((x >> SH2) & 0xffff) << 32); \
250 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \
251 NZBIT32(x >> 0, 0) | NZBIT32(x >> 32, 1); \
254 uint64_t HELPER(glue(iwmmxt_unpack, glue(S, sl)))(CPUARMState *env, \
257 x = EXTEND32((x >> SH0) & 0xffffffff); \
258 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = NZBIT64(x >> 0); \
261 IWMMXT_OP_UNPACK(l
, 0, 8, 16, 24)
262 IWMMXT_OP_UNPACK(h
, 32, 40, 48, 56)
264 #define IWMMXT_OP_CMP(SUFF, Tb, Tw, Tl, O) \
265 uint64_t HELPER(glue(iwmmxt_, glue(SUFF, b)))(CPUARMState *env, \
266 uint64_t a, uint64_t b) \
269 CMP(0, Tb, O, 0xff) | CMP(8, Tb, O, 0xff) | \
270 CMP(16, Tb, O, 0xff) | CMP(24, Tb, O, 0xff) | \
271 CMP(32, Tb, O, 0xff) | CMP(40, Tb, O, 0xff) | \
272 CMP(48, Tb, O, 0xff) | CMP(56, Tb, O, 0xff); \
273 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \
274 NZBIT8(a >> 0, 0) | NZBIT8(a >> 8, 1) | \
275 NZBIT8(a >> 16, 2) | NZBIT8(a >> 24, 3) | \
276 NZBIT8(a >> 32, 4) | NZBIT8(a >> 40, 5) | \
277 NZBIT8(a >> 48, 6) | NZBIT8(a >> 56, 7); \
280 uint64_t HELPER(glue(iwmmxt_, glue(SUFF, w)))(CPUARMState *env, \
281 uint64_t a, uint64_t b) \
283 a = CMP(0, Tw, O, 0xffff) | CMP(16, Tw, O, 0xffff) | \
284 CMP(32, Tw, O, 0xffff) | CMP(48, Tw, O, 0xffff); \
285 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \
286 NZBIT16(a >> 0, 0) | NZBIT16(a >> 16, 1) | \
287 NZBIT16(a >> 32, 2) | NZBIT16(a >> 48, 3); \
290 uint64_t HELPER(glue(iwmmxt_, glue(SUFF, l)))(CPUARMState *env, \
291 uint64_t a, uint64_t b) \
293 a = CMP(0, Tl, O, 0xffffffff) | \
294 CMP(32, Tl, O, 0xffffffff); \
295 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \
296 NZBIT32(a >> 0, 0) | NZBIT32(a >> 32, 1); \
299 #define CMP(SHR, TYPE, OPER, MASK) ((((TYPE) ((a >> SHR) & MASK) OPER \
300 (TYPE) ((b >> SHR) & MASK)) ? (uint64_t) MASK : 0) << SHR)
301 IWMMXT_OP_CMP(cmpeq
, uint8_t, uint16_t, uint32_t, ==)
302 IWMMXT_OP_CMP(cmpgts
, int8_t, int16_t, int32_t, >)
303 IWMMXT_OP_CMP(cmpgtu
, uint8_t, uint16_t, uint32_t, >)
305 #define CMP(SHR, TYPE, OPER, MASK) ((((TYPE) ((a >> SHR) & MASK) OPER \
306 (TYPE) ((b >> SHR) & MASK)) ? a : b) & ((uint64_t) MASK << SHR))
307 IWMMXT_OP_CMP(mins
, int8_t, int16_t, int32_t, <)
308 IWMMXT_OP_CMP(minu
, uint8_t, uint16_t, uint32_t, <)
309 IWMMXT_OP_CMP(maxs
, int8_t, int16_t, int32_t, >)
310 IWMMXT_OP_CMP(maxu
, uint8_t, uint16_t, uint32_t, >)
312 #define CMP(SHR, TYPE, OPER, MASK) ((uint64_t) (((TYPE) ((a >> SHR) & MASK) \
313 OPER (TYPE) ((b >> SHR) & MASK)) & MASK) << SHR)
314 IWMMXT_OP_CMP(subn
, uint8_t, uint16_t, uint32_t, -)
315 IWMMXT_OP_CMP(addn
, uint8_t, uint16_t, uint32_t, +)
317 /* TODO Signed- and Unsigned-Saturation */
318 #define CMP(SHR, TYPE, OPER, MASK) ((uint64_t) (((TYPE) ((a >> SHR) & MASK) \
319 OPER (TYPE) ((b >> SHR) & MASK)) & MASK) << SHR)
320 IWMMXT_OP_CMP(subu
, uint8_t, uint16_t, uint32_t, -)
321 IWMMXT_OP_CMP(addu
, uint8_t, uint16_t, uint32_t, +)
322 IWMMXT_OP_CMP(subs
, int8_t, int16_t, int32_t, -)
323 IWMMXT_OP_CMP(adds
, int8_t, int16_t, int32_t, +)
327 #define AVGB(SHR) ((( \
328 ((a >> SHR) & 0xff) + ((b >> SHR) & 0xff) + round) >> 1) << SHR)
329 #define IWMMXT_OP_AVGB(r) \
330 uint64_t HELPER(iwmmxt_avgb##r)(CPUARMState *env, uint64_t a, uint64_t b) \
332 const int round = r; \
333 a = AVGB(0) | AVGB(8) | AVGB(16) | AVGB(24) | \
334 AVGB(32) | AVGB(40) | AVGB(48) | AVGB(56); \
335 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \
336 SIMD8_SET(ZBIT8((a >> 0) & 0xff), SIMD_ZBIT, 0) | \
337 SIMD8_SET(ZBIT8((a >> 8) & 0xff), SIMD_ZBIT, 1) | \
338 SIMD8_SET(ZBIT8((a >> 16) & 0xff), SIMD_ZBIT, 2) | \
339 SIMD8_SET(ZBIT8((a >> 24) & 0xff), SIMD_ZBIT, 3) | \
340 SIMD8_SET(ZBIT8((a >> 32) & 0xff), SIMD_ZBIT, 4) | \
341 SIMD8_SET(ZBIT8((a >> 40) & 0xff), SIMD_ZBIT, 5) | \
342 SIMD8_SET(ZBIT8((a >> 48) & 0xff), SIMD_ZBIT, 6) | \
343 SIMD8_SET(ZBIT8((a >> 56) & 0xff), SIMD_ZBIT, 7); \
348 #undef IWMMXT_OP_AVGB
351 #define AVGW(SHR) ((( \
352 ((a >> SHR) & 0xffff) + ((b >> SHR) & 0xffff) + round) >> 1) << SHR)
353 #define IWMMXT_OP_AVGW(r) \
354 uint64_t HELPER(iwmmxt_avgw##r)(CPUARMState *env, uint64_t a, uint64_t b) \
356 const int round = r; \
357 a = AVGW(0) | AVGW(16) | AVGW(32) | AVGW(48); \
358 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \
359 SIMD16_SET(ZBIT16((a >> 0) & 0xffff), SIMD_ZBIT, 0) | \
360 SIMD16_SET(ZBIT16((a >> 16) & 0xffff), SIMD_ZBIT, 1) | \
361 SIMD16_SET(ZBIT16((a >> 32) & 0xffff), SIMD_ZBIT, 2) | \
362 SIMD16_SET(ZBIT16((a >> 48) & 0xffff), SIMD_ZBIT, 3); \
367 #undef IWMMXT_OP_AVGW
370 uint64_t HELPER(iwmmxt_msadb
)(uint64_t a
, uint64_t b
)
372 a
= ((((a
>> 0 ) & 0xffff) * ((b
>> 0) & 0xffff) +
373 ((a
>> 16) & 0xffff) * ((b
>> 16) & 0xffff)) & 0xffffffff) |
374 ((((a
>> 32) & 0xffff) * ((b
>> 32) & 0xffff) +
375 ((a
>> 48) & 0xffff) * ((b
>> 48) & 0xffff)) << 32);
379 uint64_t HELPER(iwmmxt_align
)(uint64_t a
, uint64_t b
, uint32_t n
)
382 a
|= b
<< (64 - (n
<< 3));
386 uint64_t HELPER(iwmmxt_insr
)(uint64_t x
, uint32_t a
, uint32_t b
, uint32_t n
)
388 x
&= ~((uint64_t) b
<< n
);
389 x
|= (uint64_t) (a
& b
) << n
;
393 uint32_t HELPER(iwmmxt_setpsr_nz
)(uint64_t x
)
395 return SIMD64_SET((x
== 0), SIMD_ZBIT
) |
396 SIMD64_SET((x
& (1ULL << 63)), SIMD_NBIT
);
399 uint64_t HELPER(iwmmxt_bcstb
)(uint32_t arg
)
403 ((uint64_t) arg
<< 0 ) | ((uint64_t) arg
<< 8 ) |
404 ((uint64_t) arg
<< 16) | ((uint64_t) arg
<< 24) |
405 ((uint64_t) arg
<< 32) | ((uint64_t) arg
<< 40) |
406 ((uint64_t) arg
<< 48) | ((uint64_t) arg
<< 56);
409 uint64_t HELPER(iwmmxt_bcstw
)(uint32_t arg
)
413 ((uint64_t) arg
<< 0 ) | ((uint64_t) arg
<< 16) |
414 ((uint64_t) arg
<< 32) | ((uint64_t) arg
<< 48);
417 uint64_t HELPER(iwmmxt_bcstl
)(uint32_t arg
)
419 return arg
| ((uint64_t) arg
<< 32);
422 uint64_t HELPER(iwmmxt_addcb
)(uint64_t x
)
425 ((x
>> 0) & 0xff) + ((x
>> 8) & 0xff) +
426 ((x
>> 16) & 0xff) + ((x
>> 24) & 0xff) +
427 ((x
>> 32) & 0xff) + ((x
>> 40) & 0xff) +
428 ((x
>> 48) & 0xff) + ((x
>> 56) & 0xff);
431 uint64_t HELPER(iwmmxt_addcw
)(uint64_t x
)
434 ((x
>> 0) & 0xffff) + ((x
>> 16) & 0xffff) +
435 ((x
>> 32) & 0xffff) + ((x
>> 48) & 0xffff);
438 uint64_t HELPER(iwmmxt_addcl
)(uint64_t x
)
440 return (x
& 0xffffffff) + (x
>> 32);
443 uint32_t HELPER(iwmmxt_msbb
)(uint64_t x
)
446 ((x
>> 7) & 0x01) | ((x
>> 14) & 0x02) |
447 ((x
>> 21) & 0x04) | ((x
>> 28) & 0x08) |
448 ((x
>> 35) & 0x10) | ((x
>> 42) & 0x20) |
449 ((x
>> 49) & 0x40) | ((x
>> 56) & 0x80);
452 uint32_t HELPER(iwmmxt_msbw
)(uint64_t x
)
455 ((x
>> 15) & 0x01) | ((x
>> 30) & 0x02) |
456 ((x
>> 45) & 0x04) | ((x
>> 52) & 0x08);
459 uint32_t HELPER(iwmmxt_msbl
)(uint64_t x
)
461 return ((x
>> 31) & 0x01) | ((x
>> 62) & 0x02);
464 /* FIXME: Split wCASF setting into a separate op to avoid env use. */
465 uint64_t HELPER(iwmmxt_srlw
)(CPUARMState
*env
, uint64_t x
, uint32_t n
)
467 x
= (((x
& (0xffffll
<< 0)) >> n
) & (0xffffll
<< 0)) |
468 (((x
& (0xffffll
<< 16)) >> n
) & (0xffffll
<< 16)) |
469 (((x
& (0xffffll
<< 32)) >> n
) & (0xffffll
<< 32)) |
470 (((x
& (0xffffll
<< 48)) >> n
) & (0xffffll
<< 48));
471 env
->iwmmxt
.cregs
[ARM_IWMMXT_wCASF
] =
472 NZBIT16(x
>> 0, 0) | NZBIT16(x
>> 16, 1) |
473 NZBIT16(x
>> 32, 2) | NZBIT16(x
>> 48, 3);
477 uint64_t HELPER(iwmmxt_srll
)(CPUARMState
*env
, uint64_t x
, uint32_t n
)
479 x
= ((x
& (0xffffffffll
<< 0)) >> n
) |
480 ((x
>> n
) & (0xffffffffll
<< 32));
481 env
->iwmmxt
.cregs
[ARM_IWMMXT_wCASF
] =
482 NZBIT32(x
>> 0, 0) | NZBIT32(x
>> 32, 1);
486 uint64_t HELPER(iwmmxt_srlq
)(CPUARMState
*env
, uint64_t x
, uint32_t n
)
489 env
->iwmmxt
.cregs
[ARM_IWMMXT_wCASF
] = NZBIT64(x
);
493 uint64_t HELPER(iwmmxt_sllw
)(CPUARMState
*env
, uint64_t x
, uint32_t n
)
495 x
= (((x
& (0xffffll
<< 0)) << n
) & (0xffffll
<< 0)) |
496 (((x
& (0xffffll
<< 16)) << n
) & (0xffffll
<< 16)) |
497 (((x
& (0xffffll
<< 32)) << n
) & (0xffffll
<< 32)) |
498 (((x
& (0xffffll
<< 48)) << n
) & (0xffffll
<< 48));
499 env
->iwmmxt
.cregs
[ARM_IWMMXT_wCASF
] =
500 NZBIT16(x
>> 0, 0) | NZBIT16(x
>> 16, 1) |
501 NZBIT16(x
>> 32, 2) | NZBIT16(x
>> 48, 3);
505 uint64_t HELPER(iwmmxt_slll
)(CPUARMState
*env
, uint64_t x
, uint32_t n
)
507 x
= ((x
<< n
) & (0xffffffffll
<< 0)) |
508 ((x
& (0xffffffffll
<< 32)) << n
);
509 env
->iwmmxt
.cregs
[ARM_IWMMXT_wCASF
] =
510 NZBIT32(x
>> 0, 0) | NZBIT32(x
>> 32, 1);
514 uint64_t HELPER(iwmmxt_sllq
)(CPUARMState
*env
, uint64_t x
, uint32_t n
)
517 env
->iwmmxt
.cregs
[ARM_IWMMXT_wCASF
] = NZBIT64(x
);
521 uint64_t HELPER(iwmmxt_sraw
)(CPUARMState
*env
, uint64_t x
, uint32_t n
)
523 x
= ((uint64_t) ((EXTEND16(x
>> 0) >> n
) & 0xffff) << 0) |
524 ((uint64_t) ((EXTEND16(x
>> 16) >> n
) & 0xffff) << 16) |
525 ((uint64_t) ((EXTEND16(x
>> 32) >> n
) & 0xffff) << 32) |
526 ((uint64_t) ((EXTEND16(x
>> 48) >> n
) & 0xffff) << 48);
527 env
->iwmmxt
.cregs
[ARM_IWMMXT_wCASF
] =
528 NZBIT16(x
>> 0, 0) | NZBIT16(x
>> 16, 1) |
529 NZBIT16(x
>> 32, 2) | NZBIT16(x
>> 48, 3);
533 uint64_t HELPER(iwmmxt_sral
)(CPUARMState
*env
, uint64_t x
, uint32_t n
)
535 x
= (((EXTEND32(x
>> 0) >> n
) & 0xffffffff) << 0) |
536 (((EXTEND32(x
>> 32) >> n
) & 0xffffffff) << 32);
537 env
->iwmmxt
.cregs
[ARM_IWMMXT_wCASF
] =
538 NZBIT32(x
>> 0, 0) | NZBIT32(x
>> 32, 1);
542 uint64_t HELPER(iwmmxt_sraq
)(CPUARMState
*env
, uint64_t x
, uint32_t n
)
544 x
= (int64_t) x
>> n
;
545 env
->iwmmxt
.cregs
[ARM_IWMMXT_wCASF
] = NZBIT64(x
);
549 uint64_t HELPER(iwmmxt_rorw
)(CPUARMState
*env
, uint64_t x
, uint32_t n
)
551 x
= ((((x
& (0xffffll
<< 0)) >> n
) |
552 ((x
& (0xffffll
<< 0)) << (16 - n
))) & (0xffffll
<< 0)) |
553 ((((x
& (0xffffll
<< 16)) >> n
) |
554 ((x
& (0xffffll
<< 16)) << (16 - n
))) & (0xffffll
<< 16)) |
555 ((((x
& (0xffffll
<< 32)) >> n
) |
556 ((x
& (0xffffll
<< 32)) << (16 - n
))) & (0xffffll
<< 32)) |
557 ((((x
& (0xffffll
<< 48)) >> n
) |
558 ((x
& (0xffffll
<< 48)) << (16 - n
))) & (0xffffll
<< 48));
559 env
->iwmmxt
.cregs
[ARM_IWMMXT_wCASF
] =
560 NZBIT16(x
>> 0, 0) | NZBIT16(x
>> 16, 1) |
561 NZBIT16(x
>> 32, 2) | NZBIT16(x
>> 48, 3);
565 uint64_t HELPER(iwmmxt_rorl
)(CPUARMState
*env
, uint64_t x
, uint32_t n
)
567 x
= ((x
& (0xffffffffll
<< 0)) >> n
) |
568 ((x
>> n
) & (0xffffffffll
<< 32)) |
569 ((x
<< (32 - n
)) & (0xffffffffll
<< 0)) |
570 ((x
& (0xffffffffll
<< 32)) << (32 - n
));
571 env
->iwmmxt
.cregs
[ARM_IWMMXT_wCASF
] =
572 NZBIT32(x
>> 0, 0) | NZBIT32(x
>> 32, 1);
576 uint64_t HELPER(iwmmxt_rorq
)(CPUARMState
*env
, uint64_t x
, uint32_t n
)
579 env
->iwmmxt
.cregs
[ARM_IWMMXT_wCASF
] = NZBIT64(x
);
583 uint64_t HELPER(iwmmxt_shufh
)(CPUARMState
*env
, uint64_t x
, uint32_t n
)
585 x
= (((x
>> ((n
<< 4) & 0x30)) & 0xffff) << 0) |
586 (((x
>> ((n
<< 2) & 0x30)) & 0xffff) << 16) |
587 (((x
>> ((n
<< 0) & 0x30)) & 0xffff) << 32) |
588 (((x
>> ((n
>> 2) & 0x30)) & 0xffff) << 48);
589 env
->iwmmxt
.cregs
[ARM_IWMMXT_wCASF
] =
590 NZBIT16(x
>> 0, 0) | NZBIT16(x
>> 16, 1) |
591 NZBIT16(x
>> 32, 2) | NZBIT16(x
>> 48, 3);
595 /* TODO: Unsigned-Saturation */
596 uint64_t HELPER(iwmmxt_packuw
)(CPUARMState
*env
, uint64_t a
, uint64_t b
)
598 a
= (((a
>> 0) & 0xff) << 0) | (((a
>> 16) & 0xff) << 8) |
599 (((a
>> 32) & 0xff) << 16) | (((a
>> 48) & 0xff) << 24) |
600 (((b
>> 0) & 0xff) << 32) | (((b
>> 16) & 0xff) << 40) |
601 (((b
>> 32) & 0xff) << 48) | (((b
>> 48) & 0xff) << 56);
602 env
->iwmmxt
.cregs
[ARM_IWMMXT_wCASF
] =
603 NZBIT8(a
>> 0, 0) | NZBIT8(a
>> 8, 1) |
604 NZBIT8(a
>> 16, 2) | NZBIT8(a
>> 24, 3) |
605 NZBIT8(a
>> 32, 4) | NZBIT8(a
>> 40, 5) |
606 NZBIT8(a
>> 48, 6) | NZBIT8(a
>> 56, 7);
610 uint64_t HELPER(iwmmxt_packul
)(CPUARMState
*env
, uint64_t a
, uint64_t b
)
612 a
= (((a
>> 0) & 0xffff) << 0) | (((a
>> 32) & 0xffff) << 16) |
613 (((b
>> 0) & 0xffff) << 32) | (((b
>> 32) & 0xffff) << 48);
614 env
->iwmmxt
.cregs
[ARM_IWMMXT_wCASF
] =
615 NZBIT16(a
>> 0, 0) | NZBIT16(a
>> 16, 1) |
616 NZBIT16(a
>> 32, 2) | NZBIT16(a
>> 48, 3);
620 uint64_t HELPER(iwmmxt_packuq
)(CPUARMState
*env
, uint64_t a
, uint64_t b
)
622 a
= (a
& 0xffffffff) | ((b
& 0xffffffff) << 32);
623 env
->iwmmxt
.cregs
[ARM_IWMMXT_wCASF
] =
624 NZBIT32(a
>> 0, 0) | NZBIT32(a
>> 32, 1);
628 /* TODO: Signed-Saturation */
629 uint64_t HELPER(iwmmxt_packsw
)(CPUARMState
*env
, uint64_t a
, uint64_t b
)
631 a
= (((a
>> 0) & 0xff) << 0) | (((a
>> 16) & 0xff) << 8) |
632 (((a
>> 32) & 0xff) << 16) | (((a
>> 48) & 0xff) << 24) |
633 (((b
>> 0) & 0xff) << 32) | (((b
>> 16) & 0xff) << 40) |
634 (((b
>> 32) & 0xff) << 48) | (((b
>> 48) & 0xff) << 56);
635 env
->iwmmxt
.cregs
[ARM_IWMMXT_wCASF
] =
636 NZBIT8(a
>> 0, 0) | NZBIT8(a
>> 8, 1) |
637 NZBIT8(a
>> 16, 2) | NZBIT8(a
>> 24, 3) |
638 NZBIT8(a
>> 32, 4) | NZBIT8(a
>> 40, 5) |
639 NZBIT8(a
>> 48, 6) | NZBIT8(a
>> 56, 7);
643 uint64_t HELPER(iwmmxt_packsl
)(CPUARMState
*env
, uint64_t a
, uint64_t b
)
645 a
= (((a
>> 0) & 0xffff) << 0) | (((a
>> 32) & 0xffff) << 16) |
646 (((b
>> 0) & 0xffff) << 32) | (((b
>> 32) & 0xffff) << 48);
647 env
->iwmmxt
.cregs
[ARM_IWMMXT_wCASF
] =
648 NZBIT16(a
>> 0, 0) | NZBIT16(a
>> 16, 1) |
649 NZBIT16(a
>> 32, 2) | NZBIT16(a
>> 48, 3);
653 uint64_t HELPER(iwmmxt_packsq
)(CPUARMState
*env
, uint64_t a
, uint64_t b
)
655 a
= (a
& 0xffffffff) | ((b
& 0xffffffff) << 32);
656 env
->iwmmxt
.cregs
[ARM_IWMMXT_wCASF
] =
657 NZBIT32(a
>> 0, 0) | NZBIT32(a
>> 32, 1);
661 uint64_t HELPER(iwmmxt_muladdsl
)(uint64_t c
, uint32_t a
, uint32_t b
)
663 return c
+ ((int32_t) EXTEND32(a
) * (int32_t) EXTEND32(b
));
666 uint64_t HELPER(iwmmxt_muladdsw
)(uint64_t c
, uint32_t a
, uint32_t b
)
668 c
+= EXTEND32(EXTEND16S((a
>> 0) & 0xffff) *
669 EXTEND16S((b
>> 0) & 0xffff));
670 c
+= EXTEND32(EXTEND16S((a
>> 16) & 0xffff) *
671 EXTEND16S((b
>> 16) & 0xffff));
675 uint64_t HELPER(iwmmxt_muladdswl
)(uint64_t c
, uint32_t a
, uint32_t b
)
677 return c
+ (EXTEND32(EXTEND16S(a
& 0xffff) *
678 EXTEND16S(b
& 0xffff)));