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[qemu/ar7.git] / cpu-exec.c
blobe114fcdf2962de903a992d927c43087fe627c29a
1 /*
2 * emulator main execution loop
4 * Copyright (c) 2003-2005 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 #include "qemu/osdep.h"
20 #include "cpu.h"
21 #include "trace.h"
22 #include "disas/disas.h"
23 #include "exec/exec-all.h"
24 #include "tcg.h"
25 #include "qemu/atomic.h"
26 #include "sysemu/qtest.h"
27 #include "qemu/timer.h"
28 #include "exec/address-spaces.h"
29 #include "qemu/rcu.h"
30 #include "exec/tb-hash.h"
31 #include "exec/log.h"
32 #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
33 #include "hw/i386/apic.h"
34 #endif
35 #include "sysemu/replay.h"
37 /* -icount align implementation. */
39 typedef struct SyncClocks {
40 int64_t diff_clk;
41 int64_t last_cpu_icount;
42 int64_t realtime_clock;
43 } SyncClocks;
45 #if !defined(CONFIG_USER_ONLY)
46 /* Allow the guest to have a max 3ms advance.
47 * The difference between the 2 clocks could therefore
48 * oscillate around 0.
50 #define VM_CLOCK_ADVANCE 3000000
51 #define THRESHOLD_REDUCE 1.5
52 #define MAX_DELAY_PRINT_RATE 2000000000LL
53 #define MAX_NB_PRINTS 100
55 static void align_clocks(SyncClocks *sc, const CPUState *cpu)
57 int64_t cpu_icount;
59 if (!icount_align_option) {
60 return;
63 cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
64 sc->diff_clk += cpu_icount_to_ns(sc->last_cpu_icount - cpu_icount);
65 sc->last_cpu_icount = cpu_icount;
67 if (sc->diff_clk > VM_CLOCK_ADVANCE) {
68 #ifndef _WIN32
69 struct timespec sleep_delay, rem_delay;
70 sleep_delay.tv_sec = sc->diff_clk / 1000000000LL;
71 sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL;
72 if (nanosleep(&sleep_delay, &rem_delay) < 0) {
73 sc->diff_clk = rem_delay.tv_sec * 1000000000LL + rem_delay.tv_nsec;
74 } else {
75 sc->diff_clk = 0;
77 #else
78 Sleep(sc->diff_clk / SCALE_MS);
79 sc->diff_clk = 0;
80 #endif
84 static void print_delay(const SyncClocks *sc)
86 static float threshold_delay;
87 static int64_t last_realtime_clock;
88 static int nb_prints;
90 if (icount_align_option &&
91 sc->realtime_clock - last_realtime_clock >= MAX_DELAY_PRINT_RATE &&
92 nb_prints < MAX_NB_PRINTS) {
93 if ((-sc->diff_clk / (float)1000000000LL > threshold_delay) ||
94 (-sc->diff_clk / (float)1000000000LL <
95 (threshold_delay - THRESHOLD_REDUCE))) {
96 threshold_delay = (-sc->diff_clk / 1000000000LL) + 1;
97 printf("Warning: The guest is now late by %.1f to %.1f seconds\n",
98 threshold_delay - 1,
99 threshold_delay);
100 nb_prints++;
101 last_realtime_clock = sc->realtime_clock;
106 static void init_delay_params(SyncClocks *sc,
107 const CPUState *cpu)
109 if (!icount_align_option) {
110 return;
112 sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT);
113 sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - sc->realtime_clock;
114 sc->last_cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
115 if (sc->diff_clk < max_delay) {
116 max_delay = sc->diff_clk;
118 if (sc->diff_clk > max_advance) {
119 max_advance = sc->diff_clk;
122 /* Print every 2s max if the guest is late. We limit the number
123 of printed messages to NB_PRINT_MAX(currently 100) */
124 print_delay(sc);
126 #else
127 static void align_clocks(SyncClocks *sc, const CPUState *cpu)
131 static void init_delay_params(SyncClocks *sc, const CPUState *cpu)
134 #endif /* CONFIG USER ONLY */
136 /* Execute a TB, and fix up the CPU state afterwards if necessary */
137 static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, TranslationBlock *itb)
139 CPUArchState *env = cpu->env_ptr;
140 uintptr_t ret;
141 TranslationBlock *last_tb;
142 int tb_exit;
143 uint8_t *tb_ptr = itb->tc_ptr;
145 qemu_log_mask_and_addr(CPU_LOG_EXEC, itb->pc,
146 "Trace %p [" TARGET_FMT_lx "] %s\n",
147 itb->tc_ptr, itb->pc, lookup_symbol(itb->pc));
149 #if defined(DEBUG_DISAS)
150 if (qemu_loglevel_mask(CPU_LOG_TB_CPU)
151 && qemu_log_in_addr_range(itb->pc)) {
152 #if defined(TARGET_I386)
153 log_cpu_state(cpu, CPU_DUMP_CCOP);
154 #elif defined(TARGET_M68K)
155 /* ??? Should not modify env state for dumping. */
156 cpu_m68k_flush_flags(env, env->cc_op);
157 env->cc_op = CC_OP_FLAGS;
158 env->sr = (env->sr & 0xffe0) | env->cc_dest | (env->cc_x << 4);
159 log_cpu_state(cpu, 0);
160 #else
161 log_cpu_state(cpu, 0);
162 #endif
164 #endif /* DEBUG_DISAS */
166 cpu->can_do_io = !use_icount;
167 ret = tcg_qemu_tb_exec(env, tb_ptr);
168 cpu->can_do_io = 1;
169 last_tb = (TranslationBlock *)(ret & ~TB_EXIT_MASK);
170 tb_exit = ret & TB_EXIT_MASK;
171 trace_exec_tb_exit(last_tb, tb_exit);
173 if (tb_exit > TB_EXIT_IDX1) {
174 /* We didn't start executing this TB (eg because the instruction
175 * counter hit zero); we must restore the guest PC to the address
176 * of the start of the TB.
178 CPUClass *cc = CPU_GET_CLASS(cpu);
179 qemu_log_mask_and_addr(CPU_LOG_EXEC, last_tb->pc,
180 "Stopped execution of TB chain before %p ["
181 TARGET_FMT_lx "] %s\n",
182 last_tb->tc_ptr, last_tb->pc,
183 lookup_symbol(last_tb->pc));
184 if (cc->synchronize_from_tb) {
185 cc->synchronize_from_tb(cpu, last_tb);
186 } else {
187 assert(cc->set_pc);
188 cc->set_pc(cpu, last_tb->pc);
191 if (tb_exit == TB_EXIT_REQUESTED) {
192 /* We were asked to stop executing TBs (probably a pending
193 * interrupt. We've now stopped, so clear the flag.
195 atomic_set(&cpu->tcg_exit_req, 0);
197 return ret;
200 #ifndef CONFIG_USER_ONLY
201 /* Execute the code without caching the generated code. An interpreter
202 could be used if available. */
203 static void cpu_exec_nocache(CPUState *cpu, int max_cycles,
204 TranslationBlock *orig_tb, bool ignore_icount)
206 TranslationBlock *tb;
208 /* Should never happen.
209 We only end up here when an existing TB is too long. */
210 if (max_cycles > CF_COUNT_MASK)
211 max_cycles = CF_COUNT_MASK;
213 tb = tb_gen_code(cpu, orig_tb->pc, orig_tb->cs_base, orig_tb->flags,
214 max_cycles | CF_NOCACHE
215 | (ignore_icount ? CF_IGNORE_ICOUNT : 0));
216 tb->orig_tb = orig_tb;
217 /* execute the generated code */
218 trace_exec_tb_nocache(tb, tb->pc);
219 cpu_tb_exec(cpu, tb);
220 tb_phys_invalidate(tb, -1);
221 tb_free(tb);
223 #endif
225 struct tb_desc {
226 target_ulong pc;
227 target_ulong cs_base;
228 CPUArchState *env;
229 tb_page_addr_t phys_page1;
230 uint32_t flags;
233 static bool tb_cmp(const void *p, const void *d)
235 const TranslationBlock *tb = p;
236 const struct tb_desc *desc = d;
238 if (tb->pc == desc->pc &&
239 tb->page_addr[0] == desc->phys_page1 &&
240 tb->cs_base == desc->cs_base &&
241 tb->flags == desc->flags &&
242 !atomic_read(&tb->invalid)) {
243 /* check next page if needed */
244 if (tb->page_addr[1] == -1) {
245 return true;
246 } else {
247 tb_page_addr_t phys_page2;
248 target_ulong virt_page2;
250 virt_page2 = (desc->pc & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE;
251 phys_page2 = get_page_addr_code(desc->env, virt_page2);
252 if (tb->page_addr[1] == phys_page2) {
253 return true;
257 return false;
260 static TranslationBlock *tb_htable_lookup(CPUState *cpu,
261 target_ulong pc,
262 target_ulong cs_base,
263 uint32_t flags)
265 tb_page_addr_t phys_pc;
266 struct tb_desc desc;
267 uint32_t h;
269 desc.env = (CPUArchState *)cpu->env_ptr;
270 desc.cs_base = cs_base;
271 desc.flags = flags;
272 desc.pc = pc;
273 phys_pc = get_page_addr_code(desc.env, pc);
274 desc.phys_page1 = phys_pc & TARGET_PAGE_MASK;
275 h = tb_hash_func(phys_pc, pc, flags);
276 return qht_lookup(&tcg_ctx.tb_ctx.htable, tb_cmp, &desc, h);
279 static inline TranslationBlock *tb_find(CPUState *cpu,
280 TranslationBlock *last_tb,
281 int tb_exit)
283 CPUArchState *env = (CPUArchState *)cpu->env_ptr;
284 TranslationBlock *tb;
285 target_ulong cs_base, pc;
286 uint32_t flags;
287 bool have_tb_lock = false;
289 /* we record a subset of the CPU state. It will
290 always be the same before a given translated block
291 is executed. */
292 cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
293 tb = atomic_rcu_read(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)]);
294 if (unlikely(!tb || tb->pc != pc || tb->cs_base != cs_base ||
295 tb->flags != flags)) {
296 tb = tb_htable_lookup(cpu, pc, cs_base, flags);
297 if (!tb) {
299 /* mmap_lock is needed by tb_gen_code, and mmap_lock must be
300 * taken outside tb_lock. As system emulation is currently
301 * single threaded the locks are NOPs.
303 mmap_lock();
304 tb_lock();
305 have_tb_lock = true;
307 /* There's a chance that our desired tb has been translated while
308 * taking the locks so we check again inside the lock.
310 tb = tb_htable_lookup(cpu, pc, cs_base, flags);
311 if (!tb) {
312 /* if no translated code available, then translate it now */
313 tb = tb_gen_code(cpu, pc, cs_base, flags, 0);
316 mmap_unlock();
319 /* We add the TB in the virtual pc hash table for the fast lookup */
320 atomic_set(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)], tb);
322 #ifndef CONFIG_USER_ONLY
323 /* We don't take care of direct jumps when address mapping changes in
324 * system emulation. So it's not safe to make a direct jump to a TB
325 * spanning two pages because the mapping for the second page can change.
327 if (tb->page_addr[1] != -1) {
328 last_tb = NULL;
330 #endif
331 /* See if we can patch the calling TB. */
332 if (last_tb && !qemu_loglevel_mask(CPU_LOG_TB_NOCHAIN)) {
333 if (!have_tb_lock) {
334 tb_lock();
335 have_tb_lock = true;
337 if (!tb->invalid) {
338 tb_add_jump(last_tb, tb_exit, tb);
341 if (have_tb_lock) {
342 tb_unlock();
344 return tb;
347 static inline bool cpu_handle_halt(CPUState *cpu)
349 if (cpu->halted) {
350 #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
351 if ((cpu->interrupt_request & CPU_INTERRUPT_POLL)
352 && replay_interrupt()) {
353 X86CPU *x86_cpu = X86_CPU(cpu);
354 apic_poll_irq(x86_cpu->apic_state);
355 cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL);
357 #endif
358 if (!cpu_has_work(cpu)) {
359 current_cpu = NULL;
360 return true;
363 cpu->halted = 0;
366 return false;
369 static inline void cpu_handle_debug_exception(CPUState *cpu)
371 CPUClass *cc = CPU_GET_CLASS(cpu);
372 CPUWatchpoint *wp;
374 if (!cpu->watchpoint_hit) {
375 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
376 wp->flags &= ~BP_WATCHPOINT_HIT;
380 cc->debug_excp_handler(cpu);
383 static inline bool cpu_handle_exception(CPUState *cpu, int *ret)
385 if (cpu->exception_index >= 0) {
386 if (cpu->exception_index >= EXCP_INTERRUPT) {
387 /* exit request from the cpu execution loop */
388 *ret = cpu->exception_index;
389 if (*ret == EXCP_DEBUG) {
390 cpu_handle_debug_exception(cpu);
392 cpu->exception_index = -1;
393 return true;
394 } else {
395 #if defined(CONFIG_USER_ONLY)
396 /* if user mode only, we simulate a fake exception
397 which will be handled outside the cpu execution
398 loop */
399 #if defined(TARGET_I386)
400 CPUClass *cc = CPU_GET_CLASS(cpu);
401 cc->do_interrupt(cpu);
402 #endif
403 *ret = cpu->exception_index;
404 cpu->exception_index = -1;
405 return true;
406 #else
407 if (replay_exception()) {
408 CPUClass *cc = CPU_GET_CLASS(cpu);
409 cc->do_interrupt(cpu);
410 cpu->exception_index = -1;
411 } else if (!replay_has_interrupt()) {
412 /* give a chance to iothread in replay mode */
413 *ret = EXCP_INTERRUPT;
414 return true;
416 #endif
418 #ifndef CONFIG_USER_ONLY
419 } else if (replay_has_exception()
420 && cpu->icount_decr.u16.low + cpu->icount_extra == 0) {
421 /* try to cause an exception pending in the log */
422 cpu_exec_nocache(cpu, 1, tb_find(cpu, NULL, 0), true);
423 *ret = -1;
424 return true;
425 #endif
428 return false;
431 static inline void cpu_handle_interrupt(CPUState *cpu,
432 TranslationBlock **last_tb)
434 CPUClass *cc = CPU_GET_CLASS(cpu);
435 int interrupt_request = cpu->interrupt_request;
437 if (unlikely(interrupt_request)) {
438 if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) {
439 /* Mask out external interrupts for this step. */
440 interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK;
442 if (interrupt_request & CPU_INTERRUPT_DEBUG) {
443 cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG;
444 cpu->exception_index = EXCP_DEBUG;
445 cpu_loop_exit(cpu);
447 if (replay_mode == REPLAY_MODE_PLAY && !replay_has_interrupt()) {
448 /* Do nothing */
449 } else if (interrupt_request & CPU_INTERRUPT_HALT) {
450 replay_interrupt();
451 cpu->interrupt_request &= ~CPU_INTERRUPT_HALT;
452 cpu->halted = 1;
453 cpu->exception_index = EXCP_HLT;
454 cpu_loop_exit(cpu);
456 #if defined(TARGET_I386)
457 else if (interrupt_request & CPU_INTERRUPT_INIT) {
458 X86CPU *x86_cpu = X86_CPU(cpu);
459 CPUArchState *env = &x86_cpu->env;
460 replay_interrupt();
461 cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0);
462 do_cpu_init(x86_cpu);
463 cpu->exception_index = EXCP_HALTED;
464 cpu_loop_exit(cpu);
466 #else
467 else if (interrupt_request & CPU_INTERRUPT_RESET) {
468 replay_interrupt();
469 cpu_reset(cpu);
470 cpu_loop_exit(cpu);
472 #endif
473 /* The target hook has 3 exit conditions:
474 False when the interrupt isn't processed,
475 True when it is, and we should restart on a new TB,
476 and via longjmp via cpu_loop_exit. */
477 else {
478 replay_interrupt();
479 if (cc->cpu_exec_interrupt(cpu, interrupt_request)) {
480 *last_tb = NULL;
482 /* The target hook may have updated the 'cpu->interrupt_request';
483 * reload the 'interrupt_request' value */
484 interrupt_request = cpu->interrupt_request;
486 if (interrupt_request & CPU_INTERRUPT_EXITTB) {
487 cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
488 /* ensure that no TB jump will be modified as
489 the program flow was changed */
490 *last_tb = NULL;
493 if (unlikely(atomic_read(&cpu->exit_request) || replay_has_interrupt())) {
494 atomic_set(&cpu->exit_request, 0);
495 cpu->exception_index = EXCP_INTERRUPT;
496 cpu_loop_exit(cpu);
500 static inline void cpu_loop_exec_tb(CPUState *cpu, TranslationBlock *tb,
501 TranslationBlock **last_tb, int *tb_exit,
502 SyncClocks *sc)
504 uintptr_t ret;
506 if (unlikely(atomic_read(&cpu->exit_request))) {
507 return;
510 trace_exec_tb(tb, tb->pc);
511 ret = cpu_tb_exec(cpu, tb);
512 *last_tb = (TranslationBlock *)(ret & ~TB_EXIT_MASK);
513 *tb_exit = ret & TB_EXIT_MASK;
514 switch (*tb_exit) {
515 case TB_EXIT_REQUESTED:
516 /* Something asked us to stop executing
517 * chained TBs; just continue round the main
518 * loop. Whatever requested the exit will also
519 * have set something else (eg exit_request or
520 * interrupt_request) which we will handle
521 * next time around the loop. But we need to
522 * ensure the tcg_exit_req read in generated code
523 * comes before the next read of cpu->exit_request
524 * or cpu->interrupt_request.
526 smp_rmb();
527 *last_tb = NULL;
528 break;
529 case TB_EXIT_ICOUNT_EXPIRED:
531 /* Instruction counter expired. */
532 #ifdef CONFIG_USER_ONLY
533 abort();
534 #else
535 int insns_left = cpu->icount_decr.u32;
536 if (cpu->icount_extra && insns_left >= 0) {
537 /* Refill decrementer and continue execution. */
538 cpu->icount_extra += insns_left;
539 insns_left = MIN(0xffff, cpu->icount_extra);
540 cpu->icount_extra -= insns_left;
541 cpu->icount_decr.u16.low = insns_left;
542 } else {
543 if (insns_left > 0) {
544 /* Execute remaining instructions. */
545 cpu_exec_nocache(cpu, insns_left, *last_tb, false);
546 align_clocks(sc, cpu);
548 cpu->exception_index = EXCP_INTERRUPT;
549 *last_tb = NULL;
550 cpu_loop_exit(cpu);
552 break;
553 #endif
555 default:
556 break;
560 /* main execution loop */
562 int cpu_exec(CPUState *cpu)
564 CPUClass *cc = CPU_GET_CLASS(cpu);
565 int ret;
566 SyncClocks sc;
568 /* replay_interrupt may need current_cpu */
569 current_cpu = cpu;
571 if (cpu_handle_halt(cpu)) {
572 return EXCP_HALTED;
575 atomic_mb_set(&tcg_current_cpu, cpu);
576 rcu_read_lock();
578 if (unlikely(atomic_mb_read(&exit_request))) {
579 cpu->exit_request = 1;
582 cc->cpu_exec_enter(cpu);
584 /* Calculate difference between guest clock and host clock.
585 * This delay includes the delay of the last cycle, so
586 * what we have to do is sleep until it is 0. As for the
587 * advance/delay we gain here, we try to fix it next time.
589 init_delay_params(&sc, cpu);
591 for(;;) {
592 /* prepare setjmp context for exception handling */
593 if (sigsetjmp(cpu->jmp_env, 0) == 0) {
594 TranslationBlock *tb, *last_tb = NULL;
595 int tb_exit = 0;
597 /* if an exception is pending, we execute it here */
598 if (cpu_handle_exception(cpu, &ret)) {
599 break;
602 for(;;) {
603 cpu_handle_interrupt(cpu, &last_tb);
604 tb = tb_find(cpu, last_tb, tb_exit);
605 cpu_loop_exec_tb(cpu, tb, &last_tb, &tb_exit, &sc);
606 /* Try to align the host and virtual clocks
607 if the guest is in advance */
608 align_clocks(&sc, cpu);
609 } /* for(;;) */
610 } else {
611 #if defined(__clang__) || !QEMU_GNUC_PREREQ(4, 6)
612 /* Some compilers wrongly smash all local variables after
613 * siglongjmp. There were bug reports for gcc 4.5.0 and clang.
614 * Reload essential local variables here for those compilers.
615 * Newer versions of gcc would complain about this code (-Wclobbered). */
616 cpu = current_cpu;
617 cc = CPU_GET_CLASS(cpu);
618 #else /* buggy compiler */
619 /* Assert that the compiler does not smash local variables. */
620 g_assert(cpu == current_cpu);
621 g_assert(cc == CPU_GET_CLASS(cpu));
622 #endif /* buggy compiler */
623 cpu->can_do_io = 1;
624 tb_lock_reset();
626 } /* for(;;) */
628 cc->cpu_exec_exit(cpu);
629 rcu_read_unlock();
631 /* fail safe : never use current_cpu outside cpu_exec() */
632 current_cpu = NULL;
634 /* Does not need atomic_mb_set because a spurious wakeup is okay. */
635 atomic_set(&tcg_current_cpu, NULL);
636 return ret;