4 * Copyright (c) 2003-2008 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 * splitted out ioport related stuffs from vl.c.
28 #include "exec/ioport.h"
30 #include "exec/memory.h"
31 #include "exec/address-spaces.h"
33 //#define DEBUG_IOPORT
36 # define LOG_IOPORT(...) qemu_log_mask(CPU_LOG_IOPORT, ## __VA_ARGS__)
38 # define LOG_IOPORT(...) do { } while (0)
41 typedef struct MemoryRegionPortioList
{
44 MemoryRegionPortio ports
[];
45 } MemoryRegionPortioList
;
47 static uint64_t unassigned_io_read(void *opaque
, hwaddr addr
, unsigned size
)
52 static void unassigned_io_write(void *opaque
, hwaddr addr
, uint64_t val
,
57 const MemoryRegionOps unassigned_io_ops
= {
58 .read
= unassigned_io_read
,
59 .write
= unassigned_io_write
,
60 .endianness
= DEVICE_NATIVE_ENDIAN
,
63 void cpu_outb(pio_addr_t addr
, uint8_t val
)
65 LOG_IOPORT("outb: %04"FMT_pioaddr
" %02"PRIx8
"\n", addr
, val
);
66 trace_cpu_out(addr
, val
);
67 address_space_write(&address_space_io
, addr
, &val
, 1);
70 void cpu_outw(pio_addr_t addr
, uint16_t val
)
74 LOG_IOPORT("outw: %04"FMT_pioaddr
" %04"PRIx16
"\n", addr
, val
);
75 trace_cpu_out(addr
, val
);
77 address_space_write(&address_space_io
, addr
, buf
, 2);
80 void cpu_outl(pio_addr_t addr
, uint32_t val
)
84 LOG_IOPORT("outl: %04"FMT_pioaddr
" %08"PRIx32
"\n", addr
, val
);
85 trace_cpu_out(addr
, val
);
87 address_space_write(&address_space_io
, addr
, buf
, 4);
90 uint8_t cpu_inb(pio_addr_t addr
)
94 address_space_read(&address_space_io
, addr
, &val
, 1);
95 trace_cpu_in(addr
, val
);
96 LOG_IOPORT("inb : %04"FMT_pioaddr
" %02"PRIx8
"\n", addr
, val
);
100 uint16_t cpu_inw(pio_addr_t addr
)
105 address_space_read(&address_space_io
, addr
, buf
, 2);
107 trace_cpu_in(addr
, val
);
108 LOG_IOPORT("inw : %04"FMT_pioaddr
" %04"PRIx16
"\n", addr
, val
);
112 uint32_t cpu_inl(pio_addr_t addr
)
117 address_space_read(&address_space_io
, addr
, buf
, 4);
119 trace_cpu_in(addr
, val
);
120 LOG_IOPORT("inl : %04"FMT_pioaddr
" %08"PRIx32
"\n", addr
, val
);
124 void portio_list_init(PortioList
*piolist
,
126 const MemoryRegionPortio
*callbacks
,
127 void *opaque
, const char *name
)
131 while (callbacks
[n
].size
) {
135 piolist
->ports
= callbacks
;
137 piolist
->regions
= g_new0(MemoryRegion
*, n
);
138 piolist
->address_space
= NULL
;
139 piolist
->opaque
= opaque
;
140 piolist
->owner
= owner
;
141 piolist
->name
= name
;
142 piolist
->flush_coalesced_mmio
= false;
145 void portio_list_set_flush_coalesced(PortioList
*piolist
)
147 piolist
->flush_coalesced_mmio
= true;
150 void portio_list_destroy(PortioList
*piolist
)
152 MemoryRegionPortioList
*mrpio
;
155 for (i
= 0; i
< piolist
->nr
; ++i
) {
156 mrpio
= container_of(piolist
->regions
[i
], MemoryRegionPortioList
, mr
);
157 object_unparent(OBJECT(&mrpio
->mr
));
160 g_free(piolist
->regions
);
163 static const MemoryRegionPortio
*find_portio(MemoryRegionPortioList
*mrpio
,
164 uint64_t offset
, unsigned size
,
167 const MemoryRegionPortio
*mrp
;
169 for (mrp
= mrpio
->ports
; mrp
->size
; ++mrp
) {
170 if (offset
>= mrp
->offset
&& offset
< mrp
->offset
+ mrp
->len
&&
172 (write
? (bool)mrp
->write
: (bool)mrp
->read
)) {
179 static uint64_t portio_read(void *opaque
, hwaddr addr
, unsigned size
)
181 MemoryRegionPortioList
*mrpio
= opaque
;
182 const MemoryRegionPortio
*mrp
= find_portio(mrpio
, addr
, size
, false);
185 data
= ((uint64_t)1 << (size
* 8)) - 1;
187 data
= mrp
->read(mrpio
->portio_opaque
, mrp
->base
+ addr
);
188 } else if (size
== 2) {
189 mrp
= find_portio(mrpio
, addr
, 1, false);
191 data
= mrp
->read(mrpio
->portio_opaque
, mrp
->base
+ addr
) |
192 (mrp
->read(mrpio
->portio_opaque
, mrp
->base
+ addr
+ 1) << 8);
197 static void portio_write(void *opaque
, hwaddr addr
, uint64_t data
,
200 MemoryRegionPortioList
*mrpio
= opaque
;
201 const MemoryRegionPortio
*mrp
= find_portio(mrpio
, addr
, size
, true);
204 mrp
->write(mrpio
->portio_opaque
, mrp
->base
+ addr
, data
);
205 } else if (size
== 2) {
206 mrp
= find_portio(mrpio
, addr
, 1, true);
208 mrp
->write(mrpio
->portio_opaque
, mrp
->base
+ addr
, data
& 0xff);
209 mrp
->write(mrpio
->portio_opaque
, mrp
->base
+ addr
+ 1, data
>> 8);
213 static const MemoryRegionOps portio_ops
= {
215 .write
= portio_write
,
216 .endianness
= DEVICE_LITTLE_ENDIAN
,
217 .valid
.unaligned
= true,
218 .impl
.unaligned
= true,
221 static void portio_list_add_1(PortioList
*piolist
,
222 const MemoryRegionPortio
*pio_init
,
223 unsigned count
, unsigned start
,
224 unsigned off_low
, unsigned off_high
)
226 MemoryRegionPortioList
*mrpio
;
229 /* Copy the sub-list and null-terminate it. */
230 mrpio
= g_malloc0(sizeof(MemoryRegionPortioList
) +
231 sizeof(MemoryRegionPortio
) * (count
+ 1));
232 mrpio
->portio_opaque
= piolist
->opaque
;
233 memcpy(mrpio
->ports
, pio_init
, sizeof(MemoryRegionPortio
) * count
);
234 memset(mrpio
->ports
+ count
, 0, sizeof(MemoryRegionPortio
));
236 /* Adjust the offsets to all be zero-based for the region. */
237 for (i
= 0; i
< count
; ++i
) {
238 mrpio
->ports
[i
].offset
-= off_low
;
239 mrpio
->ports
[i
].base
= start
+ off_low
;
242 memory_region_init_io(&mrpio
->mr
, piolist
->owner
, &portio_ops
, mrpio
,
243 piolist
->name
, off_high
- off_low
);
244 if (piolist
->flush_coalesced_mmio
) {
245 memory_region_set_flush_coalesced(&mrpio
->mr
);
247 memory_region_add_subregion(piolist
->address_space
,
248 start
+ off_low
, &mrpio
->mr
);
249 piolist
->regions
[piolist
->nr
] = &mrpio
->mr
;
253 void portio_list_add(PortioList
*piolist
,
254 MemoryRegion
*address_space
,
257 const MemoryRegionPortio
*pio
, *pio_start
= piolist
->ports
;
258 unsigned int off_low
, off_high
, off_last
, count
;
260 piolist
->address_space
= address_space
;
262 /* Handle the first entry specially. */
263 off_last
= off_low
= pio_start
->offset
;
264 off_high
= off_low
+ pio_start
->len
;
267 for (pio
= pio_start
+ 1; pio
->size
!= 0; pio
++, count
++) {
268 /* All entries must be sorted by offset. */
269 assert(pio
->offset
>= off_last
);
270 off_last
= pio
->offset
;
272 /* If we see a hole, break the region. */
273 if (off_last
> off_high
) {
274 portio_list_add_1(piolist
, pio_start
, count
, start
, off_low
,
276 /* ... and start collecting anew. */
279 off_high
= off_low
+ pio
->len
;
281 } else if (off_last
+ pio
->len
> off_high
) {
282 off_high
= off_last
+ pio
->len
;
286 /* There will always be an open sub-list. */
287 portio_list_add_1(piolist
, pio_start
, count
, start
, off_low
, off_high
);
290 void portio_list_del(PortioList
*piolist
)
292 MemoryRegionPortioList
*mrpio
;
295 for (i
= 0; i
< piolist
->nr
; ++i
) {
296 mrpio
= container_of(piolist
->regions
[i
], MemoryRegionPortioList
, mr
);
297 memory_region_del_subregion(piolist
->address_space
, &mrpio
->mr
);