4 * Copyright (c) 2006-2007 CodeSourcery.
5 * Written by Paul Brook
7 * This code is licensed under the GPL.
10 #include "qemu/osdep.h"
11 #include "qapi/error.h"
14 #include "hw/arm/arm.h"
15 #include "hw/arm/linux-boot-if.h"
16 #include "sysemu/kvm.h"
17 #include "sysemu/sysemu.h"
18 #include "sysemu/numa.h"
19 #include "hw/boards.h"
20 #include "hw/loader.h"
22 #include "sysemu/device_tree.h"
23 #include "qemu/config-file.h"
24 #include "exec/address-spaces.h"
26 /* Kernel boot protocol is specified in the kernel docs
27 * Documentation/arm/Booting and Documentation/arm64/booting.txt
28 * They have different preferred image load offsets from system RAM base.
30 #define KERNEL_ARGS_ADDR 0x100
31 #define KERNEL_LOAD_ADDR 0x00010000
32 #define KERNEL64_LOAD_ADDR 0x00080000
34 #define ARM64_TEXT_OFFSET_OFFSET 8
35 #define ARM64_MAGIC_OFFSET 56
38 FIXUP_NONE
= 0, /* do nothing */
39 FIXUP_TERMINATOR
, /* end of insns */
40 FIXUP_BOARDID
, /* overwrite with board ID number */
41 FIXUP_BOARD_SETUP
, /* overwrite with board specific setup code address */
42 FIXUP_ARGPTR
, /* overwrite with pointer to kernel args */
43 FIXUP_ENTRYPOINT
, /* overwrite with kernel entry point */
44 FIXUP_GIC_CPU_IF
, /* overwrite with GIC CPU interface address */
45 FIXUP_BOOTREG
, /* overwrite with boot register address */
46 FIXUP_DSB
, /* overwrite with correct DSB insn for cpu */
50 typedef struct ARMInsnFixup
{
55 static const ARMInsnFixup bootloader_aarch64
[] = {
56 { 0x580000c0 }, /* ldr x0, arg ; Load the lower 32-bits of DTB */
57 { 0xaa1f03e1 }, /* mov x1, xzr */
58 { 0xaa1f03e2 }, /* mov x2, xzr */
59 { 0xaa1f03e3 }, /* mov x3, xzr */
60 { 0x58000084 }, /* ldr x4, entry ; Load the lower 32-bits of kernel entry */
61 { 0xd61f0080 }, /* br x4 ; Jump to the kernel entry point */
62 { 0, FIXUP_ARGPTR
}, /* arg: .word @DTB Lower 32-bits */
63 { 0 }, /* .word @DTB Higher 32-bits */
64 { 0, FIXUP_ENTRYPOINT
}, /* entry: .word @Kernel Entry Lower 32-bits */
65 { 0 }, /* .word @Kernel Entry Higher 32-bits */
66 { 0, FIXUP_TERMINATOR
}
69 /* A very small bootloader: call the board-setup code (if needed),
70 * set r0-r2, then jump to the kernel.
71 * If we're not calling boot setup code then we don't copy across
72 * the first BOOTLOADER_NO_BOARD_SETUP_OFFSET insns in this array.
75 static const ARMInsnFixup bootloader
[] = {
76 { 0xe28fe004 }, /* add lr, pc, #4 */
77 { 0xe51ff004 }, /* ldr pc, [pc, #-4] */
78 { 0, FIXUP_BOARD_SETUP
},
79 #define BOOTLOADER_NO_BOARD_SETUP_OFFSET 3
80 { 0xe3a00000 }, /* mov r0, #0 */
81 { 0xe59f1004 }, /* ldr r1, [pc, #4] */
82 { 0xe59f2004 }, /* ldr r2, [pc, #4] */
83 { 0xe59ff004 }, /* ldr pc, [pc, #4] */
86 { 0, FIXUP_ENTRYPOINT
},
87 { 0, FIXUP_TERMINATOR
}
90 /* Handling for secondary CPU boot in a multicore system.
91 * Unlike the uniprocessor/primary CPU boot, this is platform
92 * dependent. The default code here is based on the secondary
93 * CPU boot protocol used on realview/vexpress boards, with
94 * some parameterisation to increase its flexibility.
95 * QEMU platform models for which this code is not appropriate
96 * should override write_secondary_boot and secondary_cpu_reset_hook
99 * This code enables the interrupt controllers for the secondary
100 * CPUs and then puts all the secondary CPUs into a loop waiting
101 * for an interprocessor interrupt and polling a configurable
102 * location for the kernel secondary CPU entry point.
104 #define DSB_INSN 0xf57ff04f
105 #define CP15_DSB_INSN 0xee070f9a /* mcr cp15, 0, r0, c7, c10, 4 */
107 static const ARMInsnFixup smpboot
[] = {
108 { 0xe59f2028 }, /* ldr r2, gic_cpu_if */
109 { 0xe59f0028 }, /* ldr r0, bootreg_addr */
110 { 0xe3a01001 }, /* mov r1, #1 */
111 { 0xe5821000 }, /* str r1, [r2] - set GICC_CTLR.Enable */
112 { 0xe3a010ff }, /* mov r1, #0xff */
113 { 0xe5821004 }, /* str r1, [r2, 4] - set GIC_PMR.Priority to 0xff */
114 { 0, FIXUP_DSB
}, /* dsb */
115 { 0xe320f003 }, /* wfi */
116 { 0xe5901000 }, /* ldr r1, [r0] */
117 { 0xe1110001 }, /* tst r1, r1 */
118 { 0x0afffffb }, /* beq <wfi> */
119 { 0xe12fff11 }, /* bx r1 */
120 { 0, FIXUP_GIC_CPU_IF
}, /* gic_cpu_if: .word 0x.... */
121 { 0, FIXUP_BOOTREG
}, /* bootreg_addr: .word 0x.... */
122 { 0, FIXUP_TERMINATOR
}
125 static void write_bootloader(const char *name
, hwaddr addr
,
126 const ARMInsnFixup
*insns
, uint32_t *fixupcontext
)
128 /* Fix up the specified bootloader fragment and write it into
129 * guest memory using rom_add_blob_fixed(). fixupcontext is
130 * an array giving the values to write in for the fixup types
131 * which write a value into the code array.
137 while (insns
[len
].fixup
!= FIXUP_TERMINATOR
) {
141 code
= g_new0(uint32_t, len
);
143 for (i
= 0; i
< len
; i
++) {
144 uint32_t insn
= insns
[i
].insn
;
145 FixupType fixup
= insns
[i
].fixup
;
151 case FIXUP_BOARD_SETUP
:
153 case FIXUP_ENTRYPOINT
:
154 case FIXUP_GIC_CPU_IF
:
157 insn
= fixupcontext
[fixup
];
162 code
[i
] = tswap32(insn
);
165 rom_add_blob_fixed(name
, code
, len
* sizeof(uint32_t), addr
);
170 static void default_write_secondary(ARMCPU
*cpu
,
171 const struct arm_boot_info
*info
)
173 uint32_t fixupcontext
[FIXUP_MAX
];
175 fixupcontext
[FIXUP_GIC_CPU_IF
] = info
->gic_cpu_if_addr
;
176 fixupcontext
[FIXUP_BOOTREG
] = info
->smp_bootreg_addr
;
177 if (arm_feature(&cpu
->env
, ARM_FEATURE_V7
)) {
178 fixupcontext
[FIXUP_DSB
] = DSB_INSN
;
180 fixupcontext
[FIXUP_DSB
] = CP15_DSB_INSN
;
183 write_bootloader("smpboot", info
->smp_loader_start
,
184 smpboot
, fixupcontext
);
187 void arm_write_secure_board_setup_dummy_smc(ARMCPU
*cpu
,
188 const struct arm_boot_info
*info
,
192 uint32_t mvbar_blob
[] = {
193 /* mvbar_addr: secure monitor vectors
194 * Default unimplemented and unused vectors to spin. Makes it
195 * easier to debug (as opposed to the CPU running away).
197 0xeafffffe, /* (spin) */
198 0xeafffffe, /* (spin) */
199 0xe1b0f00e, /* movs pc, lr ;SMC exception return */
200 0xeafffffe, /* (spin) */
201 0xeafffffe, /* (spin) */
202 0xeafffffe, /* (spin) */
203 0xeafffffe, /* (spin) */
204 0xeafffffe, /* (spin) */
206 uint32_t board_setup_blob
[] = {
207 /* board setup addr */
208 0xe3a00e00 + (mvbar_addr
>> 4), /* mov r0, #mvbar_addr */
209 0xee0c0f30, /* mcr p15, 0, r0, c12, c0, 1 ;set MVBAR */
210 0xee110f11, /* mrc p15, 0, r0, c1 , c1, 0 ;read SCR */
211 0xe3800031, /* orr r0, #0x31 ;enable AW, FW, NS */
212 0xee010f11, /* mcr p15, 0, r0, c1, c1, 0 ;write SCR */
213 0xe1a0100e, /* mov r1, lr ;save LR across SMC */
214 0xe1600070, /* smc #0 ;call monitor to flush SCR */
215 0xe1a0f001, /* mov pc, r1 ;return */
218 /* check that mvbar_addr is correctly aligned and relocatable (using MOV) */
219 assert((mvbar_addr
& 0x1f) == 0 && (mvbar_addr
>> 4) < 0x100);
221 /* check that these blobs don't overlap */
222 assert((mvbar_addr
+ sizeof(mvbar_blob
) <= info
->board_setup_addr
)
223 || (info
->board_setup_addr
+ sizeof(board_setup_blob
) <= mvbar_addr
));
225 for (n
= 0; n
< ARRAY_SIZE(mvbar_blob
); n
++) {
226 mvbar_blob
[n
] = tswap32(mvbar_blob
[n
]);
228 rom_add_blob_fixed("board-setup-mvbar", mvbar_blob
, sizeof(mvbar_blob
),
231 for (n
= 0; n
< ARRAY_SIZE(board_setup_blob
); n
++) {
232 board_setup_blob
[n
] = tswap32(board_setup_blob
[n
]);
234 rom_add_blob_fixed("board-setup", board_setup_blob
,
235 sizeof(board_setup_blob
), info
->board_setup_addr
);
238 static void default_reset_secondary(ARMCPU
*cpu
,
239 const struct arm_boot_info
*info
)
241 CPUState
*cs
= CPU(cpu
);
243 address_space_stl_notdirty(&address_space_memory
, info
->smp_bootreg_addr
,
244 0, MEMTXATTRS_UNSPECIFIED
, NULL
);
245 cpu_set_pc(cs
, info
->smp_loader_start
);
248 static inline bool have_dtb(const struct arm_boot_info
*info
)
250 return info
->dtb_filename
|| info
->get_dtb
;
253 #define WRITE_WORD(p, value) do { \
254 address_space_stl_notdirty(&address_space_memory, p, value, \
255 MEMTXATTRS_UNSPECIFIED, NULL); \
259 static void set_kernel_args(const struct arm_boot_info
*info
)
261 int initrd_size
= info
->initrd_size
;
262 hwaddr base
= info
->loader_start
;
265 p
= base
+ KERNEL_ARGS_ADDR
;
268 WRITE_WORD(p
, 0x54410001);
270 WRITE_WORD(p
, 0x1000);
273 /* TODO: handle multiple chips on one ATAG list */
275 WRITE_WORD(p
, 0x54410002);
276 WRITE_WORD(p
, info
->ram_size
);
277 WRITE_WORD(p
, info
->loader_start
);
281 WRITE_WORD(p
, 0x54420005);
282 WRITE_WORD(p
, info
->initrd_start
);
283 WRITE_WORD(p
, initrd_size
);
285 if (info
->atag_revision
) {
288 WRITE_WORD(p
, 0x54410007);
289 WRITE_WORD(p
, info
->atag_revision
);
291 if (info
->kernel_cmdline
&& *info
->kernel_cmdline
) {
295 cmdline_size
= strlen(info
->kernel_cmdline
);
296 cpu_physical_memory_write(p
+ 8, info
->kernel_cmdline
,
298 cmdline_size
= (cmdline_size
>> 2) + 1;
299 WRITE_WORD(p
, cmdline_size
+ 2);
300 WRITE_WORD(p
, 0x54410009);
301 p
+= cmdline_size
* 4;
303 if (info
->atag_board
) {
306 uint8_t atag_board_buf
[0x1000];
308 atag_board_len
= (info
->atag_board(info
, atag_board_buf
) + 3) & ~3;
309 WRITE_WORD(p
, (atag_board_len
+ 8) >> 2);
310 WRITE_WORD(p
, 0x414f4d50);
311 cpu_physical_memory_write(p
, atag_board_buf
, atag_board_len
);
319 static void set_kernel_args_old(const struct arm_boot_info
*info
)
323 int initrd_size
= info
->initrd_size
;
324 hwaddr base
= info
->loader_start
;
326 /* see linux/include/asm-arm/setup.h */
327 p
= base
+ KERNEL_ARGS_ADDR
;
331 WRITE_WORD(p
, info
->ram_size
/ 4096);
334 #define FLAG_READONLY 1
335 #define FLAG_RDLOAD 4
336 #define FLAG_RDPROMPT 8
338 WRITE_WORD(p
, FLAG_READONLY
| FLAG_RDLOAD
| FLAG_RDPROMPT
);
340 WRITE_WORD(p
, (31 << 8) | 0); /* /dev/mtdblock0 */
349 /* memc_control_reg */
351 /* unsigned char sounddefault */
352 /* unsigned char adfsdrives */
353 /* unsigned char bytes_per_char_h */
354 /* unsigned char bytes_per_char_v */
356 /* pages_in_bank[4] */
365 WRITE_WORD(p
, info
->initrd_start
);
370 WRITE_WORD(p
, initrd_size
);
375 /* system_serial_low */
377 /* system_serial_high */
381 /* zero unused fields */
382 while (p
< base
+ KERNEL_ARGS_ADDR
+ 256 + 1024) {
385 s
= info
->kernel_cmdline
;
387 cpu_physical_memory_write(p
, s
, strlen(s
) + 1);
394 * load_dtb() - load a device tree binary image into memory
395 * @addr: the address to load the image at
396 * @binfo: struct describing the boot environment
397 * @addr_limit: upper limit of the available memory area at @addr
399 * Load a device tree supplied by the machine or by the user with the
400 * '-dtb' command line option, and put it at offset @addr in target
403 * If @addr_limit contains a meaningful value (i.e., it is strictly greater
404 * than @addr), the device tree is only loaded if its size does not exceed
407 * Returns: the size of the device tree image on success,
408 * 0 if the image size exceeds the limit,
411 * Note: Must not be called unless have_dtb(binfo) is true.
413 static int load_dtb(hwaddr addr
, const struct arm_boot_info
*binfo
,
418 uint32_t acells
, scells
;
421 hwaddr mem_base
, mem_len
;
423 if (binfo
->dtb_filename
) {
425 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, binfo
->dtb_filename
);
427 fprintf(stderr
, "Couldn't open dtb file %s\n", binfo
->dtb_filename
);
431 fdt
= load_device_tree(filename
, &size
);
433 fprintf(stderr
, "Couldn't open dtb file %s\n", filename
);
439 fdt
= binfo
->get_dtb(binfo
, &size
);
441 fprintf(stderr
, "Board was unable to create a dtb blob\n");
446 if (addr_limit
> addr
&& size
> (addr_limit
- addr
)) {
447 /* Installing the device tree blob at addr would exceed addr_limit.
448 * Whether this constitutes failure is up to the caller to decide,
449 * so just return 0 as size, i.e., no error.
455 acells
= qemu_fdt_getprop_cell(fdt
, "/", "#address-cells",
457 scells
= qemu_fdt_getprop_cell(fdt
, "/", "#size-cells",
459 if (acells
== 0 || scells
== 0) {
460 fprintf(stderr
, "dtb file invalid (#address-cells or #size-cells 0)\n");
464 if (scells
< 2 && binfo
->ram_size
>= (1ULL << 32)) {
465 /* This is user error so deserves a friendlier error message
466 * than the failure of setprop_sized_cells would provide
468 fprintf(stderr
, "qemu: dtb file not compatible with "
473 if (nb_numa_nodes
> 0) {
475 * Turn the /memory node created before into a NOP node, then create
476 * /memory@addr nodes for all numa nodes respectively.
478 qemu_fdt_nop_node(fdt
, "/memory");
479 mem_base
= binfo
->loader_start
;
480 for (i
= 0; i
< nb_numa_nodes
; i
++) {
481 mem_len
= numa_info
[i
].node_mem
;
482 nodename
= g_strdup_printf("/memory@%" PRIx64
, mem_base
);
483 qemu_fdt_add_subnode(fdt
, nodename
);
484 qemu_fdt_setprop_string(fdt
, nodename
, "device_type", "memory");
485 rc
= qemu_fdt_setprop_sized_cells(fdt
, nodename
, "reg",
489 fprintf(stderr
, "couldn't set %s/reg for node %d\n", nodename
,
494 qemu_fdt_setprop_cell(fdt
, nodename
, "numa-node-id", i
);
501 rc
= fdt_path_offset(fdt
, "/memory");
503 qemu_fdt_add_subnode(fdt
, "/memory");
506 if (!qemu_fdt_getprop(fdt
, "/memory", "device_type", NULL
, &err
)) {
507 qemu_fdt_setprop_string(fdt
, "/memory", "device_type", "memory");
510 rc
= qemu_fdt_setprop_sized_cells(fdt
, "/memory", "reg",
511 acells
, binfo
->loader_start
,
512 scells
, binfo
->ram_size
);
514 fprintf(stderr
, "couldn't set /memory/reg\n");
519 rc
= fdt_path_offset(fdt
, "/chosen");
521 qemu_fdt_add_subnode(fdt
, "/chosen");
524 if (binfo
->kernel_cmdline
&& *binfo
->kernel_cmdline
) {
525 rc
= qemu_fdt_setprop_string(fdt
, "/chosen", "bootargs",
526 binfo
->kernel_cmdline
);
528 fprintf(stderr
, "couldn't set /chosen/bootargs\n");
533 if (binfo
->initrd_size
) {
534 rc
= qemu_fdt_setprop_cell(fdt
, "/chosen", "linux,initrd-start",
535 binfo
->initrd_start
);
537 fprintf(stderr
, "couldn't set /chosen/linux,initrd-start\n");
541 rc
= qemu_fdt_setprop_cell(fdt
, "/chosen", "linux,initrd-end",
542 binfo
->initrd_start
+ binfo
->initrd_size
);
544 fprintf(stderr
, "couldn't set /chosen/linux,initrd-end\n");
549 if (binfo
->modify_dtb
) {
550 binfo
->modify_dtb(binfo
, fdt
);
553 qemu_fdt_dumpdtb(fdt
, size
);
555 /* Put the DTB into the memory map as a ROM image: this will ensure
556 * the DTB is copied again upon reset, even if addr points into RAM.
558 rom_add_blob_fixed("dtb", fdt
, size
, addr
);
569 static void do_cpu_reset(void *opaque
)
571 ARMCPU
*cpu
= opaque
;
572 CPUState
*cs
= CPU(cpu
);
573 CPUARMState
*env
= &cpu
->env
;
574 const struct arm_boot_info
*info
= env
->boot_info
;
578 if (!info
->is_linux
) {
580 /* Jump to the entry point. */
581 uint64_t entry
= info
->entry
;
583 switch (info
->endianness
) {
584 case ARM_ENDIANNESS_LE
:
585 env
->cp15
.sctlr_el
[1] &= ~SCTLR_E0E
;
586 for (i
= 1; i
< 4; ++i
) {
587 env
->cp15
.sctlr_el
[i
] &= ~SCTLR_EE
;
589 env
->uncached_cpsr
&= ~CPSR_E
;
591 case ARM_ENDIANNESS_BE8
:
592 env
->cp15
.sctlr_el
[1] |= SCTLR_E0E
;
593 for (i
= 1; i
< 4; ++i
) {
594 env
->cp15
.sctlr_el
[i
] |= SCTLR_EE
;
596 env
->uncached_cpsr
|= CPSR_E
;
598 case ARM_ENDIANNESS_BE32
:
599 env
->cp15
.sctlr_el
[1] |= SCTLR_B
;
601 case ARM_ENDIANNESS_UNKNOWN
:
602 break; /* Board's decision */
604 g_assert_not_reached();
608 env
->thumb
= info
->entry
& 1;
611 cpu_set_pc(cs
, entry
);
613 /* If we are booting Linux then we need to check whether we are
614 * booting into secure or non-secure state and adjust the state
615 * accordingly. Out of reset, ARM is defined to be in secure state
616 * (SCR.NS = 0), we change that here if non-secure boot has been
619 if (arm_feature(env
, ARM_FEATURE_EL3
)) {
620 /* AArch64 is defined to come out of reset into EL3 if enabled.
621 * If we are booting Linux then we need to adjust our EL as
622 * Linux expects us to be in EL2 or EL1. AArch32 resets into
623 * SVC, which Linux expects, so no privilege/exception level to
627 env
->cp15
.scr_el3
|= SCR_RW
;
628 if (arm_feature(env
, ARM_FEATURE_EL2
)) {
629 env
->cp15
.hcr_el2
|= HCR_RW
;
630 env
->pstate
= PSTATE_MODE_EL2h
;
632 env
->pstate
= PSTATE_MODE_EL1h
;
636 /* Set to non-secure if not a secure boot */
637 if (!info
->secure_boot
&&
638 (cs
!= first_cpu
|| !info
->secure_board_setup
)) {
639 /* Linux expects non-secure state */
640 env
->cp15
.scr_el3
|= SCR_NS
;
644 if (cs
== first_cpu
) {
645 cpu_set_pc(cs
, info
->loader_start
);
647 if (!have_dtb(info
)) {
649 set_kernel_args_old(info
);
651 set_kernel_args(info
);
655 info
->secondary_cpu_reset_hook(cpu
, info
);
662 * load_image_to_fw_cfg() - Load an image file into an fw_cfg entry identified
664 * @fw_cfg: The firmware config instance to store the data in.
665 * @size_key: The firmware config key to store the size of the loaded
666 * data under, with fw_cfg_add_i32().
667 * @data_key: The firmware config key to store the loaded data under,
668 * with fw_cfg_add_bytes().
669 * @image_name: The name of the image file to load. If it is NULL, the
670 * function returns without doing anything.
671 * @try_decompress: Whether the image should be decompressed (gunzipped) before
672 * adding it to fw_cfg. If decompression fails, the image is
675 * In case of failure, the function prints an error message to stderr and the
676 * process exits with status 1.
678 static void load_image_to_fw_cfg(FWCfgState
*fw_cfg
, uint16_t size_key
,
679 uint16_t data_key
, const char *image_name
,
685 if (image_name
== NULL
) {
689 if (try_decompress
) {
690 size
= load_image_gzipped_buffer(image_name
,
691 LOAD_IMAGE_MAX_GUNZIP_BYTES
, &data
);
694 if (size
== (size_t)-1) {
698 if (!g_file_get_contents(image_name
, &contents
, &length
, NULL
)) {
699 fprintf(stderr
, "failed to load \"%s\"\n", image_name
);
703 data
= (uint8_t *)contents
;
706 fw_cfg_add_i32(fw_cfg
, size_key
, size
);
707 fw_cfg_add_bytes(fw_cfg
, data_key
, data
, size
);
710 static int do_arm_linux_init(Object
*obj
, void *opaque
)
712 if (object_dynamic_cast(obj
, TYPE_ARM_LINUX_BOOT_IF
)) {
713 ARMLinuxBootIf
*albif
= ARM_LINUX_BOOT_IF(obj
);
714 ARMLinuxBootIfClass
*albifc
= ARM_LINUX_BOOT_IF_GET_CLASS(obj
);
715 struct arm_boot_info
*info
= opaque
;
717 if (albifc
->arm_linux_init
) {
718 albifc
->arm_linux_init(albif
, info
->secure_boot
);
724 static uint64_t arm_load_elf(struct arm_boot_info
*info
, uint64_t *pentry
,
725 uint64_t *lowaddr
, uint64_t *highaddr
,
739 load_elf_hdr(info
->kernel_filename
, &elf_header
, &elf_is64
, &err
);
745 big_endian
= elf_header
.h64
.e_ident
[EI_DATA
] == ELFDATA2MSB
;
746 info
->endianness
= big_endian
? ARM_ENDIANNESS_BE8
749 big_endian
= elf_header
.h32
.e_ident
[EI_DATA
] == ELFDATA2MSB
;
751 if (bswap32(elf_header
.h32
.e_flags
) & EF_ARM_BE8
) {
752 info
->endianness
= ARM_ENDIANNESS_BE8
;
754 info
->endianness
= ARM_ENDIANNESS_BE32
;
755 /* In BE32, the CPU has a different view of the per-byte
756 * address map than the rest of the system. BE32 ELF files
757 * are organised such that they can be programmed through
758 * the CPU's per-word byte-reversed view of the world. QEMU
759 * however loads ELF files independently of the CPU. So
760 * tell the ELF loader to byte reverse the data for us.
765 info
->endianness
= ARM_ENDIANNESS_LE
;
769 ret
= load_elf(info
->kernel_filename
, NULL
, NULL
,
770 pentry
, lowaddr
, highaddr
, big_endian
, elf_machine
,
773 /* The header loaded but the image didn't */
780 static uint64_t load_aarch64_image(const char *filename
, hwaddr mem_base
,
783 hwaddr kernel_load_offset
= KERNEL64_LOAD_ADDR
;
787 /* On aarch64, it's the bootloader's job to uncompress the kernel. */
788 size
= load_image_gzipped_buffer(filename
, LOAD_IMAGE_MAX_GUNZIP_BYTES
,
794 /* Load as raw file otherwise */
795 if (!g_file_get_contents(filename
, (char **)&buffer
, &len
, NULL
)) {
801 /* check the arm64 magic header value -- very old kernels may not have it */
802 if (memcmp(buffer
+ ARM64_MAGIC_OFFSET
, "ARM\x64", 4) == 0) {
805 /* The arm64 Image header has text_offset and image_size fields at 8 and
806 * 16 bytes into the Image header, respectively. The text_offset field
807 * is only valid if the image_size is non-zero.
809 memcpy(&hdrvals
, buffer
+ ARM64_TEXT_OFFSET_OFFSET
, sizeof(hdrvals
));
810 if (hdrvals
[1] != 0) {
811 kernel_load_offset
= le64_to_cpu(hdrvals
[0]);
815 *entry
= mem_base
+ kernel_load_offset
;
816 rom_add_blob_fixed(filename
, buffer
, size
, *entry
);
823 static void arm_load_kernel_notify(Notifier
*notifier
, void *data
)
829 uint64_t elf_entry
, elf_low_addr
, elf_high_addr
;
832 static const ARMInsnFixup
*primary_loader
;
833 ArmLoadKernelNotifier
*n
= DO_UPCAST(ArmLoadKernelNotifier
,
835 ARMCPU
*cpu
= n
->cpu
;
836 CPUARMState
*env
= &cpu
->env
;
837 struct arm_boot_info
*info
=
838 container_of(n
, struct arm_boot_info
, load_kernel_notifier
);
840 /* The board code is not supposed to set secure_board_setup unless
841 * running its code in secure mode is actually possible, and KVM
842 * doesn't support secure.
844 assert(!(info
->secure_board_setup
&& kvm_enabled()));
846 info
->dtb_filename
= qemu_opt_get(qemu_get_machine_opts(), "dtb");
848 /* Load the kernel. */
849 if (!info
->kernel_filename
|| info
->firmware_loaded
) {
851 if (have_dtb(info
)) {
852 /* If we have a device tree blob, but no kernel to supply it to (or
853 * the kernel is supposed to be loaded by the bootloader), copy the
854 * DTB to the base of RAM for the bootloader to pick up.
856 if (load_dtb(info
->loader_start
, info
, 0) < 0) {
861 if (info
->kernel_filename
) {
863 bool try_decompressing_kernel
;
865 fw_cfg
= fw_cfg_find();
866 try_decompressing_kernel
= arm_feature(&cpu
->env
,
867 ARM_FEATURE_AARCH64
);
869 /* Expose the kernel, the command line, and the initrd in fw_cfg.
870 * We don't process them here at all, it's all left to the
873 load_image_to_fw_cfg(fw_cfg
,
874 FW_CFG_KERNEL_SIZE
, FW_CFG_KERNEL_DATA
,
875 info
->kernel_filename
,
876 try_decompressing_kernel
);
877 load_image_to_fw_cfg(fw_cfg
,
878 FW_CFG_INITRD_SIZE
, FW_CFG_INITRD_DATA
,
879 info
->initrd_filename
, false);
881 if (info
->kernel_cmdline
) {
882 fw_cfg_add_i32(fw_cfg
, FW_CFG_CMDLINE_SIZE
,
883 strlen(info
->kernel_cmdline
) + 1);
884 fw_cfg_add_string(fw_cfg
, FW_CFG_CMDLINE_DATA
,
885 info
->kernel_cmdline
);
889 /* We will start from address 0 (typically a boot ROM image) in the
890 * same way as hardware.
895 if (arm_feature(env
, ARM_FEATURE_AARCH64
)) {
896 primary_loader
= bootloader_aarch64
;
897 elf_machine
= EM_AARCH64
;
899 primary_loader
= bootloader
;
900 if (!info
->write_board_setup
) {
901 primary_loader
+= BOOTLOADER_NO_BOARD_SETUP_OFFSET
;
903 elf_machine
= EM_ARM
;
906 if (!info
->secondary_cpu_reset_hook
) {
907 info
->secondary_cpu_reset_hook
= default_reset_secondary
;
909 if (!info
->write_secondary_boot
) {
910 info
->write_secondary_boot
= default_write_secondary
;
913 if (info
->nb_cpus
== 0)
916 /* We want to put the initrd far enough into RAM that when the
917 * kernel is uncompressed it will not clobber the initrd. However
918 * on boards without much RAM we must ensure that we still leave
919 * enough room for a decent sized initrd, and on boards with large
920 * amounts of RAM we must avoid the initrd being so far up in RAM
921 * that it is outside lowmem and inaccessible to the kernel.
922 * So for boards with less than 256MB of RAM we put the initrd
923 * halfway into RAM, and for boards with 256MB of RAM or more we put
924 * the initrd at 128MB.
926 info
->initrd_start
= info
->loader_start
+
927 MIN(info
->ram_size
/ 2, 128 * 1024 * 1024);
931 /* Assume that raw images are linux kernels, and ELF images are not. */
932 /* If the filename contains 'vmlinux', assume ELF images are linux, too. */
933 is_linux
= (strstr(info
->kernel_filename
, "vmlinux") != NULL
);
934 kernel_size
= arm_load_elf(info
, &elf_entry
, &elf_low_addr
,
935 &elf_high_addr
, elf_machine
);
936 if (kernel_size
> 0 && have_dtb(info
)) {
937 /* If there is still some room left at the base of RAM, try and put
938 * the DTB there like we do for images loaded with -bios or -pflash.
940 if (elf_low_addr
> info
->loader_start
941 || elf_high_addr
< info
->loader_start
) {
942 /* Pass elf_low_addr as address limit to load_dtb if it may be
943 * pointing into RAM, otherwise pass '0' (no limit)
945 if (elf_low_addr
< info
->loader_start
) {
948 if (load_dtb(info
->loader_start
, info
, elf_low_addr
) < 0) {
954 if (kernel_size
< 0) {
955 kernel_size
= load_uimage(info
->kernel_filename
, &entry
, NULL
,
956 &is_linux
, NULL
, NULL
);
958 if (arm_feature(&cpu
->env
, ARM_FEATURE_AARCH64
) && kernel_size
< 0) {
959 kernel_size
= load_aarch64_image(info
->kernel_filename
,
960 info
->loader_start
, &entry
);
962 } else if (kernel_size
< 0) {
964 entry
= info
->loader_start
+ KERNEL_LOAD_ADDR
;
965 kernel_size
= load_image_targphys(info
->kernel_filename
, entry
,
966 info
->ram_size
- KERNEL_LOAD_ADDR
);
968 } else if (entry
== info
->loader_start
) {
969 /* Don't map bootloader memory if it conflicts with the kernel image. */
972 if (kernel_size
< 0) {
973 fprintf(stderr
, "qemu: could not load kernel '%s'\n",
974 info
->kernel_filename
);
979 uint32_t fixupcontext
[FIXUP_MAX
];
981 if (info
->initrd_filename
) {
982 initrd_size
= load_ramdisk(info
->initrd_filename
,
986 if (initrd_size
< 0) {
987 initrd_size
= load_image_targphys(info
->initrd_filename
,
992 if (initrd_size
< 0) {
993 fprintf(stderr
, "qemu: could not load initrd '%s'\n",
994 info
->initrd_filename
);
1000 info
->initrd_size
= initrd_size
;
1002 fixupcontext
[FIXUP_BOARDID
] = info
->board_id
;
1003 fixupcontext
[FIXUP_BOARD_SETUP
] = info
->board_setup_addr
;
1005 /* for device tree boot, we pass the DTB directly in r2. Otherwise
1006 * we point to the kernel args.
1008 if (have_dtb(info
)) {
1012 if (elf_machine
== EM_AARCH64
) {
1014 * Some AArch64 kernels on early bootup map the fdt region as
1016 * [ ALIGN_DOWN(fdt, 2MB) ... ALIGN_DOWN(fdt, 2MB) + 2MB ]
1018 * Let's play safe and prealign it to 2MB to give us some space.
1020 align
= 2 * 1024 * 1024;
1023 * Some 32bit kernels will trash anything in the 4K page the
1024 * initrd ends in, so make sure the DTB isn't caught up in that.
1029 /* Place the DTB after the initrd in memory with alignment. */
1030 dtb_start
= QEMU_ALIGN_UP(info
->initrd_start
+ initrd_size
, align
);
1031 if (load_dtb(dtb_start
, info
, 0) < 0) {
1034 fixupcontext
[FIXUP_ARGPTR
] = dtb_start
;
1036 fixupcontext
[FIXUP_ARGPTR
] = info
->loader_start
+ KERNEL_ARGS_ADDR
;
1037 if (info
->ram_size
>= (1ULL << 32)) {
1038 fprintf(stderr
, "qemu: RAM size must be less than 4GB to boot"
1039 " Linux kernel using ATAGS (try passing a device tree"
1044 fixupcontext
[FIXUP_ENTRYPOINT
] = entry
;
1046 write_bootloader("bootloader", info
->loader_start
,
1047 primary_loader
, fixupcontext
);
1049 if (info
->nb_cpus
> 1) {
1050 info
->write_secondary_boot(cpu
, info
);
1052 if (info
->write_board_setup
) {
1053 info
->write_board_setup(cpu
, info
);
1056 /* Notify devices which need to fake up firmware initialization
1057 * that we're doing a direct kernel boot.
1059 object_child_foreach_recursive(object_get_root(),
1060 do_arm_linux_init
, info
);
1062 info
->is_linux
= is_linux
;
1064 for (cs
= CPU(cpu
); cs
; cs
= CPU_NEXT(cs
)) {
1065 ARM_CPU(cs
)->env
.boot_info
= info
;
1069 void arm_load_kernel(ARMCPU
*cpu
, struct arm_boot_info
*info
)
1073 info
->load_kernel_notifier
.cpu
= cpu
;
1074 info
->load_kernel_notifier
.notifier
.notify
= arm_load_kernel_notify
;
1075 qemu_add_machine_init_done_notifier(&info
->load_kernel_notifier
.notifier
);
1077 /* CPU objects (unlike devices) are not automatically reset on system
1078 * reset, so we must always register a handler to do so. If we're
1079 * actually loading a kernel, the handler is also responsible for
1080 * arranging that we start it correctly.
1082 for (cs
= CPU(cpu
); cs
; cs
= CPU_NEXT(cs
)) {
1083 qemu_register_reset(do_cpu_reset
, ARM_CPU(cs
));
1087 static const TypeInfo arm_linux_boot_if_info
= {
1088 .name
= TYPE_ARM_LINUX_BOOT_IF
,
1089 .parent
= TYPE_INTERFACE
,
1090 .class_size
= sizeof(ARMLinuxBootIfClass
),
1093 static void arm_linux_boot_register_types(void)
1095 type_register_static(&arm_linux_boot_if_info
);
1098 type_init(arm_linux_boot_register_types
)