2 * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
4 * Copyright (c) 2004-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 * PCI bus layout on a real G5 (U3 based):
27 * 0000:f0:0b.0 Host bridge [0600]: Apple Computer Inc. U3 AGP [106b:004b]
28 * 0000:f0:10.0 VGA compatible controller [0300]: ATI Technologies Inc RV350 AP [Radeon 9600] [1002:4150]
29 * 0001:00:00.0 Host bridge [0600]: Apple Computer Inc. CPC945 HT Bridge [106b:004a]
30 * 0001:00:01.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
31 * 0001:00:02.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
32 * 0001:00:03.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0045]
33 * 0001:00:04.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0046]
34 * 0001:00:05.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0047]
35 * 0001:00:06.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0048]
36 * 0001:00:07.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0049]
37 * 0001:01:07.0 Class [ff00]: Apple Computer Inc. K2 KeyLargo Mac/IO [106b:0041] (rev 20)
38 * 0001:01:08.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
39 * 0001:01:09.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
40 * 0001:02:0b.0 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
41 * 0001:02:0b.1 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
42 * 0001:02:0b.2 USB Controller [0c03]: NEC Corporation USB 2.0 [1033:00e0] (rev 04)
43 * 0001:03:0d.0 Class [ff00]: Apple Computer Inc. K2 ATA/100 [106b:0043]
44 * 0001:03:0e.0 FireWire (IEEE 1394) [0c00]: Apple Computer Inc. K2 FireWire [106b:0042]
45 * 0001:04:0f.0 Ethernet controller [0200]: Apple Computer Inc. K2 GMAC (Sun GEM) [106b:004c]
46 * 0001:05:0c.0 IDE interface [0101]: Broadcom K2 SATA [1166:0240]
51 #include "hw/ppc/mac.h"
53 #include "hw/mac_dbdma.h"
55 #include "hw/pci/pci.h"
57 #include "sysemu/sysemu.h"
58 #include "hw/boards.h"
59 #include "hw/fw_cfg.h"
61 #include "hw/openpic.h"
63 #include "hw/loader.h"
65 #include "sysemu/kvm.h"
68 #include "sysemu/blockdev.h"
69 #include "exec/address-spaces.h"
70 #include "hw/sysbus.h"
73 #define CFG_ADDR 0xf0000510
79 #define UNIN_DPRINTF(fmt, ...) \
80 do { printf("UNIN: " fmt , ## __VA_ARGS__); } while (0)
82 #define UNIN_DPRINTF(fmt, ...)
86 static void unin_write(void *opaque
, hwaddr addr
, uint64_t value
,
89 UNIN_DPRINTF("write addr " TARGET_FMT_plx
" val %"PRIx64
"\n", addr
, value
);
92 static uint64_t unin_read(void *opaque
, hwaddr addr
, unsigned size
)
97 UNIN_DPRINTF("readl addr " TARGET_FMT_plx
" val %x\n", addr
, value
);
102 static const MemoryRegionOps unin_ops
= {
105 .endianness
= DEVICE_NATIVE_ENDIAN
,
108 static int fw_cfg_boot_set(void *opaque
, const char *boot_device
)
110 fw_cfg_add_i16(opaque
, FW_CFG_BOOT_DEVICE
, boot_device
[0]);
114 static uint64_t translate_kernel_address(void *opaque
, uint64_t addr
)
116 return (addr
& 0x0fffffff) + KERNEL_LOAD_ADDR
;
119 static hwaddr
round_page(hwaddr addr
)
121 return (addr
+ TARGET_PAGE_SIZE
- 1) & TARGET_PAGE_MASK
;
124 static void ppc_core99_reset(void *opaque
)
126 PowerPCCPU
*cpu
= opaque
;
131 /* PowerPC Mac99 hardware initialisation */
132 static void ppc_core99_init(QEMUMachineInitArgs
*args
)
134 ram_addr_t ram_size
= args
->ram_size
;
135 const char *cpu_model
= args
->cpu_model
;
136 const char *kernel_filename
= args
->kernel_filename
;
137 const char *kernel_cmdline
= args
->kernel_cmdline
;
138 const char *initrd_filename
= args
->initrd_filename
;
139 const char *boot_device
= args
->boot_device
;
140 PowerPCCPU
*cpu
= NULL
;
141 CPUPPCState
*env
= NULL
;
143 qemu_irq
*pic
, **openpic_irqs
;
144 MemoryRegion
*unin_memory
= g_new(MemoryRegion
, 1);
145 int linux_boot
, i
, j
, k
;
146 MemoryRegion
*ram
= g_new(MemoryRegion
, 1), *bios
= g_new(MemoryRegion
, 1);
147 hwaddr kernel_base
, initrd_base
, cmdline_base
= 0;
148 long kernel_size
, initrd_size
;
151 MACIOIDEState
*macio_ide
;
152 MacIONVRAMState
*nvr
;
154 MemoryRegion
*pic_mem
, *escc_mem
;
155 MemoryRegion
*escc_bar
= g_new(MemoryRegion
, 1);
157 DriveInfo
*hd
[MAX_IDE_BUS
* MAX_IDE_DEVS
];
163 linux_boot
= (kernel_filename
!= NULL
);
166 if (cpu_model
== NULL
)
172 for (i
= 0; i
< smp_cpus
; i
++) {
173 cpu
= cpu_ppc_init(cpu_model
);
175 fprintf(stderr
, "Unable to find PowerPC CPU definition\n");
180 /* Set time-base frequency to 100 Mhz */
181 cpu_ppc_tb_init(env
, 100UL * 1000UL * 1000UL);
182 qemu_register_reset(ppc_core99_reset
, cpu
);
186 memory_region_init_ram(ram
, "ppc_core99.ram", ram_size
);
187 vmstate_register_ram_global(ram
);
188 memory_region_add_subregion(get_system_memory(), 0, ram
);
190 /* allocate and load BIOS */
191 memory_region_init_ram(bios
, "ppc_core99.bios", BIOS_SIZE
);
192 vmstate_register_ram_global(bios
);
193 if (bios_name
== NULL
)
194 bios_name
= PROM_FILENAME
;
195 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
196 memory_region_set_readonly(bios
, true);
197 memory_region_add_subregion(get_system_memory(), PROM_ADDR
, bios
);
199 /* Load OpenBIOS (ELF) */
201 bios_size
= load_elf(filename
, NULL
, NULL
, NULL
,
202 NULL
, NULL
, 1, ELF_MACHINE
, 0);
208 if (bios_size
< 0 || bios_size
> BIOS_SIZE
) {
209 hw_error("qemu: could not load PowerPC bios '%s'\n", bios_name
);
214 uint64_t lowaddr
= 0;
222 kernel_base
= KERNEL_LOAD_ADDR
;
224 kernel_size
= load_elf(kernel_filename
, translate_kernel_address
, NULL
,
225 NULL
, &lowaddr
, NULL
, 1, ELF_MACHINE
, 0);
227 kernel_size
= load_aout(kernel_filename
, kernel_base
,
228 ram_size
- kernel_base
, bswap_needed
,
231 kernel_size
= load_image_targphys(kernel_filename
,
233 ram_size
- kernel_base
);
234 if (kernel_size
< 0) {
235 hw_error("qemu: could not load kernel '%s'\n", kernel_filename
);
239 if (initrd_filename
) {
240 initrd_base
= round_page(kernel_base
+ kernel_size
+ KERNEL_GAP
);
241 initrd_size
= load_image_targphys(initrd_filename
, initrd_base
,
242 ram_size
- initrd_base
);
243 if (initrd_size
< 0) {
244 hw_error("qemu: could not load initial ram disk '%s'\n",
248 cmdline_base
= round_page(initrd_base
+ initrd_size
);
252 cmdline_base
= round_page(kernel_base
+ kernel_size
+ KERNEL_GAP
);
254 ppc_boot_device
= 'm';
260 ppc_boot_device
= '\0';
261 /* We consider that NewWorld PowerMac never have any floppy drive
262 * For now, OHW cannot boot from the network.
264 for (i
= 0; boot_device
[i
] != '\0'; i
++) {
265 if (boot_device
[i
] >= 'c' && boot_device
[i
] <= 'f') {
266 ppc_boot_device
= boot_device
[i
];
270 if (ppc_boot_device
== '\0') {
271 fprintf(stderr
, "No valid boot device for Mac99 machine\n");
276 /* Register 8 MB of ISA IO space */
277 isa_mmio_init(0xf2000000, 0x00800000);
280 memory_region_init_io(unin_memory
, &unin_ops
, NULL
, "unin", 0x1000);
281 memory_region_add_subregion(get_system_memory(), 0xf8000000, unin_memory
);
283 openpic_irqs
= g_malloc0(smp_cpus
* sizeof(qemu_irq
*));
285 g_malloc0(smp_cpus
* sizeof(qemu_irq
) * OPENPIC_OUTPUT_NB
);
286 for (i
= 0; i
< smp_cpus
; i
++) {
287 /* Mac99 IRQ connection between OpenPIC outputs pins
288 * and PowerPC input pins
290 switch (PPC_INPUT(env
)) {
291 case PPC_FLAGS_INPUT_6xx
:
292 openpic_irqs
[i
] = openpic_irqs
[0] + (i
* OPENPIC_OUTPUT_NB
);
293 openpic_irqs
[i
][OPENPIC_OUTPUT_INT
] =
294 ((qemu_irq
*)env
->irq_inputs
)[PPC6xx_INPUT_INT
];
295 openpic_irqs
[i
][OPENPIC_OUTPUT_CINT
] =
296 ((qemu_irq
*)env
->irq_inputs
)[PPC6xx_INPUT_INT
];
297 openpic_irqs
[i
][OPENPIC_OUTPUT_MCK
] =
298 ((qemu_irq
*)env
->irq_inputs
)[PPC6xx_INPUT_MCP
];
299 /* Not connected ? */
300 openpic_irqs
[i
][OPENPIC_OUTPUT_DEBUG
] = NULL
;
302 openpic_irqs
[i
][OPENPIC_OUTPUT_RESET
] =
303 ((qemu_irq
*)env
->irq_inputs
)[PPC6xx_INPUT_HRESET
];
305 #if defined(TARGET_PPC64)
306 case PPC_FLAGS_INPUT_970
:
307 openpic_irqs
[i
] = openpic_irqs
[0] + (i
* OPENPIC_OUTPUT_NB
);
308 openpic_irqs
[i
][OPENPIC_OUTPUT_INT
] =
309 ((qemu_irq
*)env
->irq_inputs
)[PPC970_INPUT_INT
];
310 openpic_irqs
[i
][OPENPIC_OUTPUT_CINT
] =
311 ((qemu_irq
*)env
->irq_inputs
)[PPC970_INPUT_INT
];
312 openpic_irqs
[i
][OPENPIC_OUTPUT_MCK
] =
313 ((qemu_irq
*)env
->irq_inputs
)[PPC970_INPUT_MCP
];
314 /* Not connected ? */
315 openpic_irqs
[i
][OPENPIC_OUTPUT_DEBUG
] = NULL
;
317 openpic_irqs
[i
][OPENPIC_OUTPUT_RESET
] =
318 ((qemu_irq
*)env
->irq_inputs
)[PPC970_INPUT_HRESET
];
320 #endif /* defined(TARGET_PPC64) */
322 hw_error("Bus model not supported on mac99 machine\n");
327 pic
= g_new(qemu_irq
, 64);
329 dev
= qdev_create(NULL
, "openpic");
330 qdev_prop_set_uint32(dev
, "model", OPENPIC_MODEL_RAVEN
);
331 qdev_init_nofail(dev
);
332 s
= SYS_BUS_DEVICE(dev
);
333 pic_mem
= s
->mmio
[0].memory
;
335 for (i
= 0; i
< smp_cpus
; i
++) {
336 for (j
= 0; j
< OPENPIC_OUTPUT_NB
; j
++) {
337 sysbus_connect_irq(s
, k
++, openpic_irqs
[i
][j
]);
341 for (i
= 0; i
< 64; i
++) {
342 pic
[i
] = qdev_get_gpio_in(dev
, i
);
345 if (PPC_INPUT(env
) == PPC_FLAGS_INPUT_970
) {
346 /* 970 gets a U3 bus */
347 pci_bus
= pci_pmac_u3_init(pic
, get_system_memory(), get_system_io());
348 machine_arch
= ARCH_MAC99_U3
;
350 pci_bus
= pci_pmac_init(pic
, get_system_memory(), get_system_io());
351 machine_arch
= ARCH_MAC99
;
353 /* init basic PC hardware */
354 pci_vga_init(pci_bus
);
356 escc_mem
= escc_init(0, pic
[0x25], pic
[0x24],
357 serial_hds
[0], serial_hds
[1], ESCC_CLOCK
, 4);
358 memory_region_init_alias(escc_bar
, "escc-bar",
359 escc_mem
, 0, memory_region_size(escc_mem
));
361 for(i
= 0; i
< nb_nics
; i
++)
362 pci_nic_init_nofail(&nd_table
[i
], "ne2k_pci", NULL
);
364 ide_drive_get(hd
, MAX_IDE_BUS
);
366 macio
= pci_create(pci_bus
, -1, TYPE_NEWWORLD_MACIO
);
368 qdev_connect_gpio_out(dev
, 0, pic
[0x19]); /* CUDA */
369 qdev_connect_gpio_out(dev
, 1, pic
[0x0d]); /* IDE */
370 qdev_connect_gpio_out(dev
, 2, pic
[0x02]); /* IDE DMA */
371 qdev_connect_gpio_out(dev
, 3, pic
[0x0e]); /* IDE */
372 qdev_connect_gpio_out(dev
, 4, pic
[0x02]); /* IDE DMA */
373 macio_init(macio
, pic_mem
, escc_bar
);
375 /* We only emulate 2 out of 3 IDE controllers for now */
376 macio_ide
= MACIO_IDE(object_resolve_path_component(OBJECT(macio
),
378 macio_ide_init_drives(macio_ide
, hd
);
380 macio_ide
= MACIO_IDE(object_resolve_path_component(OBJECT(macio
),
382 macio_ide_init_drives(macio_ide
, &hd
[MAX_IDE_DEVS
]);
384 dev
= qdev_create(BUS(&adb_bus
), TYPE_ADB_KEYBOARD
);
385 qdev_init_nofail(dev
);
386 dev
= qdev_create(BUS(&adb_bus
), TYPE_ADB_MOUSE
);
387 qdev_init_nofail(dev
);
389 if (usb_enabled(machine_arch
== ARCH_MAC99_U3
)) {
390 pci_create_simple(pci_bus
, -1, "pci-ohci");
391 /* U3 needs to use USB for input because Linux doesn't support via-cuda
393 if (machine_arch
== ARCH_MAC99_U3
) {
394 usbdevice_create("keyboard");
395 usbdevice_create("mouse");
399 if (graphic_depth
!= 15 && graphic_depth
!= 32 && graphic_depth
!= 8)
402 /* The NewWorld NVRAM is not located in the MacIO device */
403 dev
= qdev_create(NULL
, TYPE_MACIO_NVRAM
);
404 qdev_prop_set_uint32(dev
, "size", 0x2000);
405 qdev_prop_set_uint32(dev
, "it_shift", 1);
406 qdev_init_nofail(dev
);
407 sysbus_mmio_map(SYS_BUS_DEVICE(dev
), 0, 0xFFF04000);
408 nvr
= MACIO_NVRAM(dev
);
409 pmac_format_nvram_partition(nvr
, 0x2000);
410 /* No PCI init: the BIOS will do it */
412 fw_cfg
= fw_cfg_init(0, 0, CFG_ADDR
, CFG_ADDR
+ 2);
413 fw_cfg_add_i32(fw_cfg
, FW_CFG_ID
, 1);
414 fw_cfg_add_i64(fw_cfg
, FW_CFG_RAM_SIZE
, (uint64_t)ram_size
);
415 fw_cfg_add_i16(fw_cfg
, FW_CFG_MACHINE_ID
, machine_arch
);
416 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_ADDR
, kernel_base
);
417 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_SIZE
, kernel_size
);
418 if (kernel_cmdline
) {
419 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_CMDLINE
, cmdline_base
);
420 pstrcpy_targphys("cmdline", cmdline_base
, TARGET_PAGE_SIZE
, kernel_cmdline
);
422 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_CMDLINE
, 0);
424 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_ADDR
, initrd_base
);
425 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_SIZE
, initrd_size
);
426 fw_cfg_add_i16(fw_cfg
, FW_CFG_BOOT_DEVICE
, ppc_boot_device
);
428 fw_cfg_add_i16(fw_cfg
, FW_CFG_PPC_WIDTH
, graphic_width
);
429 fw_cfg_add_i16(fw_cfg
, FW_CFG_PPC_HEIGHT
, graphic_height
);
430 fw_cfg_add_i16(fw_cfg
, FW_CFG_PPC_DEPTH
, graphic_depth
);
432 fw_cfg_add_i32(fw_cfg
, FW_CFG_PPC_IS_KVM
, kvm_enabled());
437 fw_cfg_add_i32(fw_cfg
, FW_CFG_PPC_TBFREQ
, kvmppc_get_tbfreq());
438 hypercall
= g_malloc(16);
439 kvmppc_get_hypercall(env
, hypercall
, 16);
440 fw_cfg_add_bytes(fw_cfg
, FW_CFG_PPC_KVM_HC
, hypercall
, 16);
441 fw_cfg_add_i32(fw_cfg
, FW_CFG_PPC_KVM_PID
, getpid());
444 fw_cfg_add_i32(fw_cfg
, FW_CFG_PPC_TBFREQ
, get_ticks_per_sec());
447 qemu_register_boot_set(fw_cfg_boot_set
, fw_cfg
);
450 static QEMUMachine core99_machine
= {
452 .desc
= "Mac99 based PowerMAC",
453 .init
= ppc_core99_init
,
454 .max_cpus
= MAX_CPUS
,
458 DEFAULT_MACHINE_OPTIONS
,
461 static void core99_machine_init(void)
463 qemu_register_machine(&core99_machine
);
466 machine_init(core99_machine_init
);