target/hppa: Implement LPA
[qemu/ar7.git] / include / hw / i386 / x86-iommu.h
blob7c71fc74705544a9115ae0744f74893211a3279f
1 /*
2 * Common IOMMU interface for X86 platform
4 * Copyright (C) 2016 Peter Xu, Red Hat <peterx@redhat.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, see <http://www.gnu.org/licenses/>.
20 #ifndef IOMMU_COMMON_H
21 #define IOMMU_COMMON_H
23 #include "hw/sysbus.h"
24 #include "hw/pci/pci.h"
26 #define TYPE_X86_IOMMU_DEVICE ("x86-iommu")
27 #define X86_IOMMU_DEVICE(obj) \
28 OBJECT_CHECK(X86IOMMUState, (obj), TYPE_X86_IOMMU_DEVICE)
29 #define X86_IOMMU_CLASS(klass) \
30 OBJECT_CLASS_CHECK(X86IOMMUClass, (klass), TYPE_X86_IOMMU_DEVICE)
31 #define X86_IOMMU_GET_CLASS(obj) \
32 OBJECT_GET_CLASS(X86IOMMUClass, obj, TYPE_X86_IOMMU_DEVICE)
34 #define X86_IOMMU_SID_INVALID (0xffff)
36 typedef struct X86IOMMUState X86IOMMUState;
37 typedef struct X86IOMMUClass X86IOMMUClass;
39 typedef enum IommuType {
40 TYPE_INTEL,
41 TYPE_AMD,
42 TYPE_NONE
43 } IommuType;
45 struct X86IOMMUClass {
46 SysBusDeviceClass parent;
47 /* Intel/AMD specific realize() hook */
48 DeviceRealize realize;
49 /* MSI-based interrupt remapping */
50 int (*int_remap)(X86IOMMUState *iommu, MSIMessage *src,
51 MSIMessage *dst, uint16_t sid);
54 /**
55 * iec_notify_fn - IEC (Interrupt Entry Cache) notifier hook,
56 * triggered when IR invalidation happens.
57 * @private: private data
58 * @global: whether this is a global IEC invalidation
59 * @index: IRTE index to invalidate (start from)
60 * @mask: invalidation mask
62 typedef void (*iec_notify_fn)(void *private, bool global,
63 uint32_t index, uint32_t mask);
65 struct IEC_Notifier {
66 iec_notify_fn iec_notify;
67 void *private;
68 QLIST_ENTRY(IEC_Notifier) list;
70 typedef struct IEC_Notifier IEC_Notifier;
72 struct X86IOMMUState {
73 SysBusDevice busdev;
74 bool intr_supported; /* Whether vIOMMU supports IR */
75 bool dt_supported; /* Whether vIOMMU supports DT */
76 bool pt_supported; /* Whether vIOMMU supports pass-through */
77 IommuType type; /* IOMMU type - AMD/Intel */
78 QLIST_HEAD(, IEC_Notifier) iec_notifiers; /* IEC notify list */
81 /**
82 * x86_iommu_get_default - get default IOMMU device
83 * @return: pointer to default IOMMU device
85 X86IOMMUState *x86_iommu_get_default(void);
88 * x86_iommu_get_type - get IOMMU type
90 IommuType x86_iommu_get_type(void);
92 /**
93 * x86_iommu_iec_register_notifier - register IEC (Interrupt Entry
94 * Cache) notifiers
95 * @iommu: IOMMU device to register
96 * @fn: IEC notifier hook function
97 * @data: notifier private data
99 void x86_iommu_iec_register_notifier(X86IOMMUState *iommu,
100 iec_notify_fn fn, void *data);
103 * x86_iommu_iec_notify_all - Notify IEC invalidations
104 * @iommu: IOMMU device that sends the notification
105 * @global: whether this is a global invalidation. If true, @index
106 * and @mask are undefined.
107 * @index: starting index of interrupt entry to invalidate
108 * @mask: index mask for the invalidation
110 void x86_iommu_iec_notify_all(X86IOMMUState *iommu, bool global,
111 uint32_t index, uint32_t mask);
113 #endif