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memory: add owner argument to initialization functions
[qemu/ar7.git] / memory.c
blob56ef4bae4e46a0679049f6b20575dc78755ff61d
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "exec/memory.h"
17 #include "exec/address-spaces.h"
18 #include "exec/ioport.h"
19 #include "qemu/bitops.h"
20 #include "qom/object.h"
21 #include "sysemu/kvm.h"
22 #include <assert.h>
23
24 #include "exec/memory-internal.h"
25
26 //#define DEBUG_UNASSIGNED
27
28 static unsigned memory_region_transaction_depth;
29 static bool memory_region_update_pending;
30 static bool global_dirty_log = false;
31
32 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
33 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
34
35 static QTAILQ_HEAD(, AddressSpace) address_spaces
36 = QTAILQ_HEAD_INITIALIZER(address_spaces);
37
38 typedef struct AddrRange AddrRange;
39
40 /*
41 * Note using signed integers limits us to physical addresses at most
42 * 63 bits wide. They are needed for negative offsetting in aliases
43 * (large MemoryRegion::alias_offset).
44 */
45 struct AddrRange {
46 Int128 start;
47 Int128 size;
48 };
49
50 static AddrRange addrrange_make(Int128 start, Int128 size)
51 {
52 return (AddrRange) { start, size };
53 }
54
55 static bool addrrange_equal(AddrRange r1, AddrRange r2)
56 {
57 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
58 }
59
60 static Int128 addrrange_end(AddrRange r)
61 {
62 return int128_add(r.start, r.size);
63 }
64
65 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
66 {
67 int128_addto(&range.start, delta);
68 return range;
69 }
70
71 static bool addrrange_contains(AddrRange range, Int128 addr)
72 {
73 return int128_ge(addr, range.start)
74 && int128_lt(addr, addrrange_end(range));
75 }
76
77 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
78 {
79 return addrrange_contains(r1, r2.start)
80 || addrrange_contains(r2, r1.start);
81 }
82
83 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
84 {
85 Int128 start = int128_max(r1.start, r2.start);
86 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
87 return addrrange_make(start, int128_sub(end, start));
88 }
89
90 enum ListenerDirection { Forward, Reverse };
91
92 static bool memory_listener_match(MemoryListener *listener,
93 MemoryRegionSection *section)
94 {
95 return !listener->address_space_filter
96 || listener->address_space_filter == section->address_space;
97 }
98
99 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
100 do { \
101 MemoryListener *_listener; \
102 \
103 switch (_direction) { \
104 case Forward: \
105 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
106 if (_listener->_callback) { \
107 _listener->_callback(_listener, ##_args); \
108 } \
109 } \
110 break; \
111 case Reverse: \
112 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
113 memory_listeners, link) { \
114 if (_listener->_callback) { \
115 _listener->_callback(_listener, ##_args); \
116 } \
117 } \
118 break; \
119 default: \
120 abort(); \
121 } \
122 } while (0)
123
124 #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
125 do { \
126 MemoryListener *_listener; \
127 \
128 switch (_direction) { \
129 case Forward: \
130 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
131 if (_listener->_callback \
132 && memory_listener_match(_listener, _section)) { \
133 _listener->_callback(_listener, _section, ##_args); \
134 } \
135 } \
136 break; \
137 case Reverse: \
138 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
139 memory_listeners, link) { \
140 if (_listener->_callback \
141 && memory_listener_match(_listener, _section)) { \
142 _listener->_callback(_listener, _section, ##_args); \
143 } \
144 } \
145 break; \
146 default: \
147 abort(); \
148 } \
149 } while (0)
150
151 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \
152 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
153 .mr = (fr)->mr, \
154 .address_space = (as), \
155 .offset_within_region = (fr)->offset_in_region, \
156 .size = (fr)->addr.size, \
157 .offset_within_address_space = int128_get64((fr)->addr.start), \
158 .readonly = (fr)->readonly, \
159 }))
160
161 struct CoalescedMemoryRange {
162 AddrRange addr;
163 QTAILQ_ENTRY(CoalescedMemoryRange) link;
164 };
165
166 struct MemoryRegionIoeventfd {
167 AddrRange addr;
168 bool match_data;
169 uint64_t data;
170 EventNotifier *e;
171 };
172
173 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
174 MemoryRegionIoeventfd b)
175 {
176 if (int128_lt(a.addr.start, b.addr.start)) {
177 return true;
178 } else if (int128_gt(a.addr.start, b.addr.start)) {
179 return false;
180 } else if (int128_lt(a.addr.size, b.addr.size)) {
181 return true;
182 } else if (int128_gt(a.addr.size, b.addr.size)) {
183 return false;
184 } else if (a.match_data < b.match_data) {
185 return true;
186 } else if (a.match_data > b.match_data) {
187 return false;
188 } else if (a.match_data) {
189 if (a.data < b.data) {
190 return true;
191 } else if (a.data > b.data) {
192 return false;
193 }
194 }
195 if (a.e < b.e) {
196 return true;
197 } else if (a.e > b.e) {
198 return false;
199 }
200 return false;
201 }
202
203 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
204 MemoryRegionIoeventfd b)
205 {
206 return !memory_region_ioeventfd_before(a, b)
207 && !memory_region_ioeventfd_before(b, a);
208 }
209
210 typedef struct FlatRange FlatRange;
211 typedef struct FlatView FlatView;
212
213 /* Range of memory in the global map. Addresses are absolute. */
214 struct FlatRange {
215 MemoryRegion *mr;
216 hwaddr offset_in_region;
217 AddrRange addr;
218 uint8_t dirty_log_mask;
219 bool romd_mode;
220 bool readonly;
221 };
222
223 /* Flattened global view of current active memory hierarchy. Kept in sorted
224 * order.
225 */
226 struct FlatView {
227 FlatRange *ranges;
228 unsigned nr;
229 unsigned nr_allocated;
230 };
231
232 typedef struct AddressSpaceOps AddressSpaceOps;
233
234 #define FOR_EACH_FLAT_RANGE(var, view) \
235 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
236
237 static bool flatrange_equal(FlatRange *a, FlatRange *b)
238 {
239 return a->mr == b->mr
240 && addrrange_equal(a->addr, b->addr)
241 && a->offset_in_region == b->offset_in_region
242 && a->romd_mode == b->romd_mode
243 && a->readonly == b->readonly;
244 }
245
246 static void flatview_init(FlatView *view)
247 {
248 view->ranges = NULL;
249 view->nr = 0;
250 view->nr_allocated = 0;
251 }
252
253 /* Insert a range into a given position. Caller is responsible for maintaining
254 * sorting order.
255 */
256 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
257 {
258 if (view->nr == view->nr_allocated) {
259 view->nr_allocated = MAX(2 * view->nr, 10);
260 view->ranges = g_realloc(view->ranges,
261 view->nr_allocated * sizeof(*view->ranges));
262 }
263 memmove(view->ranges + pos + 1, view->ranges + pos,
264 (view->nr - pos) * sizeof(FlatRange));
265 view->ranges[pos] = *range;
266 ++view->nr;
267 }
268
269 static void flatview_destroy(FlatView *view)
270 {
271 g_free(view->ranges);
272 }
273
274 static bool can_merge(FlatRange *r1, FlatRange *r2)
275 {
276 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
277 && r1->mr == r2->mr
278 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
279 r1->addr.size),
280 int128_make64(r2->offset_in_region))
281 && r1->dirty_log_mask == r2->dirty_log_mask
282 && r1->romd_mode == r2->romd_mode
283 && r1->readonly == r2->readonly;
284 }
285
286 /* Attempt to simplify a view by merging adjacent ranges */
287 static void flatview_simplify(FlatView *view)
288 {
289 unsigned i, j;
290
291 i = 0;
292 while (i < view->nr) {
293 j = i + 1;
294 while (j < view->nr
295 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
296 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
297 ++j;
298 }
299 ++i;
300 memmove(&view->ranges[i], &view->ranges[j],
301 (view->nr - j) * sizeof(view->ranges[j]));
302 view->nr -= j - i;
303 }
304 }
305
306 static void memory_region_oldmmio_read_accessor(void *opaque,
307 hwaddr addr,
308 uint64_t *value,
309 unsigned size,
310 unsigned shift,
311 uint64_t mask)
312 {
313 MemoryRegion *mr = opaque;
314 uint64_t tmp;
315
316 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
317 *value |= (tmp & mask) << shift;
318 }
319
320 static void memory_region_read_accessor(void *opaque,
321 hwaddr addr,
322 uint64_t *value,
323 unsigned size,
324 unsigned shift,
325 uint64_t mask)
326 {
327 MemoryRegion *mr = opaque;
328 uint64_t tmp;
329
330 if (mr->flush_coalesced_mmio) {
331 qemu_flush_coalesced_mmio_buffer();
332 }
333 tmp = mr->ops->read(mr->opaque, addr, size);
334 *value |= (tmp & mask) << shift;
335 }
336
337 static void memory_region_oldmmio_write_accessor(void *opaque,
338 hwaddr addr,
339 uint64_t *value,
340 unsigned size,
341 unsigned shift,
342 uint64_t mask)
343 {
344 MemoryRegion *mr = opaque;
345 uint64_t tmp;
346
347 tmp = (*value >> shift) & mask;
348 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
349 }
350
351 static void memory_region_write_accessor(void *opaque,
352 hwaddr addr,
353 uint64_t *value,
354 unsigned size,
355 unsigned shift,
356 uint64_t mask)
357 {
358 MemoryRegion *mr = opaque;
359 uint64_t tmp;
360
361 if (mr->flush_coalesced_mmio) {
362 qemu_flush_coalesced_mmio_buffer();
363 }
364 tmp = (*value >> shift) & mask;
365 mr->ops->write(mr->opaque, addr, tmp, size);
366 }
367
368 static void access_with_adjusted_size(hwaddr addr,
369 uint64_t *value,
370 unsigned size,
371 unsigned access_size_min,
372 unsigned access_size_max,
373 void (*access)(void *opaque,
374 hwaddr addr,
375 uint64_t *value,
376 unsigned size,
377 unsigned shift,
378 uint64_t mask),
379 void *opaque)
380 {
381 uint64_t access_mask;
382 unsigned access_size;
383 unsigned i;
384
385 if (!access_size_min) {
386 access_size_min = 1;
387 }
388 if (!access_size_max) {
389 access_size_max = 4;
390 }
391
392 /* FIXME: support unaligned access? */
393 access_size = MAX(MIN(size, access_size_max), access_size_min);
394 access_mask = -1ULL >> (64 - access_size * 8);
395 for (i = 0; i < size; i += access_size) {
396 #ifdef TARGET_WORDS_BIGENDIAN
397 access(opaque, addr + i, value, access_size,
398 (size - access_size - i) * 8, access_mask);
399 #else
400 access(opaque, addr + i, value, access_size, i * 8, access_mask);
401 #endif
402 }
403 }
404
405 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
406 {
407 AddressSpace *as;
408
409 while (mr->parent) {
410 mr = mr->parent;
411 }
412 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
413 if (mr == as->root) {
414 return as;
415 }
416 }
417 abort();
418 }
419
420 /* Render a memory region into the global view. Ranges in @view obscure
421 * ranges in @mr.
422 */
423 static void render_memory_region(FlatView *view,
424 MemoryRegion *mr,
425 Int128 base,
426 AddrRange clip,
427 bool readonly)
428 {
429 MemoryRegion *subregion;
430 unsigned i;
431 hwaddr offset_in_region;
432 Int128 remain;
433 Int128 now;
434 FlatRange fr;
435 AddrRange tmp;
436
437 if (!mr->enabled) {
438 return;
439 }
440
441 int128_addto(&base, int128_make64(mr->addr));
442 readonly |= mr->readonly;
443
444 tmp = addrrange_make(base, mr->size);
445
446 if (!addrrange_intersects(tmp, clip)) {
447 return;
448 }
449
450 clip = addrrange_intersection(tmp, clip);
451
452 if (mr->alias) {
453 int128_subfrom(&base, int128_make64(mr->alias->addr));
454 int128_subfrom(&base, int128_make64(mr->alias_offset));
455 render_memory_region(view, mr->alias, base, clip, readonly);
456 return;
457 }
458
459 /* Render subregions in priority order. */
460 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
461 render_memory_region(view, subregion, base, clip, readonly);
462 }
463
464 if (!mr->terminates) {
465 return;
466 }
467
468 offset_in_region = int128_get64(int128_sub(clip.start, base));
469 base = clip.start;
470 remain = clip.size;
471
472 fr.mr = mr;
473 fr.dirty_log_mask = mr->dirty_log_mask;
474 fr.romd_mode = mr->romd_mode;
475 fr.readonly = readonly;
476
477 /* Render the region itself into any gaps left by the current view. */
478 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
479 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
480 continue;
481 }
482 if (int128_lt(base, view->ranges[i].addr.start)) {
483 now = int128_min(remain,
484 int128_sub(view->ranges[i].addr.start, base));
485 fr.offset_in_region = offset_in_region;
486 fr.addr = addrrange_make(base, now);
487 flatview_insert(view, i, &fr);
488 ++i;
489 int128_addto(&base, now);
490 offset_in_region += int128_get64(now);
491 int128_subfrom(&remain, now);
492 }
493 now = int128_sub(int128_min(int128_add(base, remain),
494 addrrange_end(view->ranges[i].addr)),
495 base);
496 int128_addto(&base, now);
497 offset_in_region += int128_get64(now);
498 int128_subfrom(&remain, now);
499 }
500 if (int128_nz(remain)) {
501 fr.offset_in_region = offset_in_region;
502 fr.addr = addrrange_make(base, remain);
503 flatview_insert(view, i, &fr);
504 }
505 }
506
507 /* Render a memory topology into a list of disjoint absolute ranges. */
508 static FlatView generate_memory_topology(MemoryRegion *mr)
509 {
510 FlatView view;
511
512 flatview_init(&view);
513
514 if (mr) {
515 render_memory_region(&view, mr, int128_zero(),
516 addrrange_make(int128_zero(), int128_2_64()), false);
517 }
518 flatview_simplify(&view);
519
520 return view;
521 }
522
523 static void address_space_add_del_ioeventfds(AddressSpace *as,
524 MemoryRegionIoeventfd *fds_new,
525 unsigned fds_new_nb,
526 MemoryRegionIoeventfd *fds_old,
527 unsigned fds_old_nb)
528 {
529 unsigned iold, inew;
530 MemoryRegionIoeventfd *fd;
531 MemoryRegionSection section;
532
533 /* Generate a symmetric difference of the old and new fd sets, adding
534 * and deleting as necessary.
535 */
536
537 iold = inew = 0;
538 while (iold < fds_old_nb || inew < fds_new_nb) {
539 if (iold < fds_old_nb
540 && (inew == fds_new_nb
541 || memory_region_ioeventfd_before(fds_old[iold],
542 fds_new[inew]))) {
543 fd = &fds_old[iold];
544 section = (MemoryRegionSection) {
545 .address_space = as,
546 .offset_within_address_space = int128_get64(fd->addr.start),
547 .size = fd->addr.size,
548 };
549 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
550 fd->match_data, fd->data, fd->e);
551 ++iold;
552 } else if (inew < fds_new_nb
553 && (iold == fds_old_nb
554 || memory_region_ioeventfd_before(fds_new[inew],
555 fds_old[iold]))) {
556 fd = &fds_new[inew];
557 section = (MemoryRegionSection) {
558 .address_space = as,
559 .offset_within_address_space = int128_get64(fd->addr.start),
560 .size = fd->addr.size,
561 };
562 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
563 fd->match_data, fd->data, fd->e);
564 ++inew;
565 } else {
566 ++iold;
567 ++inew;
568 }
569 }
570 }
571
572 static void address_space_update_ioeventfds(AddressSpace *as)
573 {
574 FlatRange *fr;
575 unsigned ioeventfd_nb = 0;
576 MemoryRegionIoeventfd *ioeventfds = NULL;
577 AddrRange tmp;
578 unsigned i;
579
580 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
581 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
582 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
583 int128_sub(fr->addr.start,
584 int128_make64(fr->offset_in_region)));
585 if (addrrange_intersects(fr->addr, tmp)) {
586 ++ioeventfd_nb;
587 ioeventfds = g_realloc(ioeventfds,
588 ioeventfd_nb * sizeof(*ioeventfds));
589 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
590 ioeventfds[ioeventfd_nb-1].addr = tmp;
591 }
592 }
593 }
594
595 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
596 as->ioeventfds, as->ioeventfd_nb);
597
598 g_free(as->ioeventfds);
599 as->ioeventfds = ioeventfds;
600 as->ioeventfd_nb = ioeventfd_nb;
601 }
602
603 static void address_space_update_topology_pass(AddressSpace *as,
604 FlatView old_view,
605 FlatView new_view,
606 bool adding)
607 {
608 unsigned iold, inew;
609 FlatRange *frold, *frnew;
610
611 /* Generate a symmetric difference of the old and new memory maps.
612 * Kill ranges in the old map, and instantiate ranges in the new map.
613 */
614 iold = inew = 0;
615 while (iold < old_view.nr || inew < new_view.nr) {
616 if (iold < old_view.nr) {
617 frold = &old_view.ranges[iold];
618 } else {
619 frold = NULL;
620 }
621 if (inew < new_view.nr) {
622 frnew = &new_view.ranges[inew];
623 } else {
624 frnew = NULL;
625 }
626
627 if (frold
628 && (!frnew
629 || int128_lt(frold->addr.start, frnew->addr.start)
630 || (int128_eq(frold->addr.start, frnew->addr.start)
631 && !flatrange_equal(frold, frnew)))) {
632 /* In old but not in new, or in both but attributes changed. */
633
634 if (!adding) {
635 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
636 }
637
638 ++iold;
639 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
640 /* In both and unchanged (except logging may have changed) */
641
642 if (adding) {
643 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
644 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
645 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop);
646 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
647 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start);
648 }
649 }
650
651 ++iold;
652 ++inew;
653 } else {
654 /* In new */
655
656 if (adding) {
657 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
658 }
659
660 ++inew;
661 }
662 }
663 }
664
665
666 static void address_space_update_topology(AddressSpace *as)
667 {
668 FlatView old_view = *as->current_map;
669 FlatView new_view = generate_memory_topology(as->root);
670
671 address_space_update_topology_pass(as, old_view, new_view, false);
672 address_space_update_topology_pass(as, old_view, new_view, true);
673
674 *as->current_map = new_view;
675 flatview_destroy(&old_view);
676 address_space_update_ioeventfds(as);
677 }
678
679 void memory_region_transaction_begin(void)
680 {
681 qemu_flush_coalesced_mmio_buffer();
682 ++memory_region_transaction_depth;
683 }
684
685 void memory_region_transaction_commit(void)
686 {
687 AddressSpace *as;
688
689 assert(memory_region_transaction_depth);
690 --memory_region_transaction_depth;
691 if (!memory_region_transaction_depth && memory_region_update_pending) {
692 memory_region_update_pending = false;
693 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
694
695 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
696 address_space_update_topology(as);
697 }
698
699 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
700 }
701 }
702
703 static void memory_region_destructor_none(MemoryRegion *mr)
704 {
705 }
706
707 static void memory_region_destructor_ram(MemoryRegion *mr)
708 {
709 qemu_ram_free(mr->ram_addr);
710 }
711
712 static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
713 {
714 qemu_ram_free_from_ptr(mr->ram_addr);
715 }
716
717 static void memory_region_destructor_rom_device(MemoryRegion *mr)
718 {
719 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
720 }
721
722 static bool memory_region_wrong_endianness(MemoryRegion *mr)
723 {
724 #ifdef TARGET_WORDS_BIGENDIAN
725 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
726 #else
727 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
728 #endif
729 }
730
731 void memory_region_init(MemoryRegion *mr,
732 Object *owner,
733 const char *name,
734 uint64_t size)
735 {
736 mr->ops = &unassigned_mem_ops;
737 mr->opaque = NULL;
738 mr->owner = owner;
739 mr->iommu_ops = NULL;
740 mr->parent = NULL;
741 mr->size = int128_make64(size);
742 if (size == UINT64_MAX) {
743 mr->size = int128_2_64();
744 }
745 mr->addr = 0;
746 mr->subpage = false;
747 mr->enabled = true;
748 mr->terminates = false;
749 mr->ram = false;
750 mr->romd_mode = true;
751 mr->readonly = false;
752 mr->rom_device = false;
753 mr->destructor = memory_region_destructor_none;
754 mr->priority = 0;
755 mr->may_overlap = false;
756 mr->alias = NULL;
757 QTAILQ_INIT(&mr->subregions);
758 memset(&mr->subregions_link, 0, sizeof mr->subregions_link);
759 QTAILQ_INIT(&mr->coalesced);
760 mr->name = g_strdup(name);
761 mr->dirty_log_mask = 0;
762 mr->ioeventfd_nb = 0;
763 mr->ioeventfds = NULL;
764 mr->flush_coalesced_mmio = false;
765 }
766
767 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
768 unsigned size)
769 {
770 #ifdef DEBUG_UNASSIGNED
771 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
772 #endif
773 if (cpu_single_env != NULL) {
774 cpu_unassigned_access(ENV_GET_CPU(cpu_single_env),
775 addr, false, false, 0, size);
776 }
777 return 0;
778 }
779
780 static void unassigned_mem_write(void *opaque, hwaddr addr,
781 uint64_t val, unsigned size)
782 {
783 #ifdef DEBUG_UNASSIGNED
784 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
785 #endif
786 if (cpu_single_env != NULL) {
787 cpu_unassigned_access(ENV_GET_CPU(cpu_single_env),
788 addr, true, false, 0, size);
789 }
790 }
791
792 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
793 unsigned size, bool is_write)
794 {
795 return false;
796 }
797
798 const MemoryRegionOps unassigned_mem_ops = {
799 .valid.accepts = unassigned_mem_accepts,
800 .endianness = DEVICE_NATIVE_ENDIAN,
801 };
802
803 bool memory_region_access_valid(MemoryRegion *mr,
804 hwaddr addr,
805 unsigned size,
806 bool is_write)
807 {
808 int access_size_min, access_size_max;
809 int access_size, i;
810
811 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
812 return false;
813 }
814
815 if (!mr->ops->valid.accepts) {
816 return true;
817 }
818
819 access_size_min = mr->ops->valid.min_access_size;
820 if (!mr->ops->valid.min_access_size) {
821 access_size_min = 1;
822 }
823
824 access_size_max = mr->ops->valid.max_access_size;
825 if (!mr->ops->valid.max_access_size) {
826 access_size_max = 4;
827 }
828
829 access_size = MAX(MIN(size, access_size_max), access_size_min);
830 for (i = 0; i < size; i += access_size) {
831 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
832 is_write)) {
833 return false;
834 }
835 }
836
837 return true;
838 }
839
840 static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
841 hwaddr addr,
842 unsigned size)
843 {
844 uint64_t data = 0;
845
846 if (mr->ops->read) {
847 access_with_adjusted_size(addr, &data, size,
848 mr->ops->impl.min_access_size,
849 mr->ops->impl.max_access_size,
850 memory_region_read_accessor, mr);
851 } else {
852 access_with_adjusted_size(addr, &data, size, 1, 4,
853 memory_region_oldmmio_read_accessor, mr);
854 }
855
856 return data;
857 }
858
859 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
860 {
861 if (memory_region_wrong_endianness(mr)) {
862 switch (size) {
863 case 1:
864 break;
865 case 2:
866 *data = bswap16(*data);
867 break;
868 case 4:
869 *data = bswap32(*data);
870 break;
871 case 8:
872 *data = bswap64(*data);
873 break;
874 default:
875 abort();
876 }
877 }
878 }
879
880 static bool memory_region_dispatch_read(MemoryRegion *mr,
881 hwaddr addr,
882 uint64_t *pval,
883 unsigned size)
884 {
885 if (!memory_region_access_valid(mr, addr, size, false)) {
886 *pval = unassigned_mem_read(mr, addr, size);
887 return true;
888 }
889
890 *pval = memory_region_dispatch_read1(mr, addr, size);
891 adjust_endianness(mr, pval, size);
892 return false;
893 }
894
895 static bool memory_region_dispatch_write(MemoryRegion *mr,
896 hwaddr addr,
897 uint64_t data,
898 unsigned size)
899 {
900 if (!memory_region_access_valid(mr, addr, size, true)) {
901 unassigned_mem_write(mr, addr, data, size);
902 return true;
903 }
904
905 adjust_endianness(mr, &data, size);
906
907 if (mr->ops->write) {
908 access_with_adjusted_size(addr, &data, size,
909 mr->ops->impl.min_access_size,
910 mr->ops->impl.max_access_size,
911 memory_region_write_accessor, mr);
912 } else {
913 access_with_adjusted_size(addr, &data, size, 1, 4,
914 memory_region_oldmmio_write_accessor, mr);
915 }
916 return false;
917 }
918
919 void memory_region_init_io(MemoryRegion *mr,
920 Object *owner,
921 const MemoryRegionOps *ops,
922 void *opaque,
923 const char *name,
924 uint64_t size)
925 {
926 memory_region_init(mr, owner, name, size);
927 mr->ops = ops;
928 mr->opaque = opaque;
929 mr->terminates = true;
930 mr->ram_addr = ~(ram_addr_t)0;
931 }
932
933 void memory_region_init_ram(MemoryRegion *mr,
934 Object *owner,
935 const char *name,
936 uint64_t size)
937 {
938 memory_region_init(mr, owner, name, size);
939 mr->ram = true;
940 mr->terminates = true;
941 mr->destructor = memory_region_destructor_ram;
942 mr->ram_addr = qemu_ram_alloc(size, mr);
943 }
944
945 void memory_region_init_ram_ptr(MemoryRegion *mr,
946 Object *owner,
947 const char *name,
948 uint64_t size,
949 void *ptr)
950 {
951 memory_region_init(mr, owner, name, size);
952 mr->ram = true;
953 mr->terminates = true;
954 mr->destructor = memory_region_destructor_ram_from_ptr;
955 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr);
956 }
957
958 void memory_region_init_alias(MemoryRegion *mr,
959 Object *owner,
960 const char *name,
961 MemoryRegion *orig,
962 hwaddr offset,
963 uint64_t size)
964 {
965 memory_region_init(mr, owner, name, size);
966 mr->alias = orig;
967 mr->alias_offset = offset;
968 }
969
970 void memory_region_init_rom_device(MemoryRegion *mr,
971 Object *owner,
972 const MemoryRegionOps *ops,
973 void *opaque,
974 const char *name,
975 uint64_t size)
976 {
977 memory_region_init(mr, owner, name, size);
978 mr->ops = ops;
979 mr->opaque = opaque;
980 mr->terminates = true;
981 mr->rom_device = true;
982 mr->destructor = memory_region_destructor_rom_device;
983 mr->ram_addr = qemu_ram_alloc(size, mr);
984 }
985
986 void memory_region_init_iommu(MemoryRegion *mr,
987 Object *owner,
988 const MemoryRegionIOMMUOps *ops,
989 const char *name,
990 uint64_t size)
991 {
992 memory_region_init(mr, owner, name, size);
993 mr->iommu_ops = ops,
994 mr->terminates = true; /* then re-forwards */
995 notifier_list_init(&mr->iommu_notify);
996 }
997
998 void memory_region_init_reservation(MemoryRegion *mr,
999 Object *owner,
1000 const char *name,
1001 uint64_t size)
1002 {
1003 memory_region_init_io(mr, owner, &unassigned_mem_ops, mr, name, size);
1004 }
1005
1006 void memory_region_destroy(MemoryRegion *mr)
1007 {
1008 assert(QTAILQ_EMPTY(&mr->subregions));
1009 assert(memory_region_transaction_depth == 0);
1010 mr->destructor(mr);
1011 memory_region_clear_coalescing(mr);
1012 g_free((char *)mr->name);
1013 g_free(mr->ioeventfds);
1014 }
1015
1016 uint64_t memory_region_size(MemoryRegion *mr)
1017 {
1018 if (int128_eq(mr->size, int128_2_64())) {
1019 return UINT64_MAX;
1020 }
1021 return int128_get64(mr->size);
1022 }
1023
1024 const char *memory_region_name(MemoryRegion *mr)
1025 {
1026 return mr->name;
1027 }
1028
1029 bool memory_region_is_ram(MemoryRegion *mr)
1030 {
1031 return mr->ram;
1032 }
1033
1034 bool memory_region_is_logging(MemoryRegion *mr)
1035 {
1036 return mr->dirty_log_mask;
1037 }
1038
1039 bool memory_region_is_rom(MemoryRegion *mr)
1040 {
1041 return mr->ram && mr->readonly;
1042 }
1043
1044 bool memory_region_is_iommu(MemoryRegion *mr)
1045 {
1046 return mr->iommu_ops;
1047 }
1048
1049 void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n)
1050 {
1051 notifier_list_add(&mr->iommu_notify, n);
1052 }
1053
1054 void memory_region_unregister_iommu_notifier(Notifier *n)
1055 {
1056 notifier_remove(n);
1057 }
1058
1059 void memory_region_notify_iommu(MemoryRegion *mr,
1060 IOMMUTLBEntry entry)
1061 {
1062 assert(memory_region_is_iommu(mr));
1063 notifier_list_notify(&mr->iommu_notify, &entry);
1064 }
1065
1066 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1067 {
1068 uint8_t mask = 1 << client;
1069
1070 memory_region_transaction_begin();
1071 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1072 memory_region_update_pending |= mr->enabled;
1073 memory_region_transaction_commit();
1074 }
1075
1076 bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1077 hwaddr size, unsigned client)
1078 {
1079 assert(mr->terminates);
1080 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1081 1 << client);
1082 }
1083
1084 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1085 hwaddr size)
1086 {
1087 assert(mr->terminates);
1088 return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1);
1089 }
1090
1091 bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1092 hwaddr size, unsigned client)
1093 {
1094 bool ret;
1095 assert(mr->terminates);
1096 ret = cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1097 1 << client);
1098 if (ret) {
1099 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1100 mr->ram_addr + addr + size,
1101 1 << client);
1102 }
1103 return ret;
1104 }
1105
1106
1107 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1108 {
1109 AddressSpace *as;
1110 FlatRange *fr;
1111
1112 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1113 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1114 if (fr->mr == mr) {
1115 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1116 }
1117 }
1118 }
1119 }
1120
1121 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1122 {
1123 if (mr->readonly != readonly) {
1124 memory_region_transaction_begin();
1125 mr->readonly = readonly;
1126 memory_region_update_pending |= mr->enabled;
1127 memory_region_transaction_commit();
1128 }
1129 }
1130
1131 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
1132 {
1133 if (mr->romd_mode != romd_mode) {
1134 memory_region_transaction_begin();
1135 mr->romd_mode = romd_mode;
1136 memory_region_update_pending |= mr->enabled;
1137 memory_region_transaction_commit();
1138 }
1139 }
1140
1141 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1142 hwaddr size, unsigned client)
1143 {
1144 assert(mr->terminates);
1145 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1146 mr->ram_addr + addr + size,
1147 1 << client);
1148 }
1149
1150 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1151 {
1152 if (mr->alias) {
1153 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1154 }
1155
1156 assert(mr->terminates);
1157
1158 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
1159 }
1160
1161 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1162 {
1163 FlatRange *fr;
1164 CoalescedMemoryRange *cmr;
1165 AddrRange tmp;
1166 MemoryRegionSection section;
1167
1168 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1169 if (fr->mr == mr) {
1170 section = (MemoryRegionSection) {
1171 .address_space = as,
1172 .offset_within_address_space = int128_get64(fr->addr.start),
1173 .size = fr->addr.size,
1174 };
1175
1176 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1177 int128_get64(fr->addr.start),
1178 int128_get64(fr->addr.size));
1179 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1180 tmp = addrrange_shift(cmr->addr,
1181 int128_sub(fr->addr.start,
1182 int128_make64(fr->offset_in_region)));
1183 if (!addrrange_intersects(tmp, fr->addr)) {
1184 continue;
1185 }
1186 tmp = addrrange_intersection(tmp, fr->addr);
1187 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1188 int128_get64(tmp.start),
1189 int128_get64(tmp.size));
1190 }
1191 }
1192 }
1193 }
1194
1195 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1196 {
1197 AddressSpace *as;
1198
1199 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1200 memory_region_update_coalesced_range_as(mr, as);
1201 }
1202 }
1203
1204 void memory_region_set_coalescing(MemoryRegion *mr)
1205 {
1206 memory_region_clear_coalescing(mr);
1207 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1208 }
1209
1210 void memory_region_add_coalescing(MemoryRegion *mr,
1211 hwaddr offset,
1212 uint64_t size)
1213 {
1214 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1215
1216 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1217 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1218 memory_region_update_coalesced_range(mr);
1219 memory_region_set_flush_coalesced(mr);
1220 }
1221
1222 void memory_region_clear_coalescing(MemoryRegion *mr)
1223 {
1224 CoalescedMemoryRange *cmr;
1225
1226 qemu_flush_coalesced_mmio_buffer();
1227 mr->flush_coalesced_mmio = false;
1228
1229 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1230 cmr = QTAILQ_FIRST(&mr->coalesced);
1231 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1232 g_free(cmr);
1233 }
1234 memory_region_update_coalesced_range(mr);
1235 }
1236
1237 void memory_region_set_flush_coalesced(MemoryRegion *mr)
1238 {
1239 mr->flush_coalesced_mmio = true;
1240 }
1241
1242 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1243 {
1244 qemu_flush_coalesced_mmio_buffer();
1245 if (QTAILQ_EMPTY(&mr->coalesced)) {
1246 mr->flush_coalesced_mmio = false;
1247 }
1248 }
1249
1250 void memory_region_add_eventfd(MemoryRegion *mr,
1251 hwaddr addr,
1252 unsigned size,
1253 bool match_data,
1254 uint64_t data,
1255 EventNotifier *e)
1256 {
1257 MemoryRegionIoeventfd mrfd = {
1258 .addr.start = int128_make64(addr),
1259 .addr.size = int128_make64(size),
1260 .match_data = match_data,
1261 .data = data,
1262 .e = e,
1263 };
1264 unsigned i;
1265
1266 adjust_endianness(mr, &mrfd.data, size);
1267 memory_region_transaction_begin();
1268 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1269 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1270 break;
1271 }
1272 }
1273 ++mr->ioeventfd_nb;
1274 mr->ioeventfds = g_realloc(mr->ioeventfds,
1275 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1276 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1277 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1278 mr->ioeventfds[i] = mrfd;
1279 memory_region_update_pending |= mr->enabled;
1280 memory_region_transaction_commit();
1281 }
1282
1283 void memory_region_del_eventfd(MemoryRegion *mr,
1284 hwaddr addr,
1285 unsigned size,
1286 bool match_data,
1287 uint64_t data,
1288 EventNotifier *e)
1289 {
1290 MemoryRegionIoeventfd mrfd = {
1291 .addr.start = int128_make64(addr),
1292 .addr.size = int128_make64(size),
1293 .match_data = match_data,
1294 .data = data,
1295 .e = e,
1296 };
1297 unsigned i;
1298
1299 adjust_endianness(mr, &mrfd.data, size);
1300 memory_region_transaction_begin();
1301 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1302 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1303 break;
1304 }
1305 }
1306 assert(i != mr->ioeventfd_nb);
1307 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1308 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1309 --mr->ioeventfd_nb;
1310 mr->ioeventfds = g_realloc(mr->ioeventfds,
1311 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1312 memory_region_update_pending |= mr->enabled;
1313 memory_region_transaction_commit();
1314 }
1315
1316 static void memory_region_add_subregion_common(MemoryRegion *mr,
1317 hwaddr offset,
1318 MemoryRegion *subregion)
1319 {
1320 MemoryRegion *other;
1321
1322 memory_region_transaction_begin();
1323
1324 assert(!subregion->parent);
1325 subregion->parent = mr;
1326 subregion->addr = offset;
1327 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1328 if (subregion->may_overlap || other->may_overlap) {
1329 continue;
1330 }
1331 if (int128_ge(int128_make64(offset),
1332 int128_add(int128_make64(other->addr), other->size))
1333 || int128_le(int128_add(int128_make64(offset), subregion->size),
1334 int128_make64(other->addr))) {
1335 continue;
1336 }
1337 #if 0
1338 printf("warning: subregion collision %llx/%llx (%s) "
1339 "vs %llx/%llx (%s)\n",
1340 (unsigned long long)offset,
1341 (unsigned long long)int128_get64(subregion->size),
1342 subregion->name,
1343 (unsigned long long)other->addr,
1344 (unsigned long long)int128_get64(other->size),
1345 other->name);
1346 #endif
1347 }
1348 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1349 if (subregion->priority >= other->priority) {
1350 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1351 goto done;
1352 }
1353 }
1354 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1355 done:
1356 memory_region_update_pending |= mr->enabled && subregion->enabled;
1357 memory_region_transaction_commit();
1358 }
1359
1360
1361 void memory_region_add_subregion(MemoryRegion *mr,
1362 hwaddr offset,
1363 MemoryRegion *subregion)
1364 {
1365 subregion->may_overlap = false;
1366 subregion->priority = 0;
1367 memory_region_add_subregion_common(mr, offset, subregion);
1368 }
1369
1370 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1371 hwaddr offset,
1372 MemoryRegion *subregion,
1373 unsigned priority)
1374 {
1375 subregion->may_overlap = true;
1376 subregion->priority = priority;
1377 memory_region_add_subregion_common(mr, offset, subregion);
1378 }
1379
1380 void memory_region_del_subregion(MemoryRegion *mr,
1381 MemoryRegion *subregion)
1382 {
1383 memory_region_transaction_begin();
1384 assert(subregion->parent == mr);
1385 subregion->parent = NULL;
1386 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1387 memory_region_update_pending |= mr->enabled && subregion->enabled;
1388 memory_region_transaction_commit();
1389 }
1390
1391 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1392 {
1393 if (enabled == mr->enabled) {
1394 return;
1395 }
1396 memory_region_transaction_begin();
1397 mr->enabled = enabled;
1398 memory_region_update_pending = true;
1399 memory_region_transaction_commit();
1400 }
1401
1402 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
1403 {
1404 MemoryRegion *parent = mr->parent;
1405 unsigned priority = mr->priority;
1406 bool may_overlap = mr->may_overlap;
1407
1408 if (addr == mr->addr || !parent) {
1409 mr->addr = addr;
1410 return;
1411 }
1412
1413 memory_region_transaction_begin();
1414 memory_region_del_subregion(parent, mr);
1415 if (may_overlap) {
1416 memory_region_add_subregion_overlap(parent, addr, mr, priority);
1417 } else {
1418 memory_region_add_subregion(parent, addr, mr);
1419 }
1420 memory_region_transaction_commit();
1421 }
1422
1423 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
1424 {
1425 assert(mr->alias);
1426
1427 if (offset == mr->alias_offset) {
1428 return;
1429 }
1430
1431 memory_region_transaction_begin();
1432 mr->alias_offset = offset;
1433 memory_region_update_pending |= mr->enabled;
1434 memory_region_transaction_commit();
1435 }
1436
1437 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1438 {
1439 return mr->ram_addr;
1440 }
1441
1442 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1443 {
1444 const AddrRange *addr = addr_;
1445 const FlatRange *fr = fr_;
1446
1447 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1448 return -1;
1449 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1450 return 1;
1451 }
1452 return 0;
1453 }
1454
1455 static FlatRange *address_space_lookup(AddressSpace *as, AddrRange addr)
1456 {
1457 return bsearch(&addr, as->current_map->ranges, as->current_map->nr,
1458 sizeof(FlatRange), cmp_flatrange_addr);
1459 }
1460
1461 MemoryRegionSection memory_region_find(MemoryRegion *mr,
1462 hwaddr addr, uint64_t size)
1463 {
1464 MemoryRegionSection ret = { .mr = NULL };
1465 MemoryRegion *root;
1466 AddressSpace *as;
1467 AddrRange range;
1468 FlatRange *fr;
1469
1470 addr += mr->addr;
1471 for (root = mr; root->parent; ) {
1472 root = root->parent;
1473 addr += root->addr;
1474 }
1475
1476 as = memory_region_to_address_space(root);
1477 range = addrrange_make(int128_make64(addr), int128_make64(size));
1478 fr = address_space_lookup(as, range);
1479 if (!fr) {
1480 return ret;
1481 }
1482
1483 while (fr > as->current_map->ranges
1484 && addrrange_intersects(fr[-1].addr, range)) {
1485 --fr;
1486 }
1487
1488 ret.mr = fr->mr;
1489 ret.address_space = as;
1490 range = addrrange_intersection(range, fr->addr);
1491 ret.offset_within_region = fr->offset_in_region;
1492 ret.offset_within_region += int128_get64(int128_sub(range.start,
1493 fr->addr.start));
1494 ret.size = range.size;
1495 ret.offset_within_address_space = int128_get64(range.start);
1496 ret.readonly = fr->readonly;
1497 return ret;
1498 }
1499
1500 void address_space_sync_dirty_bitmap(AddressSpace *as)
1501 {
1502 FlatRange *fr;
1503
1504 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1505 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1506 }
1507 }
1508
1509 void memory_global_dirty_log_start(void)
1510 {
1511 global_dirty_log = true;
1512 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
1513 }
1514
1515 void memory_global_dirty_log_stop(void)
1516 {
1517 global_dirty_log = false;
1518 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
1519 }
1520
1521 static void listener_add_address_space(MemoryListener *listener,
1522 AddressSpace *as)
1523 {
1524 FlatRange *fr;
1525
1526 if (listener->address_space_filter
1527 && listener->address_space_filter != as) {
1528 return;
1529 }
1530
1531 if (global_dirty_log) {
1532 if (listener->log_global_start) {
1533 listener->log_global_start(listener);
1534 }
1535 }
1536
1537 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1538 MemoryRegionSection section = {
1539 .mr = fr->mr,
1540 .address_space = as,
1541 .offset_within_region = fr->offset_in_region,
1542 .size = fr->addr.size,
1543 .offset_within_address_space = int128_get64(fr->addr.start),
1544 .readonly = fr->readonly,
1545 };
1546 if (listener->region_add) {
1547 listener->region_add(listener, &section);
1548 }
1549 }
1550 }
1551
1552 void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
1553 {
1554 MemoryListener *other = NULL;
1555 AddressSpace *as;
1556
1557 listener->address_space_filter = filter;
1558 if (QTAILQ_EMPTY(&memory_listeners)
1559 || listener->priority >= QTAILQ_LAST(&memory_listeners,
1560 memory_listeners)->priority) {
1561 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
1562 } else {
1563 QTAILQ_FOREACH(other, &memory_listeners, link) {
1564 if (listener->priority < other->priority) {
1565 break;
1566 }
1567 }
1568 QTAILQ_INSERT_BEFORE(other, listener, link);
1569 }
1570
1571 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1572 listener_add_address_space(listener, as);
1573 }
1574 }
1575
1576 void memory_listener_unregister(MemoryListener *listener)
1577 {
1578 QTAILQ_REMOVE(&memory_listeners, listener, link);
1579 }
1580
1581 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
1582 {
1583 memory_region_transaction_begin();
1584 as->root = root;
1585 as->current_map = g_new(FlatView, 1);
1586 flatview_init(as->current_map);
1587 as->ioeventfd_nb = 0;
1588 as->ioeventfds = NULL;
1589 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
1590 as->name = g_strdup(name ? name : "anonymous");
1591 address_space_init_dispatch(as);
1592 memory_region_update_pending |= root->enabled;
1593 memory_region_transaction_commit();
1594 }
1595
1596 void address_space_destroy(AddressSpace *as)
1597 {
1598 /* Flush out anything from MemoryListeners listening in on this */
1599 memory_region_transaction_begin();
1600 as->root = NULL;
1601 memory_region_transaction_commit();
1602 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
1603 address_space_destroy_dispatch(as);
1604 flatview_destroy(as->current_map);
1605 g_free(as->name);
1606 g_free(as->current_map);
1607 g_free(as->ioeventfds);
1608 }
1609
1610 bool io_mem_read(MemoryRegion *mr, hwaddr addr, uint64_t *pval, unsigned size)
1611 {
1612 return memory_region_dispatch_read(mr, addr, pval, size);
1613 }
1614
1615 bool io_mem_write(MemoryRegion *mr, hwaddr addr,
1616 uint64_t val, unsigned size)
1617 {
1618 return memory_region_dispatch_write(mr, addr, val, size);
1619 }
1620
1621 typedef struct MemoryRegionList MemoryRegionList;
1622
1623 struct MemoryRegionList {
1624 const MemoryRegion *mr;
1625 bool printed;
1626 QTAILQ_ENTRY(MemoryRegionList) queue;
1627 };
1628
1629 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1630
1631 static void mtree_print_mr(fprintf_function mon_printf, void *f,
1632 const MemoryRegion *mr, unsigned int level,
1633 hwaddr base,
1634 MemoryRegionListHead *alias_print_queue)
1635 {
1636 MemoryRegionList *new_ml, *ml, *next_ml;
1637 MemoryRegionListHead submr_print_queue;
1638 const MemoryRegion *submr;
1639 unsigned int i;
1640
1641 if (!mr || !mr->enabled) {
1642 return;
1643 }
1644
1645 for (i = 0; i < level; i++) {
1646 mon_printf(f, " ");
1647 }
1648
1649 if (mr->alias) {
1650 MemoryRegionList *ml;
1651 bool found = false;
1652
1653 /* check if the alias is already in the queue */
1654 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
1655 if (ml->mr == mr->alias && !ml->printed) {
1656 found = true;
1657 }
1658 }
1659
1660 if (!found) {
1661 ml = g_new(MemoryRegionList, 1);
1662 ml->mr = mr->alias;
1663 ml->printed = false;
1664 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
1665 }
1666 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
1667 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
1668 "-" TARGET_FMT_plx "\n",
1669 base + mr->addr,
1670 base + mr->addr
1671 + (hwaddr)int128_get64(int128_sub(mr->size, int128_make64(1))),
1672 mr->priority,
1673 mr->romd_mode ? 'R' : '-',
1674 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
1675 : '-',
1676 mr->name,
1677 mr->alias->name,
1678 mr->alias_offset,
1679 mr->alias_offset
1680 + (hwaddr)int128_get64(mr->size) - 1);
1681 } else {
1682 mon_printf(f,
1683 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n",
1684 base + mr->addr,
1685 base + mr->addr
1686 + (hwaddr)int128_get64(int128_sub(mr->size, int128_make64(1))),
1687 mr->priority,
1688 mr->romd_mode ? 'R' : '-',
1689 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
1690 : '-',
1691 mr->name);
1692 }
1693
1694 QTAILQ_INIT(&submr_print_queue);
1695
1696 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
1697 new_ml = g_new(MemoryRegionList, 1);
1698 new_ml->mr = submr;
1699 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1700 if (new_ml->mr->addr < ml->mr->addr ||
1701 (new_ml->mr->addr == ml->mr->addr &&
1702 new_ml->mr->priority > ml->mr->priority)) {
1703 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
1704 new_ml = NULL;
1705 break;
1706 }
1707 }
1708 if (new_ml) {
1709 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
1710 }
1711 }
1712
1713 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1714 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
1715 alias_print_queue);
1716 }
1717
1718 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
1719 g_free(ml);
1720 }
1721 }
1722
1723 void mtree_info(fprintf_function mon_printf, void *f)
1724 {
1725 MemoryRegionListHead ml_head;
1726 MemoryRegionList *ml, *ml2;
1727 AddressSpace *as;
1728
1729 QTAILQ_INIT(&ml_head);
1730
1731 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1732 mon_printf(f, "%s\n", as->name);
1733 mtree_print_mr(mon_printf, f, as->root, 0, 0, &ml_head);
1734 }
1735
1736 mon_printf(f, "aliases\n");
1737 /* print aliased regions */
1738 QTAILQ_FOREACH(ml, &ml_head, queue) {
1739 if (!ml->printed) {
1740 mon_printf(f, "%s\n", ml->mr->name);
1741 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
1742 }
1743 }
1744
1745 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
1746 g_free(ml);
1747 }
1748 }
AR7 emulation for QEMU