4 * Copyright (c) 2012 SUSE LINUX Products GmbH
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see
18 * <http://www.gnu.org/licenses/gpl-2.0.html>
23 #include "hw/qdev-core.h"
24 #include "disas/dis-asm.h"
25 #include "exec/hwaddr.h"
26 #include "exec/memattrs.h"
27 #include "qapi/qapi-types-run-state.h"
28 #include "qemu/bitmap.h"
29 #include "qemu/rcu_queue.h"
30 #include "qemu/queue.h"
31 #include "qemu/thread.h"
33 typedef int (*WriteCoreDumpFunction
)(const void *buf
, size_t size
,
38 * Type wide enough to contain any #target_ulong virtual address.
40 typedef uint64_t vaddr
;
41 #define VADDR_PRId PRId64
42 #define VADDR_PRIu PRIu64
43 #define VADDR_PRIo PRIo64
44 #define VADDR_PRIx PRIx64
45 #define VADDR_PRIX PRIX64
46 #define VADDR_MAX UINT64_MAX
50 * @section_id: QEMU-cpu
52 * @short_description: Base class for all CPUs
55 #define TYPE_CPU "cpu"
57 /* Since this macro is used a lot in hot code paths and in conjunction with
58 * FooCPU *foo_env_get_cpu(), we deviate from usual QOM practice by using
61 #define CPU(obj) ((CPUState *)(obj))
63 #define CPU_CLASS(class) OBJECT_CLASS_CHECK(CPUClass, (class), TYPE_CPU)
64 #define CPU_GET_CLASS(obj) OBJECT_GET_CLASS(CPUClass, (obj), TYPE_CPU)
66 typedef enum MMUAccessType
{
72 typedef struct CPUWatchpoint CPUWatchpoint
;
74 typedef void (*CPUUnassignedAccess
)(CPUState
*cpu
, hwaddr addr
,
75 bool is_write
, bool is_exec
, int opaque
,
78 struct TranslationBlock
;
82 * @class_by_name: Callback to map -cpu command line model name to an
83 * instantiatable CPU type.
84 * @parse_features: Callback to parse command line arguments.
85 * @reset: Callback to reset the #CPUState to its initial state.
86 * @reset_dump_flags: #CPUDumpFlags to use for reset logging.
87 * @has_work: Callback for checking if there is work to do.
88 * @do_interrupt: Callback for interrupt handling.
89 * @do_unassigned_access: Callback for unassigned access handling.
90 * (this is deprecated: new targets should use do_transaction_failed instead)
91 * @do_unaligned_access: Callback for unaligned access handling, if
92 * the target defines #ALIGNED_ONLY.
93 * @do_transaction_failed: Callback for handling failed memory transactions
94 * (ie bus faults or external aborts; not MMU faults)
95 * @virtio_is_big_endian: Callback to return %true if a CPU which supports
96 * runtime configurable endianness is currently big-endian. Non-configurable
97 * CPUs can use the default implementation of this method. This method should
98 * not be used by any callers other than the pre-1.0 virtio devices.
99 * @memory_rw_debug: Callback for GDB memory access.
100 * @dump_state: Callback for dumping state.
101 * @dump_statistics: Callback for dumping statistics.
102 * @get_arch_id: Callback for getting architecture-dependent CPU ID.
103 * @get_paging_enabled: Callback for inquiring whether paging is enabled.
104 * @get_memory_mapping: Callback for obtaining the memory mappings.
105 * @set_pc: Callback for setting the Program Counter register. This
106 * should have the semantics used by the target architecture when
107 * setting the PC from a source such as an ELF file entry point;
108 * for example on Arm it will also set the Thumb mode bit based
109 * on the least significant bit of the new PC value.
110 * If the target behaviour here is anything other than "set
111 * the PC register to the value passed in" then the target must
112 * also implement the synchronize_from_tb hook.
113 * @synchronize_from_tb: Callback for synchronizing state from a TCG
114 * #TranslationBlock. This is called when we abandon execution
115 * of a TB before starting it, and must set all parts of the CPU
116 * state which the previous TB in the chain may not have updated.
117 * This always includes at least the program counter; some targets
118 * will need to do more. If this hook is not implemented then the
119 * default is to call @set_pc(tb->pc).
120 * @tlb_fill: Callback for handling a softmmu tlb miss or user-only
121 * address fault. For system mode, if the access is valid, call
122 * tlb_set_page and return true; if the access is invalid, and
123 * probe is true, return false; otherwise raise an exception and
124 * do not return. For user-only mode, always raise an exception
126 * @get_phys_page_debug: Callback for obtaining a physical address.
127 * @get_phys_page_attrs_debug: Callback for obtaining a physical address and the
128 * associated memory transaction attributes to use for the access.
129 * CPUs which use memory transaction attributes should implement this
130 * instead of get_phys_page_debug.
131 * @asidx_from_attrs: Callback to return the CPU AddressSpace to use for
132 * a memory access with the specified memory transaction attributes.
133 * @gdb_read_register: Callback for letting GDB read a register.
134 * @gdb_write_register: Callback for letting GDB write a register.
135 * @debug_check_watchpoint: Callback: return true if the architectural
136 * watchpoint whose address has matched should really fire.
137 * @debug_excp_handler: Callback for handling debug exceptions.
138 * @write_elf64_note: Callback for writing a CPU-specific ELF note to a
139 * 64-bit VM coredump.
140 * @write_elf32_qemunote: Callback for writing a CPU- and QEMU-specific ELF
141 * note to a 32-bit VM coredump.
142 * @write_elf32_note: Callback for writing a CPU-specific ELF note to a
143 * 32-bit VM coredump.
144 * @write_elf32_qemunote: Callback for writing a CPU- and QEMU-specific ELF
145 * note to a 32-bit VM coredump.
146 * @vmsd: State description for migration.
147 * @gdb_num_core_regs: Number of core registers accessible to GDB.
148 * @gdb_core_xml_file: File name for core registers GDB XML description.
149 * @gdb_stop_before_watchpoint: Indicates whether GDB expects the CPU to stop
150 * before the insn which triggers a watchpoint rather than after it.
151 * @gdb_arch_name: Optional callback that returns the architecture name known
152 * to GDB. The caller must free the returned string with g_free.
153 * @gdb_get_dynamic_xml: Callback to return dynamically generated XML for the
154 * gdb stub. Returns a pointer to the XML contents for the specified XML file
155 * or NULL if the CPU doesn't have a dynamically generated content for it.
156 * @cpu_exec_enter: Callback for cpu_exec preparation.
157 * @cpu_exec_exit: Callback for cpu_exec cleanup.
158 * @cpu_exec_interrupt: Callback for processing interrupts in cpu_exec.
159 * @disas_set_info: Setup architecture specific components of disassembly info
160 * @adjust_watchpoint_address: Perform a target-specific adjustment to an
161 * address before attempting to match it against watchpoints.
163 * Represents a CPU family or model.
165 typedef struct CPUClass
{
167 DeviceClass parent_class
;
170 ObjectClass
*(*class_by_name
)(const char *cpu_model
);
171 void (*parse_features
)(const char *typename
, char *str
, Error
**errp
);
173 void (*reset
)(CPUState
*cpu
);
174 int reset_dump_flags
;
175 bool (*has_work
)(CPUState
*cpu
);
176 void (*do_interrupt
)(CPUState
*cpu
);
177 CPUUnassignedAccess do_unassigned_access
;
178 void (*do_unaligned_access
)(CPUState
*cpu
, vaddr addr
,
179 MMUAccessType access_type
,
180 int mmu_idx
, uintptr_t retaddr
);
181 void (*do_transaction_failed
)(CPUState
*cpu
, hwaddr physaddr
, vaddr addr
,
182 unsigned size
, MMUAccessType access_type
,
183 int mmu_idx
, MemTxAttrs attrs
,
184 MemTxResult response
, uintptr_t retaddr
);
185 bool (*virtio_is_big_endian
)(CPUState
*cpu
);
186 int (*memory_rw_debug
)(CPUState
*cpu
, vaddr addr
,
187 uint8_t *buf
, int len
, bool is_write
);
188 void (*dump_state
)(CPUState
*cpu
, FILE *, int flags
);
189 GuestPanicInformation
* (*get_crash_info
)(CPUState
*cpu
);
190 void (*dump_statistics
)(CPUState
*cpu
, int flags
);
191 int64_t (*get_arch_id
)(CPUState
*cpu
);
192 bool (*get_paging_enabled
)(const CPUState
*cpu
);
193 void (*get_memory_mapping
)(CPUState
*cpu
, MemoryMappingList
*list
,
195 void (*set_pc
)(CPUState
*cpu
, vaddr value
);
196 void (*synchronize_from_tb
)(CPUState
*cpu
, struct TranslationBlock
*tb
);
197 bool (*tlb_fill
)(CPUState
*cpu
, vaddr address
, int size
,
198 MMUAccessType access_type
, int mmu_idx
,
199 bool probe
, uintptr_t retaddr
);
200 hwaddr (*get_phys_page_debug
)(CPUState
*cpu
, vaddr addr
);
201 hwaddr (*get_phys_page_attrs_debug
)(CPUState
*cpu
, vaddr addr
,
203 int (*asidx_from_attrs
)(CPUState
*cpu
, MemTxAttrs attrs
);
204 int (*gdb_read_register
)(CPUState
*cpu
, uint8_t *buf
, int reg
);
205 int (*gdb_write_register
)(CPUState
*cpu
, uint8_t *buf
, int reg
);
206 bool (*debug_check_watchpoint
)(CPUState
*cpu
, CPUWatchpoint
*wp
);
207 void (*debug_excp_handler
)(CPUState
*cpu
);
209 int (*write_elf64_note
)(WriteCoreDumpFunction f
, CPUState
*cpu
,
210 int cpuid
, void *opaque
);
211 int (*write_elf64_qemunote
)(WriteCoreDumpFunction f
, CPUState
*cpu
,
213 int (*write_elf32_note
)(WriteCoreDumpFunction f
, CPUState
*cpu
,
214 int cpuid
, void *opaque
);
215 int (*write_elf32_qemunote
)(WriteCoreDumpFunction f
, CPUState
*cpu
,
218 const struct VMStateDescription
*vmsd
;
219 const char *gdb_core_xml_file
;
220 gchar
* (*gdb_arch_name
)(CPUState
*cpu
);
221 const char * (*gdb_get_dynamic_xml
)(CPUState
*cpu
, const char *xmlname
);
222 void (*cpu_exec_enter
)(CPUState
*cpu
);
223 void (*cpu_exec_exit
)(CPUState
*cpu
);
224 bool (*cpu_exec_interrupt
)(CPUState
*cpu
, int interrupt_request
);
226 void (*disas_set_info
)(CPUState
*cpu
, disassemble_info
*info
);
227 vaddr (*adjust_watchpoint_address
)(CPUState
*cpu
, vaddr addr
, int len
);
228 void (*tcg_initialize
)(void);
230 /* Keep non-pointer data at the end to minimize holes. */
231 int gdb_num_core_regs
;
232 bool gdb_stop_before_watchpoint
;
235 #ifdef HOST_WORDS_BIGENDIAN
236 typedef struct icount_decr_u16
{
241 typedef struct icount_decr_u16
{
247 typedef struct CPUBreakpoint
{
249 int flags
; /* BP_* */
250 QTAILQ_ENTRY(CPUBreakpoint
) entry
;
253 struct CPUWatchpoint
{
258 int flags
; /* BP_* */
259 QTAILQ_ENTRY(CPUWatchpoint
) entry
;
265 struct hax_vcpu_state
;
267 #define TB_JMP_CACHE_BITS 12
268 #define TB_JMP_CACHE_SIZE (1 << TB_JMP_CACHE_BITS)
272 /* The union type allows passing of 64 bit target pointers on 32 bit
273 * hosts in a single parameter
277 unsigned long host_ulong
;
282 #define RUN_ON_CPU_HOST_PTR(p) ((run_on_cpu_data){.host_ptr = (p)})
283 #define RUN_ON_CPU_HOST_INT(i) ((run_on_cpu_data){.host_int = (i)})
284 #define RUN_ON_CPU_HOST_ULONG(ul) ((run_on_cpu_data){.host_ulong = (ul)})
285 #define RUN_ON_CPU_TARGET_PTR(v) ((run_on_cpu_data){.target_ptr = (v)})
286 #define RUN_ON_CPU_NULL RUN_ON_CPU_HOST_PTR(NULL)
288 typedef void (*run_on_cpu_func
)(CPUState
*cpu
, run_on_cpu_data data
);
290 struct qemu_work_item
;
292 #define CPU_UNSET_NUMA_NODE_ID -1
293 #define CPU_TRACE_DSTATE_MAX_EVENTS 32
297 * @cpu_index: CPU index (informative).
298 * @cluster_index: Identifies which cluster this CPU is in.
299 * For boards which don't define clusters or for "loose" CPUs not assigned
300 * to a cluster this will be UNASSIGNED_CLUSTER_INDEX; otherwise it will
301 * be the same as the cluster-id property of the CPU object's TYPE_CPU_CLUSTER
303 * @nr_cores: Number of cores within this CPU package.
304 * @nr_threads: Number of threads within this CPU.
305 * @running: #true if CPU is currently running (lockless).
306 * @has_waiter: #true if a CPU is currently waiting for the cpu_exec_end;
307 * valid under cpu_list_lock.
308 * @created: Indicates whether the CPU thread has been successfully created.
309 * @interrupt_request: Indicates a pending interrupt request.
310 * @halted: Nonzero if the CPU is in suspended state.
311 * @stop: Indicates a pending stop request.
312 * @stopped: Indicates the CPU has been artificially stopped.
313 * @unplug: Indicates a pending CPU unplug request.
314 * @crash_occurred: Indicates the OS reported a crash (panic) for this CPU
315 * @singlestep_enabled: Flags for single-stepping.
316 * @icount_extra: Instructions until next timer event.
317 * @icount_decr: Low 16 bits: number of cycles left, only used in icount mode.
318 * High 16 bits: Set to -1 to force TCG to stop executing linked TBs for this
319 * CPU and return to its top level loop (even in non-icount mode).
320 * This allows a single read-compare-cbranch-write sequence to test
321 * for both decrementer underflow and exceptions.
322 * @can_do_io: Nonzero if memory-mapped IO is safe. Deterministic execution
323 * requires that IO only be performed on the last instruction of a TB
324 * so that interrupts take effect immediately.
325 * @cpu_ases: Pointer to array of CPUAddressSpaces (which define the
326 * AddressSpaces this CPU has)
327 * @num_ases: number of CPUAddressSpaces in @cpu_ases
328 * @as: Pointer to the first AddressSpace, for the convenience of targets which
329 * only have a single AddressSpace
330 * @env_ptr: Pointer to subclass-specific CPUArchState field.
331 * @gdb_regs: Additional GDB registers.
332 * @gdb_num_regs: Number of total registers accessible to GDB.
333 * @gdb_num_g_regs: Number of registers in GDB 'g' packets.
334 * @next_cpu: Next CPU sharing TB cache.
335 * @opaque: User data.
336 * @mem_io_pc: Host Program Counter at which the memory was accessed.
337 * @mem_io_vaddr: Target virtual address at which the memory was accessed.
338 * @kvm_fd: vCPU file descriptor for KVM.
339 * @work_mutex: Lock to prevent multiple access to queued_work_*.
340 * @queued_work_first: First asynchronous work pending.
341 * @trace_dstate_delayed: Delayed changes to trace_dstate (includes all changes
343 * @trace_dstate: Dynamic tracing state of events for this vCPU (bitmask).
344 * @ignore_memory_transaction_failures: Cached copy of the MachineState
345 * flag of the same name: allows the board to suppress calling of the
346 * CPU do_transaction_failed hook function.
348 * State of one CPU core or thread.
352 DeviceState parent_obj
;
358 struct QemuThread
*thread
;
363 bool running
, has_waiter
;
364 struct QemuCond
*halt_cond
;
372 uint32_t cflags_next_tb
;
373 /* updates protected by BQL */
374 uint32_t interrupt_request
;
375 int singlestep_enabled
;
376 int64_t icount_budget
;
377 int64_t icount_extra
;
380 QemuMutex work_mutex
;
381 struct qemu_work_item
*queued_work_first
, *queued_work_last
;
383 CPUAddressSpace
*cpu_ases
;
386 MemoryRegion
*memory
;
388 void *env_ptr
; /* CPUArchState */
390 /* Accessed in parallel; all accesses must be atomic */
391 struct TranslationBlock
*tb_jmp_cache
[TB_JMP_CACHE_SIZE
];
393 struct GDBRegisterState
*gdb_regs
;
396 QTAILQ_ENTRY(CPUState
) node
;
398 /* ice debug support */
399 QTAILQ_HEAD(, CPUBreakpoint
) breakpoints
;
401 QTAILQ_HEAD(, CPUWatchpoint
) watchpoints
;
402 CPUWatchpoint
*watchpoint_hit
;
406 /* In order to avoid passing too many arguments to the MMIO helpers,
407 * we store some rarely used information in the CPU context.
412 * This is only needed for the legacy cpu_unassigned_access() hook;
413 * when all targets using it have been converted to use
414 * cpu_transaction_failed() instead it can be removed.
416 MMUAccessType mem_io_access_type
;
419 struct KVMState
*kvm_state
;
420 struct kvm_run
*kvm_run
;
422 /* Used for events with 'vcpu' and *without* the 'disabled' properties */
423 DECLARE_BITMAP(trace_dstate_delayed
, CPU_TRACE_DSTATE_MAX_EVENTS
);
424 DECLARE_BITMAP(trace_dstate
, CPU_TRACE_DSTATE_MAX_EVENTS
);
426 /* TODO Move common fields from CPUArchState here. */
431 int32_t exception_index
;
433 /* shared by kvm, hax and hvf */
436 /* Used to keep track of an outstanding cpu throttle thread for migration
439 bool throttle_thread_scheduled
;
441 bool ignore_memory_transaction_failures
;
443 /* Note that this is accessed at the start of every TB via a negative
444 offset from AREG0. Leave this field at the end so as to make the
445 (absolute value) offset as small as possible. This reduces code
446 size, especially for hosts without large memory offsets. */
452 struct hax_vcpu_state
*hax_vcpu
;
456 /* track IOMMUs whose translations we've cached in the TCG TLB */
457 GArray
*iommu_notifiers
;
460 typedef QTAILQ_HEAD(CPUTailQ
, CPUState
) CPUTailQ
;
461 extern CPUTailQ cpus
;
463 #define first_cpu QTAILQ_FIRST_RCU(&cpus)
464 #define CPU_NEXT(cpu) QTAILQ_NEXT_RCU(cpu, node)
465 #define CPU_FOREACH(cpu) QTAILQ_FOREACH_RCU(cpu, &cpus, node)
466 #define CPU_FOREACH_SAFE(cpu, next_cpu) \
467 QTAILQ_FOREACH_SAFE_RCU(cpu, &cpus, node, next_cpu)
469 extern __thread CPUState
*current_cpu
;
471 static inline void cpu_tb_jmp_cache_clear(CPUState
*cpu
)
475 for (i
= 0; i
< TB_JMP_CACHE_SIZE
; i
++) {
476 atomic_set(&cpu
->tb_jmp_cache
[i
], NULL
);
481 * qemu_tcg_mttcg_enabled:
482 * Check whether we are running MultiThread TCG or not.
484 * Returns: %true if we are in MTTCG mode %false otherwise.
486 extern bool mttcg_enabled
;
487 #define qemu_tcg_mttcg_enabled() (mttcg_enabled)
490 * cpu_paging_enabled:
491 * @cpu: The CPU whose state is to be inspected.
493 * Returns: %true if paging is enabled, %false otherwise.
495 bool cpu_paging_enabled(const CPUState
*cpu
);
498 * cpu_get_memory_mapping:
499 * @cpu: The CPU whose memory mappings are to be obtained.
500 * @list: Where to write the memory mappings to.
501 * @errp: Pointer for reporting an #Error.
503 void cpu_get_memory_mapping(CPUState
*cpu
, MemoryMappingList
*list
,
507 * cpu_write_elf64_note:
508 * @f: pointer to a function that writes memory to a file
509 * @cpu: The CPU whose memory is to be dumped
510 * @cpuid: ID number of the CPU
511 * @opaque: pointer to the CPUState struct
513 int cpu_write_elf64_note(WriteCoreDumpFunction f
, CPUState
*cpu
,
514 int cpuid
, void *opaque
);
517 * cpu_write_elf64_qemunote:
518 * @f: pointer to a function that writes memory to a file
519 * @cpu: The CPU whose memory is to be dumped
520 * @cpuid: ID number of the CPU
521 * @opaque: pointer to the CPUState struct
523 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f
, CPUState
*cpu
,
527 * cpu_write_elf32_note:
528 * @f: pointer to a function that writes memory to a file
529 * @cpu: The CPU whose memory is to be dumped
530 * @cpuid: ID number of the CPU
531 * @opaque: pointer to the CPUState struct
533 int cpu_write_elf32_note(WriteCoreDumpFunction f
, CPUState
*cpu
,
534 int cpuid
, void *opaque
);
537 * cpu_write_elf32_qemunote:
538 * @f: pointer to a function that writes memory to a file
539 * @cpu: The CPU whose memory is to be dumped
540 * @cpuid: ID number of the CPU
541 * @opaque: pointer to the CPUState struct
543 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f
, CPUState
*cpu
,
547 * cpu_get_crash_info:
548 * @cpu: The CPU to get crash information for
550 * Gets the previously saved crash information.
551 * Caller is responsible for freeing the data.
553 GuestPanicInformation
*cpu_get_crash_info(CPUState
*cpu
);
558 * @CPU_DUMP_FPU: dump FPU register state, not just integer
559 * @CPU_DUMP_CCOP: dump info about TCG QEMU's condition code optimization state
562 CPU_DUMP_CODE
= 0x00010000,
563 CPU_DUMP_FPU
= 0x00020000,
564 CPU_DUMP_CCOP
= 0x00040000,
569 * @cpu: The CPU whose state is to be dumped.
570 * @f: If non-null, dump to this stream, else to current print sink.
574 void cpu_dump_state(CPUState
*cpu
, FILE *f
, int flags
);
577 * cpu_dump_statistics:
578 * @cpu: The CPU whose state is to be dumped.
579 * @flags: Flags what to dump.
581 * Dump CPU statistics to the current monitor if we have one, else to
584 void cpu_dump_statistics(CPUState
*cpu
, int flags
);
586 #ifndef CONFIG_USER_ONLY
588 * cpu_get_phys_page_attrs_debug:
589 * @cpu: The CPU to obtain the physical page address for.
590 * @addr: The virtual address.
591 * @attrs: Updated on return with the memory transaction attributes to use
594 * Obtains the physical page corresponding to a virtual one, together
595 * with the corresponding memory transaction attributes to use for the access.
596 * Use it only for debugging because no protection checks are done.
598 * Returns: Corresponding physical page address or -1 if no page found.
600 static inline hwaddr
cpu_get_phys_page_attrs_debug(CPUState
*cpu
, vaddr addr
,
603 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
605 if (cc
->get_phys_page_attrs_debug
) {
606 return cc
->get_phys_page_attrs_debug(cpu
, addr
, attrs
);
608 /* Fallback for CPUs which don't implement the _attrs_ hook */
609 *attrs
= MEMTXATTRS_UNSPECIFIED
;
610 return cc
->get_phys_page_debug(cpu
, addr
);
614 * cpu_get_phys_page_debug:
615 * @cpu: The CPU to obtain the physical page address for.
616 * @addr: The virtual address.
618 * Obtains the physical page corresponding to a virtual one.
619 * Use it only for debugging because no protection checks are done.
621 * Returns: Corresponding physical page address or -1 if no page found.
623 static inline hwaddr
cpu_get_phys_page_debug(CPUState
*cpu
, vaddr addr
)
625 MemTxAttrs attrs
= {};
627 return cpu_get_phys_page_attrs_debug(cpu
, addr
, &attrs
);
630 /** cpu_asidx_from_attrs:
632 * @attrs: memory transaction attributes
634 * Returns the address space index specifying the CPU AddressSpace
635 * to use for a memory access with the given transaction attributes.
637 static inline int cpu_asidx_from_attrs(CPUState
*cpu
, MemTxAttrs attrs
)
639 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
642 if (cc
->asidx_from_attrs
) {
643 ret
= cc
->asidx_from_attrs(cpu
, attrs
);
644 assert(ret
< cpu
->num_ases
&& ret
>= 0);
652 * @cpu: The CPU to be added to the list of CPUs.
654 void cpu_list_add(CPUState
*cpu
);
658 * @cpu: The CPU to be removed from the list of CPUs.
660 void cpu_list_remove(CPUState
*cpu
);
664 * @cpu: The CPU whose state is to be reset.
666 void cpu_reset(CPUState
*cpu
);
670 * @typename: The CPU base type.
671 * @cpu_model: The model string without any parameters.
673 * Looks up a CPU #ObjectClass matching name @cpu_model.
675 * Returns: A #CPUClass or %NULL if not matching class is found.
677 ObjectClass
*cpu_class_by_name(const char *typename
, const char *cpu_model
);
681 * @typename: The CPU type.
683 * Instantiates a CPU and realizes the CPU.
685 * Returns: A #CPUState or %NULL if an error occurred.
687 CPUState
*cpu_create(const char *typename
);
691 * @cpu_option: The -cpu option including optional parameters.
693 * processes optional parameters and registers them as global properties
695 * Returns: type of CPU to create or prints error and terminates process
696 * if an error occurred.
698 const char *parse_cpu_option(const char *cpu_option
);
702 * @cpu: The vCPU to check.
704 * Checks whether the CPU has work to do.
706 * Returns: %true if the CPU has work, %false otherwise.
708 static inline bool cpu_has_work(CPUState
*cpu
)
710 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
712 g_assert(cc
->has_work
);
713 return cc
->has_work(cpu
);
718 * @cpu: The vCPU to check against.
720 * Checks whether the caller is executing on the vCPU thread.
722 * Returns: %true if called from @cpu's thread, %false otherwise.
724 bool qemu_cpu_is_self(CPUState
*cpu
);
728 * @cpu: The vCPU to kick.
730 * Kicks @cpu's thread.
732 void qemu_cpu_kick(CPUState
*cpu
);
736 * @cpu: The CPU to check.
738 * Checks whether the CPU is stopped.
740 * Returns: %true if run state is not running or if artificially stopped;
743 bool cpu_is_stopped(CPUState
*cpu
);
747 * @cpu: The vCPU to run on.
748 * @func: The function to be executed.
749 * @data: Data to pass to the function.
750 * @mutex: Mutex to release while waiting for @func to run.
752 * Used internally in the implementation of run_on_cpu.
754 void do_run_on_cpu(CPUState
*cpu
, run_on_cpu_func func
, run_on_cpu_data data
,
759 * @cpu: The vCPU to run on.
760 * @func: The function to be executed.
761 * @data: Data to pass to the function.
763 * Schedules the function @func for execution on the vCPU @cpu.
765 void run_on_cpu(CPUState
*cpu
, run_on_cpu_func func
, run_on_cpu_data data
);
769 * @cpu: The vCPU to run on.
770 * @func: The function to be executed.
771 * @data: Data to pass to the function.
773 * Schedules the function @func for execution on the vCPU @cpu asynchronously.
775 void async_run_on_cpu(CPUState
*cpu
, run_on_cpu_func func
, run_on_cpu_data data
);
778 * async_safe_run_on_cpu:
779 * @cpu: The vCPU to run on.
780 * @func: The function to be executed.
781 * @data: Data to pass to the function.
783 * Schedules the function @func for execution on the vCPU @cpu asynchronously,
784 * while all other vCPUs are sleeping.
786 * Unlike run_on_cpu and async_run_on_cpu, the function is run outside the
789 void async_safe_run_on_cpu(CPUState
*cpu
, run_on_cpu_func func
, run_on_cpu_data data
);
793 * @index: The CPUState@cpu_index value of the CPU to obtain.
795 * Gets a CPU matching @index.
797 * Returns: The CPU or %NULL if there is no matching CPU.
799 CPUState
*qemu_get_cpu(int index
);
803 * @id: Guest-exposed CPU ID to lookup.
805 * Search for CPU with specified ID.
807 * Returns: %true - CPU is found, %false - CPU isn't found.
809 bool cpu_exists(int64_t id
);
813 * @id: Guest-exposed CPU ID of the CPU to obtain.
815 * Get a CPU with matching @id.
817 * Returns: The CPU or %NULL if there is no matching CPU.
819 CPUState
*cpu_by_arch_id(int64_t id
);
823 * @new_throttle_pct: Percent of sleep time. Valid range is 1 to 99.
825 * Throttles all vcpus by forcing them to sleep for the given percentage of
826 * time. A throttle_percentage of 25 corresponds to a 75% duty cycle roughly.
827 * (example: 10ms sleep for every 30ms awake).
829 * cpu_throttle_set can be called as needed to adjust new_throttle_pct.
830 * Once the throttling starts, it will remain in effect until cpu_throttle_stop
833 void cpu_throttle_set(int new_throttle_pct
);
838 * Stops the vcpu throttling started by cpu_throttle_set.
840 void cpu_throttle_stop(void);
843 * cpu_throttle_active:
845 * Returns: %true if the vcpus are currently being throttled, %false otherwise.
847 bool cpu_throttle_active(void);
850 * cpu_throttle_get_percentage:
852 * Returns the vcpu throttle percentage. See cpu_throttle_set for details.
854 * Returns: The throttle percentage in range 1 to 99.
856 int cpu_throttle_get_percentage(void);
858 #ifndef CONFIG_USER_ONLY
860 typedef void (*CPUInterruptHandler
)(CPUState
*, int);
862 extern CPUInterruptHandler cpu_interrupt_handler
;
866 * @cpu: The CPU to set an interrupt on.
867 * @mask: The interrupts to set.
869 * Invokes the interrupt handler.
871 static inline void cpu_interrupt(CPUState
*cpu
, int mask
)
873 cpu_interrupt_handler(cpu
, mask
);
876 #else /* USER_ONLY */
878 void cpu_interrupt(CPUState
*cpu
, int mask
);
880 #endif /* USER_ONLY */
884 #ifdef CONFIG_SOFTMMU
885 static inline void cpu_unassigned_access(CPUState
*cpu
, hwaddr addr
,
886 bool is_write
, bool is_exec
,
887 int opaque
, unsigned size
)
889 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
891 if (cc
->do_unassigned_access
) {
892 cc
->do_unassigned_access(cpu
, addr
, is_write
, is_exec
, opaque
, size
);
896 static inline void cpu_unaligned_access(CPUState
*cpu
, vaddr addr
,
897 MMUAccessType access_type
,
898 int mmu_idx
, uintptr_t retaddr
)
900 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
902 cc
->do_unaligned_access(cpu
, addr
, access_type
, mmu_idx
, retaddr
);
905 static inline void cpu_transaction_failed(CPUState
*cpu
, hwaddr physaddr
,
906 vaddr addr
, unsigned size
,
907 MMUAccessType access_type
,
908 int mmu_idx
, MemTxAttrs attrs
,
909 MemTxResult response
,
912 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
914 if (!cpu
->ignore_memory_transaction_failures
&& cc
->do_transaction_failed
) {
915 cc
->do_transaction_failed(cpu
, physaddr
, addr
, size
, access_type
,
916 mmu_idx
, attrs
, response
, retaddr
);
921 #endif /* NEED_CPU_H */
925 * @cpu: The CPU to set the program counter for.
926 * @addr: Program counter value.
928 * Sets the program counter for a CPU.
930 static inline void cpu_set_pc(CPUState
*cpu
, vaddr addr
)
932 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
934 cc
->set_pc(cpu
, addr
);
938 * cpu_reset_interrupt:
939 * @cpu: The CPU to clear the interrupt on.
940 * @mask: The interrupt mask to clear.
942 * Resets interrupts on the vCPU @cpu.
944 void cpu_reset_interrupt(CPUState
*cpu
, int mask
);
948 * @cpu: The CPU to exit.
950 * Requests the CPU @cpu to exit execution.
952 void cpu_exit(CPUState
*cpu
);
956 * @cpu: The CPU to resume.
958 * Resumes CPU, i.e. puts CPU into runnable state.
960 void cpu_resume(CPUState
*cpu
);
964 * @cpu: The CPU to remove.
966 * Requests the CPU to be removed.
968 void cpu_remove(CPUState
*cpu
);
972 * @cpu: The CPU to remove.
974 * Requests the CPU to be removed and waits till it is removed.
976 void cpu_remove_sync(CPUState
*cpu
);
979 * process_queued_cpu_work() - process all items on CPU work queue
980 * @cpu: The CPU which work queue to process.
982 void process_queued_cpu_work(CPUState
*cpu
);
986 * @cpu: The CPU for the current thread.
988 * Record that a CPU has started execution and can be interrupted with
991 void cpu_exec_start(CPUState
*cpu
);
995 * @cpu: The CPU for the current thread.
997 * Record that a CPU has stopped execution and exclusive sections
998 * can be executed without interrupting it.
1000 void cpu_exec_end(CPUState
*cpu
);
1005 * Wait for a concurrent exclusive section to end, and then start
1006 * a section of work that is run while other CPUs are not running
1007 * between cpu_exec_start and cpu_exec_end. CPUs that are running
1008 * cpu_exec are exited immediately. CPUs that call cpu_exec_start
1009 * during the exclusive section go to sleep until this CPU calls
1012 void start_exclusive(void);
1017 * Concludes an exclusive execution section started by start_exclusive.
1019 void end_exclusive(void);
1023 * @cpu: The vCPU to initialize.
1025 * Initializes a vCPU.
1027 void qemu_init_vcpu(CPUState
*cpu
);
1029 #define SSTEP_ENABLE 0x1 /* Enable simulated HW single stepping */
1030 #define SSTEP_NOIRQ 0x2 /* Do not use IRQ while single stepping */
1031 #define SSTEP_NOTIMER 0x4 /* Do not Timers while single stepping */
1035 * @cpu: CPU to the flags for.
1036 * @enabled: Flags to enable.
1038 * Enables or disables single-stepping for @cpu.
1040 void cpu_single_step(CPUState
*cpu
, int enabled
);
1042 /* Breakpoint/watchpoint flags */
1043 #define BP_MEM_READ 0x01
1044 #define BP_MEM_WRITE 0x02
1045 #define BP_MEM_ACCESS (BP_MEM_READ | BP_MEM_WRITE)
1046 #define BP_STOP_BEFORE_ACCESS 0x04
1047 /* 0x08 currently unused */
1050 #define BP_ANY (BP_GDB | BP_CPU)
1051 #define BP_WATCHPOINT_HIT_READ 0x40
1052 #define BP_WATCHPOINT_HIT_WRITE 0x80
1053 #define BP_WATCHPOINT_HIT (BP_WATCHPOINT_HIT_READ | BP_WATCHPOINT_HIT_WRITE)
1055 int cpu_breakpoint_insert(CPUState
*cpu
, vaddr pc
, int flags
,
1056 CPUBreakpoint
**breakpoint
);
1057 int cpu_breakpoint_remove(CPUState
*cpu
, vaddr pc
, int flags
);
1058 void cpu_breakpoint_remove_by_ref(CPUState
*cpu
, CPUBreakpoint
*breakpoint
);
1059 void cpu_breakpoint_remove_all(CPUState
*cpu
, int mask
);
1061 /* Return true if PC matches an installed breakpoint. */
1062 static inline bool cpu_breakpoint_test(CPUState
*cpu
, vaddr pc
, int mask
)
1066 if (unlikely(!QTAILQ_EMPTY(&cpu
->breakpoints
))) {
1067 QTAILQ_FOREACH(bp
, &cpu
->breakpoints
, entry
) {
1068 if (bp
->pc
== pc
&& (bp
->flags
& mask
)) {
1076 int cpu_watchpoint_insert(CPUState
*cpu
, vaddr addr
, vaddr len
,
1077 int flags
, CPUWatchpoint
**watchpoint
);
1078 int cpu_watchpoint_remove(CPUState
*cpu
, vaddr addr
,
1079 vaddr len
, int flags
);
1080 void cpu_watchpoint_remove_by_ref(CPUState
*cpu
, CPUWatchpoint
*watchpoint
);
1081 void cpu_watchpoint_remove_all(CPUState
*cpu
, int mask
);
1084 * cpu_get_address_space:
1085 * @cpu: CPU to get address space from
1086 * @asidx: index identifying which address space to get
1088 * Return the requested address space of this CPU. @asidx
1089 * specifies which address space to read.
1091 AddressSpace
*cpu_get_address_space(CPUState
*cpu
, int asidx
);
1093 void QEMU_NORETURN
cpu_abort(CPUState
*cpu
, const char *fmt
, ...)
1095 extern Property cpu_common_props
[];
1096 void cpu_exec_initfn(CPUState
*cpu
);
1097 void cpu_exec_realizefn(CPUState
*cpu
, Error
**errp
);
1098 void cpu_exec_unrealizefn(CPUState
*cpu
);
1101 * target_words_bigendian:
1102 * Returns true if the (default) endianness of the target is big endian,
1103 * false otherwise. Note that in target-specific code, you can use
1104 * TARGET_WORDS_BIGENDIAN directly instead. On the other hand, common
1105 * code should normally never need to know about the endianness of the
1106 * target, so please do *not* use this function unless you know very well
1107 * what you are doing!
1109 bool target_words_bigendian(void);
1113 #ifdef CONFIG_SOFTMMU
1114 extern const struct VMStateDescription vmstate_cpu_common
;
1116 #define vmstate_cpu_common vmstate_dummy
1119 #define VMSTATE_CPU() { \
1120 .name = "parent_obj", \
1121 .size = sizeof(CPUState), \
1122 .vmsd = &vmstate_cpu_common, \
1123 .flags = VMS_STRUCT, \
1127 #endif /* NEED_CPU_H */
1129 #define UNASSIGNED_CPU_INDEX -1
1130 #define UNASSIGNED_CLUSTER_INDEX -1