4 * Copyright (c) 2012 SUSE LINUX Products GmbH
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see
18 * <http://www.gnu.org/licenses/gpl-2.0.html>
23 #include "hw/qdev-core.h"
24 #include "disas/dis-asm.h"
25 #include "exec/hwaddr.h"
26 #include "exec/memattrs.h"
27 #include "qapi/qapi-types-run-state.h"
28 #include "qemu/bitmap.h"
29 #include "qemu/rcu_queue.h"
30 #include "qemu/queue.h"
31 #include "qemu/thread.h"
32 #include "qemu/plugin.h"
33 #include "qom/object.h"
35 typedef int (*WriteCoreDumpFunction
)(const void *buf
, size_t size
,
40 * Type wide enough to contain any #target_ulong virtual address.
42 typedef uint64_t vaddr
;
43 #define VADDR_PRId PRId64
44 #define VADDR_PRIu PRIu64
45 #define VADDR_PRIo PRIo64
46 #define VADDR_PRIx PRIx64
47 #define VADDR_PRIX PRIX64
48 #define VADDR_MAX UINT64_MAX
52 * @section_id: QEMU-cpu
54 * @short_description: Base class for all CPUs
57 #define TYPE_CPU "cpu"
59 /* Since this macro is used a lot in hot code paths and in conjunction with
60 * FooCPU *foo_env_get_cpu(), we deviate from usual QOM practice by using
63 #define CPU(obj) ((CPUState *)(obj))
65 typedef struct CPUClass CPUClass
;
66 DECLARE_CLASS_CHECKERS(CPUClass
, CPU
,
69 typedef enum MMUAccessType
{
75 typedef struct CPUWatchpoint CPUWatchpoint
;
77 /* see tcg-cpu-ops.h */
83 /* see sysemu-cpu-ops.h */
88 * @class_by_name: Callback to map -cpu command line model name to an
89 * instantiatable CPU type.
90 * @parse_features: Callback to parse command line arguments.
91 * @reset_dump_flags: #CPUDumpFlags to use for reset logging.
92 * @has_work: Callback for checking if there is work to do.
93 * @memory_rw_debug: Callback for GDB memory access.
94 * @dump_state: Callback for dumping state.
95 * @dump_statistics: Callback for dumping statistics.
96 * @get_arch_id: Callback for getting architecture-dependent CPU ID.
97 * @get_paging_enabled: Callback for inquiring whether paging is enabled.
98 * @set_pc: Callback for setting the Program Counter register. This
99 * should have the semantics used by the target architecture when
100 * setting the PC from a source such as an ELF file entry point;
101 * for example on Arm it will also set the Thumb mode bit based
102 * on the least significant bit of the new PC value.
103 * If the target behaviour here is anything other than "set
104 * the PC register to the value passed in" then the target must
105 * also implement the synchronize_from_tb hook.
106 * @gdb_read_register: Callback for letting GDB read a register.
107 * @gdb_write_register: Callback for letting GDB write a register.
108 * @gdb_num_core_regs: Number of core registers accessible to GDB.
109 * @gdb_core_xml_file: File name for core registers GDB XML description.
110 * @gdb_stop_before_watchpoint: Indicates whether GDB expects the CPU to stop
111 * before the insn which triggers a watchpoint rather than after it.
112 * @gdb_arch_name: Optional callback that returns the architecture name known
113 * to GDB. The caller must free the returned string with g_free.
114 * @gdb_get_dynamic_xml: Callback to return dynamically generated XML for the
115 * gdb stub. Returns a pointer to the XML contents for the specified XML file
116 * or NULL if the CPU doesn't have a dynamically generated content for it.
117 * @disas_set_info: Setup architecture specific components of disassembly info
118 * @adjust_watchpoint_address: Perform a target-specific adjustment to an
119 * address before attempting to match it against watchpoints.
120 * @deprecation_note: If this CPUClass is deprecated, this field provides
121 * related information.
123 * Represents a CPU family or model.
127 DeviceClass parent_class
;
130 ObjectClass
*(*class_by_name
)(const char *cpu_model
);
131 void (*parse_features
)(const char *typename
, char *str
, Error
**errp
);
133 int reset_dump_flags
;
134 bool (*has_work
)(CPUState
*cpu
);
135 int (*memory_rw_debug
)(CPUState
*cpu
, vaddr addr
,
136 uint8_t *buf
, int len
, bool is_write
);
137 void (*dump_state
)(CPUState
*cpu
, FILE *, int flags
);
138 void (*dump_statistics
)(CPUState
*cpu
, int flags
);
139 int64_t (*get_arch_id
)(CPUState
*cpu
);
140 bool (*get_paging_enabled
)(const CPUState
*cpu
);
141 void (*set_pc
)(CPUState
*cpu
, vaddr value
);
142 int (*gdb_read_register
)(CPUState
*cpu
, GByteArray
*buf
, int reg
);
143 int (*gdb_write_register
)(CPUState
*cpu
, uint8_t *buf
, int reg
);
145 const char *gdb_core_xml_file
;
146 gchar
* (*gdb_arch_name
)(CPUState
*cpu
);
147 const char * (*gdb_get_dynamic_xml
)(CPUState
*cpu
, const char *xmlname
);
149 void (*disas_set_info
)(CPUState
*cpu
, disassemble_info
*info
);
151 const char *deprecation_note
;
152 /* Keep non-pointer data at the end to minimize holes. */
153 int gdb_num_core_regs
;
154 bool gdb_stop_before_watchpoint
;
155 struct AccelCPUClass
*accel_cpu
;
157 /* when system emulation is not available, this pointer is NULL */
158 const struct SysemuCPUOps
*sysemu_ops
;
160 /* when TCG is not available, this pointer is NULL */
161 struct TCGCPUOps
*tcg_ops
;
164 * if not NULL, this is called in order for the CPUClass to initialize
165 * class data that depends on the accelerator, see accel/accel-common.c.
167 void (*init_accel_cpu
)(struct AccelCPUClass
*accel_cpu
, CPUClass
*cc
);
171 * Low 16 bits: number of cycles left, used only in icount mode.
172 * High 16 bits: Set to -1 to force TCG to stop executing linked TBs
173 * for this CPU and return to its top level loop (even in non-icount mode).
174 * This allows a single read-compare-cbranch-write sequence to test
175 * for both decrementer underflow and exceptions.
177 typedef union IcountDecr
{
180 #ifdef HOST_WORDS_BIGENDIAN
190 typedef struct CPUBreakpoint
{
192 int flags
; /* BP_* */
193 QTAILQ_ENTRY(CPUBreakpoint
) entry
;
196 struct CPUWatchpoint
{
201 int flags
; /* BP_* */
202 QTAILQ_ENTRY(CPUWatchpoint
) entry
;
207 * For plugins we sometime need to save the resolved iotlb data before
208 * the memory regions get moved around by io_writex.
210 typedef struct SavedIOTLB
{
212 MemoryRegionSection
*section
;
220 struct hax_vcpu_state
;
222 #define TB_JMP_CACHE_BITS 12
223 #define TB_JMP_CACHE_SIZE (1 << TB_JMP_CACHE_BITS)
227 /* The union type allows passing of 64 bit target pointers on 32 bit
228 * hosts in a single parameter
232 unsigned long host_ulong
;
237 #define RUN_ON_CPU_HOST_PTR(p) ((run_on_cpu_data){.host_ptr = (p)})
238 #define RUN_ON_CPU_HOST_INT(i) ((run_on_cpu_data){.host_int = (i)})
239 #define RUN_ON_CPU_HOST_ULONG(ul) ((run_on_cpu_data){.host_ulong = (ul)})
240 #define RUN_ON_CPU_TARGET_PTR(v) ((run_on_cpu_data){.target_ptr = (v)})
241 #define RUN_ON_CPU_NULL RUN_ON_CPU_HOST_PTR(NULL)
243 typedef void (*run_on_cpu_func
)(CPUState
*cpu
, run_on_cpu_data data
);
245 struct qemu_work_item
;
247 #define CPU_UNSET_NUMA_NODE_ID -1
248 #define CPU_TRACE_DSTATE_MAX_EVENTS 32
252 * @cpu_index: CPU index (informative).
253 * @cluster_index: Identifies which cluster this CPU is in.
254 * For boards which don't define clusters or for "loose" CPUs not assigned
255 * to a cluster this will be UNASSIGNED_CLUSTER_INDEX; otherwise it will
256 * be the same as the cluster-id property of the CPU object's TYPE_CPU_CLUSTER
258 * @tcg_cflags: Pre-computed cflags for this cpu.
259 * @nr_cores: Number of cores within this CPU package.
260 * @nr_threads: Number of threads within this CPU.
261 * @running: #true if CPU is currently running (lockless).
262 * @has_waiter: #true if a CPU is currently waiting for the cpu_exec_end;
263 * valid under cpu_list_lock.
264 * @created: Indicates whether the CPU thread has been successfully created.
265 * @interrupt_request: Indicates a pending interrupt request.
266 * @halted: Nonzero if the CPU is in suspended state.
267 * @stop: Indicates a pending stop request.
268 * @stopped: Indicates the CPU has been artificially stopped.
269 * @unplug: Indicates a pending CPU unplug request.
270 * @crash_occurred: Indicates the OS reported a crash (panic) for this CPU
271 * @singlestep_enabled: Flags for single-stepping.
272 * @icount_extra: Instructions until next timer event.
273 * @can_do_io: Nonzero if memory-mapped IO is safe. Deterministic execution
274 * requires that IO only be performed on the last instruction of a TB
275 * so that interrupts take effect immediately.
276 * @cpu_ases: Pointer to array of CPUAddressSpaces (which define the
277 * AddressSpaces this CPU has)
278 * @num_ases: number of CPUAddressSpaces in @cpu_ases
279 * @as: Pointer to the first AddressSpace, for the convenience of targets which
280 * only have a single AddressSpace
281 * @env_ptr: Pointer to subclass-specific CPUArchState field.
282 * @icount_decr_ptr: Pointer to IcountDecr field within subclass.
283 * @gdb_regs: Additional GDB registers.
284 * @gdb_num_regs: Number of total registers accessible to GDB.
285 * @gdb_num_g_regs: Number of registers in GDB 'g' packets.
286 * @next_cpu: Next CPU sharing TB cache.
287 * @opaque: User data.
288 * @mem_io_pc: Host Program Counter at which the memory was accessed.
289 * @kvm_fd: vCPU file descriptor for KVM.
290 * @work_mutex: Lock to prevent multiple access to @work_list.
291 * @work_list: List of pending asynchronous work.
292 * @trace_dstate_delayed: Delayed changes to trace_dstate (includes all changes
294 * @trace_dstate: Dynamic tracing state of events for this vCPU (bitmask).
295 * @plugin_mask: Plugin event bitmap. Modified only via async work.
296 * @ignore_memory_transaction_failures: Cached copy of the MachineState
297 * flag of the same name: allows the board to suppress calling of the
298 * CPU do_transaction_failed hook function.
300 * State of one CPU core or thread.
304 DeviceState parent_obj
;
310 struct QemuThread
*thread
;
315 bool running
, has_waiter
;
316 struct QemuCond
*halt_cond
;
322 /* Should CPU start in powered-off state? */
323 bool start_powered_off
;
328 bool in_exclusive_context
;
329 uint32_t cflags_next_tb
;
330 /* updates protected by BQL */
331 uint32_t interrupt_request
;
332 int singlestep_enabled
;
333 int64_t icount_budget
;
334 int64_t icount_extra
;
335 uint64_t random_seed
;
338 QemuMutex work_mutex
;
339 QSIMPLEQ_HEAD(, qemu_work_item
) work_list
;
341 CPUAddressSpace
*cpu_ases
;
344 MemoryRegion
*memory
;
346 void *env_ptr
; /* CPUArchState */
347 IcountDecr
*icount_decr_ptr
;
349 /* Accessed in parallel; all accesses must be atomic */
350 TranslationBlock
*tb_jmp_cache
[TB_JMP_CACHE_SIZE
];
352 struct GDBRegisterState
*gdb_regs
;
355 QTAILQ_ENTRY(CPUState
) node
;
357 /* ice debug support */
358 QTAILQ_HEAD(, CPUBreakpoint
) breakpoints
;
360 QTAILQ_HEAD(, CPUWatchpoint
) watchpoints
;
361 CPUWatchpoint
*watchpoint_hit
;
365 /* In order to avoid passing too many arguments to the MMIO helpers,
366 * we store some rarely used information in the CPU context.
371 struct KVMState
*kvm_state
;
372 struct kvm_run
*kvm_run
;
374 /* Used for events with 'vcpu' and *without* the 'disabled' properties */
375 DECLARE_BITMAP(trace_dstate_delayed
, CPU_TRACE_DSTATE_MAX_EVENTS
);
376 DECLARE_BITMAP(trace_dstate
, CPU_TRACE_DSTATE_MAX_EVENTS
);
378 DECLARE_BITMAP(plugin_mask
, QEMU_PLUGIN_EV_MAX
);
381 GArray
*plugin_mem_cbs
;
382 /* saved iotlb data from io_writex */
383 SavedIOTLB saved_iotlb
;
386 /* TODO Move common fields from CPUArchState here. */
392 int32_t exception_index
;
394 /* shared by kvm, hax and hvf */
397 /* Used to keep track of an outstanding cpu throttle thread for migration
400 bool throttle_thread_scheduled
;
402 bool ignore_memory_transaction_failures
;
404 struct hax_vcpu_state
*hax_vcpu
;
408 /* track IOMMUs whose translations we've cached in the TCG TLB */
409 GArray
*iommu_notifiers
;
412 typedef QTAILQ_HEAD(CPUTailQ
, CPUState
) CPUTailQ
;
413 extern CPUTailQ cpus
;
415 #define first_cpu QTAILQ_FIRST_RCU(&cpus)
416 #define CPU_NEXT(cpu) QTAILQ_NEXT_RCU(cpu, node)
417 #define CPU_FOREACH(cpu) QTAILQ_FOREACH_RCU(cpu, &cpus, node)
418 #define CPU_FOREACH_SAFE(cpu, next_cpu) \
419 QTAILQ_FOREACH_SAFE_RCU(cpu, &cpus, node, next_cpu)
421 extern __thread CPUState
*current_cpu
;
423 static inline void cpu_tb_jmp_cache_clear(CPUState
*cpu
)
427 for (i
= 0; i
< TB_JMP_CACHE_SIZE
; i
++) {
428 qatomic_set(&cpu
->tb_jmp_cache
[i
], NULL
);
433 * qemu_tcg_mttcg_enabled:
434 * Check whether we are running MultiThread TCG or not.
436 * Returns: %true if we are in MTTCG mode %false otherwise.
438 extern bool mttcg_enabled
;
439 #define qemu_tcg_mttcg_enabled() (mttcg_enabled)
442 * cpu_paging_enabled:
443 * @cpu: The CPU whose state is to be inspected.
445 * Returns: %true if paging is enabled, %false otherwise.
447 bool cpu_paging_enabled(const CPUState
*cpu
);
450 * cpu_get_memory_mapping:
451 * @cpu: The CPU whose memory mappings are to be obtained.
452 * @list: Where to write the memory mappings to.
453 * @errp: Pointer for reporting an #Error.
455 void cpu_get_memory_mapping(CPUState
*cpu
, MemoryMappingList
*list
,
458 #if !defined(CONFIG_USER_ONLY)
461 * cpu_write_elf64_note:
462 * @f: pointer to a function that writes memory to a file
463 * @cpu: The CPU whose memory is to be dumped
464 * @cpuid: ID number of the CPU
465 * @opaque: pointer to the CPUState struct
467 int cpu_write_elf64_note(WriteCoreDumpFunction f
, CPUState
*cpu
,
468 int cpuid
, void *opaque
);
471 * cpu_write_elf64_qemunote:
472 * @f: pointer to a function that writes memory to a file
473 * @cpu: The CPU whose memory is to be dumped
474 * @cpuid: ID number of the CPU
475 * @opaque: pointer to the CPUState struct
477 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f
, CPUState
*cpu
,
481 * cpu_write_elf32_note:
482 * @f: pointer to a function that writes memory to a file
483 * @cpu: The CPU whose memory is to be dumped
484 * @cpuid: ID number of the CPU
485 * @opaque: pointer to the CPUState struct
487 int cpu_write_elf32_note(WriteCoreDumpFunction f
, CPUState
*cpu
,
488 int cpuid
, void *opaque
);
491 * cpu_write_elf32_qemunote:
492 * @f: pointer to a function that writes memory to a file
493 * @cpu: The CPU whose memory is to be dumped
494 * @cpuid: ID number of the CPU
495 * @opaque: pointer to the CPUState struct
497 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f
, CPUState
*cpu
,
501 * cpu_get_crash_info:
502 * @cpu: The CPU to get crash information for
504 * Gets the previously saved crash information.
505 * Caller is responsible for freeing the data.
507 GuestPanicInformation
*cpu_get_crash_info(CPUState
*cpu
);
509 #endif /* !CONFIG_USER_ONLY */
514 * @CPU_DUMP_FPU: dump FPU register state, not just integer
515 * @CPU_DUMP_CCOP: dump info about TCG QEMU's condition code optimization state
518 CPU_DUMP_CODE
= 0x00010000,
519 CPU_DUMP_FPU
= 0x00020000,
520 CPU_DUMP_CCOP
= 0x00040000,
525 * @cpu: The CPU whose state is to be dumped.
526 * @f: If non-null, dump to this stream, else to current print sink.
530 void cpu_dump_state(CPUState
*cpu
, FILE *f
, int flags
);
533 * cpu_dump_statistics:
534 * @cpu: The CPU whose state is to be dumped.
535 * @flags: Flags what to dump.
537 * Dump CPU statistics to the current monitor if we have one, else to
540 void cpu_dump_statistics(CPUState
*cpu
, int flags
);
542 #ifndef CONFIG_USER_ONLY
544 * cpu_get_phys_page_attrs_debug:
545 * @cpu: The CPU to obtain the physical page address for.
546 * @addr: The virtual address.
547 * @attrs: Updated on return with the memory transaction attributes to use
550 * Obtains the physical page corresponding to a virtual one, together
551 * with the corresponding memory transaction attributes to use for the access.
552 * Use it only for debugging because no protection checks are done.
554 * Returns: Corresponding physical page address or -1 if no page found.
556 hwaddr
cpu_get_phys_page_attrs_debug(CPUState
*cpu
, vaddr addr
,
560 * cpu_get_phys_page_debug:
561 * @cpu: The CPU to obtain the physical page address for.
562 * @addr: The virtual address.
564 * Obtains the physical page corresponding to a virtual one.
565 * Use it only for debugging because no protection checks are done.
567 * Returns: Corresponding physical page address or -1 if no page found.
569 hwaddr
cpu_get_phys_page_debug(CPUState
*cpu
, vaddr addr
);
571 /** cpu_asidx_from_attrs:
573 * @attrs: memory transaction attributes
575 * Returns the address space index specifying the CPU AddressSpace
576 * to use for a memory access with the given transaction attributes.
578 int cpu_asidx_from_attrs(CPUState
*cpu
, MemTxAttrs attrs
);
581 * cpu_virtio_is_big_endian:
584 * Returns %true if a CPU which supports runtime configurable endianness
585 * is currently big-endian.
587 bool cpu_virtio_is_big_endian(CPUState
*cpu
);
589 #endif /* CONFIG_USER_ONLY */
593 * @cpu: The CPU to be added to the list of CPUs.
595 void cpu_list_add(CPUState
*cpu
);
599 * @cpu: The CPU to be removed from the list of CPUs.
601 void cpu_list_remove(CPUState
*cpu
);
605 * @cpu: The CPU whose state is to be reset.
607 void cpu_reset(CPUState
*cpu
);
611 * @typename: The CPU base type.
612 * @cpu_model: The model string without any parameters.
614 * Looks up a CPU #ObjectClass matching name @cpu_model.
616 * Returns: A #CPUClass or %NULL if not matching class is found.
618 ObjectClass
*cpu_class_by_name(const char *typename
, const char *cpu_model
);
622 * @typename: The CPU type.
624 * Instantiates a CPU and realizes the CPU.
626 * Returns: A #CPUState or %NULL if an error occurred.
628 CPUState
*cpu_create(const char *typename
);
632 * @cpu_option: The -cpu option including optional parameters.
634 * processes optional parameters and registers them as global properties
636 * Returns: type of CPU to create or prints error and terminates process
637 * if an error occurred.
639 const char *parse_cpu_option(const char *cpu_option
);
643 * @cpu: The vCPU to check.
645 * Checks whether the CPU has work to do.
647 * Returns: %true if the CPU has work, %false otherwise.
649 static inline bool cpu_has_work(CPUState
*cpu
)
651 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
653 g_assert(cc
->has_work
);
654 return cc
->has_work(cpu
);
659 * @cpu: The vCPU to check against.
661 * Checks whether the caller is executing on the vCPU thread.
663 * Returns: %true if called from @cpu's thread, %false otherwise.
665 bool qemu_cpu_is_self(CPUState
*cpu
);
669 * @cpu: The vCPU to kick.
671 * Kicks @cpu's thread.
673 void qemu_cpu_kick(CPUState
*cpu
);
677 * @cpu: The CPU to check.
679 * Checks whether the CPU is stopped.
681 * Returns: %true if run state is not running or if artificially stopped;
684 bool cpu_is_stopped(CPUState
*cpu
);
688 * @cpu: The vCPU to run on.
689 * @func: The function to be executed.
690 * @data: Data to pass to the function.
691 * @mutex: Mutex to release while waiting for @func to run.
693 * Used internally in the implementation of run_on_cpu.
695 void do_run_on_cpu(CPUState
*cpu
, run_on_cpu_func func
, run_on_cpu_data data
,
700 * @cpu: The vCPU to run on.
701 * @func: The function to be executed.
702 * @data: Data to pass to the function.
704 * Schedules the function @func for execution on the vCPU @cpu.
706 void run_on_cpu(CPUState
*cpu
, run_on_cpu_func func
, run_on_cpu_data data
);
710 * @cpu: The vCPU to run on.
711 * @func: The function to be executed.
712 * @data: Data to pass to the function.
714 * Schedules the function @func for execution on the vCPU @cpu asynchronously.
716 void async_run_on_cpu(CPUState
*cpu
, run_on_cpu_func func
, run_on_cpu_data data
);
719 * async_safe_run_on_cpu:
720 * @cpu: The vCPU to run on.
721 * @func: The function to be executed.
722 * @data: Data to pass to the function.
724 * Schedules the function @func for execution on the vCPU @cpu asynchronously,
725 * while all other vCPUs are sleeping.
727 * Unlike run_on_cpu and async_run_on_cpu, the function is run outside the
730 void async_safe_run_on_cpu(CPUState
*cpu
, run_on_cpu_func func
, run_on_cpu_data data
);
733 * cpu_in_exclusive_context()
734 * @cpu: The vCPU to check
736 * Returns true if @cpu is an exclusive context, for example running
737 * something which has previously been queued via async_safe_run_on_cpu().
739 static inline bool cpu_in_exclusive_context(const CPUState
*cpu
)
741 return cpu
->in_exclusive_context
;
746 * @index: The CPUState@cpu_index value of the CPU to obtain.
748 * Gets a CPU matching @index.
750 * Returns: The CPU or %NULL if there is no matching CPU.
752 CPUState
*qemu_get_cpu(int index
);
756 * @id: Guest-exposed CPU ID to lookup.
758 * Search for CPU with specified ID.
760 * Returns: %true - CPU is found, %false - CPU isn't found.
762 bool cpu_exists(int64_t id
);
766 * @id: Guest-exposed CPU ID of the CPU to obtain.
768 * Get a CPU with matching @id.
770 * Returns: The CPU or %NULL if there is no matching CPU.
772 CPUState
*cpu_by_arch_id(int64_t id
);
776 * @cpu: The CPU to set an interrupt on.
777 * @mask: The interrupts to set.
779 * Invokes the interrupt handler.
782 void cpu_interrupt(CPUState
*cpu
, int mask
);
786 * @cpu: The CPU to set the program counter for.
787 * @addr: Program counter value.
789 * Sets the program counter for a CPU.
791 static inline void cpu_set_pc(CPUState
*cpu
, vaddr addr
)
793 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
795 cc
->set_pc(cpu
, addr
);
799 * cpu_reset_interrupt:
800 * @cpu: The CPU to clear the interrupt on.
801 * @mask: The interrupt mask to clear.
803 * Resets interrupts on the vCPU @cpu.
805 void cpu_reset_interrupt(CPUState
*cpu
, int mask
);
809 * @cpu: The CPU to exit.
811 * Requests the CPU @cpu to exit execution.
813 void cpu_exit(CPUState
*cpu
);
817 * @cpu: The CPU to resume.
819 * Resumes CPU, i.e. puts CPU into runnable state.
821 void cpu_resume(CPUState
*cpu
);
825 * @cpu: The CPU to remove.
827 * Requests the CPU to be removed and waits till it is removed.
829 void cpu_remove_sync(CPUState
*cpu
);
832 * process_queued_cpu_work() - process all items on CPU work queue
833 * @cpu: The CPU which work queue to process.
835 void process_queued_cpu_work(CPUState
*cpu
);
839 * @cpu: The CPU for the current thread.
841 * Record that a CPU has started execution and can be interrupted with
844 void cpu_exec_start(CPUState
*cpu
);
848 * @cpu: The CPU for the current thread.
850 * Record that a CPU has stopped execution and exclusive sections
851 * can be executed without interrupting it.
853 void cpu_exec_end(CPUState
*cpu
);
858 * Wait for a concurrent exclusive section to end, and then start
859 * a section of work that is run while other CPUs are not running
860 * between cpu_exec_start and cpu_exec_end. CPUs that are running
861 * cpu_exec are exited immediately. CPUs that call cpu_exec_start
862 * during the exclusive section go to sleep until this CPU calls
865 void start_exclusive(void);
870 * Concludes an exclusive execution section started by start_exclusive.
872 void end_exclusive(void);
876 * @cpu: The vCPU to initialize.
878 * Initializes a vCPU.
880 void qemu_init_vcpu(CPUState
*cpu
);
882 #define SSTEP_ENABLE 0x1 /* Enable simulated HW single stepping */
883 #define SSTEP_NOIRQ 0x2 /* Do not use IRQ while single stepping */
884 #define SSTEP_NOTIMER 0x4 /* Do not Timers while single stepping */
888 * @cpu: CPU to the flags for.
889 * @enabled: Flags to enable.
891 * Enables or disables single-stepping for @cpu.
893 void cpu_single_step(CPUState
*cpu
, int enabled
);
895 /* Breakpoint/watchpoint flags */
896 #define BP_MEM_READ 0x01
897 #define BP_MEM_WRITE 0x02
898 #define BP_MEM_ACCESS (BP_MEM_READ | BP_MEM_WRITE)
899 #define BP_STOP_BEFORE_ACCESS 0x04
900 /* 0x08 currently unused */
903 #define BP_ANY (BP_GDB | BP_CPU)
904 #define BP_WATCHPOINT_HIT_READ 0x40
905 #define BP_WATCHPOINT_HIT_WRITE 0x80
906 #define BP_WATCHPOINT_HIT (BP_WATCHPOINT_HIT_READ | BP_WATCHPOINT_HIT_WRITE)
908 int cpu_breakpoint_insert(CPUState
*cpu
, vaddr pc
, int flags
,
909 CPUBreakpoint
**breakpoint
);
910 int cpu_breakpoint_remove(CPUState
*cpu
, vaddr pc
, int flags
);
911 void cpu_breakpoint_remove_by_ref(CPUState
*cpu
, CPUBreakpoint
*breakpoint
);
912 void cpu_breakpoint_remove_all(CPUState
*cpu
, int mask
);
914 /* Return true if PC matches an installed breakpoint. */
915 static inline bool cpu_breakpoint_test(CPUState
*cpu
, vaddr pc
, int mask
)
919 if (unlikely(!QTAILQ_EMPTY(&cpu
->breakpoints
))) {
920 QTAILQ_FOREACH(bp
, &cpu
->breakpoints
, entry
) {
921 if (bp
->pc
== pc
&& (bp
->flags
& mask
)) {
929 #ifdef CONFIG_USER_ONLY
930 static inline int cpu_watchpoint_insert(CPUState
*cpu
, vaddr addr
, vaddr len
,
931 int flags
, CPUWatchpoint
**watchpoint
)
936 static inline int cpu_watchpoint_remove(CPUState
*cpu
, vaddr addr
,
937 vaddr len
, int flags
)
942 static inline void cpu_watchpoint_remove_by_ref(CPUState
*cpu
,
947 static inline void cpu_watchpoint_remove_all(CPUState
*cpu
, int mask
)
951 static inline void cpu_check_watchpoint(CPUState
*cpu
, vaddr addr
, vaddr len
,
952 MemTxAttrs atr
, int fl
, uintptr_t ra
)
956 static inline int cpu_watchpoint_address_matches(CPUState
*cpu
,
957 vaddr addr
, vaddr len
)
962 int cpu_watchpoint_insert(CPUState
*cpu
, vaddr addr
, vaddr len
,
963 int flags
, CPUWatchpoint
**watchpoint
);
964 int cpu_watchpoint_remove(CPUState
*cpu
, vaddr addr
,
965 vaddr len
, int flags
);
966 void cpu_watchpoint_remove_by_ref(CPUState
*cpu
, CPUWatchpoint
*watchpoint
);
967 void cpu_watchpoint_remove_all(CPUState
*cpu
, int mask
);
970 * cpu_check_watchpoint:
972 * @addr: guest virtual address
973 * @len: access length
974 * @attrs: memory access attributes
975 * @flags: watchpoint access type
976 * @ra: unwind return address
978 * Check for a watchpoint hit in [addr, addr+len) of the type
979 * specified by @flags. Exit via exception with a hit.
981 void cpu_check_watchpoint(CPUState
*cpu
, vaddr addr
, vaddr len
,
982 MemTxAttrs attrs
, int flags
, uintptr_t ra
);
985 * cpu_watchpoint_address_matches:
987 * @addr: guest virtual address
988 * @len: access length
990 * Return the watchpoint flags that apply to [addr, addr+len).
991 * If no watchpoint is registered for the range, the result is 0.
993 int cpu_watchpoint_address_matches(CPUState
*cpu
, vaddr addr
, vaddr len
);
997 * cpu_get_address_space:
998 * @cpu: CPU to get address space from
999 * @asidx: index identifying which address space to get
1001 * Return the requested address space of this CPU. @asidx
1002 * specifies which address space to read.
1004 AddressSpace
*cpu_get_address_space(CPUState
*cpu
, int asidx
);
1006 void QEMU_NORETURN
cpu_abort(CPUState
*cpu
, const char *fmt
, ...)
1009 /* $(top_srcdir)/cpu.c */
1010 void cpu_exec_initfn(CPUState
*cpu
);
1011 void cpu_exec_realizefn(CPUState
*cpu
, Error
**errp
);
1012 void cpu_exec_unrealizefn(CPUState
*cpu
);
1015 * target_words_bigendian:
1016 * Returns true if the (default) endianness of the target is big endian,
1017 * false otherwise. Note that in target-specific code, you can use
1018 * TARGET_WORDS_BIGENDIAN directly instead. On the other hand, common
1019 * code should normally never need to know about the endianness of the
1020 * target, so please do *not* use this function unless you know very well
1021 * what you are doing!
1023 bool target_words_bigendian(void);
1027 #ifdef CONFIG_SOFTMMU
1029 extern const VMStateDescription vmstate_cpu_common
;
1031 #define VMSTATE_CPU() { \
1032 .name = "parent_obj", \
1033 .size = sizeof(CPUState), \
1034 .vmsd = &vmstate_cpu_common, \
1035 .flags = VMS_STRUCT, \
1038 #endif /* CONFIG_SOFTMMU */
1040 #endif /* NEED_CPU_H */
1042 #define UNASSIGNED_CPU_INDEX -1
1043 #define UNASSIGNED_CLUSTER_INDEX -1