hw/isa/i82378.c

   1 /*
   2  * QEMU Intel i82378 emulation (PCI to ISA bridge)
   3  *
   4  * Copyright (c) 2010-2011 Hervé Poussineau
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include "qemu/osdep.h"
  21 #include "hw/pci/pci.h"
  22 #include "hw/i386/pc.h"
  23 #include "hw/timer/i8254.h"
  24 #include "hw/audio/pcspk.h"
  25
  26 #define TYPE_I82378 "i82378"
  27 #define I82378(obj) \
  28     OBJECT_CHECK(I82378State, (obj), TYPE_I82378)
  29
  30 typedef struct I82378State {
  31     PCIDevice parent_obj;
  32
  33     qemu_irq out[2];
  34     qemu_irq *i8259;
  35     MemoryRegion io;
  36 } I82378State;
  37
  38 static const VMStateDescription vmstate_i82378 = {
  39     .name = "pci-i82378",
  40     .version_id = 0,
  41     .minimum_version_id = 0,
  42     .fields = (VMStateField[]) {
  43         VMSTATE_PCI_DEVICE(parent_obj, I82378State),
  44         VMSTATE_END_OF_LIST()
  45     },
  46 };
  47
  48 static void i82378_request_out0_irq(void *opaque, int irq, int level)
  49 {
  50     I82378State *s = opaque;
  51     qemu_set_irq(s->out[0], level);
  52 }
  53
  54 static void i82378_request_pic_irq(void *opaque, int irq, int level)
  55 {
  56     DeviceState *dev = opaque;
  57     I82378State *s = I82378(dev);
  58
  59     qemu_set_irq(s->i8259[irq], level);
  60 }
  61
  62 static void i82378_realize(PCIDevice *pci, Error **errp)
  63 {
  64     DeviceState *dev = DEVICE(pci);
  65     I82378State *s = I82378(dev);
  66     uint8_t *pci_conf;
  67     ISABus *isabus;
  68     ISADevice *isa;
  69
  70     pci_conf = pci->config;
  71     pci_set_word(pci_conf + PCI_COMMAND,
  72                  PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
  73     pci_set_word(pci_conf + PCI_STATUS,
  74                  PCI_STATUS_DEVSEL_MEDIUM);
  75
  76     pci_config_set_interrupt_pin(pci_conf, 1); /* interrupt pin 0 */
  77
  78     isabus = isa_bus_new(dev, get_system_memory(),
  79                          pci_address_space_io(pci), errp);
  80     if (!isabus) {
  81         return;
  82     }
  83
  84     /* This device has:
  85        2 82C59 (irq)
  86        1 82C54 (pit)
  87        2 82C37 (dma)
  88        NMI
  89        Utility Bus Support Registers
  90
  91        All devices accept byte access only, except timer
  92      */
  93
  94     /* 2 82C59 (irq) */
  95     s->i8259 = i8259_init(isabus,
  96                           qemu_allocate_irq(i82378_request_out0_irq, s, 0));
  97     isa_bus_irqs(isabus, s->i8259);
  98
  99     /* 1 82C54 (pit) */
 100     isa = pit_init(isabus, 0x40, 0, NULL);
 101
 102     /* speaker */
 103     pcspk_init(isabus, isa);
 104
 105     /* 2 82C37 (dma) */
 106     isa = isa_create_simple(isabus, "i82374");
 107
 108     /* timer */
 109     isa_create_simple(isabus, "mc146818rtc");
 110 }
 111
 112 static void i82378_init(Object *obj)
 113 {
 114     DeviceState *dev = DEVICE(obj);
 115     I82378State *s = I82378(obj);
 116
 117     qdev_init_gpio_out(dev, s->out, 1);
 118     qdev_init_gpio_in(dev, i82378_request_pic_irq, 16);
 119 }
 120
 121 static void i82378_class_init(ObjectClass *klass, void *data)
 122 {
 123     PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
 124     DeviceClass *dc = DEVICE_CLASS(klass);
 125
 126     k->realize = i82378_realize;
 127     k->vendor_id = PCI_VENDOR_ID_INTEL;
 128     k->device_id = PCI_DEVICE_ID_INTEL_82378;
 129     k->revision = 0x03;
 130     k->class_id = PCI_CLASS_BRIDGE_ISA;
 131     dc->vmsd = &vmstate_i82378;
 132     set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
 133 }
 134
 135 static const TypeInfo i82378_type_info = {
 136     .name = TYPE_I82378,
 137     .parent = TYPE_PCI_DEVICE,
 138     .instance_size = sizeof(I82378State),
 139     .instance_init = i82378_init,
 140     .class_init = i82378_class_init,
 141 };
 142
 143 static void i82378_register_types(void)
 144 {
 145     type_register_static(&i82378_type_info);
 146 }
 147
 148 type_init(i82378_register_types)