hw/misc/ivshmem.c

   1 /*
   2  * Inter-VM Shared Memory PCI device.
   3  *
   4  * Author:
   5  *      Cam Macdonell <cam@cs.ualberta.ca>
   6  *
   7  * Based On: cirrus_vga.c
   8  *          Copyright (c) 2004 Fabrice Bellard
   9  *          Copyright (c) 2004 Makoto Suzuki (suzu)
  10  *
  11  *      and rtl8139.c
  12  *          Copyright (c) 2006 Igor Kovalenko
  13  *
  14  * This code is licensed under the GNU GPL v2.
  15  *
  16  * Contributions after 2012-01-13 are licensed under the terms of the
  17  * GNU GPL, version 2 or (at your option) any later version.
  18  */
  19 #include "qemu/osdep.h"
  20 #include "hw/hw.h"
  21 #include "hw/i386/pc.h"
  22 #include "hw/pci/pci.h"
  23 #include "hw/pci/msi.h"
  24 #include "hw/pci/msix.h"
  25 #include "sysemu/kvm.h"
  26 #include "migration/migration.h"
  27 #include "qemu/error-report.h"
  28 #include "qemu/event_notifier.h"
  29 #include "qom/object_interfaces.h"
  30 #include "sysemu/char.h"
  31 #include "sysemu/hostmem.h"
  32 #include "qapi/visitor.h"
  33 #include "exec/ram_addr.h"
  34
  35 #include "hw/misc/ivshmem.h"
  36
  37 #include <sys/mman.h>
  38
  39 #define PCI_VENDOR_ID_IVSHMEM   PCI_VENDOR_ID_REDHAT_QUMRANET
  40 #define PCI_DEVICE_ID_IVSHMEM   0x1110
  41
  42 #define IVSHMEM_MAX_PEERS UINT16_MAX
  43 #define IVSHMEM_IOEVENTFD   0
  44 #define IVSHMEM_MSI     1
  45
  46 #define IVSHMEM_REG_BAR_SIZE 0x100
  47
  48 #define IVSHMEM_DEBUG 0
  49 #define IVSHMEM_DPRINTF(fmt, ...)                       \
  50     do {                                                \
  51         if (IVSHMEM_DEBUG) {                            \
  52             printf("IVSHMEM: " fmt, ## __VA_ARGS__);    \
  53         }                                               \
  54     } while (0)
  55
  56 #define TYPE_IVSHMEM "ivshmem"
  57 #define IVSHMEM(obj) \
  58     OBJECT_CHECK(IVShmemState, (obj), TYPE_IVSHMEM)
  59
  60 typedef struct Peer {
  61     int nb_eventfds;
  62     EventNotifier *eventfds;
  63 } Peer;
  64
  65 typedef struct MSIVector {
  66     PCIDevice *pdev;
  67     int virq;
  68 } MSIVector;
  69
  70 typedef struct IVShmemState {
  71     /*< private >*/
  72     PCIDevice parent_obj;
  73     /*< public >*/
  74
  75     HostMemoryBackend *hostmem;
  76     uint32_t intrmask;
  77     uint32_t intrstatus;
  78
  79     CharDriverState *server_chr;
  80     MemoryRegion ivshmem_mmio;
  81
  82     MemoryRegion *ivshmem_bar2; /* BAR 2 (shared memory) */
  83     MemoryRegion server_bar2;   /* used with server_chr */
  84     size_t ivshmem_size; /* size of shared memory region */
  85     uint32_t ivshmem_64bit;
  86
  87     Peer *peers;
  88     int nb_peers;               /* space in @peers[] */
  89
  90     int vm_id;
  91     uint32_t vectors;
  92     uint32_t features;
  93     MSIVector *msi_vectors;
  94     uint64_t msg_buf;           /* buffer for receiving server messages */
  95     int msg_buffered_bytes;     /* #bytes in @msg_buf */
  96
  97     OnOffAuto master;
  98     Error *migration_blocker;
  99
 100     char * shmobj;
 101     char * sizearg;
 102     char * role;
 103 } IVShmemState;
 104
 105 /* registers for the Inter-VM shared memory device */
 106 enum ivshmem_registers {
 107     INTRMASK = 0,
 108     INTRSTATUS = 4,
 109     IVPOSITION = 8,
 110     DOORBELL = 12,
 111 };
 112
 113 static inline uint32_t ivshmem_has_feature(IVShmemState *ivs,
 114                                                     unsigned int feature) {
 115     return (ivs->features & (1 << feature));
 116 }
 117
 118 static inline bool ivshmem_is_master(IVShmemState *s)
 119 {
 120     assert(s->master != ON_OFF_AUTO_AUTO);
 121     return s->master == ON_OFF_AUTO_ON;
 122 }
 123
 124 static void ivshmem_update_irq(IVShmemState *s)
 125 {
 126     PCIDevice *d = PCI_DEVICE(s);
 127     uint32_t isr = s->intrstatus & s->intrmask;
 128
 129     /* No INTx with msi=on, whether the guest enabled MSI-X or not */
 130     if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
 131         return;
 132     }
 133
 134     /* don't print ISR resets */
 135     if (isr) {
 136         IVSHMEM_DPRINTF("Set IRQ to %d (%04x %04x)\n",
 137                         isr ? 1 : 0, s->intrstatus, s->intrmask);
 138     }
 139
 140     pci_set_irq(d, isr != 0);
 141 }
 142
 143 static void ivshmem_IntrMask_write(IVShmemState *s, uint32_t val)
 144 {
 145     IVSHMEM_DPRINTF("IntrMask write(w) val = 0x%04x\n", val);
 146
 147     s->intrmask = val;
 148     ivshmem_update_irq(s);
 149 }
 150
 151 static uint32_t ivshmem_IntrMask_read(IVShmemState *s)
 152 {
 153     uint32_t ret = s->intrmask;
 154
 155     IVSHMEM_DPRINTF("intrmask read(w) val = 0x%04x\n", ret);
 156     return ret;
 157 }
 158
 159 static void ivshmem_IntrStatus_write(IVShmemState *s, uint32_t val)
 160 {
 161     IVSHMEM_DPRINTF("IntrStatus write(w) val = 0x%04x\n", val);
 162
 163     s->intrstatus = val;
 164     ivshmem_update_irq(s);
 165 }
 166
 167 static uint32_t ivshmem_IntrStatus_read(IVShmemState *s)
 168 {
 169     uint32_t ret = s->intrstatus;
 170
 171     /* reading ISR clears all interrupts */
 172     s->intrstatus = 0;
 173     ivshmem_update_irq(s);
 174     return ret;
 175 }
 176
 177 static void ivshmem_io_write(void *opaque, hwaddr addr,
 178                              uint64_t val, unsigned size)
 179 {
 180     IVShmemState *s = opaque;
 181
 182     uint16_t dest = val >> 16;
 183     uint16_t vector = val & 0xff;
 184
 185     addr &= 0xfc;
 186
 187     IVSHMEM_DPRINTF("writing to addr " TARGET_FMT_plx "\n", addr);
 188     switch (addr)
 189     {
 190         case INTRMASK:
 191             ivshmem_IntrMask_write(s, val);
 192             break;
 193
 194         case INTRSTATUS:
 195             ivshmem_IntrStatus_write(s, val);
 196             break;
 197
 198         case DOORBELL:
 199             /* check that dest VM ID is reasonable */
 200             if (dest >= s->nb_peers) {
 201                 IVSHMEM_DPRINTF("Invalid destination VM ID (%d)\n", dest);
 202                 break;
 203             }
 204
 205             /* check doorbell range */
 206             if (vector < s->peers[dest].nb_eventfds) {
 207                 IVSHMEM_DPRINTF("Notifying VM %d on vector %d\n", dest, vector);
 208                 event_notifier_set(&s->peers[dest].eventfds[vector]);
 209             } else {
 210                 IVSHMEM_DPRINTF("Invalid destination vector %d on VM %d\n",
 211                                 vector, dest);
 212             }
 213             break;
 214         default:
 215             IVSHMEM_DPRINTF("Unhandled write " TARGET_FMT_plx "\n", addr);
 216     }
 217 }
 218
 219 static uint64_t ivshmem_io_read(void *opaque, hwaddr addr,
 220                                 unsigned size)
 221 {
 222
 223     IVShmemState *s = opaque;
 224     uint32_t ret;
 225
 226     switch (addr)
 227     {
 228         case INTRMASK:
 229             ret = ivshmem_IntrMask_read(s);
 230             break;
 231
 232         case INTRSTATUS:
 233             ret = ivshmem_IntrStatus_read(s);
 234             break;
 235
 236         case IVPOSITION:
 237             ret = s->vm_id;
 238             break;
 239
 240         default:
 241             IVSHMEM_DPRINTF("why are we reading " TARGET_FMT_plx "\n", addr);
 242             ret = 0;
 243     }
 244
 245     return ret;
 246 }
 247
 248 static const MemoryRegionOps ivshmem_mmio_ops = {
 249     .read = ivshmem_io_read,
 250     .write = ivshmem_io_write,
 251     .endianness = DEVICE_NATIVE_ENDIAN,
 252     .impl = {
 253         .min_access_size = 4,
 254         .max_access_size = 4,
 255     },
 256 };
 257
 258 static void ivshmem_vector_notify(void *opaque)
 259 {
 260     MSIVector *entry = opaque;
 261     PCIDevice *pdev = entry->pdev;
 262     IVShmemState *s = IVSHMEM(pdev);
 263     int vector = entry - s->msi_vectors;
 264     EventNotifier *n = &s->peers[s->vm_id].eventfds[vector];
 265
 266     if (!event_notifier_test_and_clear(n)) {
 267         return;
 268     }
 269
 270     IVSHMEM_DPRINTF("interrupt on vector %p %d\n", pdev, vector);
 271     if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
 272         if (msix_enabled(pdev)) {
 273             msix_notify(pdev, vector);
 274         }
 275     } else {
 276         ivshmem_IntrStatus_write(s, 1);
 277     }
 278 }
 279
 280 static int ivshmem_vector_unmask(PCIDevice *dev, unsigned vector,
 281                                  MSIMessage msg)
 282 {
 283     IVShmemState *s = IVSHMEM(dev);
 284     EventNotifier *n = &s->peers[s->vm_id].eventfds[vector];
 285     MSIVector *v = &s->msi_vectors[vector];
 286     int ret;
 287
 288     IVSHMEM_DPRINTF("vector unmask %p %d\n", dev, vector);
 289
 290     ret = kvm_irqchip_update_msi_route(kvm_state, v->virq, msg, dev);
 291     if (ret < 0) {
 292         return ret;
 293     }
 294
 295     return kvm_irqchip_add_irqfd_notifier_gsi(kvm_state, n, NULL, v->virq);
 296 }
 297
 298 static void ivshmem_vector_mask(PCIDevice *dev, unsigned vector)
 299 {
 300     IVShmemState *s = IVSHMEM(dev);
 301     EventNotifier *n = &s->peers[s->vm_id].eventfds[vector];
 302     int ret;
 303
 304     IVSHMEM_DPRINTF("vector mask %p %d\n", dev, vector);
 305
 306     ret = kvm_irqchip_remove_irqfd_notifier_gsi(kvm_state, n,
 307                                                 s->msi_vectors[vector].virq);
 308     if (ret != 0) {
 309         error_report("remove_irqfd_notifier_gsi failed");
 310     }
 311 }
 312
 313 static void ivshmem_vector_poll(PCIDevice *dev,
 314                                 unsigned int vector_start,
 315                                 unsigned int vector_end)
 316 {
 317     IVShmemState *s = IVSHMEM(dev);
 318     unsigned int vector;
 319
 320     IVSHMEM_DPRINTF("vector poll %p %d-%d\n", dev, vector_start, vector_end);
 321
 322     vector_end = MIN(vector_end, s->vectors);
 323
 324     for (vector = vector_start; vector < vector_end; vector++) {
 325         EventNotifier *notifier = &s->peers[s->vm_id].eventfds[vector];
 326
 327         if (!msix_is_masked(dev, vector)) {
 328             continue;
 329         }
 330
 331         if (event_notifier_test_and_clear(notifier)) {
 332             msix_set_pending(dev, vector);
 333         }
 334     }
 335 }
 336
 337 static void watch_vector_notifier(IVShmemState *s, EventNotifier *n,
 338                                  int vector)
 339 {
 340     int eventfd = event_notifier_get_fd(n);
 341
 342     assert(!s->msi_vectors[vector].pdev);
 343     s->msi_vectors[vector].pdev = PCI_DEVICE(s);
 344
 345     qemu_set_fd_handler(eventfd, ivshmem_vector_notify,
 346                         NULL, &s->msi_vectors[vector]);
 347 }
 348
 349 static void ivshmem_add_eventfd(IVShmemState *s, int posn, int i)
 350 {
 351     memory_region_add_eventfd(&s->ivshmem_mmio,
 352                               DOORBELL,
 353                               4,
 354                               true,
 355                               (posn << 16) | i,
 356                               &s->peers[posn].eventfds[i]);
 357 }
 358
 359 static void ivshmem_del_eventfd(IVShmemState *s, int posn, int i)
 360 {
 361     memory_region_del_eventfd(&s->ivshmem_mmio,
 362                               DOORBELL,
 363                               4,
 364                               true,
 365                               (posn << 16) | i,
 366                               &s->peers[posn].eventfds[i]);
 367 }
 368
 369 static void close_peer_eventfds(IVShmemState *s, int posn)
 370 {
 371     int i, n;
 372
 373     assert(posn >= 0 && posn < s->nb_peers);
 374     n = s->peers[posn].nb_eventfds;
 375
 376     if (ivshmem_has_feature(s, IVSHMEM_IOEVENTFD)) {
 377         memory_region_transaction_begin();
 378         for (i = 0; i < n; i++) {
 379             ivshmem_del_eventfd(s, posn, i);
 380         }
 381         memory_region_transaction_commit();
 382     }
 383
 384     for (i = 0; i < n; i++) {
 385         event_notifier_cleanup(&s->peers[posn].eventfds[i]);
 386     }
 387
 388     g_free(s->peers[posn].eventfds);
 389     s->peers[posn].nb_eventfds = 0;
 390 }
 391
 392 static void resize_peers(IVShmemState *s, int nb_peers)
 393 {
 394     int old_nb_peers = s->nb_peers;
 395     int i;
 396
 397     assert(nb_peers > old_nb_peers);
 398     IVSHMEM_DPRINTF("bumping storage to %d peers\n", nb_peers);
 399
 400     s->peers = g_realloc(s->peers, nb_peers * sizeof(Peer));
 401     s->nb_peers = nb_peers;
 402
 403     for (i = old_nb_peers; i < nb_peers; i++) {
 404         s->peers[i].eventfds = g_new0(EventNotifier, s->vectors);
 405         s->peers[i].nb_eventfds = 0;
 406     }
 407 }
 408
 409 static void ivshmem_add_kvm_msi_virq(IVShmemState *s, int vector,
 410                                      Error **errp)
 411 {
 412     PCIDevice *pdev = PCI_DEVICE(s);
 413     MSIMessage msg = msix_get_message(pdev, vector);
 414     int ret;
 415
 416     IVSHMEM_DPRINTF("ivshmem_add_kvm_msi_virq vector:%d\n", vector);
 417     assert(!s->msi_vectors[vector].pdev);
 418
 419     ret = kvm_irqchip_add_msi_route(kvm_state, msg, pdev);
 420     if (ret < 0) {
 421         error_setg(errp, "kvm_irqchip_add_msi_route failed");
 422         return;
 423     }
 424
 425     s->msi_vectors[vector].virq = ret;
 426     s->msi_vectors[vector].pdev = pdev;
 427 }
 428
 429 static void setup_interrupt(IVShmemState *s, int vector, Error **errp)
 430 {
 431     EventNotifier *n = &s->peers[s->vm_id].eventfds[vector];
 432     bool with_irqfd = kvm_msi_via_irqfd_enabled() &&
 433         ivshmem_has_feature(s, IVSHMEM_MSI);
 434     PCIDevice *pdev = PCI_DEVICE(s);
 435     Error *err = NULL;
 436
 437     IVSHMEM_DPRINTF("setting up interrupt for vector: %d\n", vector);
 438
 439     if (!with_irqfd) {
 440         IVSHMEM_DPRINTF("with eventfd\n");
 441         watch_vector_notifier(s, n, vector);
 442     } else if (msix_enabled(pdev)) {
 443         IVSHMEM_DPRINTF("with irqfd\n");
 444         ivshmem_add_kvm_msi_virq(s, vector, &err);
 445         if (err) {
 446             error_propagate(errp, err);
 447             return;
 448         }
 449
 450         if (!msix_is_masked(pdev, vector)) {
 451             kvm_irqchip_add_irqfd_notifier_gsi(kvm_state, n, NULL,
 452                                                s->msi_vectors[vector].virq);
 453             /* TODO handle error */
 454         }
 455     } else {
 456         /* it will be delayed until msix is enabled, in write_config */
 457         IVSHMEM_DPRINTF("with irqfd, delayed until msix enabled\n");
 458     }
 459 }
 460
 461 static void process_msg_shmem(IVShmemState *s, int fd, Error **errp)
 462 {
 463     struct stat buf;
 464     void *ptr;
 465
 466     if (s->ivshmem_bar2) {
 467         error_setg(errp, "server sent unexpected shared memory message");
 468         close(fd);
 469         return;
 470     }
 471
 472     if (fstat(fd, &buf) < 0) {
 473         error_setg_errno(errp, errno,
 474             "can't determine size of shared memory sent by server");
 475         close(fd);
 476         return;
 477     }
 478
 479     if (s->ivshmem_size > buf.st_size) {
 480         error_setg(errp, "server sent only %zd bytes of shared memory",
 481                    (size_t)buf.st_size);
 482         close(fd);
 483         return;
 484     }
 485
 486     /* mmap the region and map into the BAR2 */
 487     ptr = mmap(0, s->ivshmem_size, PROT_READ | PROT_WRITE, MAP_SHARED, fd, 0);
 488     if (ptr == MAP_FAILED) {
 489         error_setg_errno(errp, errno, "Failed to mmap shared memory");
 490         close(fd);
 491         return;
 492     }
 493     memory_region_init_ram_ptr(&s->server_bar2, OBJECT(s),
 494                                "ivshmem.bar2", s->ivshmem_size, ptr);
 495     qemu_set_ram_fd(memory_region_get_ram_addr(&s->server_bar2), fd);
 496     s->ivshmem_bar2 = &s->server_bar2;
 497 }
 498
 499 static void process_msg_disconnect(IVShmemState *s, uint16_t posn,
 500                                    Error **errp)
 501 {
 502     IVSHMEM_DPRINTF("posn %d has gone away\n", posn);
 503     if (posn >= s->nb_peers || posn == s->vm_id) {
 504         error_setg(errp, "invalid peer %d", posn);
 505         return;
 506     }
 507     close_peer_eventfds(s, posn);
 508 }
 509
 510 static void process_msg_connect(IVShmemState *s, uint16_t posn, int fd,
 511                                 Error **errp)
 512 {
 513     Peer *peer = &s->peers[posn];
 514     int vector;
 515
 516     /*
 517      * The N-th connect message for this peer comes with the file
 518      * descriptor for vector N-1.  Count messages to find the vector.
 519      */
 520     if (peer->nb_eventfds >= s->vectors) {
 521         error_setg(errp, "Too many eventfd received, device has %d vectors",
 522                    s->vectors);
 523         close(fd);
 524         return;
 525     }
 526     vector = peer->nb_eventfds++;
 527
 528     IVSHMEM_DPRINTF("eventfds[%d][%d] = %d\n", posn, vector, fd);
 529     event_notifier_init_fd(&peer->eventfds[vector], fd);
 530     fcntl_setfl(fd, O_NONBLOCK); /* msix/irqfd poll non block */
 531
 532     if (posn == s->vm_id) {
 533         setup_interrupt(s, vector, errp);
 534         /* TODO do we need to handle the error? */
 535     }
 536
 537     if (ivshmem_has_feature(s, IVSHMEM_IOEVENTFD)) {
 538         ivshmem_add_eventfd(s, posn, vector);
 539     }
 540 }
 541
 542 static void process_msg(IVShmemState *s, int64_t msg, int fd, Error **errp)
 543 {
 544     IVSHMEM_DPRINTF("posn is %" PRId64 ", fd is %d\n", msg, fd);
 545
 546     if (msg < -1 || msg > IVSHMEM_MAX_PEERS) {
 547         error_setg(errp, "server sent invalid message %" PRId64, msg);
 548         close(fd);
 549         return;
 550     }
 551
 552     if (msg == -1) {
 553         process_msg_shmem(s, fd, errp);
 554         return;
 555     }
 556
 557     if (msg >= s->nb_peers) {
 558         resize_peers(s, msg + 1);
 559     }
 560
 561     if (fd >= 0) {
 562         process_msg_connect(s, msg, fd, errp);
 563     } else {
 564         process_msg_disconnect(s, msg, errp);
 565     }
 566 }
 567
 568 static int ivshmem_can_receive(void *opaque)
 569 {
 570     IVShmemState *s = opaque;
 571
 572     assert(s->msg_buffered_bytes < sizeof(s->msg_buf));
 573     return sizeof(s->msg_buf) - s->msg_buffered_bytes;
 574 }
 575
 576 static void ivshmem_read(void *opaque, const uint8_t *buf, int size)
 577 {
 578     IVShmemState *s = opaque;
 579     Error *err = NULL;
 580     int fd;
 581     int64_t msg;
 582
 583     assert(size >= 0 && s->msg_buffered_bytes + size <= sizeof(s->msg_buf));
 584     memcpy((unsigned char *)&s->msg_buf + s->msg_buffered_bytes, buf, size);
 585     s->msg_buffered_bytes += size;
 586     if (s->msg_buffered_bytes < sizeof(s->msg_buf)) {
 587         return;
 588     }
 589     msg = le64_to_cpu(s->msg_buf);
 590     s->msg_buffered_bytes = 0;
 591
 592     fd = qemu_chr_fe_get_msgfd(s->server_chr);
 593     IVSHMEM_DPRINTF("posn is %" PRId64 ", fd is %d\n", msg, fd);
 594
 595     process_msg(s, msg, fd, &err);
 596     if (err) {
 597         error_report_err(err);
 598     }
 599 }
 600
 601 static int64_t ivshmem_recv_msg(IVShmemState *s, int *pfd, Error **errp)
 602 {
 603     int64_t msg;
 604     int n, ret;
 605
 606     n = 0;
 607     do {
 608         ret = qemu_chr_fe_read_all(s->server_chr, (uint8_t *)&msg + n,
 609                                  sizeof(msg) - n);
 610         if (ret < 0 && ret != -EINTR) {
 611             error_setg_errno(errp, -ret, "read from server failed");
 612             return INT64_MIN;
 613         }
 614         n += ret;
 615     } while (n < sizeof(msg));
 616
 617     *pfd = qemu_chr_fe_get_msgfd(s->server_chr);
 618     return msg;
 619 }
 620
 621 static void ivshmem_recv_setup(IVShmemState *s, Error **errp)
 622 {
 623     Error *err = NULL;
 624     int64_t msg;
 625     int fd;
 626
 627     msg = ivshmem_recv_msg(s, &fd, &err);
 628     if (err) {
 629         error_propagate(errp, err);
 630         return;
 631     }
 632     if (msg != IVSHMEM_PROTOCOL_VERSION) {
 633         error_setg(errp, "server sent version %" PRId64 ", expecting %d",
 634                    msg, IVSHMEM_PROTOCOL_VERSION);
 635         return;
 636     }
 637     if (fd != -1) {
 638         error_setg(errp, "server sent invalid version message");
 639         return;
 640     }
 641
 642     /*
 643      * ivshmem-server sends the remaining initial messages in a fixed
 644      * order, but the device has always accepted them in any order.
 645      * Stay as compatible as practical, just in case people use
 646      * servers that behave differently.
 647      */
 648
 649     /*
 650      * ivshmem_device_spec.txt has always required the ID message
 651      * right here, and ivshmem-server has always complied.  However,
 652      * older versions of the device accepted it out of order, but
 653      * broke when an interrupt setup message arrived before it.
 654      */
 655     msg = ivshmem_recv_msg(s, &fd, &err);
 656     if (err) {
 657         error_propagate(errp, err);
 658         return;
 659     }
 660     if (fd != -1 || msg < 0 || msg > IVSHMEM_MAX_PEERS) {
 661         error_setg(errp, "server sent invalid ID message");
 662         return;
 663     }
 664     s->vm_id = msg;
 665
 666     /*
 667      * Receive more messages until we got shared memory.
 668      */
 669     do {
 670         msg = ivshmem_recv_msg(s, &fd, &err);
 671         if (err) {
 672             error_propagate(errp, err);
 673             return;
 674         }
 675         process_msg(s, msg, fd, &err);
 676         if (err) {
 677             error_propagate(errp, err);
 678             return;
 679         }
 680     } while (msg != -1);
 681
 682     /*
 683      * This function must either map the shared memory or fail.  The
 684      * loop above ensures that: it terminates normally only after it
 685      * successfully processed the server's shared memory message.
 686      * Assert that actually mapped the shared memory:
 687      */
 688     assert(s->ivshmem_bar2);
 689 }
 690
 691 /* Select the MSI-X vectors used by device.
 692  * ivshmem maps events to vectors statically, so
 693  * we just enable all vectors on init and after reset. */
 694 static void ivshmem_msix_vector_use(IVShmemState *s)
 695 {
 696     PCIDevice *d = PCI_DEVICE(s);
 697     int i;
 698
 699     for (i = 0; i < s->vectors; i++) {
 700         msix_vector_use(d, i);
 701     }
 702 }
 703
 704 static void ivshmem_reset(DeviceState *d)
 705 {
 706     IVShmemState *s = IVSHMEM(d);
 707
 708     s->intrstatus = 0;
 709     s->intrmask = 0;
 710     if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
 711         ivshmem_msix_vector_use(s);
 712     }
 713 }
 714
 715 static int ivshmem_setup_interrupts(IVShmemState *s)
 716 {
 717     /* allocate QEMU callback data for receiving interrupts */
 718     s->msi_vectors = g_malloc0(s->vectors * sizeof(MSIVector));
 719
 720     if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
 721         if (msix_init_exclusive_bar(PCI_DEVICE(s), s->vectors, 1)) {
 722             return -1;
 723         }
 724
 725         IVSHMEM_DPRINTF("msix initialized (%d vectors)\n", s->vectors);
 726         ivshmem_msix_vector_use(s);
 727     }
 728
 729     return 0;
 730 }
 731
 732 static void ivshmem_enable_irqfd(IVShmemState *s)
 733 {
 734     PCIDevice *pdev = PCI_DEVICE(s);
 735     int i;
 736
 737     for (i = 0; i < s->peers[s->vm_id].nb_eventfds; i++) {
 738         Error *err = NULL;
 739
 740         ivshmem_add_kvm_msi_virq(s, i, &err);
 741         if (err) {
 742             error_report_err(err);
 743             /* TODO do we need to handle the error? */
 744         }
 745     }
 746
 747     if (msix_set_vector_notifiers(pdev,
 748                                   ivshmem_vector_unmask,
 749                                   ivshmem_vector_mask,
 750                                   ivshmem_vector_poll)) {
 751         error_report("ivshmem: msix_set_vector_notifiers failed");
 752     }
 753 }
 754
 755 static void ivshmem_remove_kvm_msi_virq(IVShmemState *s, int vector)
 756 {
 757     IVSHMEM_DPRINTF("ivshmem_remove_kvm_msi_virq vector:%d\n", vector);
 758
 759     if (s->msi_vectors[vector].pdev == NULL) {
 760         return;
 761     }
 762
 763     /* it was cleaned when masked in the frontend. */
 764     kvm_irqchip_release_virq(kvm_state, s->msi_vectors[vector].virq);
 765
 766     s->msi_vectors[vector].pdev = NULL;
 767 }
 768
 769 static void ivshmem_disable_irqfd(IVShmemState *s)
 770 {
 771     PCIDevice *pdev = PCI_DEVICE(s);
 772     int i;
 773
 774     for (i = 0; i < s->peers[s->vm_id].nb_eventfds; i++) {
 775         ivshmem_remove_kvm_msi_virq(s, i);
 776     }
 777
 778     msix_unset_vector_notifiers(pdev);
 779 }
 780
 781 static void ivshmem_write_config(PCIDevice *pdev, uint32_t address,
 782                                  uint32_t val, int len)
 783 {
 784     IVShmemState *s = IVSHMEM(pdev);
 785     int is_enabled, was_enabled = msix_enabled(pdev);
 786
 787     pci_default_write_config(pdev, address, val, len);
 788     is_enabled = msix_enabled(pdev);
 789
 790     if (kvm_msi_via_irqfd_enabled()) {
 791         if (!was_enabled && is_enabled) {
 792             ivshmem_enable_irqfd(s);
 793         } else if (was_enabled && !is_enabled) {
 794             ivshmem_disable_irqfd(s);
 795         }
 796     }
 797 }
 798
 799 static void desugar_shm(IVShmemState *s)
 800 {
 801     Object *obj;
 802     char *path;
 803
 804     obj = object_new("memory-backend-file");
 805     path = g_strdup_printf("/dev/shm/%s", s->shmobj);
 806     object_property_set_str(obj, path, "mem-path", &error_abort);
 807     g_free(path);
 808     object_property_set_int(obj, s->ivshmem_size, "size", &error_abort);
 809     object_property_set_bool(obj, true, "share", &error_abort);
 810     object_property_add_child(OBJECT(s), "internal-shm-backend", obj,
 811                               &error_abort);
 812     user_creatable_complete(obj, &error_abort);
 813     s->hostmem = MEMORY_BACKEND(obj);
 814 }
 815
 816 static void pci_ivshmem_realize(PCIDevice *dev, Error **errp)
 817 {
 818     IVShmemState *s = IVSHMEM(dev);
 819     Error *err = NULL;
 820     uint8_t *pci_conf;
 821     uint8_t attr = PCI_BASE_ADDRESS_SPACE_MEMORY |
 822         PCI_BASE_ADDRESS_MEM_PREFETCH;
 823
 824     if (!!s->server_chr + !!s->shmobj + !!s->hostmem != 1) {
 825         error_setg(errp,
 826                    "You must specify either 'shm', 'chardev' or 'x-memdev'");
 827         return;
 828     }
 829
 830     if (s->hostmem) {
 831         MemoryRegion *mr;
 832
 833         if (s->sizearg) {
 834             g_warning("size argument ignored with hostmem");
 835         }
 836
 837         mr = host_memory_backend_get_memory(s->hostmem, &error_abort);
 838         s->ivshmem_size = memory_region_size(mr);
 839     } else if (s->sizearg == NULL) {
 840         s->ivshmem_size = 4 << 20; /* 4 MB default */
 841     } else {
 842         char *end;
 843         int64_t size = qemu_strtosz(s->sizearg, &end);
 844         if (size < 0 || (size_t)size != size || *end != '\0'
 845             || !is_power_of_2(size)) {
 846             error_setg(errp, "Invalid size %s", s->sizearg);
 847             return;
 848         }
 849         s->ivshmem_size = size;
 850     }
 851
 852     /* IRQFD requires MSI */
 853     if (ivshmem_has_feature(s, IVSHMEM_IOEVENTFD) &&
 854         !ivshmem_has_feature(s, IVSHMEM_MSI)) {
 855         error_setg(errp, "ioeventfd/irqfd requires MSI");
 856         return;
 857     }
 858
 859     /* check that role is reasonable */
 860     if (s->role) {
 861         if (strncmp(s->role, "peer", 5) == 0) {
 862             s->master = ON_OFF_AUTO_OFF;
 863         } else if (strncmp(s->role, "master", 7) == 0) {
 864             s->master = ON_OFF_AUTO_ON;
 865         } else {
 866             error_setg(errp, "'role' must be 'peer' or 'master'");
 867             return;
 868         }
 869     } else {
 870         s->master = ON_OFF_AUTO_AUTO;
 871     }
 872
 873     pci_conf = dev->config;
 874     pci_conf[PCI_COMMAND] = PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
 875
 876     /*
 877      * Note: we don't use INTx with IVSHMEM_MSI at all, so this is a
 878      * bald-faced lie then.  But it's a backwards compatible lie.
 879      */
 880     pci_config_set_interrupt_pin(pci_conf, 1);
 881
 882     memory_region_init_io(&s->ivshmem_mmio, OBJECT(s), &ivshmem_mmio_ops, s,
 883                           "ivshmem-mmio", IVSHMEM_REG_BAR_SIZE);
 884
 885     /* region for registers*/
 886     pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY,
 887                      &s->ivshmem_mmio);
 888
 889     if (s->ivshmem_64bit) {
 890         attr |= PCI_BASE_ADDRESS_MEM_TYPE_64;
 891     }
 892
 893     if (s->shmobj) {
 894         desugar_shm(s);
 895     }
 896
 897     if (s->hostmem != NULL) {
 898         IVSHMEM_DPRINTF("using hostmem\n");
 899
 900         s->ivshmem_bar2 = host_memory_backend_get_memory(s->hostmem,
 901                                                          &error_abort);
 902     } else {
 903         IVSHMEM_DPRINTF("using shared memory server (socket = %s)\n",
 904                         s->server_chr->filename);
 905
 906         /* we allocate enough space for 16 peers and grow as needed */
 907         resize_peers(s, 16);
 908
 909         /*
 910          * Receive setup messages from server synchronously.
 911          * Older versions did it asynchronously, but that creates a
 912          * number of entertaining race conditions.
 913          */
 914         ivshmem_recv_setup(s, &err);
 915         if (err) {
 916             error_propagate(errp, err);
 917             return;
 918         }
 919
 920         qemu_chr_add_handlers(s->server_chr, ivshmem_can_receive,
 921                               ivshmem_read, NULL, s);
 922
 923         if (ivshmem_setup_interrupts(s) < 0) {
 924             error_setg(errp, "failed to initialize interrupts");
 925             return;
 926         }
 927     }
 928
 929     vmstate_register_ram(s->ivshmem_bar2, DEVICE(s));
 930     pci_register_bar(PCI_DEVICE(s), 2, attr, s->ivshmem_bar2);
 931
 932     if (s->master == ON_OFF_AUTO_AUTO) {
 933         s->master = s->vm_id == 0 ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
 934     }
 935
 936     if (!ivshmem_is_master(s)) {
 937         error_setg(&s->migration_blocker,
 938                    "Migration is disabled when using feature 'peer mode' in device 'ivshmem'");
 939         migrate_add_blocker(s->migration_blocker);
 940     }
 941 }
 942
 943 static void pci_ivshmem_exit(PCIDevice *dev)
 944 {
 945     IVShmemState *s = IVSHMEM(dev);
 946     int i;
 947
 948     if (s->migration_blocker) {
 949         migrate_del_blocker(s->migration_blocker);
 950         error_free(s->migration_blocker);
 951     }
 952
 953     if (memory_region_is_mapped(s->ivshmem_bar2)) {
 954         if (!s->hostmem) {
 955             void *addr = memory_region_get_ram_ptr(s->ivshmem_bar2);
 956             int fd;
 957
 958             if (munmap(addr, s->ivshmem_size) == -1) {
 959                 error_report("Failed to munmap shared memory %s",
 960                              strerror(errno));
 961             }
 962
 963             fd = qemu_get_ram_fd(memory_region_get_ram_addr(s->ivshmem_bar2));
 964             close(fd);
 965         }
 966
 967         vmstate_unregister_ram(s->ivshmem_bar2, DEVICE(dev));
 968     }
 969
 970     if (s->peers) {
 971         for (i = 0; i < s->nb_peers; i++) {
 972             close_peer_eventfds(s, i);
 973         }
 974         g_free(s->peers);
 975     }
 976
 977     if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
 978         msix_uninit_exclusive_bar(dev);
 979     }
 980
 981     g_free(s->msi_vectors);
 982 }
 983
 984 static bool test_msix(void *opaque, int version_id)
 985 {
 986     IVShmemState *s = opaque;
 987
 988     return ivshmem_has_feature(s, IVSHMEM_MSI);
 989 }
 990
 991 static bool test_no_msix(void *opaque, int version_id)
 992 {
 993     return !test_msix(opaque, version_id);
 994 }
 995
 996 static int ivshmem_pre_load(void *opaque)
 997 {
 998     IVShmemState *s = opaque;
 999
1000     if (!ivshmem_is_master(s)) {
1001         error_report("'peer' devices are not migratable");
1002         return -EINVAL;
1003     }
1004
1005     return 0;
1006 }
1007
1008 static int ivshmem_post_load(void *opaque, int version_id)
1009 {
1010     IVShmemState *s = opaque;
1011
1012     if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
1013         ivshmem_msix_vector_use(s);
1014     }
1015     return 0;
1016 }
1017
1018 static int ivshmem_load_old(QEMUFile *f, void *opaque, int version_id)
1019 {
1020     IVShmemState *s = opaque;
1021     PCIDevice *pdev = PCI_DEVICE(s);
1022     int ret;
1023
1024     IVSHMEM_DPRINTF("ivshmem_load_old\n");
1025
1026     if (version_id != 0) {
1027         return -EINVAL;
1028     }
1029
1030     ret = ivshmem_pre_load(s);
1031     if (ret) {
1032         return ret;
1033     }
1034
1035     ret = pci_device_load(pdev, f);
1036     if (ret) {
1037         return ret;
1038     }
1039
1040     if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
1041         msix_load(pdev, f);
1042         ivshmem_msix_vector_use(s);
1043     } else {
1044         s->intrstatus = qemu_get_be32(f);
1045         s->intrmask = qemu_get_be32(f);
1046     }
1047
1048     return 0;
1049 }
1050
1051 static const VMStateDescription ivshmem_vmsd = {
1052     .name = "ivshmem",
1053     .version_id = 1,
1054     .minimum_version_id = 1,
1055     .pre_load = ivshmem_pre_load,
1056     .post_load = ivshmem_post_load,
1057     .fields = (VMStateField[]) {
1058         VMSTATE_PCI_DEVICE(parent_obj, IVShmemState),
1059
1060         VMSTATE_MSIX_TEST(parent_obj, IVShmemState, test_msix),
1061         VMSTATE_UINT32_TEST(intrstatus, IVShmemState, test_no_msix),
1062         VMSTATE_UINT32_TEST(intrmask, IVShmemState, test_no_msix),
1063
1064         VMSTATE_END_OF_LIST()
1065     },
1066     .load_state_old = ivshmem_load_old,
1067     .minimum_version_id_old = 0
1068 };
1069
1070 static Property ivshmem_properties[] = {
1071     DEFINE_PROP_CHR("chardev", IVShmemState, server_chr),
1072     DEFINE_PROP_STRING("size", IVShmemState, sizearg),
1073     DEFINE_PROP_UINT32("vectors", IVShmemState, vectors, 1),
1074     DEFINE_PROP_BIT("ioeventfd", IVShmemState, features, IVSHMEM_IOEVENTFD, false),
1075     DEFINE_PROP_BIT("msi", IVShmemState, features, IVSHMEM_MSI, true),
1076     DEFINE_PROP_STRING("shm", IVShmemState, shmobj),
1077     DEFINE_PROP_STRING("role", IVShmemState, role),
1078     DEFINE_PROP_UINT32("use64", IVShmemState, ivshmem_64bit, 1),
1079     DEFINE_PROP_END_OF_LIST(),
1080 };
1081
1082 static void ivshmem_class_init(ObjectClass *klass, void *data)
1083 {
1084     DeviceClass *dc = DEVICE_CLASS(klass);
1085     PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
1086
1087     k->realize = pci_ivshmem_realize;
1088     k->exit = pci_ivshmem_exit;
1089     k->config_write = ivshmem_write_config;
1090     k->vendor_id = PCI_VENDOR_ID_IVSHMEM;
1091     k->device_id = PCI_DEVICE_ID_IVSHMEM;
1092     k->class_id = PCI_CLASS_MEMORY_RAM;
1093     dc->reset = ivshmem_reset;
1094     dc->props = ivshmem_properties;
1095     dc->vmsd = &ivshmem_vmsd;
1096     set_bit(DEVICE_CATEGORY_MISC, dc->categories);
1097     dc->desc = "Inter-VM shared memory";
1098 }
1099
1100 static void ivshmem_check_memdev_is_busy(Object *obj, const char *name,
1101                                          Object *val, Error **errp)
1102 {
1103     MemoryRegion *mr;
1104
1105     mr = host_memory_backend_get_memory(MEMORY_BACKEND(val), &error_abort);
1106     if (memory_region_is_mapped(mr)) {
1107         char *path = object_get_canonical_path_component(val);
1108         error_setg(errp, "can't use already busy memdev: %s", path);
1109         g_free(path);
1110     } else {
1111         qdev_prop_allow_set_link_before_realize(obj, name, val, errp);
1112     }
1113 }
1114
1115 static void ivshmem_init(Object *obj)
1116 {
1117     IVShmemState *s = IVSHMEM(obj);
1118
1119     object_property_add_link(obj, "x-memdev", TYPE_MEMORY_BACKEND,
1120                              (Object **)&s->hostmem,
1121                              ivshmem_check_memdev_is_busy,
1122                              OBJ_PROP_LINK_UNREF_ON_RELEASE,
1123                              &error_abort);
1124 }
1125
1126 static const TypeInfo ivshmem_info = {
1127     .name          = TYPE_IVSHMEM,
1128     .parent        = TYPE_PCI_DEVICE,
1129     .instance_size = sizeof(IVShmemState),
1130     .instance_init = ivshmem_init,
1131     .class_init    = ivshmem_class_init,
1132 };
1133
1134 static void ivshmem_register_types(void)
1135 {
1136     type_register_static(&ivshmem_info);
1137 }
1138
1139 type_init(ivshmem_register_types)