ivshmem: Replace int role_val by OnOffAuto master
[qemu/ar7.git] / hw / display / ssd0303.c
blobd3017563f3f0973a2d9f416c17842997ed0602b7
1 /*
2 * SSD0303 OLED controller with OSRAM Pictiva 96x16 display.
4 * Copyright (c) 2006-2007 CodeSourcery.
5 * Written by Paul Brook
7 * This code is licensed under the GPL.
8 */
10 /* The controller can support a variety of different displays, but we only
11 implement one. Most of the commends relating to brightness and geometry
12 setup are ignored. */
13 #include "qemu/osdep.h"
14 #include "hw/i2c/i2c.h"
15 #include "ui/console.h"
17 //#define DEBUG_SSD0303 1
19 #ifdef DEBUG_SSD0303
20 #define DPRINTF(fmt, ...) \
21 do { printf("ssd0303: " fmt , ## __VA_ARGS__); } while (0)
22 #define BADF(fmt, ...) \
23 do { fprintf(stderr, "ssd0303: error: " fmt , ## __VA_ARGS__); exit(1);} while (0)
24 #else
25 #define DPRINTF(fmt, ...) do {} while(0)
26 #define BADF(fmt, ...) \
27 do { fprintf(stderr, "ssd0303: error: " fmt , ## __VA_ARGS__);} while (0)
28 #endif
30 /* Scaling factor for pixels. */
31 #define MAGNIFY 4
33 enum ssd0303_mode
35 SSD0303_IDLE,
36 SSD0303_DATA,
37 SSD0303_CMD
40 enum ssd0303_cmd {
41 SSD0303_CMD_NONE,
42 SSD0303_CMD_SKIP1
45 #define TYPE_SSD0303 "ssd0303"
46 #define SSD0303(obj) OBJECT_CHECK(ssd0303_state, (obj), TYPE_SSD0303)
48 typedef struct {
49 I2CSlave parent_obj;
51 QemuConsole *con;
52 int row;
53 int col;
54 int start_line;
55 int mirror;
56 int flash;
57 int enabled;
58 int inverse;
59 int redraw;
60 enum ssd0303_mode mode;
61 enum ssd0303_cmd cmd_state;
62 uint8_t framebuffer[132*8];
63 } ssd0303_state;
65 static int ssd0303_recv(I2CSlave *i2c)
67 BADF("Reads not implemented\n");
68 return -1;
71 static int ssd0303_send(I2CSlave *i2c, uint8_t data)
73 ssd0303_state *s = SSD0303(i2c);
74 enum ssd0303_cmd old_cmd_state;
76 switch (s->mode) {
77 case SSD0303_IDLE:
78 DPRINTF("byte 0x%02x\n", data);
79 if (data == 0x80)
80 s->mode = SSD0303_CMD;
81 else if (data == 0x40)
82 s->mode = SSD0303_DATA;
83 else
84 BADF("Unexpected byte 0x%x\n", data);
85 break;
86 case SSD0303_DATA:
87 DPRINTF("data 0x%02x\n", data);
88 if (s->col < 132) {
89 s->framebuffer[s->col + s->row * 132] = data;
90 s->col++;
91 s->redraw = 1;
93 break;
94 case SSD0303_CMD:
95 old_cmd_state = s->cmd_state;
96 s->cmd_state = SSD0303_CMD_NONE;
97 switch (old_cmd_state) {
98 case SSD0303_CMD_NONE:
99 DPRINTF("cmd 0x%02x\n", data);
100 s->mode = SSD0303_IDLE;
101 switch (data) {
102 case 0x00 ... 0x0f: /* Set lower column address. */
103 s->col = (s->col & 0xf0) | (data & 0xf);
104 break;
105 case 0x10 ... 0x20: /* Set higher column address. */
106 s->col = (s->col & 0x0f) | ((data & 0xf) << 4);
107 break;
108 case 0x40 ... 0x7f: /* Set start line. */
109 s->start_line = 0;
110 break;
111 case 0x81: /* Set contrast (Ignored). */
112 s->cmd_state = SSD0303_CMD_SKIP1;
113 break;
114 case 0xa0: /* Mirror off. */
115 s->mirror = 0;
116 break;
117 case 0xa1: /* Mirror off. */
118 s->mirror = 1;
119 break;
120 case 0xa4: /* Entire display off. */
121 s->flash = 0;
122 break;
123 case 0xa5: /* Entire display on. */
124 s->flash = 1;
125 break;
126 case 0xa6: /* Inverse off. */
127 s->inverse = 0;
128 break;
129 case 0xa7: /* Inverse on. */
130 s->inverse = 1;
131 break;
132 case 0xa8: /* Set multiplied ratio (Ignored). */
133 s->cmd_state = SSD0303_CMD_SKIP1;
134 break;
135 case 0xad: /* DC-DC power control. */
136 s->cmd_state = SSD0303_CMD_SKIP1;
137 break;
138 case 0xae: /* Display off. */
139 s->enabled = 0;
140 break;
141 case 0xaf: /* Display on. */
142 s->enabled = 1;
143 break;
144 case 0xb0 ... 0xbf: /* Set Page address. */
145 s->row = data & 7;
146 break;
147 case 0xc0 ... 0xc8: /* Set COM output direction (Ignored). */
148 break;
149 case 0xd3: /* Set display offset (Ignored). */
150 s->cmd_state = SSD0303_CMD_SKIP1;
151 break;
152 case 0xd5: /* Set display clock (Ignored). */
153 s->cmd_state = SSD0303_CMD_SKIP1;
154 break;
155 case 0xd8: /* Set color and power mode (Ignored). */
156 s->cmd_state = SSD0303_CMD_SKIP1;
157 break;
158 case 0xd9: /* Set pre-charge period (Ignored). */
159 s->cmd_state = SSD0303_CMD_SKIP1;
160 break;
161 case 0xda: /* Set COM pin configuration (Ignored). */
162 s->cmd_state = SSD0303_CMD_SKIP1;
163 break;
164 case 0xdb: /* Set VCOM dselect level (Ignored). */
165 s->cmd_state = SSD0303_CMD_SKIP1;
166 break;
167 case 0xe3: /* no-op. */
168 break;
169 default:
170 BADF("Unknown command: 0x%x\n", data);
172 break;
173 case SSD0303_CMD_SKIP1:
174 DPRINTF("skip 0x%02x\n", data);
175 break;
177 break;
179 return 0;
182 static void ssd0303_event(I2CSlave *i2c, enum i2c_event event)
184 ssd0303_state *s = SSD0303(i2c);
186 switch (event) {
187 case I2C_FINISH:
188 s->mode = SSD0303_IDLE;
189 break;
190 case I2C_START_RECV:
191 case I2C_START_SEND:
192 case I2C_NACK:
193 /* Nothing to do. */
194 break;
198 static void ssd0303_update_display(void *opaque)
200 ssd0303_state *s = (ssd0303_state *)opaque;
201 DisplaySurface *surface = qemu_console_surface(s->con);
202 uint8_t *dest;
203 uint8_t *src;
204 int x;
205 int y;
206 int line;
207 char *colors[2];
208 char colortab[MAGNIFY * 8];
209 int dest_width;
210 uint8_t mask;
212 if (!s->redraw)
213 return;
215 switch (surface_bits_per_pixel(surface)) {
216 case 0:
217 return;
218 case 15:
219 dest_width = 2;
220 break;
221 case 16:
222 dest_width = 2;
223 break;
224 case 24:
225 dest_width = 3;
226 break;
227 case 32:
228 dest_width = 4;
229 break;
230 default:
231 BADF("Bad color depth\n");
232 return;
234 dest_width *= MAGNIFY;
235 memset(colortab, 0xff, dest_width);
236 memset(colortab + dest_width, 0, dest_width);
237 if (s->flash) {
238 colors[0] = colortab;
239 colors[1] = colortab;
240 } else if (s->inverse) {
241 colors[0] = colortab;
242 colors[1] = colortab + dest_width;
243 } else {
244 colors[0] = colortab + dest_width;
245 colors[1] = colortab;
247 dest = surface_data(surface);
248 for (y = 0; y < 16; y++) {
249 line = (y + s->start_line) & 63;
250 src = s->framebuffer + 132 * (line >> 3) + 36;
251 mask = 1 << (line & 7);
252 for (x = 0; x < 96; x++) {
253 memcpy(dest, colors[(*src & mask) != 0], dest_width);
254 dest += dest_width;
255 src++;
257 for (x = 1; x < MAGNIFY; x++) {
258 memcpy(dest, dest - dest_width * 96, dest_width * 96);
259 dest += dest_width * 96;
262 s->redraw = 0;
263 dpy_gfx_update(s->con, 0, 0, 96 * MAGNIFY, 16 * MAGNIFY);
266 static void ssd0303_invalidate_display(void * opaque)
268 ssd0303_state *s = (ssd0303_state *)opaque;
269 s->redraw = 1;
272 static const VMStateDescription vmstate_ssd0303 = {
273 .name = "ssd0303_oled",
274 .version_id = 1,
275 .minimum_version_id = 1,
276 .fields = (VMStateField[]) {
277 VMSTATE_INT32(row, ssd0303_state),
278 VMSTATE_INT32(col, ssd0303_state),
279 VMSTATE_INT32(start_line, ssd0303_state),
280 VMSTATE_INT32(mirror, ssd0303_state),
281 VMSTATE_INT32(flash, ssd0303_state),
282 VMSTATE_INT32(enabled, ssd0303_state),
283 VMSTATE_INT32(inverse, ssd0303_state),
284 VMSTATE_INT32(redraw, ssd0303_state),
285 VMSTATE_UINT32(mode, ssd0303_state),
286 VMSTATE_UINT32(cmd_state, ssd0303_state),
287 VMSTATE_BUFFER(framebuffer, ssd0303_state),
288 VMSTATE_I2C_SLAVE(parent_obj, ssd0303_state),
289 VMSTATE_END_OF_LIST()
293 static const GraphicHwOps ssd0303_ops = {
294 .invalidate = ssd0303_invalidate_display,
295 .gfx_update = ssd0303_update_display,
298 static int ssd0303_init(I2CSlave *i2c)
300 ssd0303_state *s = SSD0303(i2c);
302 s->con = graphic_console_init(DEVICE(i2c), 0, &ssd0303_ops, s);
303 qemu_console_resize(s->con, 96 * MAGNIFY, 16 * MAGNIFY);
304 return 0;
307 static void ssd0303_class_init(ObjectClass *klass, void *data)
309 DeviceClass *dc = DEVICE_CLASS(klass);
310 I2CSlaveClass *k = I2C_SLAVE_CLASS(klass);
312 k->init = ssd0303_init;
313 k->event = ssd0303_event;
314 k->recv = ssd0303_recv;
315 k->send = ssd0303_send;
316 dc->vmsd = &vmstate_ssd0303;
319 static const TypeInfo ssd0303_info = {
320 .name = TYPE_SSD0303,
321 .parent = TYPE_I2C_SLAVE,
322 .instance_size = sizeof(ssd0303_state),
323 .class_init = ssd0303_class_init,
326 static void ssd0303_register_types(void)
328 type_register_static(&ssd0303_info);
331 type_init(ssd0303_register_types)