include/hw/boards.h

   1 /* Declarations for use by board files for creating devices.  */
   2
   3 #ifndef HW_BOARDS_H
   4 #define HW_BOARDS_H
   5
   6 #include "exec/memory.h"
   7 #include "sysemu/hostmem.h"
   8 #include "sysemu/blockdev.h"
   9 #include "sysemu/accel.h"
  10 #include "qapi/qapi-types-machine.h"
  11 #include "qemu/module.h"
  12 #include "qom/object.h"
  13 #include "hw/core/cpu.h"
  14
  15 #define TYPE_MACHINE_SUFFIX "-machine"
  16
  17 /* Machine class name that needs to be used for class-name-based machine
  18  * type lookup to work.
  19  */
  20 #define MACHINE_TYPE_NAME(machinename) (machinename TYPE_MACHINE_SUFFIX)
  21
  22 #define TYPE_MACHINE "machine"
  23 #undef MACHINE  /* BSD defines it and QEMU does not use it */
  24 #define MACHINE(obj) \
  25     OBJECT_CHECK(MachineState, (obj), TYPE_MACHINE)
  26 #define MACHINE_GET_CLASS(obj) \
  27     OBJECT_GET_CLASS(MachineClass, (obj), TYPE_MACHINE)
  28 #define MACHINE_CLASS(klass) \
  29     OBJECT_CLASS_CHECK(MachineClass, (klass), TYPE_MACHINE)
  30
  31 extern MachineState *current_machine;
  32
  33 void machine_run_board_init(MachineState *machine);
  34 bool machine_usb(MachineState *machine);
  35 int machine_phandle_start(MachineState *machine);
  36 bool machine_dump_guest_core(MachineState *machine);
  37 bool machine_mem_merge(MachineState *machine);
  38 HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine);
  39 void machine_set_cpu_numa_node(MachineState *machine,
  40                                const CpuInstanceProperties *props,
  41                                Error **errp);
  42
  43 void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type);
  44 /*
  45  * Checks that backend isn't used, preps it for exclusive usage and
  46  * returns migratable MemoryRegion provided by backend.
  47  */
  48 MemoryRegion *machine_consume_memdev(MachineState *machine,
  49                                      HostMemoryBackend *backend);
  50
  51 /**
  52  * CPUArchId:
  53  * @arch_id - architecture-dependent CPU ID of present or possible CPU
  54  * @cpu - pointer to corresponding CPU object if it's present on NULL otherwise
  55  * @type - QOM class name of possible @cpu object
  56  * @props - CPU object properties, initialized by board
  57  * #vcpus_count - number of threads provided by @cpu object
  58  */
  59 typedef struct CPUArchId {
  60     uint64_t arch_id;
  61     int64_t vcpus_count;
  62     CpuInstanceProperties props;
  63     Object *cpu;
  64     const char *type;
  65 } CPUArchId;
  66
  67 /**
  68  * CPUArchIdList:
  69  * @len - number of @CPUArchId items in @cpus array
  70  * @cpus - array of present or possible CPUs for current machine configuration
  71  */
  72 typedef struct {
  73     int len;
  74     CPUArchId cpus[0];
  75 } CPUArchIdList;
  76
  77 /**
  78  * MachineClass:
  79  * @deprecation_reason: If set, the machine is marked as deprecated. The
  80  *    string should provide some clear information about what to use instead.
  81  * @max_cpus: maximum number of CPUs supported. Default: 1
  82  * @min_cpus: minimum number of CPUs supported. Default: 1
  83  * @default_cpus: number of CPUs instantiated if none are specified. Default: 1
  84  * @is_default:
  85  *    If true QEMU will use this machine by default if no '-M' option is given.
  86  * @get_hotplug_handler: this function is called during bus-less
  87  *    device hotplug. If defined it returns pointer to an instance
  88  *    of HotplugHandler object, which handles hotplug operation
  89  *    for a given @dev. It may return NULL if @dev doesn't require
  90  *    any actions to be performed by hotplug handler.
  91  * @cpu_index_to_instance_props:
  92  *    used to provide @cpu_index to socket/core/thread number mapping, allowing
  93  *    legacy code to perform maping from cpu_index to topology properties
  94  *    Returns: tuple of socket/core/thread ids given cpu_index belongs to.
  95  *    used to provide @cpu_index to socket number mapping, allowing
  96  *    a machine to group CPU threads belonging to the same socket/package
  97  *    Returns: socket number given cpu_index belongs to.
  98  * @hw_version:
  99  *    Value of QEMU_VERSION when the machine was added to QEMU.
 100  *    Set only by old machines because they need to keep
 101  *    compatibility on code that exposed QEMU_VERSION to guests in
 102  *    the past (and now use qemu_hw_version()).
 103  * @possible_cpu_arch_ids:
 104  *    Returns an array of @CPUArchId architecture-dependent CPU IDs
 105  *    which includes CPU IDs for present and possible to hotplug CPUs.
 106  *    Caller is responsible for freeing returned list.
 107  * @get_default_cpu_node_id:
 108  *    returns default board specific node_id value for CPU slot specified by
 109  *    index @idx in @ms->possible_cpus[]
 110  * @has_hotpluggable_cpus:
 111  *    If true, board supports CPUs creation with -device/device_add.
 112  * @default_cpu_type:
 113  *    specifies default CPU_TYPE, which will be used for parsing target
 114  *    specific features and for creating CPUs if CPU name wasn't provided
 115  *    explicitly at CLI
 116  * @minimum_page_bits:
 117  *    If non-zero, the board promises never to create a CPU with a page size
 118  *    smaller than this, so QEMU can use a more efficient larger page
 119  *    size than the target architecture's minimum. (Attempting to create
 120  *    such a CPU will fail.) Note that changing this is a migration
 121  *    compatibility break for the machine.
 122  * @ignore_memory_transaction_failures:
 123  *    If this is flag is true then the CPU will ignore memory transaction
 124  *    failures which should cause the CPU to take an exception due to an
 125  *    access to an unassigned physical address; the transaction will instead
 126  *    return zero (for a read) or be ignored (for a write). This should be
 127  *    set only by legacy board models which rely on the old RAZ/WI behaviour
 128  *    for handling devices that QEMU does not yet model. New board models
 129  *    should instead use "unimplemented-device" for all memory ranges where
 130  *    the guest will attempt to probe for a device that QEMU doesn't
 131  *    implement and a stub device is required.
 132  * @kvm_type:
 133  *    Return the type of KVM corresponding to the kvm-type string option or
 134  *    computed based on other criteria such as the host kernel capabilities.
 135  * @numa_mem_supported:
 136  *    true if '--numa node.mem' option is supported and false otherwise
 137  * @smp_parse:
 138  *    The function pointer to hook different machine specific functions for
 139  *    parsing "smp-opts" from QemuOpts to MachineState::CpuTopology and more
 140  *    machine specific topology fields, such as smp_dies for PCMachine.
 141  * @hotplug_allowed:
 142  *    If the hook is provided, then it'll be called for each device
 143  *    hotplug to check whether the device hotplug is allowed.  Return
 144  *    true to grant allowance or false to reject the hotplug.  When
 145  *    false is returned, an error must be set to show the reason of
 146  *    the rejection.  If the hook is not provided, all hotplug will be
 147  *    allowed.
 148  * @default_ram_id:
 149  *    Specifies inital RAM MemoryRegion name to be used for default backend
 150  *    creation if user explicitly hasn't specified backend with "memory-backend"
 151  *    property.
 152  *    It also will be used as a way to optin into "-m" option support.
 153  *    If it's not set by board, '-m' will be ignored and generic code will
 154  *    not create default RAM MemoryRegion.
 155  */
 156 struct MachineClass {
 157     /*< private >*/
 158     ObjectClass parent_class;
 159     /*< public >*/
 160
 161     const char *family; /* NULL iff @name identifies a standalone machtype */
 162     char *name;
 163     const char *alias;
 164     const char *desc;
 165     const char *deprecation_reason;
 166
 167     void (*init)(MachineState *state);
 168     void (*reset)(MachineState *state);
 169     void (*wakeup)(MachineState *state);
 170     void (*hot_add_cpu)(MachineState *state, const int64_t id, Error **errp);
 171     int (*kvm_type)(MachineState *machine, const char *arg);
 172     void (*smp_parse)(MachineState *ms, QemuOpts *opts);
 173
 174     BlockInterfaceType block_default_type;
 175     int units_per_default_bus;
 176     int max_cpus;
 177     int min_cpus;
 178     int default_cpus;
 179     unsigned int no_serial:1,
 180         no_parallel:1,
 181         no_floppy:1,
 182         no_cdrom:1,
 183         no_sdcard:1,
 184         pci_allow_0_address:1,
 185         legacy_fw_cfg_order:1;
 186     bool is_default;
 187     const char *default_machine_opts;
 188     const char *default_boot_order;
 189     const char *default_display;
 190     GPtrArray *compat_props;
 191     const char *hw_version;
 192     ram_addr_t default_ram_size;
 193     const char *default_cpu_type;
 194     bool default_kernel_irqchip_split;
 195     bool option_rom_has_mr;
 196     bool rom_file_has_mr;
 197     int minimum_page_bits;
 198     bool has_hotpluggable_cpus;
 199     bool ignore_memory_transaction_failures;
 200     int numa_mem_align_shift;
 201     const char **valid_cpu_types;
 202     strList *allowed_dynamic_sysbus_devices;
 203     bool auto_enable_numa_with_memhp;
 204     void (*numa_auto_assign_ram)(MachineClass *mc, NodeInfo *nodes,
 205                                  int nb_nodes, ram_addr_t size);
 206     bool ignore_boot_device_suffixes;
 207     bool smbus_no_migration_support;
 208     bool nvdimm_supported;
 209     bool numa_mem_supported;
 210     bool auto_enable_numa;
 211     const char *default_ram_id;
 212
 213     HotplugHandler *(*get_hotplug_handler)(MachineState *machine,
 214                                            DeviceState *dev);
 215     bool (*hotplug_allowed)(MachineState *state, DeviceState *dev,
 216                             Error **errp);
 217     CpuInstanceProperties (*cpu_index_to_instance_props)(MachineState *machine,
 218                                                          unsigned cpu_index);
 219     const CPUArchIdList *(*possible_cpu_arch_ids)(MachineState *machine);
 220     int64_t (*get_default_cpu_node_id)(const MachineState *ms, int idx);
 221 };
 222
 223 /**
 224  * DeviceMemoryState:
 225  * @base: address in guest physical address space where the memory
 226  * address space for memory devices starts
 227  * @mr: address space container for memory devices
 228  */
 229 typedef struct DeviceMemoryState {
 230     hwaddr base;
 231     MemoryRegion mr;
 232 } DeviceMemoryState;
 233
 234 /**
 235  * CpuTopology:
 236  * @cpus: the number of present logical processors on the machine
 237  * @cores: the number of cores in one package
 238  * @threads: the number of threads in one core
 239  * @max_cpus: the maximum number of logical processors on the machine
 240  */
 241 typedef struct CpuTopology {
 242     unsigned int cpus;
 243     unsigned int cores;
 244     unsigned int threads;
 245     unsigned int max_cpus;
 246 } CpuTopology;
 247
 248 /**
 249  * MachineState:
 250  */
 251 struct MachineState {
 252     /*< private >*/
 253     Object parent_obj;
 254     Notifier sysbus_notifier;
 255
 256     /*< public >*/
 257
 258     char *dtb;
 259     char *dumpdtb;
 260     int phandle_start;
 261     char *dt_compatible;
 262     bool dump_guest_core;
 263     bool mem_merge;
 264     bool usb;
 265     bool usb_disabled;
 266     char *firmware;
 267     bool iommu;
 268     bool suppress_vmdesc;
 269     bool enforce_config_section;
 270     bool enable_graphics;
 271     char *memory_encryption;
 272     char *ram_memdev_id;
 273     /*
 274      * convenience alias to ram_memdev_id backend memory region
 275      * or to numa container memory region
 276      */
 277     MemoryRegion *ram;
 278     DeviceMemoryState *device_memory;
 279
 280     ram_addr_t ram_size;
 281     ram_addr_t maxram_size;
 282     uint64_t   ram_slots;
 283     const char *boot_order;
 284     char *kernel_filename;
 285     char *kernel_cmdline;
 286     char *initrd_filename;
 287     const char *cpu_type;
 288     AccelState *accelerator;
 289     CPUArchIdList *possible_cpus;
 290     CpuTopology smp;
 291     struct NVDIMMState *nvdimms_state;
 292     struct NumaState *numa_state;
 293 };
 294
 295 #define DEFINE_MACHINE(namestr, machine_initfn) \
 296     static void machine_initfn##_class_init(ObjectClass *oc, void *data) \
 297     { \
 298         MachineClass *mc = MACHINE_CLASS(oc); \
 299         machine_initfn(mc); \
 300     } \
 301     static const TypeInfo machine_initfn##_typeinfo = { \
 302         .name       = MACHINE_TYPE_NAME(namestr), \
 303         .parent     = TYPE_MACHINE, \
 304         .class_init = machine_initfn##_class_init, \
 305     }; \
 306     static void machine_initfn##_register_types(void) \
 307     { \
 308         type_register_static(&machine_initfn##_typeinfo); \
 309     } \
 310     type_init(machine_initfn##_register_types)
 311
 312 extern GlobalProperty hw_compat_4_2[];
 313 extern const size_t hw_compat_4_2_len;
 314
 315 extern GlobalProperty hw_compat_4_1[];
 316 extern const size_t hw_compat_4_1_len;
 317
 318 extern GlobalProperty hw_compat_4_0[];
 319 extern const size_t hw_compat_4_0_len;
 320
 321 extern GlobalProperty hw_compat_3_1[];
 322 extern const size_t hw_compat_3_1_len;
 323
 324 extern GlobalProperty hw_compat_3_0[];
 325 extern const size_t hw_compat_3_0_len;
 326
 327 extern GlobalProperty hw_compat_2_12[];
 328 extern const size_t hw_compat_2_12_len;
 329
 330 extern GlobalProperty hw_compat_2_11[];
 331 extern const size_t hw_compat_2_11_len;
 332
 333 extern GlobalProperty hw_compat_2_10[];
 334 extern const size_t hw_compat_2_10_len;
 335
 336 extern GlobalProperty hw_compat_2_9[];
 337 extern const size_t hw_compat_2_9_len;
 338
 339 extern GlobalProperty hw_compat_2_8[];
 340 extern const size_t hw_compat_2_8_len;
 341
 342 extern GlobalProperty hw_compat_2_7[];
 343 extern const size_t hw_compat_2_7_len;
 344
 345 extern GlobalProperty hw_compat_2_6[];
 346 extern const size_t hw_compat_2_6_len;
 347
 348 extern GlobalProperty hw_compat_2_5[];
 349 extern const size_t hw_compat_2_5_len;
 350
 351 extern GlobalProperty hw_compat_2_4[];
 352 extern const size_t hw_compat_2_4_len;
 353
 354 extern GlobalProperty hw_compat_2_3[];
 355 extern const size_t hw_compat_2_3_len;
 356
 357 extern GlobalProperty hw_compat_2_2[];
 358 extern const size_t hw_compat_2_2_len;
 359
 360 extern GlobalProperty hw_compat_2_1[];
 361 extern const size_t hw_compat_2_1_len;
 362
 363 #endif