4 * Copyright (c) 2006-2007 CodeSourcery.
5 * Written by Paul Brook
7 * This code is licensed under the GPL.
12 #include "hw/arm/arm.h"
13 #include "sysemu/sysemu.h"
14 #include "hw/boards.h"
15 #include "hw/loader.h"
17 #include "sysemu/device_tree.h"
18 #include "qemu/config-file.h"
20 #define KERNEL_ARGS_ADDR 0x100
21 #define KERNEL_LOAD_ADDR 0x00010000
23 /* The worlds second smallest bootloader. Set r0-r2, then jump to kernel. */
24 static uint32_t bootloader
[] = {
25 0xe3a00000, /* mov r0, #0 */
26 0xe59f1004, /* ldr r1, [pc, #4] */
27 0xe59f2004, /* ldr r2, [pc, #4] */
28 0xe59ff004, /* ldr pc, [pc, #4] */
30 0, /* Address of kernel args. Set by integratorcp_init. */
31 0 /* Kernel entry point. Set by integratorcp_init. */
34 /* Handling for secondary CPU boot in a multicore system.
35 * Unlike the uniprocessor/primary CPU boot, this is platform
36 * dependent. The default code here is based on the secondary
37 * CPU boot protocol used on realview/vexpress boards, with
38 * some parameterisation to increase its flexibility.
39 * QEMU platform models for which this code is not appropriate
40 * should override write_secondary_boot and secondary_cpu_reset_hook
43 * This code enables the interrupt controllers for the secondary
44 * CPUs and then puts all the secondary CPUs into a loop waiting
45 * for an interprocessor interrupt and polling a configurable
46 * location for the kernel secondary CPU entry point.
48 #define DSB_INSN 0xf57ff04f
49 #define CP15_DSB_INSN 0xee070f9a /* mcr cp15, 0, r0, c7, c10, 4 */
51 static uint32_t smpboot
[] = {
52 0xe59f2028, /* ldr r2, gic_cpu_if */
53 0xe59f0028, /* ldr r0, startaddr */
54 0xe3a01001, /* mov r1, #1 */
55 0xe5821000, /* str r1, [r2] - set GICC_CTLR.Enable */
56 0xe3a010ff, /* mov r1, #0xff */
57 0xe5821004, /* str r1, [r2, 4] - set GIC_PMR.Priority to 0xff */
60 0xe5901000, /* ldr r1, [r0] */
61 0xe1110001, /* tst r1, r1 */
62 0x0afffffb, /* beq <wfi> */
63 0xe12fff11, /* bx r1 */
64 0, /* gic_cpu_if: base address of GIC CPU interface */
65 0 /* bootreg: Boot register address is held here */
68 static void default_write_secondary(ARMCPU
*cpu
,
69 const struct arm_boot_info
*info
)
72 smpboot
[ARRAY_SIZE(smpboot
) - 1] = info
->smp_bootreg_addr
;
73 smpboot
[ARRAY_SIZE(smpboot
) - 2] = info
->gic_cpu_if_addr
;
74 for (n
= 0; n
< ARRAY_SIZE(smpboot
); n
++) {
75 /* Replace DSB with the pre-v7 DSB if necessary. */
76 if (!arm_feature(&cpu
->env
, ARM_FEATURE_V7
) &&
77 smpboot
[n
] == DSB_INSN
) {
78 smpboot
[n
] = CP15_DSB_INSN
;
80 smpboot
[n
] = tswap32(smpboot
[n
]);
82 rom_add_blob_fixed("smpboot", smpboot
, sizeof(smpboot
),
83 info
->smp_loader_start
);
86 static void default_reset_secondary(ARMCPU
*cpu
,
87 const struct arm_boot_info
*info
)
89 CPUARMState
*env
= &cpu
->env
;
91 stl_phys_notdirty(info
->smp_bootreg_addr
, 0);
92 env
->regs
[15] = info
->smp_loader_start
;
95 #define WRITE_WORD(p, value) do { \
96 stl_phys_notdirty(p, value); \
100 static void set_kernel_args(const struct arm_boot_info
*info
)
102 int initrd_size
= info
->initrd_size
;
103 hwaddr base
= info
->loader_start
;
106 p
= base
+ KERNEL_ARGS_ADDR
;
109 WRITE_WORD(p
, 0x54410001);
111 WRITE_WORD(p
, 0x1000);
114 /* TODO: handle multiple chips on one ATAG list */
116 WRITE_WORD(p
, 0x54410002);
117 WRITE_WORD(p
, info
->ram_size
);
118 WRITE_WORD(p
, info
->loader_start
);
122 WRITE_WORD(p
, 0x54420005);
123 WRITE_WORD(p
, info
->initrd_start
);
124 WRITE_WORD(p
, initrd_size
);
126 if (info
->kernel_cmdline
&& *info
->kernel_cmdline
) {
130 cmdline_size
= strlen(info
->kernel_cmdline
);
131 cpu_physical_memory_write(p
+ 8, info
->kernel_cmdline
,
133 cmdline_size
= (cmdline_size
>> 2) + 1;
134 WRITE_WORD(p
, cmdline_size
+ 2);
135 WRITE_WORD(p
, 0x54410009);
136 p
+= cmdline_size
* 4;
138 if (info
->atag_board
) {
141 uint8_t atag_board_buf
[0x1000];
143 atag_board_len
= (info
->atag_board(info
, atag_board_buf
) + 3) & ~3;
144 WRITE_WORD(p
, (atag_board_len
+ 8) >> 2);
145 WRITE_WORD(p
, 0x414f4d50);
146 cpu_physical_memory_write(p
, atag_board_buf
, atag_board_len
);
154 static void set_kernel_args_old(const struct arm_boot_info
*info
)
158 int initrd_size
= info
->initrd_size
;
159 hwaddr base
= info
->loader_start
;
161 /* see linux/include/asm-arm/setup.h */
162 p
= base
+ KERNEL_ARGS_ADDR
;
166 WRITE_WORD(p
, info
->ram_size
/ 4096);
169 #define FLAG_READONLY 1
170 #define FLAG_RDLOAD 4
171 #define FLAG_RDPROMPT 8
173 WRITE_WORD(p
, FLAG_READONLY
| FLAG_RDLOAD
| FLAG_RDPROMPT
);
175 WRITE_WORD(p
, (31 << 8) | 0); /* /dev/mtdblock0 */
184 /* memc_control_reg */
186 /* unsigned char sounddefault */
187 /* unsigned char adfsdrives */
188 /* unsigned char bytes_per_char_h */
189 /* unsigned char bytes_per_char_v */
191 /* pages_in_bank[4] */
200 WRITE_WORD(p
, info
->initrd_start
);
205 WRITE_WORD(p
, initrd_size
);
210 /* system_serial_low */
212 /* system_serial_high */
216 /* zero unused fields */
217 while (p
< base
+ KERNEL_ARGS_ADDR
+ 256 + 1024) {
220 s
= info
->kernel_cmdline
;
222 cpu_physical_memory_write(p
, s
, strlen(s
) + 1);
228 static int load_dtb(hwaddr addr
, const struct arm_boot_info
*binfo
)
230 uint32_t *mem_reg_property
;
231 uint32_t mem_reg_propsize
;
235 uint32_t acells
, scells
, hival
;
237 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, binfo
->dtb_filename
);
239 fprintf(stderr
, "Couldn't open dtb file %s\n", binfo
->dtb_filename
);
243 fdt
= load_device_tree(filename
, &size
);
245 fprintf(stderr
, "Couldn't open dtb file %s\n", filename
);
251 acells
= qemu_devtree_getprop_cell(fdt
, "/", "#address-cells");
252 scells
= qemu_devtree_getprop_cell(fdt
, "/", "#size-cells");
253 if (acells
== 0 || scells
== 0) {
254 fprintf(stderr
, "dtb file invalid (#address-cells or #size-cells 0)\n");
258 mem_reg_propsize
= acells
+ scells
;
259 mem_reg_property
= g_new0(uint32_t, mem_reg_propsize
);
260 mem_reg_property
[acells
- 1] = cpu_to_be32(binfo
->loader_start
);
261 hival
= cpu_to_be32(binfo
->loader_start
>> 32);
263 mem_reg_property
[acells
- 2] = hival
;
264 } else if (hival
!= 0) {
265 fprintf(stderr
, "qemu: dtb file not compatible with "
266 "RAM start address > 4GB\n");
269 mem_reg_property
[acells
+ scells
- 1] = cpu_to_be32(binfo
->ram_size
);
270 hival
= cpu_to_be32(binfo
->ram_size
>> 32);
272 mem_reg_property
[acells
+ scells
- 2] = hival
;
273 } else if (hival
!= 0) {
274 fprintf(stderr
, "qemu: dtb file not compatible with "
279 rc
= qemu_devtree_setprop(fdt
, "/memory", "reg", mem_reg_property
,
280 mem_reg_propsize
* sizeof(uint32_t));
282 fprintf(stderr
, "couldn't set /memory/reg\n");
285 if (binfo
->kernel_cmdline
&& *binfo
->kernel_cmdline
) {
286 rc
= qemu_devtree_setprop_string(fdt
, "/chosen", "bootargs",
287 binfo
->kernel_cmdline
);
289 fprintf(stderr
, "couldn't set /chosen/bootargs\n");
293 if (binfo
->initrd_size
) {
294 rc
= qemu_devtree_setprop_cell(fdt
, "/chosen", "linux,initrd-start",
295 binfo
->initrd_start
);
297 fprintf(stderr
, "couldn't set /chosen/linux,initrd-start\n");
300 rc
= qemu_devtree_setprop_cell(fdt
, "/chosen", "linux,initrd-end",
301 binfo
->initrd_start
+ binfo
->initrd_size
);
303 fprintf(stderr
, "couldn't set /chosen/linux,initrd-end\n");
307 cpu_physical_memory_write(addr
, fdt
, size
);
312 static void do_cpu_reset(void *opaque
)
314 ARMCPU
*cpu
= opaque
;
315 CPUARMState
*env
= &cpu
->env
;
316 const struct arm_boot_info
*info
= env
->boot_info
;
320 if (!info
->is_linux
) {
321 /* Jump to the entry point. */
322 env
->regs
[15] = info
->entry
& 0xfffffffe;
323 env
->thumb
= info
->entry
& 1;
325 if (env
== first_cpu
) {
326 env
->regs
[15] = info
->loader_start
;
327 if (!info
->dtb_filename
) {
329 set_kernel_args_old(info
);
331 set_kernel_args(info
);
335 info
->secondary_cpu_reset_hook(cpu
, info
);
341 void arm_load_kernel(ARMCPU
*cpu
, struct arm_boot_info
*info
)
343 CPUARMState
*env
= &cpu
->env
;
351 QemuOpts
*machine_opts
;
353 /* Load the kernel. */
354 if (!info
->kernel_filename
) {
355 fprintf(stderr
, "Kernel image must be specified\n");
359 machine_opts
= qemu_opts_find(qemu_find_opts("machine"), 0);
361 info
->dtb_filename
= qemu_opt_get(machine_opts
, "dtb");
363 info
->dtb_filename
= NULL
;
366 if (!info
->secondary_cpu_reset_hook
) {
367 info
->secondary_cpu_reset_hook
= default_reset_secondary
;
369 if (!info
->write_secondary_boot
) {
370 info
->write_secondary_boot
= default_write_secondary
;
373 if (info
->nb_cpus
== 0)
376 #ifdef TARGET_WORDS_BIGENDIAN
382 /* We want to put the initrd far enough into RAM that when the
383 * kernel is uncompressed it will not clobber the initrd. However
384 * on boards without much RAM we must ensure that we still leave
385 * enough room for a decent sized initrd, and on boards with large
386 * amounts of RAM we must avoid the initrd being so far up in RAM
387 * that it is outside lowmem and inaccessible to the kernel.
388 * So for boards with less than 256MB of RAM we put the initrd
389 * halfway into RAM, and for boards with 256MB of RAM or more we put
390 * the initrd at 128MB.
392 info
->initrd_start
= info
->loader_start
+
393 MIN(info
->ram_size
/ 2, 128 * 1024 * 1024);
395 /* Assume that raw images are linux kernels, and ELF images are not. */
396 kernel_size
= load_elf(info
->kernel_filename
, NULL
, NULL
, &elf_entry
,
397 NULL
, NULL
, big_endian
, ELF_MACHINE
, 1);
399 if (kernel_size
< 0) {
400 kernel_size
= load_uimage(info
->kernel_filename
, &entry
, NULL
,
403 if (kernel_size
< 0) {
404 entry
= info
->loader_start
+ KERNEL_LOAD_ADDR
;
405 kernel_size
= load_image_targphys(info
->kernel_filename
, entry
,
406 info
->ram_size
- KERNEL_LOAD_ADDR
);
409 if (kernel_size
< 0) {
410 fprintf(stderr
, "qemu: could not load kernel '%s'\n",
411 info
->kernel_filename
);
416 if (info
->initrd_filename
) {
417 initrd_size
= load_image_targphys(info
->initrd_filename
,
421 if (initrd_size
< 0) {
422 fprintf(stderr
, "qemu: could not load initrd '%s'\n",
423 info
->initrd_filename
);
429 info
->initrd_size
= initrd_size
;
431 bootloader
[4] = info
->board_id
;
433 /* for device tree boot, we pass the DTB directly in r2. Otherwise
434 * we point to the kernel args.
436 if (info
->dtb_filename
) {
437 /* Place the DTB after the initrd in memory. Note that some
438 * kernels will trash anything in the 4K page the initrd
439 * ends in, so make sure the DTB isn't caught up in that.
441 hwaddr dtb_start
= QEMU_ALIGN_UP(info
->initrd_start
+ initrd_size
,
443 if (load_dtb(dtb_start
, info
)) {
446 bootloader
[5] = dtb_start
;
448 bootloader
[5] = info
->loader_start
+ KERNEL_ARGS_ADDR
;
449 if (info
->ram_size
>= (1ULL << 32)) {
450 fprintf(stderr
, "qemu: RAM size must be less than 4GB to boot"
451 " Linux kernel using ATAGS (try passing a device tree"
456 bootloader
[6] = entry
;
457 for (n
= 0; n
< sizeof(bootloader
) / 4; n
++) {
458 bootloader
[n
] = tswap32(bootloader
[n
]);
460 rom_add_blob_fixed("bootloader", bootloader
, sizeof(bootloader
),
462 if (info
->nb_cpus
> 1) {
463 info
->write_secondary_boot(cpu
, info
);
466 info
->is_linux
= is_linux
;
468 for (; env
; env
= env
->next_cpu
) {
469 cpu
= arm_env_get_cpu(env
);
470 env
->boot_info
= info
;
471 qemu_register_reset(do_cpu_reset
, cpu
);