trace: trace bdrv_open_common()
[qemu/ar7.git] / target-arm / op_helper.c
blobab9c9239d3a28478727cfbe54ec80ecc245e02af
1 /*
2 * ARM helper routines
4 * Copyright (c) 2005-2007 CodeSourcery, LLC
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 #include "cpu.h"
20 #include "dyngen-exec.h"
21 #include "helper.h"
23 #define SIGNBIT (uint32_t)0x80000000
24 #define SIGNBIT64 ((uint64_t)1 << 63)
26 #if !defined(CONFIG_USER_ONLY)
27 static void raise_exception(int tt)
29 env->exception_index = tt;
30 cpu_loop_exit(env);
32 #endif
34 uint32_t HELPER(neon_tbl)(uint32_t ireg, uint32_t def,
35 uint32_t rn, uint32_t maxindex)
37 uint32_t val;
38 uint32_t tmp;
39 int index;
40 int shift;
41 uint64_t *table;
42 table = (uint64_t *)&env->vfp.regs[rn];
43 val = 0;
44 for (shift = 0; shift < 32; shift += 8) {
45 index = (ireg >> shift) & 0xff;
46 if (index < maxindex) {
47 tmp = (table[index >> 3] >> ((index & 7) << 3)) & 0xff;
48 val |= tmp << shift;
49 } else {
50 val |= def & (0xff << shift);
53 return val;
56 #if !defined(CONFIG_USER_ONLY)
58 #include "softmmu_exec.h"
60 #define MMUSUFFIX _mmu
62 #define SHIFT 0
63 #include "softmmu_template.h"
65 #define SHIFT 1
66 #include "softmmu_template.h"
68 #define SHIFT 2
69 #include "softmmu_template.h"
71 #define SHIFT 3
72 #include "softmmu_template.h"
74 /* try to fill the TLB and return an exception if error. If retaddr is
75 NULL, it means that the function was called in C code (i.e. not
76 from generated code or from helper.c) */
77 /* XXX: fix it to restore all registers */
78 void tlb_fill(CPUState *env1, target_ulong addr, int is_write, int mmu_idx,
79 void *retaddr)
81 TranslationBlock *tb;
82 CPUState *saved_env;
83 unsigned long pc;
84 int ret;
86 saved_env = env;
87 ret = cpu_arm_handle_mmu_fault(env, addr, is_write, mmu_idx);
88 if (unlikely(ret)) {
89 if (retaddr) {
90 /* now we have a real cpu fault */
91 pc = (unsigned long)retaddr;
92 tb = tb_find_pc(pc);
93 if (tb) {
94 /* the PC is inside the translated code. It means that we have
95 a virtual CPU fault */
96 cpu_restore_state(tb, env, pc);
99 raise_exception(env->exception_index);
101 env = saved_env;
103 #endif
105 /* FIXME: Pass an axplicit pointer to QF to CPUState, and move saturating
106 instructions into helper.c */
107 uint32_t HELPER(add_setq)(uint32_t a, uint32_t b)
109 uint32_t res = a + b;
110 if (((res ^ a) & SIGNBIT) && !((a ^ b) & SIGNBIT))
111 env->QF = 1;
112 return res;
115 uint32_t HELPER(add_saturate)(uint32_t a, uint32_t b)
117 uint32_t res = a + b;
118 if (((res ^ a) & SIGNBIT) && !((a ^ b) & SIGNBIT)) {
119 env->QF = 1;
120 res = ~(((int32_t)a >> 31) ^ SIGNBIT);
122 return res;
125 uint32_t HELPER(sub_saturate)(uint32_t a, uint32_t b)
127 uint32_t res = a - b;
128 if (((res ^ a) & SIGNBIT) && ((a ^ b) & SIGNBIT)) {
129 env->QF = 1;
130 res = ~(((int32_t)a >> 31) ^ SIGNBIT);
132 return res;
135 uint32_t HELPER(double_saturate)(int32_t val)
137 uint32_t res;
138 if (val >= 0x40000000) {
139 res = ~SIGNBIT;
140 env->QF = 1;
141 } else if (val <= (int32_t)0xc0000000) {
142 res = SIGNBIT;
143 env->QF = 1;
144 } else {
145 res = val << 1;
147 return res;
150 uint32_t HELPER(add_usaturate)(uint32_t a, uint32_t b)
152 uint32_t res = a + b;
153 if (res < a) {
154 env->QF = 1;
155 res = ~0;
157 return res;
160 uint32_t HELPER(sub_usaturate)(uint32_t a, uint32_t b)
162 uint32_t res = a - b;
163 if (res > a) {
164 env->QF = 1;
165 res = 0;
167 return res;
170 /* Signed saturation. */
171 static inline uint32_t do_ssat(int32_t val, int shift)
173 int32_t top;
174 uint32_t mask;
176 top = val >> shift;
177 mask = (1u << shift) - 1;
178 if (top > 0) {
179 env->QF = 1;
180 return mask;
181 } else if (top < -1) {
182 env->QF = 1;
183 return ~mask;
185 return val;
188 /* Unsigned saturation. */
189 static inline uint32_t do_usat(int32_t val, int shift)
191 uint32_t max;
193 max = (1u << shift) - 1;
194 if (val < 0) {
195 env->QF = 1;
196 return 0;
197 } else if (val > max) {
198 env->QF = 1;
199 return max;
201 return val;
204 /* Signed saturate. */
205 uint32_t HELPER(ssat)(uint32_t x, uint32_t shift)
207 return do_ssat(x, shift);
210 /* Dual halfword signed saturate. */
211 uint32_t HELPER(ssat16)(uint32_t x, uint32_t shift)
213 uint32_t res;
215 res = (uint16_t)do_ssat((int16_t)x, shift);
216 res |= do_ssat(((int32_t)x) >> 16, shift) << 16;
217 return res;
220 /* Unsigned saturate. */
221 uint32_t HELPER(usat)(uint32_t x, uint32_t shift)
223 return do_usat(x, shift);
226 /* Dual halfword unsigned saturate. */
227 uint32_t HELPER(usat16)(uint32_t x, uint32_t shift)
229 uint32_t res;
231 res = (uint16_t)do_usat((int16_t)x, shift);
232 res |= do_usat(((int32_t)x) >> 16, shift) << 16;
233 return res;
236 void HELPER(wfi)(void)
238 env->exception_index = EXCP_HLT;
239 env->halted = 1;
240 cpu_loop_exit(env);
243 void HELPER(exception)(uint32_t excp)
245 env->exception_index = excp;
246 cpu_loop_exit(env);
249 uint32_t HELPER(cpsr_read)(void)
251 return cpsr_read(env) & ~CPSR_EXEC;
254 void HELPER(cpsr_write)(uint32_t val, uint32_t mask)
256 cpsr_write(env, val, mask);
259 /* Access to user mode registers from privileged modes. */
260 uint32_t HELPER(get_user_reg)(uint32_t regno)
262 uint32_t val;
264 if (regno == 13) {
265 val = env->banked_r13[0];
266 } else if (regno == 14) {
267 val = env->banked_r14[0];
268 } else if (regno >= 8
269 && (env->uncached_cpsr & 0x1f) == ARM_CPU_MODE_FIQ) {
270 val = env->usr_regs[regno - 8];
271 } else {
272 val = env->regs[regno];
274 return val;
277 void HELPER(set_user_reg)(uint32_t regno, uint32_t val)
279 if (regno == 13) {
280 env->banked_r13[0] = val;
281 } else if (regno == 14) {
282 env->banked_r14[0] = val;
283 } else if (regno >= 8
284 && (env->uncached_cpsr & 0x1f) == ARM_CPU_MODE_FIQ) {
285 env->usr_regs[regno - 8] = val;
286 } else {
287 env->regs[regno] = val;
291 /* ??? Flag setting arithmetic is awkward because we need to do comparisons.
292 The only way to do that in TCG is a conditional branch, which clobbers
293 all our temporaries. For now implement these as helper functions. */
295 uint32_t HELPER (add_cc)(uint32_t a, uint32_t b)
297 uint32_t result;
298 result = a + b;
299 env->NF = env->ZF = result;
300 env->CF = result < a;
301 env->VF = (a ^ b ^ -1) & (a ^ result);
302 return result;
305 uint32_t HELPER(adc_cc)(uint32_t a, uint32_t b)
307 uint32_t result;
308 if (!env->CF) {
309 result = a + b;
310 env->CF = result < a;
311 } else {
312 result = a + b + 1;
313 env->CF = result <= a;
315 env->VF = (a ^ b ^ -1) & (a ^ result);
316 env->NF = env->ZF = result;
317 return result;
320 uint32_t HELPER(sub_cc)(uint32_t a, uint32_t b)
322 uint32_t result;
323 result = a - b;
324 env->NF = env->ZF = result;
325 env->CF = a >= b;
326 env->VF = (a ^ b) & (a ^ result);
327 return result;
330 uint32_t HELPER(sbc_cc)(uint32_t a, uint32_t b)
332 uint32_t result;
333 if (!env->CF) {
334 result = a - b - 1;
335 env->CF = a > b;
336 } else {
337 result = a - b;
338 env->CF = a >= b;
340 env->VF = (a ^ b) & (a ^ result);
341 env->NF = env->ZF = result;
342 return result;
345 /* Similarly for variable shift instructions. */
347 uint32_t HELPER(shl)(uint32_t x, uint32_t i)
349 int shift = i & 0xff;
350 if (shift >= 32)
351 return 0;
352 return x << shift;
355 uint32_t HELPER(shr)(uint32_t x, uint32_t i)
357 int shift = i & 0xff;
358 if (shift >= 32)
359 return 0;
360 return (uint32_t)x >> shift;
363 uint32_t HELPER(sar)(uint32_t x, uint32_t i)
365 int shift = i & 0xff;
366 if (shift >= 32)
367 shift = 31;
368 return (int32_t)x >> shift;
371 uint32_t HELPER(shl_cc)(uint32_t x, uint32_t i)
373 int shift = i & 0xff;
374 if (shift >= 32) {
375 if (shift == 32)
376 env->CF = x & 1;
377 else
378 env->CF = 0;
379 return 0;
380 } else if (shift != 0) {
381 env->CF = (x >> (32 - shift)) & 1;
382 return x << shift;
384 return x;
387 uint32_t HELPER(shr_cc)(uint32_t x, uint32_t i)
389 int shift = i & 0xff;
390 if (shift >= 32) {
391 if (shift == 32)
392 env->CF = (x >> 31) & 1;
393 else
394 env->CF = 0;
395 return 0;
396 } else if (shift != 0) {
397 env->CF = (x >> (shift - 1)) & 1;
398 return x >> shift;
400 return x;
403 uint32_t HELPER(sar_cc)(uint32_t x, uint32_t i)
405 int shift = i & 0xff;
406 if (shift >= 32) {
407 env->CF = (x >> 31) & 1;
408 return (int32_t)x >> 31;
409 } else if (shift != 0) {
410 env->CF = (x >> (shift - 1)) & 1;
411 return (int32_t)x >> shift;
413 return x;
416 uint32_t HELPER(ror_cc)(uint32_t x, uint32_t i)
418 int shift1, shift;
419 shift1 = i & 0xff;
420 shift = shift1 & 0x1f;
421 if (shift == 0) {
422 if (shift1 != 0)
423 env->CF = (x >> 31) & 1;
424 return x;
425 } else {
426 env->CF = (x >> (shift - 1)) & 1;
427 return ((uint32_t)x >> shift) | (x << (32 - shift));