block: Keep track of devices' I/O status
[qemu/ar7.git] / hw / ppc_oldworld.c
blobebcaafa641bb3cb48b8333adf3129d05116a4fbb
2 /*
3 * QEMU OldWorld PowerMac (currently ~G3 Beige) hardware System Emulator
5 * Copyright (c) 2004-2007 Fabrice Bellard
6 * Copyright (c) 2007 Jocelyn Mayer
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24 * THE SOFTWARE.
26 #include "hw.h"
27 #include "ppc.h"
28 #include "ppc_mac.h"
29 #include "adb.h"
30 #include "mac_dbdma.h"
31 #include "nvram.h"
32 #include "pc.h"
33 #include "sysemu.h"
34 #include "net.h"
35 #include "isa.h"
36 #include "pci.h"
37 #include "usb-ohci.h"
38 #include "boards.h"
39 #include "fw_cfg.h"
40 #include "escc.h"
41 #include "ide.h"
42 #include "loader.h"
43 #include "elf.h"
44 #include "kvm.h"
45 #include "kvm_ppc.h"
46 #include "blockdev.h"
47 #include "exec-memory.h"
49 #define MAX_IDE_BUS 2
50 #define CFG_ADDR 0xf0000510
52 static int fw_cfg_boot_set(void *opaque, const char *boot_device)
54 fw_cfg_add_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
55 return 0;
59 static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
61 return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
64 static target_phys_addr_t round_page(target_phys_addr_t addr)
66 return (addr + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK;
69 static void ppc_heathrow_init (ram_addr_t ram_size,
70 const char *boot_device,
71 const char *kernel_filename,
72 const char *kernel_cmdline,
73 const char *initrd_filename,
74 const char *cpu_model)
76 CPUState *env = NULL;
77 char *filename;
78 qemu_irq *pic, **heathrow_irqs;
79 int linux_boot, i;
80 ram_addr_t ram_offset, bios_offset;
81 uint32_t kernel_base, initrd_base, cmdline_base = 0;
82 int32_t kernel_size, initrd_size;
83 PCIBus *pci_bus;
84 MacIONVRAMState *nvr;
85 int bios_size;
86 MemoryRegion *pic_mem, *dbdma_mem, *cuda_mem;
87 MemoryRegion *escc_mem, *escc_bar = g_new(MemoryRegion, 1), *ide_mem[2];
88 uint16_t ppc_boot_device;
89 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
90 void *fw_cfg;
91 void *dbdma;
93 linux_boot = (kernel_filename != NULL);
95 /* init CPUs */
96 if (cpu_model == NULL)
97 cpu_model = "G3";
98 for (i = 0; i < smp_cpus; i++) {
99 env = cpu_init(cpu_model);
100 if (!env) {
101 fprintf(stderr, "Unable to find PowerPC CPU definition\n");
102 exit(1);
104 /* Set time-base frequency to 16.6 Mhz */
105 cpu_ppc_tb_init(env, 16600000UL);
106 qemu_register_reset((QEMUResetHandler*)&cpu_reset, env);
109 /* allocate RAM */
110 if (ram_size > (2047 << 20)) {
111 fprintf(stderr,
112 "qemu: Too much memory for this machine: %d MB, maximum 2047 MB\n",
113 ((unsigned int)ram_size / (1 << 20)));
114 exit(1);
117 ram_offset = qemu_ram_alloc(NULL, "ppc_heathrow.ram", ram_size);
118 cpu_register_physical_memory(0, ram_size, ram_offset);
120 /* allocate and load BIOS */
121 bios_offset = qemu_ram_alloc(NULL, "ppc_heathrow.bios", BIOS_SIZE);
122 if (bios_name == NULL)
123 bios_name = PROM_FILENAME;
124 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
125 cpu_register_physical_memory(PROM_ADDR, BIOS_SIZE, bios_offset | IO_MEM_ROM);
127 /* Load OpenBIOS (ELF) */
128 if (filename) {
129 bios_size = load_elf(filename, 0, NULL, NULL, NULL, NULL,
130 1, ELF_MACHINE, 0);
131 g_free(filename);
132 } else {
133 bios_size = -1;
135 if (bios_size < 0 || bios_size > BIOS_SIZE) {
136 hw_error("qemu: could not load PowerPC bios '%s'\n", bios_name);
137 exit(1);
140 if (linux_boot) {
141 uint64_t lowaddr = 0;
142 int bswap_needed;
144 #ifdef BSWAP_NEEDED
145 bswap_needed = 1;
146 #else
147 bswap_needed = 0;
148 #endif
149 kernel_base = KERNEL_LOAD_ADDR;
150 kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
151 NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0);
152 if (kernel_size < 0)
153 kernel_size = load_aout(kernel_filename, kernel_base,
154 ram_size - kernel_base, bswap_needed,
155 TARGET_PAGE_SIZE);
156 if (kernel_size < 0)
157 kernel_size = load_image_targphys(kernel_filename,
158 kernel_base,
159 ram_size - kernel_base);
160 if (kernel_size < 0) {
161 hw_error("qemu: could not load kernel '%s'\n",
162 kernel_filename);
163 exit(1);
165 /* load initrd */
166 if (initrd_filename) {
167 initrd_base = round_page(kernel_base + kernel_size + KERNEL_GAP);
168 initrd_size = load_image_targphys(initrd_filename, initrd_base,
169 ram_size - initrd_base);
170 if (initrd_size < 0) {
171 hw_error("qemu: could not load initial ram disk '%s'\n",
172 initrd_filename);
173 exit(1);
175 cmdline_base = round_page(initrd_base + initrd_size);
176 } else {
177 initrd_base = 0;
178 initrd_size = 0;
179 cmdline_base = round_page(kernel_base + kernel_size + KERNEL_GAP);
181 ppc_boot_device = 'm';
182 } else {
183 kernel_base = 0;
184 kernel_size = 0;
185 initrd_base = 0;
186 initrd_size = 0;
187 ppc_boot_device = '\0';
188 for (i = 0; boot_device[i] != '\0'; i++) {
189 /* TOFIX: for now, the second IDE channel is not properly
190 * used by OHW. The Mac floppy disk are not emulated.
191 * For now, OHW cannot boot from the network.
193 #if 0
194 if (boot_device[i] >= 'a' && boot_device[i] <= 'f') {
195 ppc_boot_device = boot_device[i];
196 break;
198 #else
199 if (boot_device[i] >= 'c' && boot_device[i] <= 'd') {
200 ppc_boot_device = boot_device[i];
201 break;
203 #endif
205 if (ppc_boot_device == '\0') {
206 fprintf(stderr, "No valid boot device for G3 Beige machine\n");
207 exit(1);
211 /* Register 2 MB of ISA IO space */
212 isa_mmio_init(0xfe000000, 0x00200000);
214 /* XXX: we register only 1 output pin for heathrow PIC */
215 heathrow_irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *));
216 heathrow_irqs[0] =
217 g_malloc0(smp_cpus * sizeof(qemu_irq) * 1);
218 /* Connect the heathrow PIC outputs to the 6xx bus */
219 for (i = 0; i < smp_cpus; i++) {
220 switch (PPC_INPUT(env)) {
221 case PPC_FLAGS_INPUT_6xx:
222 heathrow_irqs[i] = heathrow_irqs[0] + (i * 1);
223 heathrow_irqs[i][0] =
224 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
225 break;
226 default:
227 hw_error("Bus model not supported on OldWorld Mac machine\n");
231 /* init basic PC hardware */
232 if (PPC_INPUT(env) != PPC_FLAGS_INPUT_6xx) {
233 hw_error("Only 6xx bus is supported on heathrow machine\n");
235 pic = heathrow_pic_init(&pic_mem, 1, heathrow_irqs);
236 pci_bus = pci_grackle_init(0xfec00000, pic,
237 get_system_memory(),
238 get_system_io());
239 pci_vga_init(pci_bus);
241 escc_mem = escc_init(0, pic[0x0f], pic[0x10], serial_hds[0],
242 serial_hds[1], ESCC_CLOCK, 4);
243 memory_region_init_alias(escc_bar, "escc-bar",
244 escc_mem, 0, memory_region_size(escc_mem));
246 for(i = 0; i < nb_nics; i++)
247 pci_nic_init_nofail(&nd_table[i], "ne2k_pci", NULL);
250 ide_drive_get(hd, MAX_IDE_BUS);
252 /* First IDE channel is a MAC IDE on the MacIO bus */
253 dbdma = DBDMA_init(&dbdma_mem);
254 ide_mem[0] = NULL;
255 ide_mem[1] = pmac_ide_init(hd, pic[0x0D], dbdma, 0x16, pic[0x02]);
257 /* Second IDE channel is a CMD646 on the PCI bus */
258 hd[0] = hd[MAX_IDE_DEVS];
259 hd[1] = hd[MAX_IDE_DEVS + 1];
260 hd[3] = hd[2] = NULL;
261 pci_cmd646_ide_init(pci_bus, hd, 0);
263 /* cuda also initialize ADB */
264 cuda_init(&cuda_mem, pic[0x12]);
266 adb_kbd_init(&adb_bus);
267 adb_mouse_init(&adb_bus);
269 nvr = macio_nvram_init(0x2000, 4);
270 pmac_format_nvram_partition(nvr, 0x2000);
272 macio_init(pci_bus, PCI_DEVICE_ID_APPLE_343S1201, 1, pic_mem,
273 dbdma_mem, cuda_mem, nvr, 2, ide_mem, escc_bar);
275 if (usb_enabled) {
276 usb_ohci_init_pci(pci_bus, -1);
279 if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
280 graphic_depth = 15;
282 /* No PCI init: the BIOS will do it */
284 fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
285 fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
286 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
287 fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_HEATHROW);
288 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
289 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
290 if (kernel_cmdline) {
291 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base);
292 pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline);
293 } else {
294 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
296 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
297 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
298 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
300 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
301 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
302 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
304 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
305 if (kvm_enabled()) {
306 #ifdef CONFIG_KVM
307 uint8_t *hypercall;
309 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, kvmppc_get_tbfreq());
310 hypercall = g_malloc(16);
311 kvmppc_get_hypercall(env, hypercall, 16);
312 fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
313 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
314 #endif
315 } else {
316 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, get_ticks_per_sec());
319 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
322 static QEMUMachine heathrow_machine = {
323 .name = "g3beige",
324 .desc = "Heathrow based PowerMAC",
325 .init = ppc_heathrow_init,
326 .max_cpus = MAX_CPUS,
327 #ifndef TARGET_PPC64
328 .is_default = 1,
329 #endif
332 static void heathrow_machine_init(void)
334 qemu_register_machine(&heathrow_machine);
337 machine_init(heathrow_machine_init);