2 * QEMU PowerPC sPAPR XIVE interrupt controller model
4 * Copyright (c) 2017-2019, IBM Corporation.
6 * This code is licensed under the GPL version 2 or later. See the
7 * COPYING file in the top-level directory.
10 #include "qemu/osdep.h"
12 #include "qemu/error-report.h"
13 #include "qapi/error.h"
14 #include "target/ppc/cpu.h"
15 #include "sysemu/cpus.h"
16 #include "sysemu/kvm.h"
17 #include "hw/ppc/spapr.h"
18 #include "hw/ppc/spapr_cpu_core.h"
19 #include "hw/ppc/spapr_xive.h"
20 #include "hw/ppc/xive.h"
23 #include <sys/ioctl.h>
26 * Helpers for CPU hotplug
28 * TODO: make a common KVMEnabledCPU layer for XICS and XIVE
30 typedef struct KVMEnabledCPU
{
31 unsigned long vcpu_id
;
32 QLIST_ENTRY(KVMEnabledCPU
) node
;
35 static QLIST_HEAD(, KVMEnabledCPU
)
36 kvm_enabled_cpus
= QLIST_HEAD_INITIALIZER(&kvm_enabled_cpus
);
38 static bool kvm_cpu_is_enabled(CPUState
*cs
)
40 KVMEnabledCPU
*enabled_cpu
;
41 unsigned long vcpu_id
= kvm_arch_vcpu_id(cs
);
43 QLIST_FOREACH(enabled_cpu
, &kvm_enabled_cpus
, node
) {
44 if (enabled_cpu
->vcpu_id
== vcpu_id
) {
51 static void kvm_cpu_enable(CPUState
*cs
)
53 KVMEnabledCPU
*enabled_cpu
;
54 unsigned long vcpu_id
= kvm_arch_vcpu_id(cs
);
56 enabled_cpu
= g_malloc(sizeof(*enabled_cpu
));
57 enabled_cpu
->vcpu_id
= vcpu_id
;
58 QLIST_INSERT_HEAD(&kvm_enabled_cpus
, enabled_cpu
, node
);
62 * XIVE Thread Interrupt Management context (KVM)
65 static void kvmppc_xive_cpu_set_state(XiveTCTX
*tctx
, Error
**errp
)
70 /* word0 and word1 of the OS ring. */
71 state
[0] = *((uint64_t *) &tctx
->regs
[TM_QW1_OS
]);
73 ret
= kvm_set_one_reg(tctx
->cs
, KVM_REG_PPC_VP_STATE
, state
);
75 error_setg_errno(errp
, errno
,
76 "XIVE: could not restore KVM state of CPU %ld",
77 kvm_arch_vcpu_id(tctx
->cs
));
81 void kvmppc_xive_cpu_get_state(XiveTCTX
*tctx
, Error
**errp
)
83 uint64_t state
[2] = { 0 };
86 ret
= kvm_get_one_reg(tctx
->cs
, KVM_REG_PPC_VP_STATE
, state
);
88 error_setg_errno(errp
, errno
,
89 "XIVE: could not capture KVM state of CPU %ld",
90 kvm_arch_vcpu_id(tctx
->cs
));
94 /* word0 and word1 of the OS ring. */
95 *((uint64_t *) &tctx
->regs
[TM_QW1_OS
]) = state
[0];
103 static void kvmppc_xive_cpu_do_synchronize_state(CPUState
*cpu
,
106 XiveCpuGetState
*s
= arg
.host_ptr
;
108 kvmppc_xive_cpu_get_state(s
->tctx
, &s
->err
);
111 void kvmppc_xive_cpu_synchronize_state(XiveTCTX
*tctx
, Error
**errp
)
113 XiveCpuGetState s
= {
119 * Kick the vCPU to make sure they are available for the KVM ioctl.
121 run_on_cpu(tctx
->cs
, kvmppc_xive_cpu_do_synchronize_state
,
122 RUN_ON_CPU_HOST_PTR(&s
));
125 error_propagate(errp
, s
.err
);
130 void kvmppc_xive_cpu_connect(XiveTCTX
*tctx
, Error
**errp
)
132 SpaprXive
*xive
= SPAPR_MACHINE(qdev_get_machine())->xive
;
133 unsigned long vcpu_id
;
136 /* Check if CPU was hot unplugged and replugged. */
137 if (kvm_cpu_is_enabled(tctx
->cs
)) {
141 vcpu_id
= kvm_arch_vcpu_id(tctx
->cs
);
143 ret
= kvm_vcpu_enable_cap(tctx
->cs
, KVM_CAP_PPC_IRQ_XIVE
, 0, xive
->fd
,
146 error_setg(errp
, "XIVE: unable to connect CPU%ld to KVM device: %s",
147 vcpu_id
, strerror(errno
));
151 kvm_cpu_enable(tctx
->cs
);
155 * XIVE Interrupt Source (KVM)
158 void kvmppc_xive_set_source_config(SpaprXive
*xive
, uint32_t lisn
, XiveEAS
*eas
,
168 Error
*local_err
= NULL
;
170 assert(xive_eas_is_valid(eas
));
172 end_idx
= xive_get_field64(EAS_END_INDEX
, eas
->w
);
173 end_blk
= xive_get_field64(EAS_END_BLOCK
, eas
->w
);
174 eisn
= xive_get_field64(EAS_END_DATA
, eas
->w
);
175 masked
= xive_eas_is_masked(eas
);
177 spapr_xive_end_to_target(end_blk
, end_idx
, &server
, &priority
);
179 kvm_src
= priority
<< KVM_XIVE_SOURCE_PRIORITY_SHIFT
&
180 KVM_XIVE_SOURCE_PRIORITY_MASK
;
181 kvm_src
|= server
<< KVM_XIVE_SOURCE_SERVER_SHIFT
&
182 KVM_XIVE_SOURCE_SERVER_MASK
;
183 kvm_src
|= ((uint64_t) masked
<< KVM_XIVE_SOURCE_MASKED_SHIFT
) &
184 KVM_XIVE_SOURCE_MASKED_MASK
;
185 kvm_src
|= ((uint64_t)eisn
<< KVM_XIVE_SOURCE_EISN_SHIFT
) &
186 KVM_XIVE_SOURCE_EISN_MASK
;
188 kvm_device_access(xive
->fd
, KVM_DEV_XIVE_GRP_SOURCE_CONFIG
, lisn
,
189 &kvm_src
, true, &local_err
);
191 error_propagate(errp
, local_err
);
196 void kvmppc_xive_sync_source(SpaprXive
*xive
, uint32_t lisn
, Error
**errp
)
198 kvm_device_access(xive
->fd
, KVM_DEV_XIVE_GRP_SOURCE_SYNC
, lisn
,
203 * At reset, the interrupt sources are simply created and MASKED. We
204 * only need to inform the KVM XIVE device about their type: LSI or
207 void kvmppc_xive_source_reset_one(XiveSource
*xsrc
, int srcno
, Error
**errp
)
209 SpaprXive
*xive
= SPAPR_XIVE(xsrc
->xive
);
212 if (xive_source_irq_is_lsi(xsrc
, srcno
)) {
213 state
|= KVM_XIVE_LEVEL_SENSITIVE
;
214 if (xsrc
->status
[srcno
] & XIVE_STATUS_ASSERTED
) {
215 state
|= KVM_XIVE_LEVEL_ASSERTED
;
219 kvm_device_access(xive
->fd
, KVM_DEV_XIVE_GRP_SOURCE
, srcno
, &state
,
223 void kvmppc_xive_source_reset(XiveSource
*xsrc
, Error
**errp
)
227 for (i
= 0; i
< xsrc
->nr_irqs
; i
++) {
228 Error
*local_err
= NULL
;
230 kvmppc_xive_source_reset_one(xsrc
, i
, &local_err
);
232 error_propagate(errp
, local_err
);
239 * This is used to perform the magic loads on the ESB pages, described
242 * Memory barriers should not be needed for loads (no store for now).
244 static uint64_t xive_esb_rw(XiveSource
*xsrc
, int srcno
, uint32_t offset
,
245 uint64_t data
, bool write
)
247 uint64_t *addr
= xsrc
->esb_mmap
+ xive_source_esb_mgmt(xsrc
, srcno
) +
251 *addr
= cpu_to_be64(data
);
254 /* Prevent the compiler from optimizing away the load */
255 volatile uint64_t value
= be64_to_cpu(*addr
);
260 static uint8_t xive_esb_read(XiveSource
*xsrc
, int srcno
, uint32_t offset
)
262 return xive_esb_rw(xsrc
, srcno
, offset
, 0, 0) & 0x3;
265 static void xive_esb_trigger(XiveSource
*xsrc
, int srcno
)
267 uint64_t *addr
= xsrc
->esb_mmap
+ xive_source_esb_page(xsrc
, srcno
);
272 uint64_t kvmppc_xive_esb_rw(XiveSource
*xsrc
, int srcno
, uint32_t offset
,
273 uint64_t data
, bool write
)
276 return xive_esb_rw(xsrc
, srcno
, offset
, data
, 1);
280 * Special Load EOI handling for LSI sources. Q bit is never set
281 * and the interrupt should be re-triggered if the level is still
284 if (xive_source_irq_is_lsi(xsrc
, srcno
) &&
285 offset
== XIVE_ESB_LOAD_EOI
) {
286 xive_esb_read(xsrc
, srcno
, XIVE_ESB_SET_PQ_00
);
287 if (xsrc
->status
[srcno
] & XIVE_STATUS_ASSERTED
) {
288 xive_esb_trigger(xsrc
, srcno
);
292 return xive_esb_rw(xsrc
, srcno
, offset
, 0, 0);
296 static void kvmppc_xive_source_get_state(XiveSource
*xsrc
)
300 for (i
= 0; i
< xsrc
->nr_irqs
; i
++) {
301 /* Perform a load without side effect to retrieve the PQ bits */
302 uint8_t pq
= xive_esb_read(xsrc
, i
, XIVE_ESB_GET
);
304 /* and save PQ locally */
305 xive_source_esb_set(xsrc
, i
, pq
);
309 void kvmppc_xive_source_set_irq(void *opaque
, int srcno
, int val
)
311 XiveSource
*xsrc
= opaque
;
312 struct kvm_irq_level args
;
316 if (!xive_source_irq_is_lsi(xsrc
, srcno
)) {
320 args
.level
= KVM_INTERRUPT_SET
;
323 xsrc
->status
[srcno
] |= XIVE_STATUS_ASSERTED
;
324 args
.level
= KVM_INTERRUPT_SET_LEVEL
;
326 xsrc
->status
[srcno
] &= ~XIVE_STATUS_ASSERTED
;
327 args
.level
= KVM_INTERRUPT_UNSET
;
330 rc
= kvm_vm_ioctl(kvm_state
, KVM_IRQ_LINE
, &args
);
332 error_report("XIVE: kvm_irq_line() failed : %s", strerror(errno
));
337 * sPAPR XIVE interrupt controller (KVM)
339 void kvmppc_xive_get_queue_config(SpaprXive
*xive
, uint8_t end_blk
,
340 uint32_t end_idx
, XiveEND
*end
,
343 struct kvm_ppc_xive_eq kvm_eq
= { 0 };
347 Error
*local_err
= NULL
;
349 assert(xive_end_is_valid(end
));
351 /* Encode the tuple (server, prio) as a KVM EQ index */
352 spapr_xive_end_to_target(end_blk
, end_idx
, &server
, &priority
);
354 kvm_eq_idx
= priority
<< KVM_XIVE_EQ_PRIORITY_SHIFT
&
355 KVM_XIVE_EQ_PRIORITY_MASK
;
356 kvm_eq_idx
|= server
<< KVM_XIVE_EQ_SERVER_SHIFT
&
357 KVM_XIVE_EQ_SERVER_MASK
;
359 kvm_device_access(xive
->fd
, KVM_DEV_XIVE_GRP_EQ_CONFIG
, kvm_eq_idx
,
360 &kvm_eq
, false, &local_err
);
362 error_propagate(errp
, local_err
);
367 * The EQ index and toggle bit are updated by HW. These are the
368 * only fields from KVM we want to update QEMU with. The other END
369 * fields should already be in the QEMU END table.
371 end
->w1
= xive_set_field32(END_W1_GENERATION
, 0ul, kvm_eq
.qtoggle
) |
372 xive_set_field32(END_W1_PAGE_OFF
, 0ul, kvm_eq
.qindex
);
375 void kvmppc_xive_set_queue_config(SpaprXive
*xive
, uint8_t end_blk
,
376 uint32_t end_idx
, XiveEND
*end
,
379 struct kvm_ppc_xive_eq kvm_eq
= { 0 };
383 Error
*local_err
= NULL
;
386 * Build the KVM state from the local END structure.
390 if (xive_get_field32(END_W0_UCOND_NOTIFY
, end
->w0
)) {
391 kvm_eq
.flags
|= KVM_XIVE_EQ_ALWAYS_NOTIFY
;
395 * If the hcall is disabling the EQ, set the size and page address
396 * to zero. When migrating, only valid ENDs are taken into
399 if (xive_end_is_valid(end
)) {
400 kvm_eq
.qshift
= xive_get_field32(END_W0_QSIZE
, end
->w0
) + 12;
401 kvm_eq
.qaddr
= xive_end_qaddr(end
);
403 * The EQ toggle bit and index should only be relevant when
404 * restoring the EQ state
406 kvm_eq
.qtoggle
= xive_get_field32(END_W1_GENERATION
, end
->w1
);
407 kvm_eq
.qindex
= xive_get_field32(END_W1_PAGE_OFF
, end
->w1
);
413 /* Encode the tuple (server, prio) as a KVM EQ index */
414 spapr_xive_end_to_target(end_blk
, end_idx
, &server
, &priority
);
416 kvm_eq_idx
= priority
<< KVM_XIVE_EQ_PRIORITY_SHIFT
&
417 KVM_XIVE_EQ_PRIORITY_MASK
;
418 kvm_eq_idx
|= server
<< KVM_XIVE_EQ_SERVER_SHIFT
&
419 KVM_XIVE_EQ_SERVER_MASK
;
421 kvm_device_access(xive
->fd
, KVM_DEV_XIVE_GRP_EQ_CONFIG
, kvm_eq_idx
,
422 &kvm_eq
, true, &local_err
);
424 error_propagate(errp
, local_err
);
429 void kvmppc_xive_reset(SpaprXive
*xive
, Error
**errp
)
431 kvm_device_access(xive
->fd
, KVM_DEV_XIVE_GRP_CTRL
, KVM_DEV_XIVE_RESET
,
435 static void kvmppc_xive_get_queues(SpaprXive
*xive
, Error
**errp
)
437 Error
*local_err
= NULL
;
440 for (i
= 0; i
< xive
->nr_ends
; i
++) {
441 if (!xive_end_is_valid(&xive
->endt
[i
])) {
445 kvmppc_xive_get_queue_config(xive
, SPAPR_XIVE_BLOCK_ID
, i
,
446 &xive
->endt
[i
], &local_err
);
448 error_propagate(errp
, local_err
);
455 * The primary goal of the XIVE VM change handler is to mark the EQ
456 * pages dirty when all XIVE event notifications have stopped.
458 * Whenever the VM is stopped, the VM change handler sets the source
459 * PQs to PENDING to stop the flow of events and to possibly catch a
460 * triggered interrupt occuring while the VM is stopped. The previous
461 * state is saved in anticipation of a migration. The XIVE controller
462 * is then synced through KVM to flush any in-flight event
463 * notification and stabilize the EQs.
465 * At this stage, we can mark the EQ page dirty and let a migration
466 * sequence transfer the EQ pages to the destination, which is done
467 * just after the stop state.
469 * The previous configuration of the sources is restored when the VM
470 * runs again. If an interrupt was queued while the VM was stopped,
471 * simply generate a trigger.
473 static void kvmppc_xive_change_state_handler(void *opaque
, int running
,
476 SpaprXive
*xive
= opaque
;
477 XiveSource
*xsrc
= &xive
->source
;
478 Error
*local_err
= NULL
;
482 * Restore the sources to their initial state. This is called when
483 * the VM resumes after a stop or a migration.
486 for (i
= 0; i
< xsrc
->nr_irqs
; i
++) {
487 uint8_t pq
= xive_source_esb_get(xsrc
, i
);
490 old_pq
= xive_esb_read(xsrc
, i
, XIVE_ESB_SET_PQ_00
+ (pq
<< 8));
493 * An interrupt was queued while the VM was stopped,
494 * generate a trigger.
496 if (pq
== XIVE_ESB_RESET
&& old_pq
== XIVE_ESB_QUEUED
) {
497 xive_esb_trigger(xsrc
, i
);
505 * Mask the sources, to stop the flow of event notifications, and
506 * save the PQs locally in the XiveSource object. The XiveSource
507 * state will be collected later on by its vmstate handler if a
508 * migration is in progress.
510 for (i
= 0; i
< xsrc
->nr_irqs
; i
++) {
511 uint8_t pq
= xive_esb_read(xsrc
, i
, XIVE_ESB_GET
);
514 * PQ is set to PENDING to possibly catch a triggered
515 * interrupt occuring while the VM is stopped (hotplug event
518 if (pq
!= XIVE_ESB_OFF
) {
519 pq
= xive_esb_read(xsrc
, i
, XIVE_ESB_SET_PQ_10
);
521 xive_source_esb_set(xsrc
, i
, pq
);
525 * Sync the XIVE controller in KVM, to flush in-flight event
526 * notification that should be enqueued in the EQs and mark the
527 * XIVE EQ pages dirty to collect all updates.
529 kvm_device_access(xive
->fd
, KVM_DEV_XIVE_GRP_CTRL
,
530 KVM_DEV_XIVE_EQ_SYNC
, NULL
, true, &local_err
);
532 error_report_err(local_err
);
537 void kvmppc_xive_synchronize_state(SpaprXive
*xive
, Error
**errp
)
540 * When the VM is stopped, the sources are masked and the previous
541 * state is saved in anticipation of a migration. We should not
542 * synchronize the source state in that case else we will override
545 if (runstate_is_running()) {
546 kvmppc_xive_source_get_state(&xive
->source
);
549 /* EAT: there is no extra state to query from KVM */
552 kvmppc_xive_get_queues(xive
, errp
);
556 * The SpaprXive 'pre_save' method is called by the vmstate handler of
557 * the SpaprXive model, after the XIVE controller is synced in the VM
560 int kvmppc_xive_pre_save(SpaprXive
*xive
)
562 Error
*local_err
= NULL
;
564 /* EAT: there is no extra state to query from KVM */
567 kvmppc_xive_get_queues(xive
, &local_err
);
569 error_report_err(local_err
);
577 * The SpaprXive 'post_load' method is not called by a vmstate
578 * handler. It is called at the sPAPR machine level at the end of the
579 * migration sequence by the sPAPR IRQ backend 'post_load' method,
580 * when all XIVE states have been transferred and loaded.
582 int kvmppc_xive_post_load(SpaprXive
*xive
, int version_id
)
584 Error
*local_err
= NULL
;
588 /* Restore the ENDT first. The targetting depends on it. */
589 for (i
= 0; i
< xive
->nr_ends
; i
++) {
590 if (!xive_end_is_valid(&xive
->endt
[i
])) {
594 kvmppc_xive_set_queue_config(xive
, SPAPR_XIVE_BLOCK_ID
, i
,
595 &xive
->endt
[i
], &local_err
);
597 error_report_err(local_err
);
602 /* Restore the EAT */
603 for (i
= 0; i
< xive
->nr_irqs
; i
++) {
604 if (!xive_eas_is_valid(&xive
->eat
[i
])) {
608 kvmppc_xive_set_source_config(xive
, i
, &xive
->eat
[i
], &local_err
);
610 error_report_err(local_err
);
615 /* Restore the thread interrupt contexts */
617 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
619 kvmppc_xive_cpu_set_state(spapr_cpu_state(cpu
)->tctx
, &local_err
);
621 error_report_err(local_err
);
626 /* The source states will be restored when the machine starts running */
630 static void *kvmppc_xive_mmap(SpaprXive
*xive
, int pgoff
, size_t len
,
634 uint32_t page_shift
= 16; /* TODO: fix page_shift */
636 addr
= mmap(NULL
, len
, PROT_WRITE
| PROT_READ
, MAP_SHARED
, xive
->fd
,
637 pgoff
<< page_shift
);
638 if (addr
== MAP_FAILED
) {
639 error_setg_errno(errp
, errno
, "XIVE: unable to set memory mapping");
647 * All the XIVE memory regions are now backed by mappings from the KVM
650 void kvmppc_xive_connect(SpaprXive
*xive
, Error
**errp
)
652 XiveSource
*xsrc
= &xive
->source
;
653 XiveENDSource
*end_xsrc
= &xive
->end_source
;
654 Error
*local_err
= NULL
;
655 size_t esb_len
= (1ull << xsrc
->esb_shift
) * xsrc
->nr_irqs
;
656 size_t tima_len
= 4ull << TM_SHIFT
;
658 if (!kvmppc_has_cap_xive()) {
659 error_setg(errp
, "IRQ_XIVE capability must be present for KVM");
663 /* First, create the KVM XIVE device */
664 xive
->fd
= kvm_create_device(kvm_state
, KVM_DEV_TYPE_XIVE
, false);
666 error_setg_errno(errp
, -xive
->fd
, "XIVE: error creating KVM device");
671 * 1. Source ESB pages - KVM mapping
673 xsrc
->esb_mmap
= kvmppc_xive_mmap(xive
, KVM_XIVE_ESB_PAGE_OFFSET
, esb_len
,
676 error_propagate(errp
, local_err
);
680 memory_region_init_ram_device_ptr(&xsrc
->esb_mmio
, OBJECT(xsrc
),
681 "xive.esb", esb_len
, xsrc
->esb_mmap
);
682 sysbus_init_mmio(SYS_BUS_DEVICE(xive
), &xsrc
->esb_mmio
);
685 * 2. END ESB pages (No KVM support yet)
687 sysbus_init_mmio(SYS_BUS_DEVICE(xive
), &end_xsrc
->esb_mmio
);
690 * 3. TIMA pages - KVM mapping
692 xive
->tm_mmap
= kvmppc_xive_mmap(xive
, KVM_XIVE_TIMA_PAGE_OFFSET
, tima_len
,
695 error_propagate(errp
, local_err
);
698 memory_region_init_ram_device_ptr(&xive
->tm_mmio
, OBJECT(xive
),
699 "xive.tima", tima_len
, xive
->tm_mmap
);
700 sysbus_init_mmio(SYS_BUS_DEVICE(xive
), &xive
->tm_mmio
);
702 xive
->change
= qemu_add_vm_change_state_handler(
703 kvmppc_xive_change_state_handler
, xive
);
705 kvm_kernel_irqchip
= true;
706 kvm_msi_via_irqfd_allowed
= true;
707 kvm_gsi_direct_mapping
= true;
709 /* Map all regions */
710 spapr_xive_map_mmio(xive
);