hw/misc/iotkit-sysctl: Implement dummy version of SSE-300 PWRCTRL register
[qemu/ar7.git] / accel / tcg / cpu-exec.c
blob16e4fe3ccd87e6e8c66d2e45441742b428392577
1 /*
2 * emulator main execution loop
4 * Copyright (c) 2003-2005 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2.1 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 #include "qemu/osdep.h"
21 #include "qemu-common.h"
22 #include "qemu/qemu-print.h"
23 #include "cpu.h"
24 #include "hw/core/tcg-cpu-ops.h"
25 #include "trace.h"
26 #include "disas/disas.h"
27 #include "exec/exec-all.h"
28 #include "tcg/tcg.h"
29 #include "qemu/atomic.h"
30 #include "qemu/compiler.h"
31 #include "sysemu/qtest.h"
32 #include "qemu/timer.h"
33 #include "qemu/rcu.h"
34 #include "exec/tb-hash.h"
35 #include "exec/tb-lookup.h"
36 #include "exec/log.h"
37 #include "qemu/main-loop.h"
38 #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
39 #include "hw/i386/apic.h"
40 #endif
41 #include "sysemu/cpus.h"
42 #include "exec/cpu-all.h"
43 #include "sysemu/cpu-timers.h"
44 #include "sysemu/replay.h"
45 #include "internal.h"
47 /* -icount align implementation. */
49 typedef struct SyncClocks {
50 int64_t diff_clk;
51 int64_t last_cpu_icount;
52 int64_t realtime_clock;
53 } SyncClocks;
55 #if !defined(CONFIG_USER_ONLY)
56 /* Allow the guest to have a max 3ms advance.
57 * The difference between the 2 clocks could therefore
58 * oscillate around 0.
60 #define VM_CLOCK_ADVANCE 3000000
61 #define THRESHOLD_REDUCE 1.5
62 #define MAX_DELAY_PRINT_RATE 2000000000LL
63 #define MAX_NB_PRINTS 100
65 static int64_t max_delay;
66 static int64_t max_advance;
68 static void align_clocks(SyncClocks *sc, CPUState *cpu)
70 int64_t cpu_icount;
72 if (!icount_align_option) {
73 return;
76 cpu_icount = cpu->icount_extra + cpu_neg(cpu)->icount_decr.u16.low;
77 sc->diff_clk += icount_to_ns(sc->last_cpu_icount - cpu_icount);
78 sc->last_cpu_icount = cpu_icount;
80 if (sc->diff_clk > VM_CLOCK_ADVANCE) {
81 #ifndef _WIN32
82 struct timespec sleep_delay, rem_delay;
83 sleep_delay.tv_sec = sc->diff_clk / 1000000000LL;
84 sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL;
85 if (nanosleep(&sleep_delay, &rem_delay) < 0) {
86 sc->diff_clk = rem_delay.tv_sec * 1000000000LL + rem_delay.tv_nsec;
87 } else {
88 sc->diff_clk = 0;
90 #else
91 Sleep(sc->diff_clk / SCALE_MS);
92 sc->diff_clk = 0;
93 #endif
97 static void print_delay(const SyncClocks *sc)
99 static float threshold_delay;
100 static int64_t last_realtime_clock;
101 static int nb_prints;
103 if (icount_align_option &&
104 sc->realtime_clock - last_realtime_clock >= MAX_DELAY_PRINT_RATE &&
105 nb_prints < MAX_NB_PRINTS) {
106 if ((-sc->diff_clk / (float)1000000000LL > threshold_delay) ||
107 (-sc->diff_clk / (float)1000000000LL <
108 (threshold_delay - THRESHOLD_REDUCE))) {
109 threshold_delay = (-sc->diff_clk / 1000000000LL) + 1;
110 qemu_printf("Warning: The guest is now late by %.1f to %.1f seconds\n",
111 threshold_delay - 1,
112 threshold_delay);
113 nb_prints++;
114 last_realtime_clock = sc->realtime_clock;
119 static void init_delay_params(SyncClocks *sc, CPUState *cpu)
121 if (!icount_align_option) {
122 return;
124 sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT);
125 sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - sc->realtime_clock;
126 sc->last_cpu_icount
127 = cpu->icount_extra + cpu_neg(cpu)->icount_decr.u16.low;
128 if (sc->diff_clk < max_delay) {
129 max_delay = sc->diff_clk;
131 if (sc->diff_clk > max_advance) {
132 max_advance = sc->diff_clk;
135 /* Print every 2s max if the guest is late. We limit the number
136 of printed messages to NB_PRINT_MAX(currently 100) */
137 print_delay(sc);
139 #else
140 static void align_clocks(SyncClocks *sc, const CPUState *cpu)
144 static void init_delay_params(SyncClocks *sc, const CPUState *cpu)
147 #endif /* CONFIG USER ONLY */
149 /* Execute a TB, and fix up the CPU state afterwards if necessary */
151 * Disable CFI checks.
152 * TCG creates binary blobs at runtime, with the transformed code.
153 * A TB is a blob of binary code, created at runtime and called with an
154 * indirect function call. Since such function did not exist at compile time,
155 * the CFI runtime has no way to verify its signature and would fail.
156 * TCG is not considered a security-sensitive part of QEMU so this does not
157 * affect the impact of CFI in environment with high security requirements
159 static inline TranslationBlock * QEMU_DISABLE_CFI
160 cpu_tb_exec(CPUState *cpu, TranslationBlock *itb, int *tb_exit)
162 CPUArchState *env = cpu->env_ptr;
163 uintptr_t ret;
164 TranslationBlock *last_tb;
165 const void *tb_ptr = itb->tc.ptr;
167 qemu_log_mask_and_addr(CPU_LOG_EXEC, itb->pc,
168 "Trace %d: %p ["
169 TARGET_FMT_lx "/" TARGET_FMT_lx "/%#x] %s\n",
170 cpu->cpu_index, itb->tc.ptr,
171 itb->cs_base, itb->pc, itb->flags,
172 lookup_symbol(itb->pc));
174 #if defined(DEBUG_DISAS)
175 if (qemu_loglevel_mask(CPU_LOG_TB_CPU)
176 && qemu_log_in_addr_range(itb->pc)) {
177 FILE *logfile = qemu_log_lock();
178 int flags = 0;
179 if (qemu_loglevel_mask(CPU_LOG_TB_FPU)) {
180 flags |= CPU_DUMP_FPU;
182 #if defined(TARGET_I386)
183 flags |= CPU_DUMP_CCOP;
184 #endif
185 log_cpu_state(cpu, flags);
186 qemu_log_unlock(logfile);
188 #endif /* DEBUG_DISAS */
190 qemu_thread_jit_execute();
191 ret = tcg_qemu_tb_exec(env, tb_ptr);
192 cpu->can_do_io = 1;
194 * TODO: Delay swapping back to the read-write region of the TB
195 * until we actually need to modify the TB. The read-only copy,
196 * coming from the rx region, shares the same host TLB entry as
197 * the code that executed the exit_tb opcode that arrived here.
198 * If we insist on touching both the RX and the RW pages, we
199 * double the host TLB pressure.
201 last_tb = tcg_splitwx_to_rw((void *)(ret & ~TB_EXIT_MASK));
202 *tb_exit = ret & TB_EXIT_MASK;
204 trace_exec_tb_exit(last_tb, *tb_exit);
206 if (*tb_exit > TB_EXIT_IDX1) {
207 /* We didn't start executing this TB (eg because the instruction
208 * counter hit zero); we must restore the guest PC to the address
209 * of the start of the TB.
211 CPUClass *cc = CPU_GET_CLASS(cpu);
212 qemu_log_mask_and_addr(CPU_LOG_EXEC, last_tb->pc,
213 "Stopped execution of TB chain before %p ["
214 TARGET_FMT_lx "] %s\n",
215 last_tb->tc.ptr, last_tb->pc,
216 lookup_symbol(last_tb->pc));
217 if (cc->tcg_ops->synchronize_from_tb) {
218 cc->tcg_ops->synchronize_from_tb(cpu, last_tb);
219 } else {
220 assert(cc->set_pc);
221 cc->set_pc(cpu, last_tb->pc);
224 return last_tb;
228 static void cpu_exec_enter(CPUState *cpu)
230 CPUClass *cc = CPU_GET_CLASS(cpu);
232 if (cc->tcg_ops->cpu_exec_enter) {
233 cc->tcg_ops->cpu_exec_enter(cpu);
237 static void cpu_exec_exit(CPUState *cpu)
239 CPUClass *cc = CPU_GET_CLASS(cpu);
241 if (cc->tcg_ops->cpu_exec_exit) {
242 cc->tcg_ops->cpu_exec_exit(cpu);
246 void cpu_exec_step_atomic(CPUState *cpu)
248 TranslationBlock *tb;
249 target_ulong cs_base, pc;
250 uint32_t flags;
251 uint32_t cflags = 1;
252 uint32_t cf_mask = cflags & CF_HASH_MASK;
253 int tb_exit;
255 if (sigsetjmp(cpu->jmp_env, 0) == 0) {
256 start_exclusive();
257 g_assert(cpu == current_cpu);
258 g_assert(!cpu->running);
259 cpu->running = true;
261 tb = tb_lookup__cpu_state(cpu, &pc, &cs_base, &flags, cf_mask);
262 if (tb == NULL) {
263 mmap_lock();
264 tb = tb_gen_code(cpu, pc, cs_base, flags, cflags);
265 mmap_unlock();
268 /* Since we got here, we know that parallel_cpus must be true. */
269 parallel_cpus = false;
270 cpu_exec_enter(cpu);
271 /* execute the generated code */
272 trace_exec_tb(tb, pc);
273 cpu_tb_exec(cpu, tb, &tb_exit);
274 cpu_exec_exit(cpu);
275 } else {
277 * The mmap_lock is dropped by tb_gen_code if it runs out of
278 * memory.
280 #ifndef CONFIG_SOFTMMU
281 tcg_debug_assert(!have_mmap_lock());
282 #endif
283 if (qemu_mutex_iothread_locked()) {
284 qemu_mutex_unlock_iothread();
286 assert_no_pages_locked();
287 qemu_plugin_disable_mem_helpers(cpu);
292 * As we start the exclusive region before codegen we must still
293 * be in the region if we longjump out of either the codegen or
294 * the execution.
296 g_assert(cpu_in_exclusive_context(cpu));
297 parallel_cpus = true;
298 cpu->running = false;
299 end_exclusive();
302 struct tb_desc {
303 target_ulong pc;
304 target_ulong cs_base;
305 CPUArchState *env;
306 tb_page_addr_t phys_page1;
307 uint32_t flags;
308 uint32_t cf_mask;
309 uint32_t trace_vcpu_dstate;
312 static bool tb_lookup_cmp(const void *p, const void *d)
314 const TranslationBlock *tb = p;
315 const struct tb_desc *desc = d;
317 if (tb->pc == desc->pc &&
318 tb->page_addr[0] == desc->phys_page1 &&
319 tb->cs_base == desc->cs_base &&
320 tb->flags == desc->flags &&
321 tb->trace_vcpu_dstate == desc->trace_vcpu_dstate &&
322 (tb_cflags(tb) & (CF_HASH_MASK | CF_INVALID)) == desc->cf_mask) {
323 /* check next page if needed */
324 if (tb->page_addr[1] == -1) {
325 return true;
326 } else {
327 tb_page_addr_t phys_page2;
328 target_ulong virt_page2;
330 virt_page2 = (desc->pc & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE;
331 phys_page2 = get_page_addr_code(desc->env, virt_page2);
332 if (tb->page_addr[1] == phys_page2) {
333 return true;
337 return false;
340 TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc,
341 target_ulong cs_base, uint32_t flags,
342 uint32_t cf_mask)
344 tb_page_addr_t phys_pc;
345 struct tb_desc desc;
346 uint32_t h;
348 desc.env = (CPUArchState *)cpu->env_ptr;
349 desc.cs_base = cs_base;
350 desc.flags = flags;
351 desc.cf_mask = cf_mask;
352 desc.trace_vcpu_dstate = *cpu->trace_dstate;
353 desc.pc = pc;
354 phys_pc = get_page_addr_code(desc.env, pc);
355 if (phys_pc == -1) {
356 return NULL;
358 desc.phys_page1 = phys_pc & TARGET_PAGE_MASK;
359 h = tb_hash_func(phys_pc, pc, flags, cf_mask, *cpu->trace_dstate);
360 return qht_lookup_custom(&tb_ctx.htable, &desc, h, tb_lookup_cmp);
363 void tb_set_jmp_target(TranslationBlock *tb, int n, uintptr_t addr)
365 if (TCG_TARGET_HAS_direct_jump) {
366 uintptr_t offset = tb->jmp_target_arg[n];
367 uintptr_t tc_ptr = (uintptr_t)tb->tc.ptr;
368 uintptr_t jmp_rx = tc_ptr + offset;
369 uintptr_t jmp_rw = jmp_rx - tcg_splitwx_diff;
370 tb_target_set_jmp_target(tc_ptr, jmp_rx, jmp_rw, addr);
371 } else {
372 tb->jmp_target_arg[n] = addr;
376 static inline void tb_add_jump(TranslationBlock *tb, int n,
377 TranslationBlock *tb_next)
379 uintptr_t old;
381 qemu_thread_jit_write();
382 assert(n < ARRAY_SIZE(tb->jmp_list_next));
383 qemu_spin_lock(&tb_next->jmp_lock);
385 /* make sure the destination TB is valid */
386 if (tb_next->cflags & CF_INVALID) {
387 goto out_unlock_next;
389 /* Atomically claim the jump destination slot only if it was NULL */
390 old = qatomic_cmpxchg(&tb->jmp_dest[n], (uintptr_t)NULL,
391 (uintptr_t)tb_next);
392 if (old) {
393 goto out_unlock_next;
396 /* patch the native jump address */
397 tb_set_jmp_target(tb, n, (uintptr_t)tb_next->tc.ptr);
399 /* add in TB jmp list */
400 tb->jmp_list_next[n] = tb_next->jmp_list_head;
401 tb_next->jmp_list_head = (uintptr_t)tb | n;
403 qemu_spin_unlock(&tb_next->jmp_lock);
405 qemu_log_mask_and_addr(CPU_LOG_EXEC, tb->pc,
406 "Linking TBs %p [" TARGET_FMT_lx
407 "] index %d -> %p [" TARGET_FMT_lx "]\n",
408 tb->tc.ptr, tb->pc, n,
409 tb_next->tc.ptr, tb_next->pc);
410 return;
412 out_unlock_next:
413 qemu_spin_unlock(&tb_next->jmp_lock);
414 return;
417 static inline TranslationBlock *tb_find(CPUState *cpu,
418 TranslationBlock *last_tb,
419 int tb_exit, uint32_t cf_mask)
421 TranslationBlock *tb;
422 target_ulong cs_base, pc;
423 uint32_t flags;
425 tb = tb_lookup__cpu_state(cpu, &pc, &cs_base, &flags, cf_mask);
426 if (tb == NULL) {
427 mmap_lock();
428 tb = tb_gen_code(cpu, pc, cs_base, flags, cf_mask);
429 mmap_unlock();
430 /* We add the TB in the virtual pc hash table for the fast lookup */
431 qatomic_set(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)], tb);
433 #ifndef CONFIG_USER_ONLY
434 /* We don't take care of direct jumps when address mapping changes in
435 * system emulation. So it's not safe to make a direct jump to a TB
436 * spanning two pages because the mapping for the second page can change.
438 if (tb->page_addr[1] != -1) {
439 last_tb = NULL;
441 #endif
442 /* See if we can patch the calling TB. */
443 if (last_tb) {
444 tb_add_jump(last_tb, tb_exit, tb);
446 return tb;
449 static inline bool cpu_handle_halt(CPUState *cpu)
451 if (cpu->halted) {
452 #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
453 if (cpu->interrupt_request & CPU_INTERRUPT_POLL) {
454 X86CPU *x86_cpu = X86_CPU(cpu);
455 qemu_mutex_lock_iothread();
456 apic_poll_irq(x86_cpu->apic_state);
457 cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL);
458 qemu_mutex_unlock_iothread();
460 #endif
461 if (!cpu_has_work(cpu)) {
462 return true;
465 cpu->halted = 0;
468 return false;
471 static inline void cpu_handle_debug_exception(CPUState *cpu)
473 CPUClass *cc = CPU_GET_CLASS(cpu);
474 CPUWatchpoint *wp;
476 if (!cpu->watchpoint_hit) {
477 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
478 wp->flags &= ~BP_WATCHPOINT_HIT;
482 if (cc->tcg_ops->debug_excp_handler) {
483 cc->tcg_ops->debug_excp_handler(cpu);
487 static inline bool cpu_handle_exception(CPUState *cpu, int *ret)
489 if (cpu->exception_index < 0) {
490 #ifndef CONFIG_USER_ONLY
491 if (replay_has_exception()
492 && cpu_neg(cpu)->icount_decr.u16.low + cpu->icount_extra == 0) {
493 /* Execute just one insn to trigger exception pending in the log */
494 cpu->cflags_next_tb = (curr_cflags() & ~CF_USE_ICOUNT) | 1;
496 #endif
497 return false;
499 if (cpu->exception_index >= EXCP_INTERRUPT) {
500 /* exit request from the cpu execution loop */
501 *ret = cpu->exception_index;
502 if (*ret == EXCP_DEBUG) {
503 cpu_handle_debug_exception(cpu);
505 cpu->exception_index = -1;
506 return true;
507 } else {
508 #if defined(CONFIG_USER_ONLY)
509 /* if user mode only, we simulate a fake exception
510 which will be handled outside the cpu execution
511 loop */
512 #if defined(TARGET_I386)
513 CPUClass *cc = CPU_GET_CLASS(cpu);
514 cc->tcg_ops->do_interrupt(cpu);
515 #endif
516 *ret = cpu->exception_index;
517 cpu->exception_index = -1;
518 return true;
519 #else
520 if (replay_exception()) {
521 CPUClass *cc = CPU_GET_CLASS(cpu);
522 qemu_mutex_lock_iothread();
523 cc->tcg_ops->do_interrupt(cpu);
524 qemu_mutex_unlock_iothread();
525 cpu->exception_index = -1;
527 if (unlikely(cpu->singlestep_enabled)) {
529 * After processing the exception, ensure an EXCP_DEBUG is
530 * raised when single-stepping so that GDB doesn't miss the
531 * next instruction.
533 *ret = EXCP_DEBUG;
534 cpu_handle_debug_exception(cpu);
535 return true;
537 } else if (!replay_has_interrupt()) {
538 /* give a chance to iothread in replay mode */
539 *ret = EXCP_INTERRUPT;
540 return true;
542 #endif
545 return false;
549 * CPU_INTERRUPT_POLL is a virtual event which gets converted into a
550 * "real" interrupt event later. It does not need to be recorded for
551 * replay purposes.
553 static inline bool need_replay_interrupt(int interrupt_request)
555 #if defined(TARGET_I386)
556 return !(interrupt_request & CPU_INTERRUPT_POLL);
557 #else
558 return true;
559 #endif
562 static inline bool cpu_handle_interrupt(CPUState *cpu,
563 TranslationBlock **last_tb)
565 CPUClass *cc = CPU_GET_CLASS(cpu);
567 /* Clear the interrupt flag now since we're processing
568 * cpu->interrupt_request and cpu->exit_request.
569 * Ensure zeroing happens before reading cpu->exit_request or
570 * cpu->interrupt_request (see also smp_wmb in cpu_exit())
572 qatomic_mb_set(&cpu_neg(cpu)->icount_decr.u16.high, 0);
574 if (unlikely(qatomic_read(&cpu->interrupt_request))) {
575 int interrupt_request;
576 qemu_mutex_lock_iothread();
577 interrupt_request = cpu->interrupt_request;
578 if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) {
579 /* Mask out external interrupts for this step. */
580 interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK;
582 if (interrupt_request & CPU_INTERRUPT_DEBUG) {
583 cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG;
584 cpu->exception_index = EXCP_DEBUG;
585 qemu_mutex_unlock_iothread();
586 return true;
588 if (replay_mode == REPLAY_MODE_PLAY && !replay_has_interrupt()) {
589 /* Do nothing */
590 } else if (interrupt_request & CPU_INTERRUPT_HALT) {
591 replay_interrupt();
592 cpu->interrupt_request &= ~CPU_INTERRUPT_HALT;
593 cpu->halted = 1;
594 cpu->exception_index = EXCP_HLT;
595 qemu_mutex_unlock_iothread();
596 return true;
598 #if defined(TARGET_I386)
599 else if (interrupt_request & CPU_INTERRUPT_INIT) {
600 X86CPU *x86_cpu = X86_CPU(cpu);
601 CPUArchState *env = &x86_cpu->env;
602 replay_interrupt();
603 cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0, 0);
604 do_cpu_init(x86_cpu);
605 cpu->exception_index = EXCP_HALTED;
606 qemu_mutex_unlock_iothread();
607 return true;
609 #else
610 else if (interrupt_request & CPU_INTERRUPT_RESET) {
611 replay_interrupt();
612 cpu_reset(cpu);
613 qemu_mutex_unlock_iothread();
614 return true;
616 #endif
617 /* The target hook has 3 exit conditions:
618 False when the interrupt isn't processed,
619 True when it is, and we should restart on a new TB,
620 and via longjmp via cpu_loop_exit. */
621 else {
622 if (cc->tcg_ops->cpu_exec_interrupt &&
623 cc->tcg_ops->cpu_exec_interrupt(cpu, interrupt_request)) {
624 if (need_replay_interrupt(interrupt_request)) {
625 replay_interrupt();
628 * After processing the interrupt, ensure an EXCP_DEBUG is
629 * raised when single-stepping so that GDB doesn't miss the
630 * next instruction.
632 cpu->exception_index =
633 (cpu->singlestep_enabled ? EXCP_DEBUG : -1);
634 *last_tb = NULL;
636 /* The target hook may have updated the 'cpu->interrupt_request';
637 * reload the 'interrupt_request' value */
638 interrupt_request = cpu->interrupt_request;
640 if (interrupt_request & CPU_INTERRUPT_EXITTB) {
641 cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
642 /* ensure that no TB jump will be modified as
643 the program flow was changed */
644 *last_tb = NULL;
647 /* If we exit via cpu_loop_exit/longjmp it is reset in cpu_exec */
648 qemu_mutex_unlock_iothread();
651 /* Finally, check if we need to exit to the main loop. */
652 if (unlikely(qatomic_read(&cpu->exit_request))
653 || (icount_enabled()
654 && (cpu->cflags_next_tb == -1 || cpu->cflags_next_tb & CF_USE_ICOUNT)
655 && cpu_neg(cpu)->icount_decr.u16.low + cpu->icount_extra == 0)) {
656 qatomic_set(&cpu->exit_request, 0);
657 if (cpu->exception_index == -1) {
658 cpu->exception_index = EXCP_INTERRUPT;
660 return true;
663 return false;
666 static inline void cpu_loop_exec_tb(CPUState *cpu, TranslationBlock *tb,
667 TranslationBlock **last_tb, int *tb_exit)
669 int32_t insns_left;
671 trace_exec_tb(tb, tb->pc);
672 tb = cpu_tb_exec(cpu, tb, tb_exit);
673 if (*tb_exit != TB_EXIT_REQUESTED) {
674 *last_tb = tb;
675 return;
678 *last_tb = NULL;
679 insns_left = qatomic_read(&cpu_neg(cpu)->icount_decr.u32);
680 if (insns_left < 0) {
681 /* Something asked us to stop executing chained TBs; just
682 * continue round the main loop. Whatever requested the exit
683 * will also have set something else (eg exit_request or
684 * interrupt_request) which will be handled by
685 * cpu_handle_interrupt. cpu_handle_interrupt will also
686 * clear cpu->icount_decr.u16.high.
688 return;
691 /* Instruction counter expired. */
692 assert(icount_enabled());
693 #ifndef CONFIG_USER_ONLY
694 /* Ensure global icount has gone forward */
695 icount_update(cpu);
696 /* Refill decrementer and continue execution. */
697 insns_left = MIN(CF_COUNT_MASK, cpu->icount_budget);
698 cpu_neg(cpu)->icount_decr.u16.low = insns_left;
699 cpu->icount_extra = cpu->icount_budget - insns_left;
702 * If the next tb has more instructions than we have left to
703 * execute we need to ensure we find/generate a TB with exactly
704 * insns_left instructions in it.
706 if (!cpu->icount_extra && insns_left > 0 && insns_left < tb->icount) {
707 cpu->cflags_next_tb = (tb->cflags & ~CF_COUNT_MASK) | insns_left;
709 #endif
712 /* main execution loop */
714 int cpu_exec(CPUState *cpu)
716 CPUClass *cc = CPU_GET_CLASS(cpu);
717 int ret;
718 SyncClocks sc = { 0 };
720 /* replay_interrupt may need current_cpu */
721 current_cpu = cpu;
723 if (cpu_handle_halt(cpu)) {
724 return EXCP_HALTED;
727 rcu_read_lock();
729 cpu_exec_enter(cpu);
731 /* Calculate difference between guest clock and host clock.
732 * This delay includes the delay of the last cycle, so
733 * what we have to do is sleep until it is 0. As for the
734 * advance/delay we gain here, we try to fix it next time.
736 init_delay_params(&sc, cpu);
738 /* prepare setjmp context for exception handling */
739 if (sigsetjmp(cpu->jmp_env, 0) != 0) {
740 #if defined(__clang__)
742 * Some compilers wrongly smash all local variables after
743 * siglongjmp (the spec requires that only non-volatile locals
744 * which are changed between the sigsetjmp and siglongjmp are
745 * permitted to be trashed). There were bug reports for gcc
746 * 4.5.0 and clang. The bug is fixed in all versions of gcc
747 * that we support, but is still unfixed in clang:
748 * https://bugs.llvm.org/show_bug.cgi?id=21183
750 * Reload essential local variables here for those compilers.
751 * Newer versions of gcc would complain about this code (-Wclobbered),
752 * so we only perform the workaround for clang.
754 cpu = current_cpu;
755 cc = CPU_GET_CLASS(cpu);
756 #else
758 * Non-buggy compilers preserve these locals; assert that
759 * they have the correct value.
761 g_assert(cpu == current_cpu);
762 g_assert(cc == CPU_GET_CLASS(cpu));
763 #endif
765 #ifndef CONFIG_SOFTMMU
766 tcg_debug_assert(!have_mmap_lock());
767 #endif
768 if (qemu_mutex_iothread_locked()) {
769 qemu_mutex_unlock_iothread();
771 qemu_plugin_disable_mem_helpers(cpu);
773 assert_no_pages_locked();
776 /* if an exception is pending, we execute it here */
777 while (!cpu_handle_exception(cpu, &ret)) {
778 TranslationBlock *last_tb = NULL;
779 int tb_exit = 0;
781 while (!cpu_handle_interrupt(cpu, &last_tb)) {
782 uint32_t cflags = cpu->cflags_next_tb;
783 TranslationBlock *tb;
785 /* When requested, use an exact setting for cflags for the next
786 execution. This is used for icount, precise smc, and stop-
787 after-access watchpoints. Since this request should never
788 have CF_INVALID set, -1 is a convenient invalid value that
789 does not require tcg headers for cpu_common_reset. */
790 if (cflags == -1) {
791 cflags = curr_cflags();
792 } else {
793 cpu->cflags_next_tb = -1;
796 tb = tb_find(cpu, last_tb, tb_exit, cflags);
797 cpu_loop_exec_tb(cpu, tb, &last_tb, &tb_exit);
798 /* Try to align the host and virtual clocks
799 if the guest is in advance */
800 align_clocks(&sc, cpu);
804 cpu_exec_exit(cpu);
805 rcu_read_unlock();
807 return ret;
810 void tcg_exec_realizefn(CPUState *cpu, Error **errp)
812 static bool tcg_target_initialized;
813 CPUClass *cc = CPU_GET_CLASS(cpu);
815 if (!tcg_target_initialized) {
816 cc->tcg_ops->initialize();
817 tcg_target_initialized = true;
819 tlb_init(cpu);
820 qemu_plugin_vcpu_init_hook(cpu);
822 #ifndef CONFIG_USER_ONLY
823 tcg_iommu_init_notifier_list(cpu);
824 #endif /* !CONFIG_USER_ONLY */
827 /* undo the initializations in reverse order */
828 void tcg_exec_unrealizefn(CPUState *cpu)
830 #ifndef CONFIG_USER_ONLY
831 tcg_iommu_free_notifier_list(cpu);
832 #endif /* !CONFIG_USER_ONLY */
834 qemu_plugin_vcpu_exit_hook(cpu);
835 tlb_destroy(cpu);
838 #ifndef CONFIG_USER_ONLY
840 void dump_drift_info(void)
842 if (!icount_enabled()) {
843 return;
846 qemu_printf("Host - Guest clock %"PRIi64" ms\n",
847 (cpu_get_clock() - icount_get()) / SCALE_MS);
848 if (icount_align_option) {
849 qemu_printf("Max guest delay %"PRIi64" ms\n",
850 -max_delay / SCALE_MS);
851 qemu_printf("Max guest advance %"PRIi64" ms\n",
852 max_advance / SCALE_MS);
853 } else {
854 qemu_printf("Max guest delay NA\n");
855 qemu_printf("Max guest advance NA\n");
859 #endif /* !CONFIG_USER_ONLY */