2 * QEMU Floppy disk emulator (Intel 82078)
4 * Copyright (c) 2003, 2007 Jocelyn Mayer
5 * Copyright (c) 2008 Hervé Poussineau
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
26 * The controller is used in Sun4m systems in a slightly different
27 * way. There are changes in DOR register and DMA is not available.
30 #include "qemu/osdep.h"
32 #include "hw/block/fdc.h"
33 #include "qapi/error.h"
34 #include "qemu/error-report.h"
35 #include "qemu/timer.h"
36 #include "hw/isa/isa.h"
37 #include "hw/sysbus.h"
38 #include "sysemu/block-backend.h"
39 #include "sysemu/blockdev.h"
40 #include "sysemu/sysemu.h"
43 /********************************************************/
44 /* debug Floppy devices */
46 #define DEBUG_FLOPPY 0
48 #define FLOPPY_DPRINTF(fmt, ...) \
51 fprintf(stderr, "FLOPPY: " fmt , ## __VA_ARGS__); \
55 /********************************************************/
56 /* Floppy drive emulation */
58 typedef enum FDriveRate
{
59 FDRIVE_RATE_500K
= 0x00, /* 500 Kbps */
60 FDRIVE_RATE_300K
= 0x01, /* 300 Kbps */
61 FDRIVE_RATE_250K
= 0x02, /* 250 Kbps */
62 FDRIVE_RATE_1M
= 0x03, /* 1 Mbps */
65 typedef enum FDriveSize
{
71 typedef struct FDFormat
{
72 FloppyDriveType drive
;
79 /* In many cases, the total sector size of a format is enough to uniquely
80 * identify it. However, there are some total sector collisions between
81 * formats of different physical size, and these are noted below by
82 * highlighting the total sector size for entries with collisions. */
83 static const FDFormat fd_formats
[] = {
84 /* First entry is default format */
85 /* 1.44 MB 3"1/2 floppy disks */
86 { FLOPPY_DRIVE_TYPE_144
, 18, 80, 1, FDRIVE_RATE_500K
, }, /* 3.5" 2880 */
87 { FLOPPY_DRIVE_TYPE_144
, 20, 80, 1, FDRIVE_RATE_500K
, }, /* 3.5" 3200 */
88 { FLOPPY_DRIVE_TYPE_144
, 21, 80, 1, FDRIVE_RATE_500K
, },
89 { FLOPPY_DRIVE_TYPE_144
, 21, 82, 1, FDRIVE_RATE_500K
, },
90 { FLOPPY_DRIVE_TYPE_144
, 21, 83, 1, FDRIVE_RATE_500K
, },
91 { FLOPPY_DRIVE_TYPE_144
, 22, 80, 1, FDRIVE_RATE_500K
, },
92 { FLOPPY_DRIVE_TYPE_144
, 23, 80, 1, FDRIVE_RATE_500K
, },
93 { FLOPPY_DRIVE_TYPE_144
, 24, 80, 1, FDRIVE_RATE_500K
, },
94 /* 2.88 MB 3"1/2 floppy disks */
95 { FLOPPY_DRIVE_TYPE_288
, 36, 80, 1, FDRIVE_RATE_1M
, },
96 { FLOPPY_DRIVE_TYPE_288
, 39, 80, 1, FDRIVE_RATE_1M
, },
97 { FLOPPY_DRIVE_TYPE_288
, 40, 80, 1, FDRIVE_RATE_1M
, },
98 { FLOPPY_DRIVE_TYPE_288
, 44, 80, 1, FDRIVE_RATE_1M
, },
99 { FLOPPY_DRIVE_TYPE_288
, 48, 80, 1, FDRIVE_RATE_1M
, },
100 /* 720 kB 3"1/2 floppy disks */
101 { FLOPPY_DRIVE_TYPE_144
, 9, 80, 1, FDRIVE_RATE_250K
, }, /* 3.5" 1440 */
102 { FLOPPY_DRIVE_TYPE_144
, 10, 80, 1, FDRIVE_RATE_250K
, },
103 { FLOPPY_DRIVE_TYPE_144
, 10, 82, 1, FDRIVE_RATE_250K
, },
104 { FLOPPY_DRIVE_TYPE_144
, 10, 83, 1, FDRIVE_RATE_250K
, },
105 { FLOPPY_DRIVE_TYPE_144
, 13, 80, 1, FDRIVE_RATE_250K
, },
106 { FLOPPY_DRIVE_TYPE_144
, 14, 80, 1, FDRIVE_RATE_250K
, },
107 /* 1.2 MB 5"1/4 floppy disks */
108 { FLOPPY_DRIVE_TYPE_120
, 15, 80, 1, FDRIVE_RATE_500K
, },
109 { FLOPPY_DRIVE_TYPE_120
, 18, 80, 1, FDRIVE_RATE_500K
, }, /* 5.25" 2880 */
110 { FLOPPY_DRIVE_TYPE_120
, 18, 82, 1, FDRIVE_RATE_500K
, },
111 { FLOPPY_DRIVE_TYPE_120
, 18, 83, 1, FDRIVE_RATE_500K
, },
112 { FLOPPY_DRIVE_TYPE_120
, 20, 80, 1, FDRIVE_RATE_500K
, }, /* 5.25" 3200 */
113 /* 720 kB 5"1/4 floppy disks */
114 { FLOPPY_DRIVE_TYPE_120
, 9, 80, 1, FDRIVE_RATE_250K
, }, /* 5.25" 1440 */
115 { FLOPPY_DRIVE_TYPE_120
, 11, 80, 1, FDRIVE_RATE_250K
, },
116 /* 360 kB 5"1/4 floppy disks */
117 { FLOPPY_DRIVE_TYPE_120
, 9, 40, 1, FDRIVE_RATE_300K
, }, /* 5.25" 720 */
118 { FLOPPY_DRIVE_TYPE_120
, 9, 40, 0, FDRIVE_RATE_300K
, },
119 { FLOPPY_DRIVE_TYPE_120
, 10, 41, 1, FDRIVE_RATE_300K
, },
120 { FLOPPY_DRIVE_TYPE_120
, 10, 42, 1, FDRIVE_RATE_300K
, },
121 /* 320 kB 5"1/4 floppy disks */
122 { FLOPPY_DRIVE_TYPE_120
, 8, 40, 1, FDRIVE_RATE_250K
, },
123 { FLOPPY_DRIVE_TYPE_120
, 8, 40, 0, FDRIVE_RATE_250K
, },
124 /* 360 kB must match 5"1/4 better than 3"1/2... */
125 { FLOPPY_DRIVE_TYPE_144
, 9, 80, 0, FDRIVE_RATE_250K
, }, /* 3.5" 720 */
127 { FLOPPY_DRIVE_TYPE_NONE
, -1, -1, 0, 0, },
130 static FDriveSize
drive_size(FloppyDriveType drive
)
133 case FLOPPY_DRIVE_TYPE_120
:
134 return FDRIVE_SIZE_525
;
135 case FLOPPY_DRIVE_TYPE_144
:
136 case FLOPPY_DRIVE_TYPE_288
:
137 return FDRIVE_SIZE_350
;
139 return FDRIVE_SIZE_UNKNOWN
;
143 #define GET_CUR_DRV(fdctrl) ((fdctrl)->cur_drv)
144 #define SET_CUR_DRV(fdctrl, drive) ((fdctrl)->cur_drv = (drive))
146 /* Will always be a fixed parameter for us */
147 #define FD_SECTOR_LEN 512
148 #define FD_SECTOR_SC 2 /* Sector size code */
149 #define FD_RESET_SENSEI_COUNT 4 /* Number of sense interrupts on RESET */
151 typedef struct FDCtrl FDCtrl
;
153 /* Floppy disk drive emulation */
154 typedef enum FDiskFlags
{
155 FDISK_DBL_SIDES
= 0x01,
158 typedef struct FDrive
{
162 FloppyDriveType drive
; /* CMOS drive type */
163 uint8_t perpendicular
; /* 2.88 MB access mode */
169 FloppyDriveType disk
; /* Current disk type */
171 uint8_t last_sect
; /* Nb sector per track */
172 uint8_t max_track
; /* Nb of tracks */
173 uint16_t bps
; /* Bytes per sector */
174 uint8_t ro
; /* Is read-only */
175 uint8_t media_changed
; /* Is media changed */
176 uint8_t media_rate
; /* Data rate of medium */
178 bool media_validated
; /* Have we validated the media? */
182 static FloppyDriveType
get_fallback_drive_type(FDrive
*drv
);
184 /* Hack: FD_SEEK is expected to work on empty drives. However, QEMU
185 * currently goes through some pains to keep seeks within the bounds
186 * established by last_sect and max_track. Correcting this is difficult,
187 * as refactoring FDC code tends to expose nasty bugs in the Linux kernel.
189 * For now: allow empty drives to have large bounds so we can seek around,
190 * with the understanding that when a diskette is inserted, the bounds will
191 * properly tighten to match the geometry of that inserted medium.
193 static void fd_empty_seek_hack(FDrive
*drv
)
195 drv
->last_sect
= 0xFF;
196 drv
->max_track
= 0xFF;
199 static void fd_init(FDrive
*drv
)
202 drv
->perpendicular
= 0;
204 drv
->disk
= FLOPPY_DRIVE_TYPE_NONE
;
208 drv
->media_changed
= 1;
211 #define NUM_SIDES(drv) ((drv)->flags & FDISK_DBL_SIDES ? 2 : 1)
213 static int fd_sector_calc(uint8_t head
, uint8_t track
, uint8_t sect
,
214 uint8_t last_sect
, uint8_t num_sides
)
216 return (((track
* num_sides
) + head
) * last_sect
) + sect
- 1;
219 /* Returns current position, in sectors, for given drive */
220 static int fd_sector(FDrive
*drv
)
222 return fd_sector_calc(drv
->head
, drv
->track
, drv
->sect
, drv
->last_sect
,
226 /* Returns current position, in bytes, for given drive */
227 static int fd_offset(FDrive
*drv
)
229 g_assert(fd_sector(drv
) < INT_MAX
>> BDRV_SECTOR_BITS
);
230 return fd_sector(drv
) << BDRV_SECTOR_BITS
;
233 /* Seek to a new position:
234 * returns 0 if already on right track
235 * returns 1 if track changed
236 * returns 2 if track is invalid
237 * returns 3 if sector is invalid
238 * returns 4 if seek is disabled
240 static int fd_seek(FDrive
*drv
, uint8_t head
, uint8_t track
, uint8_t sect
,
246 if (track
> drv
->max_track
||
247 (head
!= 0 && (drv
->flags
& FDISK_DBL_SIDES
) == 0)) {
248 FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
249 head
, track
, sect
, 1,
250 (drv
->flags
& FDISK_DBL_SIDES
) == 0 ? 0 : 1,
251 drv
->max_track
, drv
->last_sect
);
254 if (sect
> drv
->last_sect
) {
255 FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
256 head
, track
, sect
, 1,
257 (drv
->flags
& FDISK_DBL_SIDES
) == 0 ? 0 : 1,
258 drv
->max_track
, drv
->last_sect
);
261 sector
= fd_sector_calc(head
, track
, sect
, drv
->last_sect
, NUM_SIDES(drv
));
263 if (sector
!= fd_sector(drv
)) {
266 FLOPPY_DPRINTF("error: no implicit seek %d %02x %02x"
267 " (max=%d %02x %02x)\n",
268 head
, track
, sect
, 1, drv
->max_track
,
274 if (drv
->track
!= track
) {
275 if (drv
->blk
!= NULL
&& blk_is_inserted(drv
->blk
)) {
276 drv
->media_changed
= 0;
284 if (drv
->blk
== NULL
|| !blk_is_inserted(drv
->blk
)) {
291 /* Set drive back to track 0 */
292 static void fd_recalibrate(FDrive
*drv
)
294 FLOPPY_DPRINTF("recalibrate\n");
295 fd_seek(drv
, 0, 0, 1, 1);
299 * Determine geometry based on inserted diskette.
300 * Will not operate on an empty drive.
302 * @return: 0 on success, -1 if the drive is empty.
304 static int pick_geometry(FDrive
*drv
)
306 BlockBackend
*blk
= drv
->blk
;
307 const FDFormat
*parse
;
308 uint64_t nb_sectors
, size
;
310 int match
, size_match
, type_match
;
311 bool magic
= drv
->drive
== FLOPPY_DRIVE_TYPE_AUTO
;
313 /* We can only pick a geometry if we have a diskette. */
314 if (!drv
->blk
|| !blk_is_inserted(drv
->blk
) ||
315 drv
->drive
== FLOPPY_DRIVE_TYPE_NONE
)
320 /* We need to determine the likely geometry of the inserted medium.
321 * In order of preference, we look for:
322 * (1) The same drive type and number of sectors,
323 * (2) The same diskette size and number of sectors,
324 * (3) The same drive type.
326 * In all cases, matches that occur higher in the drive table will take
327 * precedence over matches that occur later in the table.
329 blk_get_geometry(blk
, &nb_sectors
);
330 match
= size_match
= type_match
= -1;
332 parse
= &fd_formats
[i
];
333 if (parse
->drive
== FLOPPY_DRIVE_TYPE_NONE
) {
336 size
= (parse
->max_head
+ 1) * parse
->max_track
* parse
->last_sect
;
337 if (nb_sectors
== size
) {
338 if (magic
|| parse
->drive
== drv
->drive
) {
339 /* (1) perfect match -- nb_sectors and drive type */
341 } else if (drive_size(parse
->drive
) == drive_size(drv
->drive
)) {
342 /* (2) size match -- nb_sectors and physical medium size */
343 match
= (match
== -1) ? i
: match
;
345 /* This is suspicious -- Did the user misconfigure? */
346 size_match
= (size_match
== -1) ? i
: size_match
;
348 } else if (type_match
== -1) {
349 if ((parse
->drive
== drv
->drive
) ||
350 (magic
&& (parse
->drive
== get_fallback_drive_type(drv
)))) {
351 /* (3) type match -- nb_sectors mismatch, but matches the type
352 * specified explicitly by the user, or matches the fallback
353 * default type when using the drive autodetect mechanism */
359 /* No exact match found */
361 if (size_match
!= -1) {
362 parse
= &fd_formats
[size_match
];
363 FLOPPY_DPRINTF("User requested floppy drive type '%s', "
364 "but inserted medium appears to be a "
365 "%"PRId64
" sector '%s' type\n",
366 FloppyDriveType_lookup
[drv
->drive
],
368 FloppyDriveType_lookup
[parse
->drive
]);
373 /* No match of any kind found -- fd_format is misconfigured, abort. */
375 error_setg(&error_abort
, "No candidate geometries present in table "
376 " for floppy drive type '%s'",
377 FloppyDriveType_lookup
[drv
->drive
]);
380 parse
= &(fd_formats
[match
]);
383 if (parse
->max_head
== 0) {
384 drv
->flags
&= ~FDISK_DBL_SIDES
;
386 drv
->flags
|= FDISK_DBL_SIDES
;
388 drv
->max_track
= parse
->max_track
;
389 drv
->last_sect
= parse
->last_sect
;
390 drv
->disk
= parse
->drive
;
391 drv
->media_rate
= parse
->rate
;
395 static void pick_drive_type(FDrive
*drv
)
397 if (drv
->drive
!= FLOPPY_DRIVE_TYPE_AUTO
) {
401 if (pick_geometry(drv
) == 0) {
402 drv
->drive
= drv
->disk
;
404 drv
->drive
= get_fallback_drive_type(drv
);
407 g_assert(drv
->drive
!= FLOPPY_DRIVE_TYPE_AUTO
);
410 /* Revalidate a disk drive after a disk change */
411 static void fd_revalidate(FDrive
*drv
)
415 FLOPPY_DPRINTF("revalidate\n");
416 if (drv
->blk
!= NULL
) {
417 drv
->ro
= blk_is_read_only(drv
->blk
);
418 if (!blk_is_inserted(drv
->blk
)) {
419 FLOPPY_DPRINTF("No disk in drive\n");
420 drv
->disk
= FLOPPY_DRIVE_TYPE_NONE
;
421 fd_empty_seek_hack(drv
);
422 } else if (!drv
->media_validated
) {
423 rc
= pick_geometry(drv
);
425 FLOPPY_DPRINTF("Could not validate floppy drive media");
427 drv
->media_validated
= true;
428 FLOPPY_DPRINTF("Floppy disk (%d h %d t %d s) %s\n",
429 (drv
->flags
& FDISK_DBL_SIDES
) ? 2 : 1,
430 drv
->max_track
, drv
->last_sect
,
431 drv
->ro
? "ro" : "rw");
435 FLOPPY_DPRINTF("No drive connected\n");
438 drv
->flags
&= ~FDISK_DBL_SIDES
;
439 drv
->drive
= FLOPPY_DRIVE_TYPE_NONE
;
440 drv
->disk
= FLOPPY_DRIVE_TYPE_NONE
;
444 /********************************************************/
445 /* Intel 82078 floppy disk controller emulation */
447 static void fdctrl_reset(FDCtrl
*fdctrl
, int do_irq
);
448 static void fdctrl_to_command_phase(FDCtrl
*fdctrl
);
449 static int fdctrl_transfer_handler (void *opaque
, int nchan
,
450 int dma_pos
, int dma_len
);
451 static void fdctrl_raise_irq(FDCtrl
*fdctrl
);
452 static FDrive
*get_cur_drv(FDCtrl
*fdctrl
);
454 static uint32_t fdctrl_read_statusA(FDCtrl
*fdctrl
);
455 static uint32_t fdctrl_read_statusB(FDCtrl
*fdctrl
);
456 static uint32_t fdctrl_read_dor(FDCtrl
*fdctrl
);
457 static void fdctrl_write_dor(FDCtrl
*fdctrl
, uint32_t value
);
458 static uint32_t fdctrl_read_tape(FDCtrl
*fdctrl
);
459 static void fdctrl_write_tape(FDCtrl
*fdctrl
, uint32_t value
);
460 static uint32_t fdctrl_read_main_status(FDCtrl
*fdctrl
);
461 static void fdctrl_write_rate(FDCtrl
*fdctrl
, uint32_t value
);
462 static uint32_t fdctrl_read_data(FDCtrl
*fdctrl
);
463 static void fdctrl_write_data(FDCtrl
*fdctrl
, uint32_t value
);
464 static uint32_t fdctrl_read_dir(FDCtrl
*fdctrl
);
465 static void fdctrl_write_ccr(FDCtrl
*fdctrl
, uint32_t value
);
477 FD_STATE_MULTI
= 0x01, /* multi track flag */
478 FD_STATE_FORMAT
= 0x02, /* format flag */
494 FD_CMD_READ_TRACK
= 0x02,
495 FD_CMD_SPECIFY
= 0x03,
496 FD_CMD_SENSE_DRIVE_STATUS
= 0x04,
499 FD_CMD_RECALIBRATE
= 0x07,
500 FD_CMD_SENSE_INTERRUPT_STATUS
= 0x08,
501 FD_CMD_WRITE_DELETED
= 0x09,
502 FD_CMD_READ_ID
= 0x0a,
503 FD_CMD_READ_DELETED
= 0x0c,
504 FD_CMD_FORMAT_TRACK
= 0x0d,
505 FD_CMD_DUMPREG
= 0x0e,
507 FD_CMD_VERSION
= 0x10,
508 FD_CMD_SCAN_EQUAL
= 0x11,
509 FD_CMD_PERPENDICULAR_MODE
= 0x12,
510 FD_CMD_CONFIGURE
= 0x13,
512 FD_CMD_VERIFY
= 0x16,
513 FD_CMD_POWERDOWN_MODE
= 0x17,
514 FD_CMD_PART_ID
= 0x18,
515 FD_CMD_SCAN_LOW_OR_EQUAL
= 0x19,
516 FD_CMD_SCAN_HIGH_OR_EQUAL
= 0x1d,
518 FD_CMD_OPTION
= 0x33,
519 FD_CMD_RESTORE
= 0x4e,
520 FD_CMD_DRIVE_SPECIFICATION_COMMAND
= 0x8e,
521 FD_CMD_RELATIVE_SEEK_OUT
= 0x8f,
522 FD_CMD_FORMAT_AND_WRITE
= 0xcd,
523 FD_CMD_RELATIVE_SEEK_IN
= 0xcf,
527 FD_CONFIG_PRETRK
= 0xff, /* Pre-compensation set to track 0 */
528 FD_CONFIG_FIFOTHR
= 0x0f, /* FIFO threshold set to 1 byte */
529 FD_CONFIG_POLL
= 0x10, /* Poll enabled */
530 FD_CONFIG_EFIFO
= 0x20, /* FIFO disabled */
531 FD_CONFIG_EIS
= 0x40, /* No implied seeks */
540 FD_SR0_ABNTERM
= 0x40,
541 FD_SR0_INVCMD
= 0x80,
542 FD_SR0_RDYCHG
= 0xc0,
546 FD_SR1_MA
= 0x01, /* Missing address mark */
547 FD_SR1_NW
= 0x02, /* Not writable */
548 FD_SR1_EC
= 0x80, /* End of cylinder */
552 FD_SR2_SNS
= 0x04, /* Scan not satisfied */
553 FD_SR2_SEH
= 0x08, /* Scan equal hit */
564 FD_SRA_INTPEND
= 0x80,
578 FD_DOR_SELMASK
= 0x03,
580 FD_DOR_SELMASK
= 0x01,
582 FD_DOR_nRESET
= 0x04,
584 FD_DOR_MOTEN0
= 0x10,
585 FD_DOR_MOTEN1
= 0x20,
586 FD_DOR_MOTEN2
= 0x40,
587 FD_DOR_MOTEN3
= 0x80,
592 FD_TDR_BOOTSEL
= 0x0c,
594 FD_TDR_BOOTSEL
= 0x04,
599 FD_DSR_DRATEMASK
= 0x03,
600 FD_DSR_PWRDOWN
= 0x40,
601 FD_DSR_SWRESET
= 0x80,
605 FD_MSR_DRV0BUSY
= 0x01,
606 FD_MSR_DRV1BUSY
= 0x02,
607 FD_MSR_DRV2BUSY
= 0x04,
608 FD_MSR_DRV3BUSY
= 0x08,
609 FD_MSR_CMDBUSY
= 0x10,
610 FD_MSR_NONDMA
= 0x20,
616 FD_DIR_DSKCHG
= 0x80,
620 * See chapter 5.0 "Controller phases" of the spec:
623 * The host writes a command and its parameters into the FIFO. The command
624 * phase is completed when all parameters for the command have been supplied,
625 * and execution phase is entered.
628 * Data transfers, either DMA or non-DMA. For non-DMA transfers, the FIFO
629 * contains the payload now, otherwise it's unused. When all bytes of the
630 * required data have been transferred, the state is switched to either result
631 * phase (if the command produces status bytes) or directly back into the
632 * command phase for the next command.
635 * The host reads out the FIFO, which contains one or more result bytes now.
638 /* Only for migration: reconstruct phase from registers like qemu 2.3 */
639 FD_PHASE_RECONSTRUCT
= 0,
641 FD_PHASE_COMMAND
= 1,
642 FD_PHASE_EXECUTION
= 2,
646 #define FD_MULTI_TRACK(state) ((state) & FD_STATE_MULTI)
647 #define FD_FORMAT_CMD(state) ((state) & FD_STATE_FORMAT)
652 /* Controller state */
653 QEMUTimer
*result_timer
;
657 /* Controller's identification */
663 uint8_t dor_vmstate
; /* only used as temp during vmstate */
678 uint8_t eot
; /* last wanted sector */
679 /* States kept only to be returned back */
680 /* precompensation */
684 /* Power down config (also with status regB access mode */
687 uint8_t num_floppies
;
688 FDrive drives
[MAX_FD
];
690 uint32_t check_media_rate
;
691 FloppyDriveType fallback
; /* type=auto failure fallback */
695 PortioList portio_list
;
698 static FloppyDriveType
get_fallback_drive_type(FDrive
*drv
)
700 return drv
->fdctrl
->fallback
;
703 #define TYPE_SYSBUS_FDC "base-sysbus-fdc"
704 #define SYSBUS_FDC(obj) OBJECT_CHECK(FDCtrlSysBus, (obj), TYPE_SYSBUS_FDC)
706 typedef struct FDCtrlSysBus
{
708 SysBusDevice parent_obj
;
714 #define ISA_FDC(obj) OBJECT_CHECK(FDCtrlISABus, (obj), TYPE_ISA_FDC)
716 typedef struct FDCtrlISABus
{
717 ISADevice parent_obj
;
727 static uint32_t fdctrl_read (void *opaque
, uint32_t reg
)
729 FDCtrl
*fdctrl
= opaque
;
735 retval
= fdctrl_read_statusA(fdctrl
);
738 retval
= fdctrl_read_statusB(fdctrl
);
741 retval
= fdctrl_read_dor(fdctrl
);
744 retval
= fdctrl_read_tape(fdctrl
);
747 retval
= fdctrl_read_main_status(fdctrl
);
750 retval
= fdctrl_read_data(fdctrl
);
753 retval
= fdctrl_read_dir(fdctrl
);
756 retval
= (uint32_t)(-1);
759 FLOPPY_DPRINTF("read reg%d: 0x%02x\n", reg
& 7, retval
);
764 static void fdctrl_write (void *opaque
, uint32_t reg
, uint32_t value
)
766 FDCtrl
*fdctrl
= opaque
;
768 FLOPPY_DPRINTF("write reg%d: 0x%02x\n", reg
& 7, value
);
773 fdctrl_write_dor(fdctrl
, value
);
776 fdctrl_write_tape(fdctrl
, value
);
779 fdctrl_write_rate(fdctrl
, value
);
782 fdctrl_write_data(fdctrl
, value
);
785 fdctrl_write_ccr(fdctrl
, value
);
792 static uint64_t fdctrl_read_mem (void *opaque
, hwaddr reg
,
795 return fdctrl_read(opaque
, (uint32_t)reg
);
798 static void fdctrl_write_mem (void *opaque
, hwaddr reg
,
799 uint64_t value
, unsigned size
)
801 fdctrl_write(opaque
, (uint32_t)reg
, value
);
804 static const MemoryRegionOps fdctrl_mem_ops
= {
805 .read
= fdctrl_read_mem
,
806 .write
= fdctrl_write_mem
,
807 .endianness
= DEVICE_NATIVE_ENDIAN
,
810 static const MemoryRegionOps fdctrl_mem_strict_ops
= {
811 .read
= fdctrl_read_mem
,
812 .write
= fdctrl_write_mem
,
813 .endianness
= DEVICE_NATIVE_ENDIAN
,
815 .min_access_size
= 1,
816 .max_access_size
= 1,
820 static bool fdrive_media_changed_needed(void *opaque
)
822 FDrive
*drive
= opaque
;
824 return (drive
->blk
!= NULL
&& drive
->media_changed
!= 1);
827 static const VMStateDescription vmstate_fdrive_media_changed
= {
828 .name
= "fdrive/media_changed",
830 .minimum_version_id
= 1,
831 .needed
= fdrive_media_changed_needed
,
832 .fields
= (VMStateField
[]) {
833 VMSTATE_UINT8(media_changed
, FDrive
),
834 VMSTATE_END_OF_LIST()
838 static bool fdrive_media_rate_needed(void *opaque
)
840 FDrive
*drive
= opaque
;
842 return drive
->fdctrl
->check_media_rate
;
845 static const VMStateDescription vmstate_fdrive_media_rate
= {
846 .name
= "fdrive/media_rate",
848 .minimum_version_id
= 1,
849 .needed
= fdrive_media_rate_needed
,
850 .fields
= (VMStateField
[]) {
851 VMSTATE_UINT8(media_rate
, FDrive
),
852 VMSTATE_END_OF_LIST()
856 static bool fdrive_perpendicular_needed(void *opaque
)
858 FDrive
*drive
= opaque
;
860 return drive
->perpendicular
!= 0;
863 static const VMStateDescription vmstate_fdrive_perpendicular
= {
864 .name
= "fdrive/perpendicular",
866 .minimum_version_id
= 1,
867 .needed
= fdrive_perpendicular_needed
,
868 .fields
= (VMStateField
[]) {
869 VMSTATE_UINT8(perpendicular
, FDrive
),
870 VMSTATE_END_OF_LIST()
874 static int fdrive_post_load(void *opaque
, int version_id
)
876 fd_revalidate(opaque
);
880 static const VMStateDescription vmstate_fdrive
= {
883 .minimum_version_id
= 1,
884 .post_load
= fdrive_post_load
,
885 .fields
= (VMStateField
[]) {
886 VMSTATE_UINT8(head
, FDrive
),
887 VMSTATE_UINT8(track
, FDrive
),
888 VMSTATE_UINT8(sect
, FDrive
),
889 VMSTATE_END_OF_LIST()
891 .subsections
= (const VMStateDescription
*[]) {
892 &vmstate_fdrive_media_changed
,
893 &vmstate_fdrive_media_rate
,
894 &vmstate_fdrive_perpendicular
,
900 * Reconstructs the phase from register values according to the logic that was
901 * implemented in qemu 2.3. This is the default value that is used if the phase
902 * subsection is not present on migration.
904 * Don't change this function to reflect newer qemu versions, it is part of
907 static int reconstruct_phase(FDCtrl
*fdctrl
)
909 if (fdctrl
->msr
& FD_MSR_NONDMA
) {
910 return FD_PHASE_EXECUTION
;
911 } else if ((fdctrl
->msr
& FD_MSR_RQM
) == 0) {
912 /* qemu 2.3 disabled RQM only during DMA transfers */
913 return FD_PHASE_EXECUTION
;
914 } else if (fdctrl
->msr
& FD_MSR_DIO
) {
915 return FD_PHASE_RESULT
;
917 return FD_PHASE_COMMAND
;
921 static void fdc_pre_save(void *opaque
)
925 s
->dor_vmstate
= s
->dor
| GET_CUR_DRV(s
);
928 static int fdc_pre_load(void *opaque
)
931 s
->phase
= FD_PHASE_RECONSTRUCT
;
935 static int fdc_post_load(void *opaque
, int version_id
)
939 SET_CUR_DRV(s
, s
->dor_vmstate
& FD_DOR_SELMASK
);
940 s
->dor
= s
->dor_vmstate
& ~FD_DOR_SELMASK
;
942 if (s
->phase
== FD_PHASE_RECONSTRUCT
) {
943 s
->phase
= reconstruct_phase(s
);
949 static bool fdc_reset_sensei_needed(void *opaque
)
953 return s
->reset_sensei
!= 0;
956 static const VMStateDescription vmstate_fdc_reset_sensei
= {
957 .name
= "fdc/reset_sensei",
959 .minimum_version_id
= 1,
960 .needed
= fdc_reset_sensei_needed
,
961 .fields
= (VMStateField
[]) {
962 VMSTATE_INT32(reset_sensei
, FDCtrl
),
963 VMSTATE_END_OF_LIST()
967 static bool fdc_result_timer_needed(void *opaque
)
971 return timer_pending(s
->result_timer
);
974 static const VMStateDescription vmstate_fdc_result_timer
= {
975 .name
= "fdc/result_timer",
977 .minimum_version_id
= 1,
978 .needed
= fdc_result_timer_needed
,
979 .fields
= (VMStateField
[]) {
980 VMSTATE_TIMER_PTR(result_timer
, FDCtrl
),
981 VMSTATE_END_OF_LIST()
985 static bool fdc_phase_needed(void *opaque
)
987 FDCtrl
*fdctrl
= opaque
;
989 return reconstruct_phase(fdctrl
) != fdctrl
->phase
;
992 static const VMStateDescription vmstate_fdc_phase
= {
995 .minimum_version_id
= 1,
996 .needed
= fdc_phase_needed
,
997 .fields
= (VMStateField
[]) {
998 VMSTATE_UINT8(phase
, FDCtrl
),
999 VMSTATE_END_OF_LIST()
1003 static const VMStateDescription vmstate_fdc
= {
1006 .minimum_version_id
= 2,
1007 .pre_save
= fdc_pre_save
,
1008 .pre_load
= fdc_pre_load
,
1009 .post_load
= fdc_post_load
,
1010 .fields
= (VMStateField
[]) {
1011 /* Controller State */
1012 VMSTATE_UINT8(sra
, FDCtrl
),
1013 VMSTATE_UINT8(srb
, FDCtrl
),
1014 VMSTATE_UINT8(dor_vmstate
, FDCtrl
),
1015 VMSTATE_UINT8(tdr
, FDCtrl
),
1016 VMSTATE_UINT8(dsr
, FDCtrl
),
1017 VMSTATE_UINT8(msr
, FDCtrl
),
1018 VMSTATE_UINT8(status0
, FDCtrl
),
1019 VMSTATE_UINT8(status1
, FDCtrl
),
1020 VMSTATE_UINT8(status2
, FDCtrl
),
1022 VMSTATE_VARRAY_INT32(fifo
, FDCtrl
, fifo_size
, 0, vmstate_info_uint8
,
1024 VMSTATE_UINT32(data_pos
, FDCtrl
),
1025 VMSTATE_UINT32(data_len
, FDCtrl
),
1026 VMSTATE_UINT8(data_state
, FDCtrl
),
1027 VMSTATE_UINT8(data_dir
, FDCtrl
),
1028 VMSTATE_UINT8(eot
, FDCtrl
),
1029 /* States kept only to be returned back */
1030 VMSTATE_UINT8(timer0
, FDCtrl
),
1031 VMSTATE_UINT8(timer1
, FDCtrl
),
1032 VMSTATE_UINT8(precomp_trk
, FDCtrl
),
1033 VMSTATE_UINT8(config
, FDCtrl
),
1034 VMSTATE_UINT8(lock
, FDCtrl
),
1035 VMSTATE_UINT8(pwrd
, FDCtrl
),
1036 VMSTATE_UINT8_EQUAL(num_floppies
, FDCtrl
),
1037 VMSTATE_STRUCT_ARRAY(drives
, FDCtrl
, MAX_FD
, 1,
1038 vmstate_fdrive
, FDrive
),
1039 VMSTATE_END_OF_LIST()
1041 .subsections
= (const VMStateDescription
*[]) {
1042 &vmstate_fdc_reset_sensei
,
1043 &vmstate_fdc_result_timer
,
1049 static void fdctrl_external_reset_sysbus(DeviceState
*d
)
1051 FDCtrlSysBus
*sys
= SYSBUS_FDC(d
);
1052 FDCtrl
*s
= &sys
->state
;
1057 static void fdctrl_external_reset_isa(DeviceState
*d
)
1059 FDCtrlISABus
*isa
= ISA_FDC(d
);
1060 FDCtrl
*s
= &isa
->state
;
1065 static void fdctrl_handle_tc(void *opaque
, int irq
, int level
)
1067 //FDCtrl *s = opaque;
1071 FLOPPY_DPRINTF("TC pulsed\n");
1075 /* Change IRQ state */
1076 static void fdctrl_reset_irq(FDCtrl
*fdctrl
)
1078 fdctrl
->status0
= 0;
1079 if (!(fdctrl
->sra
& FD_SRA_INTPEND
))
1081 FLOPPY_DPRINTF("Reset interrupt\n");
1082 qemu_set_irq(fdctrl
->irq
, 0);
1083 fdctrl
->sra
&= ~FD_SRA_INTPEND
;
1086 static void fdctrl_raise_irq(FDCtrl
*fdctrl
)
1088 if (!(fdctrl
->sra
& FD_SRA_INTPEND
)) {
1089 qemu_set_irq(fdctrl
->irq
, 1);
1090 fdctrl
->sra
|= FD_SRA_INTPEND
;
1093 fdctrl
->reset_sensei
= 0;
1094 FLOPPY_DPRINTF("Set interrupt status to 0x%02x\n", fdctrl
->status0
);
1097 /* Reset controller */
1098 static void fdctrl_reset(FDCtrl
*fdctrl
, int do_irq
)
1102 FLOPPY_DPRINTF("reset controller\n");
1103 fdctrl_reset_irq(fdctrl
);
1104 /* Initialise controller */
1107 if (!fdctrl
->drives
[1].blk
) {
1108 fdctrl
->sra
|= FD_SRA_nDRV2
;
1110 fdctrl
->cur_drv
= 0;
1111 fdctrl
->dor
= FD_DOR_nRESET
;
1112 fdctrl
->dor
|= (fdctrl
->dma_chann
!= -1) ? FD_DOR_DMAEN
: 0;
1113 fdctrl
->msr
= FD_MSR_RQM
;
1114 fdctrl
->reset_sensei
= 0;
1115 timer_del(fdctrl
->result_timer
);
1117 fdctrl
->data_pos
= 0;
1118 fdctrl
->data_len
= 0;
1119 fdctrl
->data_state
= 0;
1120 fdctrl
->data_dir
= FD_DIR_WRITE
;
1121 for (i
= 0; i
< MAX_FD
; i
++)
1122 fd_recalibrate(&fdctrl
->drives
[i
]);
1123 fdctrl_to_command_phase(fdctrl
);
1125 fdctrl
->status0
|= FD_SR0_RDYCHG
;
1126 fdctrl_raise_irq(fdctrl
);
1127 fdctrl
->reset_sensei
= FD_RESET_SENSEI_COUNT
;
1131 static inline FDrive
*drv0(FDCtrl
*fdctrl
)
1133 return &fdctrl
->drives
[(fdctrl
->tdr
& FD_TDR_BOOTSEL
) >> 2];
1136 static inline FDrive
*drv1(FDCtrl
*fdctrl
)
1138 if ((fdctrl
->tdr
& FD_TDR_BOOTSEL
) < (1 << 2))
1139 return &fdctrl
->drives
[1];
1141 return &fdctrl
->drives
[0];
1145 static inline FDrive
*drv2(FDCtrl
*fdctrl
)
1147 if ((fdctrl
->tdr
& FD_TDR_BOOTSEL
) < (2 << 2))
1148 return &fdctrl
->drives
[2];
1150 return &fdctrl
->drives
[1];
1153 static inline FDrive
*drv3(FDCtrl
*fdctrl
)
1155 if ((fdctrl
->tdr
& FD_TDR_BOOTSEL
) < (3 << 2))
1156 return &fdctrl
->drives
[3];
1158 return &fdctrl
->drives
[2];
1162 static FDrive
*get_cur_drv(FDCtrl
*fdctrl
)
1164 switch (fdctrl
->cur_drv
) {
1165 case 0: return drv0(fdctrl
);
1166 case 1: return drv1(fdctrl
);
1168 case 2: return drv2(fdctrl
);
1169 case 3: return drv3(fdctrl
);
1171 default: return NULL
;
1175 /* Status A register : 0x00 (read-only) */
1176 static uint32_t fdctrl_read_statusA(FDCtrl
*fdctrl
)
1178 uint32_t retval
= fdctrl
->sra
;
1180 FLOPPY_DPRINTF("status register A: 0x%02x\n", retval
);
1185 /* Status B register : 0x01 (read-only) */
1186 static uint32_t fdctrl_read_statusB(FDCtrl
*fdctrl
)
1188 uint32_t retval
= fdctrl
->srb
;
1190 FLOPPY_DPRINTF("status register B: 0x%02x\n", retval
);
1195 /* Digital output register : 0x02 */
1196 static uint32_t fdctrl_read_dor(FDCtrl
*fdctrl
)
1198 uint32_t retval
= fdctrl
->dor
;
1200 /* Selected drive */
1201 retval
|= fdctrl
->cur_drv
;
1202 FLOPPY_DPRINTF("digital output register: 0x%02x\n", retval
);
1207 static void fdctrl_write_dor(FDCtrl
*fdctrl
, uint32_t value
)
1209 FLOPPY_DPRINTF("digital output register set to 0x%02x\n", value
);
1212 if (value
& FD_DOR_MOTEN0
)
1213 fdctrl
->srb
|= FD_SRB_MTR0
;
1215 fdctrl
->srb
&= ~FD_SRB_MTR0
;
1216 if (value
& FD_DOR_MOTEN1
)
1217 fdctrl
->srb
|= FD_SRB_MTR1
;
1219 fdctrl
->srb
&= ~FD_SRB_MTR1
;
1223 fdctrl
->srb
|= FD_SRB_DR0
;
1225 fdctrl
->srb
&= ~FD_SRB_DR0
;
1228 if (!(value
& FD_DOR_nRESET
)) {
1229 if (fdctrl
->dor
& FD_DOR_nRESET
) {
1230 FLOPPY_DPRINTF("controller enter RESET state\n");
1233 if (!(fdctrl
->dor
& FD_DOR_nRESET
)) {
1234 FLOPPY_DPRINTF("controller out of RESET state\n");
1235 fdctrl_reset(fdctrl
, 1);
1236 fdctrl
->dsr
&= ~FD_DSR_PWRDOWN
;
1239 /* Selected drive */
1240 fdctrl
->cur_drv
= value
& FD_DOR_SELMASK
;
1242 fdctrl
->dor
= value
;
1245 /* Tape drive register : 0x03 */
1246 static uint32_t fdctrl_read_tape(FDCtrl
*fdctrl
)
1248 uint32_t retval
= fdctrl
->tdr
;
1250 FLOPPY_DPRINTF("tape drive register: 0x%02x\n", retval
);
1255 static void fdctrl_write_tape(FDCtrl
*fdctrl
, uint32_t value
)
1258 if (!(fdctrl
->dor
& FD_DOR_nRESET
)) {
1259 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1262 FLOPPY_DPRINTF("tape drive register set to 0x%02x\n", value
);
1263 /* Disk boot selection indicator */
1264 fdctrl
->tdr
= value
& FD_TDR_BOOTSEL
;
1265 /* Tape indicators: never allow */
1268 /* Main status register : 0x04 (read) */
1269 static uint32_t fdctrl_read_main_status(FDCtrl
*fdctrl
)
1271 uint32_t retval
= fdctrl
->msr
;
1273 fdctrl
->dsr
&= ~FD_DSR_PWRDOWN
;
1274 fdctrl
->dor
|= FD_DOR_nRESET
;
1276 FLOPPY_DPRINTF("main status register: 0x%02x\n", retval
);
1281 /* Data select rate register : 0x04 (write) */
1282 static void fdctrl_write_rate(FDCtrl
*fdctrl
, uint32_t value
)
1285 if (!(fdctrl
->dor
& FD_DOR_nRESET
)) {
1286 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1289 FLOPPY_DPRINTF("select rate register set to 0x%02x\n", value
);
1290 /* Reset: autoclear */
1291 if (value
& FD_DSR_SWRESET
) {
1292 fdctrl
->dor
&= ~FD_DOR_nRESET
;
1293 fdctrl_reset(fdctrl
, 1);
1294 fdctrl
->dor
|= FD_DOR_nRESET
;
1296 if (value
& FD_DSR_PWRDOWN
) {
1297 fdctrl_reset(fdctrl
, 1);
1299 fdctrl
->dsr
= value
;
1302 /* Configuration control register: 0x07 (write) */
1303 static void fdctrl_write_ccr(FDCtrl
*fdctrl
, uint32_t value
)
1306 if (!(fdctrl
->dor
& FD_DOR_nRESET
)) {
1307 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1310 FLOPPY_DPRINTF("configuration control register set to 0x%02x\n", value
);
1312 /* Only the rate selection bits used in AT mode, and we
1313 * store those in the DSR.
1315 fdctrl
->dsr
= (fdctrl
->dsr
& ~FD_DSR_DRATEMASK
) |
1316 (value
& FD_DSR_DRATEMASK
);
1319 static int fdctrl_media_changed(FDrive
*drv
)
1321 return drv
->media_changed
;
1324 /* Digital input register : 0x07 (read-only) */
1325 static uint32_t fdctrl_read_dir(FDCtrl
*fdctrl
)
1327 uint32_t retval
= 0;
1329 if (fdctrl_media_changed(get_cur_drv(fdctrl
))) {
1330 retval
|= FD_DIR_DSKCHG
;
1333 FLOPPY_DPRINTF("Floppy digital input register: 0x%02x\n", retval
);
1339 /* Clear the FIFO and update the state for receiving the next command */
1340 static void fdctrl_to_command_phase(FDCtrl
*fdctrl
)
1342 fdctrl
->phase
= FD_PHASE_COMMAND
;
1343 fdctrl
->data_dir
= FD_DIR_WRITE
;
1344 fdctrl
->data_pos
= 0;
1345 fdctrl
->data_len
= 1; /* Accept command byte, adjust for params later */
1346 fdctrl
->msr
&= ~(FD_MSR_CMDBUSY
| FD_MSR_DIO
);
1347 fdctrl
->msr
|= FD_MSR_RQM
;
1350 /* Update the state to allow the guest to read out the command status.
1351 * @fifo_len is the number of result bytes to be read out. */
1352 static void fdctrl_to_result_phase(FDCtrl
*fdctrl
, int fifo_len
)
1354 fdctrl
->phase
= FD_PHASE_RESULT
;
1355 fdctrl
->data_dir
= FD_DIR_READ
;
1356 fdctrl
->data_len
= fifo_len
;
1357 fdctrl
->data_pos
= 0;
1358 fdctrl
->msr
|= FD_MSR_CMDBUSY
| FD_MSR_RQM
| FD_MSR_DIO
;
1361 /* Set an error: unimplemented/unknown command */
1362 static void fdctrl_unimplemented(FDCtrl
*fdctrl
, int direction
)
1364 qemu_log_mask(LOG_UNIMP
, "fdc: unimplemented command 0x%02x\n",
1366 fdctrl
->fifo
[0] = FD_SR0_INVCMD
;
1367 fdctrl_to_result_phase(fdctrl
, 1);
1370 /* Seek to next sector
1371 * returns 0 when end of track reached (for DBL_SIDES on head 1)
1372 * otherwise returns 1
1374 static int fdctrl_seek_to_next_sect(FDCtrl
*fdctrl
, FDrive
*cur_drv
)
1376 FLOPPY_DPRINTF("seek to next sector (%d %02x %02x => %d)\n",
1377 cur_drv
->head
, cur_drv
->track
, cur_drv
->sect
,
1378 fd_sector(cur_drv
));
1379 /* XXX: cur_drv->sect >= cur_drv->last_sect should be an
1381 uint8_t new_head
= cur_drv
->head
;
1382 uint8_t new_track
= cur_drv
->track
;
1383 uint8_t new_sect
= cur_drv
->sect
;
1387 if (new_sect
>= cur_drv
->last_sect
||
1388 new_sect
== fdctrl
->eot
) {
1390 if (FD_MULTI_TRACK(fdctrl
->data_state
)) {
1391 if (new_head
== 0 &&
1392 (cur_drv
->flags
& FDISK_DBL_SIDES
) != 0) {
1397 fdctrl
->status0
|= FD_SR0_SEEK
;
1398 if ((cur_drv
->flags
& FDISK_DBL_SIDES
) == 0) {
1403 fdctrl
->status0
|= FD_SR0_SEEK
;
1408 FLOPPY_DPRINTF("seek to next track (%d %02x %02x => %d)\n",
1409 new_head
, new_track
, new_sect
, fd_sector(cur_drv
));
1414 fd_seek(cur_drv
, new_head
, new_track
, new_sect
, 1);
1418 /* Callback for transfer end (stop or abort) */
1419 static void fdctrl_stop_transfer(FDCtrl
*fdctrl
, uint8_t status0
,
1420 uint8_t status1
, uint8_t status2
)
1423 cur_drv
= get_cur_drv(fdctrl
);
1425 fdctrl
->status0
&= ~(FD_SR0_DS0
| FD_SR0_DS1
| FD_SR0_HEAD
);
1426 fdctrl
->status0
|= GET_CUR_DRV(fdctrl
);
1427 if (cur_drv
->head
) {
1428 fdctrl
->status0
|= FD_SR0_HEAD
;
1430 fdctrl
->status0
|= status0
;
1432 FLOPPY_DPRINTF("transfer status: %02x %02x %02x (%02x)\n",
1433 status0
, status1
, status2
, fdctrl
->status0
);
1434 fdctrl
->fifo
[0] = fdctrl
->status0
;
1435 fdctrl
->fifo
[1] = status1
;
1436 fdctrl
->fifo
[2] = status2
;
1437 fdctrl
->fifo
[3] = cur_drv
->track
;
1438 fdctrl
->fifo
[4] = cur_drv
->head
;
1439 fdctrl
->fifo
[5] = cur_drv
->sect
;
1440 fdctrl
->fifo
[6] = FD_SECTOR_SC
;
1441 fdctrl
->data_dir
= FD_DIR_READ
;
1442 if (!(fdctrl
->msr
& FD_MSR_NONDMA
)) {
1443 IsaDmaClass
*k
= ISADMA_GET_CLASS(fdctrl
->dma
);
1444 k
->release_DREQ(fdctrl
->dma
, fdctrl
->dma_chann
);
1446 fdctrl
->msr
|= FD_MSR_RQM
| FD_MSR_DIO
;
1447 fdctrl
->msr
&= ~FD_MSR_NONDMA
;
1449 fdctrl_to_result_phase(fdctrl
, 7);
1450 fdctrl_raise_irq(fdctrl
);
1453 /* Prepare a data transfer (either DMA or FIFO) */
1454 static void fdctrl_start_transfer(FDCtrl
*fdctrl
, int direction
)
1459 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
1460 cur_drv
= get_cur_drv(fdctrl
);
1461 kt
= fdctrl
->fifo
[2];
1462 kh
= fdctrl
->fifo
[3];
1463 ks
= fdctrl
->fifo
[4];
1464 FLOPPY_DPRINTF("Start transfer at %d %d %02x %02x (%d)\n",
1465 GET_CUR_DRV(fdctrl
), kh
, kt
, ks
,
1466 fd_sector_calc(kh
, kt
, ks
, cur_drv
->last_sect
,
1467 NUM_SIDES(cur_drv
)));
1468 switch (fd_seek(cur_drv
, kh
, kt
, ks
, fdctrl
->config
& FD_CONFIG_EIS
)) {
1471 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, 0x00, 0x00);
1472 fdctrl
->fifo
[3] = kt
;
1473 fdctrl
->fifo
[4] = kh
;
1474 fdctrl
->fifo
[5] = ks
;
1478 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, FD_SR1_EC
, 0x00);
1479 fdctrl
->fifo
[3] = kt
;
1480 fdctrl
->fifo
[4] = kh
;
1481 fdctrl
->fifo
[5] = ks
;
1484 /* No seek enabled */
1485 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, 0x00, 0x00);
1486 fdctrl
->fifo
[3] = kt
;
1487 fdctrl
->fifo
[4] = kh
;
1488 fdctrl
->fifo
[5] = ks
;
1491 fdctrl
->status0
|= FD_SR0_SEEK
;
1497 /* Check the data rate. If the programmed data rate does not match
1498 * the currently inserted medium, the operation has to fail. */
1499 if (fdctrl
->check_media_rate
&&
1500 (fdctrl
->dsr
& FD_DSR_DRATEMASK
) != cur_drv
->media_rate
) {
1501 FLOPPY_DPRINTF("data rate mismatch (fdc=%d, media=%d)\n",
1502 fdctrl
->dsr
& FD_DSR_DRATEMASK
, cur_drv
->media_rate
);
1503 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, FD_SR1_MA
, 0x00);
1504 fdctrl
->fifo
[3] = kt
;
1505 fdctrl
->fifo
[4] = kh
;
1506 fdctrl
->fifo
[5] = ks
;
1510 /* Set the FIFO state */
1511 fdctrl
->data_dir
= direction
;
1512 fdctrl
->data_pos
= 0;
1513 assert(fdctrl
->msr
& FD_MSR_CMDBUSY
);
1514 if (fdctrl
->fifo
[0] & 0x80)
1515 fdctrl
->data_state
|= FD_STATE_MULTI
;
1517 fdctrl
->data_state
&= ~FD_STATE_MULTI
;
1518 if (fdctrl
->fifo
[5] == 0) {
1519 fdctrl
->data_len
= fdctrl
->fifo
[8];
1522 fdctrl
->data_len
= 128 << (fdctrl
->fifo
[5] > 7 ? 7 : fdctrl
->fifo
[5]);
1523 tmp
= (fdctrl
->fifo
[6] - ks
+ 1);
1524 if (fdctrl
->fifo
[0] & 0x80)
1525 tmp
+= fdctrl
->fifo
[6];
1526 fdctrl
->data_len
*= tmp
;
1528 fdctrl
->eot
= fdctrl
->fifo
[6];
1529 if (fdctrl
->dor
& FD_DOR_DMAEN
) {
1530 IsaDmaTransferMode dma_mode
;
1531 IsaDmaClass
*k
= ISADMA_GET_CLASS(fdctrl
->dma
);
1533 /* DMA transfer are enabled. Check if DMA channel is well programmed */
1534 dma_mode
= k
->get_transfer_mode(fdctrl
->dma
, fdctrl
->dma_chann
);
1535 FLOPPY_DPRINTF("dma_mode=%d direction=%d (%d - %d)\n",
1536 dma_mode
, direction
,
1537 (128 << fdctrl
->fifo
[5]) *
1538 (cur_drv
->last_sect
- ks
+ 1), fdctrl
->data_len
);
1539 switch (direction
) {
1543 dma_mode_ok
= (dma_mode
== ISADMA_TRANSFER_VERIFY
);
1546 dma_mode_ok
= (dma_mode
== ISADMA_TRANSFER_WRITE
);
1549 dma_mode_ok
= (dma_mode
== ISADMA_TRANSFER_READ
);
1555 dma_mode_ok
= false;
1559 /* No access is allowed until DMA transfer has completed */
1560 fdctrl
->msr
&= ~FD_MSR_RQM
;
1561 if (direction
!= FD_DIR_VERIFY
) {
1562 /* Now, we just have to wait for the DMA controller to
1565 k
->hold_DREQ(fdctrl
->dma
, fdctrl
->dma_chann
);
1566 k
->schedule(fdctrl
->dma
);
1568 /* Start transfer */
1569 fdctrl_transfer_handler(fdctrl
, fdctrl
->dma_chann
, 0,
1574 FLOPPY_DPRINTF("bad dma_mode=%d direction=%d\n", dma_mode
,
1578 FLOPPY_DPRINTF("start non-DMA transfer\n");
1579 fdctrl
->msr
|= FD_MSR_NONDMA
| FD_MSR_RQM
;
1580 if (direction
!= FD_DIR_WRITE
)
1581 fdctrl
->msr
|= FD_MSR_DIO
;
1582 /* IO based transfer: calculate len */
1583 fdctrl_raise_irq(fdctrl
);
1586 /* Prepare a transfer of deleted data */
1587 static void fdctrl_start_transfer_del(FDCtrl
*fdctrl
, int direction
)
1589 qemu_log_mask(LOG_UNIMP
, "fdctrl_start_transfer_del() unimplemented\n");
1591 /* We don't handle deleted data,
1592 * so we don't return *ANYTHING*
1594 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
| FD_SR0_SEEK
, 0x00, 0x00);
1597 /* handlers for DMA transfers */
1598 static int fdctrl_transfer_handler (void *opaque
, int nchan
,
1599 int dma_pos
, int dma_len
)
1603 int len
, start_pos
, rel_pos
;
1604 uint8_t status0
= 0x00, status1
= 0x00, status2
= 0x00;
1608 if (fdctrl
->msr
& FD_MSR_RQM
) {
1609 FLOPPY_DPRINTF("Not in DMA transfer mode !\n");
1612 k
= ISADMA_GET_CLASS(fdctrl
->dma
);
1613 cur_drv
= get_cur_drv(fdctrl
);
1614 if (fdctrl
->data_dir
== FD_DIR_SCANE
|| fdctrl
->data_dir
== FD_DIR_SCANL
||
1615 fdctrl
->data_dir
== FD_DIR_SCANH
)
1616 status2
= FD_SR2_SNS
;
1617 if (dma_len
> fdctrl
->data_len
)
1618 dma_len
= fdctrl
->data_len
;
1619 if (cur_drv
->blk
== NULL
) {
1620 if (fdctrl
->data_dir
== FD_DIR_WRITE
)
1621 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
| FD_SR0_SEEK
, 0x00, 0x00);
1623 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, 0x00, 0x00);
1625 goto transfer_error
;
1627 rel_pos
= fdctrl
->data_pos
% FD_SECTOR_LEN
;
1628 for (start_pos
= fdctrl
->data_pos
; fdctrl
->data_pos
< dma_len
;) {
1629 len
= dma_len
- fdctrl
->data_pos
;
1630 if (len
+ rel_pos
> FD_SECTOR_LEN
)
1631 len
= FD_SECTOR_LEN
- rel_pos
;
1632 FLOPPY_DPRINTF("copy %d bytes (%d %d %d) %d pos %d %02x "
1633 "(%d-0x%08x 0x%08x)\n", len
, dma_len
, fdctrl
->data_pos
,
1634 fdctrl
->data_len
, GET_CUR_DRV(fdctrl
), cur_drv
->head
,
1635 cur_drv
->track
, cur_drv
->sect
, fd_sector(cur_drv
),
1636 fd_sector(cur_drv
) * FD_SECTOR_LEN
);
1637 if (fdctrl
->data_dir
!= FD_DIR_WRITE
||
1638 len
< FD_SECTOR_LEN
|| rel_pos
!= 0) {
1639 /* READ & SCAN commands and realign to a sector for WRITE */
1640 if (blk_pread(cur_drv
->blk
, fd_offset(cur_drv
),
1641 fdctrl
->fifo
, BDRV_SECTOR_SIZE
) < 0) {
1642 FLOPPY_DPRINTF("Floppy: error getting sector %d\n",
1643 fd_sector(cur_drv
));
1644 /* Sure, image size is too small... */
1645 memset(fdctrl
->fifo
, 0, FD_SECTOR_LEN
);
1648 switch (fdctrl
->data_dir
) {
1651 k
->write_memory(fdctrl
->dma
, nchan
, fdctrl
->fifo
+ rel_pos
,
1652 fdctrl
->data_pos
, len
);
1655 /* WRITE commands */
1657 /* Handle readonly medium early, no need to do DMA, touch the
1658 * LED or attempt any writes. A real floppy doesn't attempt
1659 * to write to readonly media either. */
1660 fdctrl_stop_transfer(fdctrl
,
1661 FD_SR0_ABNTERM
| FD_SR0_SEEK
, FD_SR1_NW
,
1663 goto transfer_error
;
1666 k
->read_memory(fdctrl
->dma
, nchan
, fdctrl
->fifo
+ rel_pos
,
1667 fdctrl
->data_pos
, len
);
1668 if (blk_pwrite(cur_drv
->blk
, fd_offset(cur_drv
),
1669 fdctrl
->fifo
, BDRV_SECTOR_SIZE
, 0) < 0) {
1670 FLOPPY_DPRINTF("error writing sector %d\n",
1671 fd_sector(cur_drv
));
1672 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
| FD_SR0_SEEK
, 0x00, 0x00);
1673 goto transfer_error
;
1677 /* VERIFY commands */
1682 uint8_t tmpbuf
[FD_SECTOR_LEN
];
1684 k
->read_memory(fdctrl
->dma
, nchan
, tmpbuf
, fdctrl
->data_pos
,
1686 ret
= memcmp(tmpbuf
, fdctrl
->fifo
+ rel_pos
, len
);
1688 status2
= FD_SR2_SEH
;
1691 if ((ret
< 0 && fdctrl
->data_dir
== FD_DIR_SCANL
) ||
1692 (ret
> 0 && fdctrl
->data_dir
== FD_DIR_SCANH
)) {
1699 fdctrl
->data_pos
+= len
;
1700 rel_pos
= fdctrl
->data_pos
% FD_SECTOR_LEN
;
1702 /* Seek to next sector */
1703 if (!fdctrl_seek_to_next_sect(fdctrl
, cur_drv
))
1708 len
= fdctrl
->data_pos
- start_pos
;
1709 FLOPPY_DPRINTF("end transfer %d %d %d\n",
1710 fdctrl
->data_pos
, len
, fdctrl
->data_len
);
1711 if (fdctrl
->data_dir
== FD_DIR_SCANE
||
1712 fdctrl
->data_dir
== FD_DIR_SCANL
||
1713 fdctrl
->data_dir
== FD_DIR_SCANH
)
1714 status2
= FD_SR2_SEH
;
1715 fdctrl
->data_len
-= len
;
1716 fdctrl_stop_transfer(fdctrl
, status0
, status1
, status2
);
1722 /* Data register : 0x05 */
1723 static uint32_t fdctrl_read_data(FDCtrl
*fdctrl
)
1726 uint32_t retval
= 0;
1729 cur_drv
= get_cur_drv(fdctrl
);
1730 fdctrl
->dsr
&= ~FD_DSR_PWRDOWN
;
1731 if (!(fdctrl
->msr
& FD_MSR_RQM
) || !(fdctrl
->msr
& FD_MSR_DIO
)) {
1732 FLOPPY_DPRINTF("error: controller not ready for reading\n");
1736 /* If data_len spans multiple sectors, the current position in the FIFO
1737 * wraps around while fdctrl->data_pos is the real position in the whole
1739 pos
= fdctrl
->data_pos
;
1740 pos
%= FD_SECTOR_LEN
;
1742 switch (fdctrl
->phase
) {
1743 case FD_PHASE_EXECUTION
:
1744 assert(fdctrl
->msr
& FD_MSR_NONDMA
);
1746 if (fdctrl
->data_pos
!= 0)
1747 if (!fdctrl_seek_to_next_sect(fdctrl
, cur_drv
)) {
1748 FLOPPY_DPRINTF("error seeking to next sector %d\n",
1749 fd_sector(cur_drv
));
1752 if (blk_pread(cur_drv
->blk
, fd_offset(cur_drv
), fdctrl
->fifo
,
1755 FLOPPY_DPRINTF("error getting sector %d\n",
1756 fd_sector(cur_drv
));
1757 /* Sure, image size is too small... */
1758 memset(fdctrl
->fifo
, 0, FD_SECTOR_LEN
);
1762 if (++fdctrl
->data_pos
== fdctrl
->data_len
) {
1763 fdctrl
->msr
&= ~FD_MSR_RQM
;
1764 fdctrl_stop_transfer(fdctrl
, 0x00, 0x00, 0x00);
1768 case FD_PHASE_RESULT
:
1769 assert(!(fdctrl
->msr
& FD_MSR_NONDMA
));
1770 if (++fdctrl
->data_pos
== fdctrl
->data_len
) {
1771 fdctrl
->msr
&= ~FD_MSR_RQM
;
1772 fdctrl_to_command_phase(fdctrl
);
1773 fdctrl_reset_irq(fdctrl
);
1777 case FD_PHASE_COMMAND
:
1782 retval
= fdctrl
->fifo
[pos
];
1783 FLOPPY_DPRINTF("data register: 0x%02x\n", retval
);
1788 static void fdctrl_format_sector(FDCtrl
*fdctrl
)
1793 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
1794 cur_drv
= get_cur_drv(fdctrl
);
1795 kt
= fdctrl
->fifo
[6];
1796 kh
= fdctrl
->fifo
[7];
1797 ks
= fdctrl
->fifo
[8];
1798 FLOPPY_DPRINTF("format sector at %d %d %02x %02x (%d)\n",
1799 GET_CUR_DRV(fdctrl
), kh
, kt
, ks
,
1800 fd_sector_calc(kh
, kt
, ks
, cur_drv
->last_sect
,
1801 NUM_SIDES(cur_drv
)));
1802 switch (fd_seek(cur_drv
, kh
, kt
, ks
, fdctrl
->config
& FD_CONFIG_EIS
)) {
1805 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, 0x00, 0x00);
1806 fdctrl
->fifo
[3] = kt
;
1807 fdctrl
->fifo
[4] = kh
;
1808 fdctrl
->fifo
[5] = ks
;
1812 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, FD_SR1_EC
, 0x00);
1813 fdctrl
->fifo
[3] = kt
;
1814 fdctrl
->fifo
[4] = kh
;
1815 fdctrl
->fifo
[5] = ks
;
1818 /* No seek enabled */
1819 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, 0x00, 0x00);
1820 fdctrl
->fifo
[3] = kt
;
1821 fdctrl
->fifo
[4] = kh
;
1822 fdctrl
->fifo
[5] = ks
;
1825 fdctrl
->status0
|= FD_SR0_SEEK
;
1830 memset(fdctrl
->fifo
, 0, FD_SECTOR_LEN
);
1831 if (cur_drv
->blk
== NULL
||
1832 blk_pwrite(cur_drv
->blk
, fd_offset(cur_drv
), fdctrl
->fifo
,
1833 BDRV_SECTOR_SIZE
, 0) < 0) {
1834 FLOPPY_DPRINTF("error formatting sector %d\n", fd_sector(cur_drv
));
1835 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
| FD_SR0_SEEK
, 0x00, 0x00);
1837 if (cur_drv
->sect
== cur_drv
->last_sect
) {
1838 fdctrl
->data_state
&= ~FD_STATE_FORMAT
;
1839 /* Last sector done */
1840 fdctrl_stop_transfer(fdctrl
, 0x00, 0x00, 0x00);
1843 fdctrl
->data_pos
= 0;
1844 fdctrl
->data_len
= 4;
1849 static void fdctrl_handle_lock(FDCtrl
*fdctrl
, int direction
)
1851 fdctrl
->lock
= (fdctrl
->fifo
[0] & 0x80) ? 1 : 0;
1852 fdctrl
->fifo
[0] = fdctrl
->lock
<< 4;
1853 fdctrl_to_result_phase(fdctrl
, 1);
1856 static void fdctrl_handle_dumpreg(FDCtrl
*fdctrl
, int direction
)
1858 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
1860 /* Drives position */
1861 fdctrl
->fifo
[0] = drv0(fdctrl
)->track
;
1862 fdctrl
->fifo
[1] = drv1(fdctrl
)->track
;
1864 fdctrl
->fifo
[2] = drv2(fdctrl
)->track
;
1865 fdctrl
->fifo
[3] = drv3(fdctrl
)->track
;
1867 fdctrl
->fifo
[2] = 0;
1868 fdctrl
->fifo
[3] = 0;
1871 fdctrl
->fifo
[4] = fdctrl
->timer0
;
1872 fdctrl
->fifo
[5] = (fdctrl
->timer1
<< 1) | (fdctrl
->dor
& FD_DOR_DMAEN
? 1 : 0);
1873 fdctrl
->fifo
[6] = cur_drv
->last_sect
;
1874 fdctrl
->fifo
[7] = (fdctrl
->lock
<< 7) |
1875 (cur_drv
->perpendicular
<< 2);
1876 fdctrl
->fifo
[8] = fdctrl
->config
;
1877 fdctrl
->fifo
[9] = fdctrl
->precomp_trk
;
1878 fdctrl_to_result_phase(fdctrl
, 10);
1881 static void fdctrl_handle_version(FDCtrl
*fdctrl
, int direction
)
1883 /* Controller's version */
1884 fdctrl
->fifo
[0] = fdctrl
->version
;
1885 fdctrl_to_result_phase(fdctrl
, 1);
1888 static void fdctrl_handle_partid(FDCtrl
*fdctrl
, int direction
)
1890 fdctrl
->fifo
[0] = 0x41; /* Stepping 1 */
1891 fdctrl_to_result_phase(fdctrl
, 1);
1894 static void fdctrl_handle_restore(FDCtrl
*fdctrl
, int direction
)
1896 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
1898 /* Drives position */
1899 drv0(fdctrl
)->track
= fdctrl
->fifo
[3];
1900 drv1(fdctrl
)->track
= fdctrl
->fifo
[4];
1902 drv2(fdctrl
)->track
= fdctrl
->fifo
[5];
1903 drv3(fdctrl
)->track
= fdctrl
->fifo
[6];
1906 fdctrl
->timer0
= fdctrl
->fifo
[7];
1907 fdctrl
->timer1
= fdctrl
->fifo
[8];
1908 cur_drv
->last_sect
= fdctrl
->fifo
[9];
1909 fdctrl
->lock
= fdctrl
->fifo
[10] >> 7;
1910 cur_drv
->perpendicular
= (fdctrl
->fifo
[10] >> 2) & 0xF;
1911 fdctrl
->config
= fdctrl
->fifo
[11];
1912 fdctrl
->precomp_trk
= fdctrl
->fifo
[12];
1913 fdctrl
->pwrd
= fdctrl
->fifo
[13];
1914 fdctrl_to_command_phase(fdctrl
);
1917 static void fdctrl_handle_save(FDCtrl
*fdctrl
, int direction
)
1919 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
1921 fdctrl
->fifo
[0] = 0;
1922 fdctrl
->fifo
[1] = 0;
1923 /* Drives position */
1924 fdctrl
->fifo
[2] = drv0(fdctrl
)->track
;
1925 fdctrl
->fifo
[3] = drv1(fdctrl
)->track
;
1927 fdctrl
->fifo
[4] = drv2(fdctrl
)->track
;
1928 fdctrl
->fifo
[5] = drv3(fdctrl
)->track
;
1930 fdctrl
->fifo
[4] = 0;
1931 fdctrl
->fifo
[5] = 0;
1934 fdctrl
->fifo
[6] = fdctrl
->timer0
;
1935 fdctrl
->fifo
[7] = fdctrl
->timer1
;
1936 fdctrl
->fifo
[8] = cur_drv
->last_sect
;
1937 fdctrl
->fifo
[9] = (fdctrl
->lock
<< 7) |
1938 (cur_drv
->perpendicular
<< 2);
1939 fdctrl
->fifo
[10] = fdctrl
->config
;
1940 fdctrl
->fifo
[11] = fdctrl
->precomp_trk
;
1941 fdctrl
->fifo
[12] = fdctrl
->pwrd
;
1942 fdctrl
->fifo
[13] = 0;
1943 fdctrl
->fifo
[14] = 0;
1944 fdctrl_to_result_phase(fdctrl
, 15);
1947 static void fdctrl_handle_readid(FDCtrl
*fdctrl
, int direction
)
1949 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
1951 cur_drv
->head
= (fdctrl
->fifo
[1] >> 2) & 1;
1952 timer_mod(fdctrl
->result_timer
, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL
) +
1953 (NANOSECONDS_PER_SECOND
/ 50));
1956 static void fdctrl_handle_format_track(FDCtrl
*fdctrl
, int direction
)
1960 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
1961 cur_drv
= get_cur_drv(fdctrl
);
1962 fdctrl
->data_state
|= FD_STATE_FORMAT
;
1963 if (fdctrl
->fifo
[0] & 0x80)
1964 fdctrl
->data_state
|= FD_STATE_MULTI
;
1966 fdctrl
->data_state
&= ~FD_STATE_MULTI
;
1968 fdctrl
->fifo
[2] > 7 ? 16384 : 128 << fdctrl
->fifo
[2];
1970 cur_drv
->last_sect
=
1971 cur_drv
->flags
& FDISK_DBL_SIDES
? fdctrl
->fifo
[3] :
1972 fdctrl
->fifo
[3] / 2;
1974 cur_drv
->last_sect
= fdctrl
->fifo
[3];
1976 /* TODO: implement format using DMA expected by the Bochs BIOS
1977 * and Linux fdformat (read 3 bytes per sector via DMA and fill
1978 * the sector with the specified fill byte
1980 fdctrl
->data_state
&= ~FD_STATE_FORMAT
;
1981 fdctrl_stop_transfer(fdctrl
, 0x00, 0x00, 0x00);
1984 static void fdctrl_handle_specify(FDCtrl
*fdctrl
, int direction
)
1986 fdctrl
->timer0
= (fdctrl
->fifo
[1] >> 4) & 0xF;
1987 fdctrl
->timer1
= fdctrl
->fifo
[2] >> 1;
1988 if (fdctrl
->fifo
[2] & 1)
1989 fdctrl
->dor
&= ~FD_DOR_DMAEN
;
1991 fdctrl
->dor
|= FD_DOR_DMAEN
;
1992 /* No result back */
1993 fdctrl_to_command_phase(fdctrl
);
1996 static void fdctrl_handle_sense_drive_status(FDCtrl
*fdctrl
, int direction
)
2000 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
2001 cur_drv
= get_cur_drv(fdctrl
);
2002 cur_drv
->head
= (fdctrl
->fifo
[1] >> 2) & 1;
2003 /* 1 Byte status back */
2004 fdctrl
->fifo
[0] = (cur_drv
->ro
<< 6) |
2005 (cur_drv
->track
== 0 ? 0x10 : 0x00) |
2006 (cur_drv
->head
<< 2) |
2007 GET_CUR_DRV(fdctrl
) |
2009 fdctrl_to_result_phase(fdctrl
, 1);
2012 static void fdctrl_handle_recalibrate(FDCtrl
*fdctrl
, int direction
)
2016 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
2017 cur_drv
= get_cur_drv(fdctrl
);
2018 fd_recalibrate(cur_drv
);
2019 fdctrl_to_command_phase(fdctrl
);
2020 /* Raise Interrupt */
2021 fdctrl
->status0
|= FD_SR0_SEEK
;
2022 fdctrl_raise_irq(fdctrl
);
2025 static void fdctrl_handle_sense_interrupt_status(FDCtrl
*fdctrl
, int direction
)
2027 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
2029 if (fdctrl
->reset_sensei
> 0) {
2031 FD_SR0_RDYCHG
+ FD_RESET_SENSEI_COUNT
- fdctrl
->reset_sensei
;
2032 fdctrl
->reset_sensei
--;
2033 } else if (!(fdctrl
->sra
& FD_SRA_INTPEND
)) {
2034 fdctrl
->fifo
[0] = FD_SR0_INVCMD
;
2035 fdctrl_to_result_phase(fdctrl
, 1);
2039 (fdctrl
->status0
& ~(FD_SR0_HEAD
| FD_SR0_DS1
| FD_SR0_DS0
))
2040 | GET_CUR_DRV(fdctrl
);
2043 fdctrl
->fifo
[1] = cur_drv
->track
;
2044 fdctrl_to_result_phase(fdctrl
, 2);
2045 fdctrl_reset_irq(fdctrl
);
2046 fdctrl
->status0
= FD_SR0_RDYCHG
;
2049 static void fdctrl_handle_seek(FDCtrl
*fdctrl
, int direction
)
2053 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
2054 cur_drv
= get_cur_drv(fdctrl
);
2055 fdctrl_to_command_phase(fdctrl
);
2056 /* The seek command just sends step pulses to the drive and doesn't care if
2057 * there is a medium inserted of if it's banging the head against the drive.
2059 fd_seek(cur_drv
, cur_drv
->head
, fdctrl
->fifo
[2], cur_drv
->sect
, 1);
2060 /* Raise Interrupt */
2061 fdctrl
->status0
|= FD_SR0_SEEK
;
2062 fdctrl_raise_irq(fdctrl
);
2065 static void fdctrl_handle_perpendicular_mode(FDCtrl
*fdctrl
, int direction
)
2067 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
2069 if (fdctrl
->fifo
[1] & 0x80)
2070 cur_drv
->perpendicular
= fdctrl
->fifo
[1] & 0x7;
2071 /* No result back */
2072 fdctrl_to_command_phase(fdctrl
);
2075 static void fdctrl_handle_configure(FDCtrl
*fdctrl
, int direction
)
2077 fdctrl
->config
= fdctrl
->fifo
[2];
2078 fdctrl
->precomp_trk
= fdctrl
->fifo
[3];
2079 /* No result back */
2080 fdctrl_to_command_phase(fdctrl
);
2083 static void fdctrl_handle_powerdown_mode(FDCtrl
*fdctrl
, int direction
)
2085 fdctrl
->pwrd
= fdctrl
->fifo
[1];
2086 fdctrl
->fifo
[0] = fdctrl
->fifo
[1];
2087 fdctrl_to_result_phase(fdctrl
, 1);
2090 static void fdctrl_handle_option(FDCtrl
*fdctrl
, int direction
)
2092 /* No result back */
2093 fdctrl_to_command_phase(fdctrl
);
2096 static void fdctrl_handle_drive_specification_command(FDCtrl
*fdctrl
, int direction
)
2098 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
2101 pos
= fdctrl
->data_pos
- 1;
2102 pos
%= FD_SECTOR_LEN
;
2103 if (fdctrl
->fifo
[pos
] & 0x80) {
2104 /* Command parameters done */
2105 if (fdctrl
->fifo
[pos
] & 0x40) {
2106 fdctrl
->fifo
[0] = fdctrl
->fifo
[1];
2107 fdctrl
->fifo
[2] = 0;
2108 fdctrl
->fifo
[3] = 0;
2109 fdctrl_to_result_phase(fdctrl
, 4);
2111 fdctrl_to_command_phase(fdctrl
);
2113 } else if (fdctrl
->data_len
> 7) {
2115 fdctrl
->fifo
[0] = 0x80 |
2116 (cur_drv
->head
<< 2) | GET_CUR_DRV(fdctrl
);
2117 fdctrl_to_result_phase(fdctrl
, 1);
2121 static void fdctrl_handle_relative_seek_in(FDCtrl
*fdctrl
, int direction
)
2125 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
2126 cur_drv
= get_cur_drv(fdctrl
);
2127 if (fdctrl
->fifo
[2] + cur_drv
->track
>= cur_drv
->max_track
) {
2128 fd_seek(cur_drv
, cur_drv
->head
, cur_drv
->max_track
- 1,
2131 fd_seek(cur_drv
, cur_drv
->head
,
2132 cur_drv
->track
+ fdctrl
->fifo
[2], cur_drv
->sect
, 1);
2134 fdctrl_to_command_phase(fdctrl
);
2135 /* Raise Interrupt */
2136 fdctrl
->status0
|= FD_SR0_SEEK
;
2137 fdctrl_raise_irq(fdctrl
);
2140 static void fdctrl_handle_relative_seek_out(FDCtrl
*fdctrl
, int direction
)
2144 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
2145 cur_drv
= get_cur_drv(fdctrl
);
2146 if (fdctrl
->fifo
[2] > cur_drv
->track
) {
2147 fd_seek(cur_drv
, cur_drv
->head
, 0, cur_drv
->sect
, 1);
2149 fd_seek(cur_drv
, cur_drv
->head
,
2150 cur_drv
->track
- fdctrl
->fifo
[2], cur_drv
->sect
, 1);
2152 fdctrl_to_command_phase(fdctrl
);
2153 /* Raise Interrupt */
2154 fdctrl
->status0
|= FD_SR0_SEEK
;
2155 fdctrl_raise_irq(fdctrl
);
2159 * Handlers for the execution phase of each command
2161 typedef struct FDCtrlCommand
{
2166 void (*handler
)(FDCtrl
*fdctrl
, int direction
);
2170 static const FDCtrlCommand handlers
[] = {
2171 { FD_CMD_READ
, 0x1f, "READ", 8, fdctrl_start_transfer
, FD_DIR_READ
},
2172 { FD_CMD_WRITE
, 0x3f, "WRITE", 8, fdctrl_start_transfer
, FD_DIR_WRITE
},
2173 { FD_CMD_SEEK
, 0xff, "SEEK", 2, fdctrl_handle_seek
},
2174 { FD_CMD_SENSE_INTERRUPT_STATUS
, 0xff, "SENSE INTERRUPT STATUS", 0, fdctrl_handle_sense_interrupt_status
},
2175 { FD_CMD_RECALIBRATE
, 0xff, "RECALIBRATE", 1, fdctrl_handle_recalibrate
},
2176 { FD_CMD_FORMAT_TRACK
, 0xbf, "FORMAT TRACK", 5, fdctrl_handle_format_track
},
2177 { FD_CMD_READ_TRACK
, 0xbf, "READ TRACK", 8, fdctrl_start_transfer
, FD_DIR_READ
},
2178 { FD_CMD_RESTORE
, 0xff, "RESTORE", 17, fdctrl_handle_restore
}, /* part of READ DELETED DATA */
2179 { FD_CMD_SAVE
, 0xff, "SAVE", 0, fdctrl_handle_save
}, /* part of READ DELETED DATA */
2180 { FD_CMD_READ_DELETED
, 0x1f, "READ DELETED DATA", 8, fdctrl_start_transfer_del
, FD_DIR_READ
},
2181 { FD_CMD_SCAN_EQUAL
, 0x1f, "SCAN EQUAL", 8, fdctrl_start_transfer
, FD_DIR_SCANE
},
2182 { FD_CMD_VERIFY
, 0x1f, "VERIFY", 8, fdctrl_start_transfer
, FD_DIR_VERIFY
},
2183 { FD_CMD_SCAN_LOW_OR_EQUAL
, 0x1f, "SCAN LOW OR EQUAL", 8, fdctrl_start_transfer
, FD_DIR_SCANL
},
2184 { FD_CMD_SCAN_HIGH_OR_EQUAL
, 0x1f, "SCAN HIGH OR EQUAL", 8, fdctrl_start_transfer
, FD_DIR_SCANH
},
2185 { FD_CMD_WRITE_DELETED
, 0x3f, "WRITE DELETED DATA", 8, fdctrl_start_transfer_del
, FD_DIR_WRITE
},
2186 { FD_CMD_READ_ID
, 0xbf, "READ ID", 1, fdctrl_handle_readid
},
2187 { FD_CMD_SPECIFY
, 0xff, "SPECIFY", 2, fdctrl_handle_specify
},
2188 { FD_CMD_SENSE_DRIVE_STATUS
, 0xff, "SENSE DRIVE STATUS", 1, fdctrl_handle_sense_drive_status
},
2189 { FD_CMD_PERPENDICULAR_MODE
, 0xff, "PERPENDICULAR MODE", 1, fdctrl_handle_perpendicular_mode
},
2190 { FD_CMD_CONFIGURE
, 0xff, "CONFIGURE", 3, fdctrl_handle_configure
},
2191 { FD_CMD_POWERDOWN_MODE
, 0xff, "POWERDOWN MODE", 2, fdctrl_handle_powerdown_mode
},
2192 { FD_CMD_OPTION
, 0xff, "OPTION", 1, fdctrl_handle_option
},
2193 { FD_CMD_DRIVE_SPECIFICATION_COMMAND
, 0xff, "DRIVE SPECIFICATION COMMAND", 5, fdctrl_handle_drive_specification_command
},
2194 { FD_CMD_RELATIVE_SEEK_OUT
, 0xff, "RELATIVE SEEK OUT", 2, fdctrl_handle_relative_seek_out
},
2195 { FD_CMD_FORMAT_AND_WRITE
, 0xff, "FORMAT AND WRITE", 10, fdctrl_unimplemented
},
2196 { FD_CMD_RELATIVE_SEEK_IN
, 0xff, "RELATIVE SEEK IN", 2, fdctrl_handle_relative_seek_in
},
2197 { FD_CMD_LOCK
, 0x7f, "LOCK", 0, fdctrl_handle_lock
},
2198 { FD_CMD_DUMPREG
, 0xff, "DUMPREG", 0, fdctrl_handle_dumpreg
},
2199 { FD_CMD_VERSION
, 0xff, "VERSION", 0, fdctrl_handle_version
},
2200 { FD_CMD_PART_ID
, 0xff, "PART ID", 0, fdctrl_handle_partid
},
2201 { FD_CMD_WRITE
, 0x1f, "WRITE (BeOS)", 8, fdctrl_start_transfer
, FD_DIR_WRITE
}, /* not in specification ; BeOS 4.5 bug */
2202 { 0, 0, "unknown", 0, fdctrl_unimplemented
}, /* default handler */
2204 /* Associate command to an index in the 'handlers' array */
2205 static uint8_t command_to_handler
[256];
2207 static const FDCtrlCommand
*get_command(uint8_t cmd
)
2211 idx
= command_to_handler
[cmd
];
2212 FLOPPY_DPRINTF("%s command\n", handlers
[idx
].name
);
2213 return &handlers
[idx
];
2216 static void fdctrl_write_data(FDCtrl
*fdctrl
, uint32_t value
)
2219 const FDCtrlCommand
*cmd
;
2223 if (!(fdctrl
->dor
& FD_DOR_nRESET
)) {
2224 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
2227 if (!(fdctrl
->msr
& FD_MSR_RQM
) || (fdctrl
->msr
& FD_MSR_DIO
)) {
2228 FLOPPY_DPRINTF("error: controller not ready for writing\n");
2231 fdctrl
->dsr
&= ~FD_DSR_PWRDOWN
;
2233 FLOPPY_DPRINTF("%s: %02x\n", __func__
, value
);
2235 /* If data_len spans multiple sectors, the current position in the FIFO
2236 * wraps around while fdctrl->data_pos is the real position in the whole
2238 pos
= fdctrl
->data_pos
++;
2239 pos
%= FD_SECTOR_LEN
;
2240 fdctrl
->fifo
[pos
] = value
;
2242 if (fdctrl
->data_pos
== fdctrl
->data_len
) {
2243 fdctrl
->msr
&= ~FD_MSR_RQM
;
2246 switch (fdctrl
->phase
) {
2247 case FD_PHASE_EXECUTION
:
2248 /* For DMA requests, RQM should be cleared during execution phase, so
2249 * we would have errored out above. */
2250 assert(fdctrl
->msr
& FD_MSR_NONDMA
);
2252 /* FIFO data write */
2253 if (pos
== FD_SECTOR_LEN
- 1 ||
2254 fdctrl
->data_pos
== fdctrl
->data_len
) {
2255 cur_drv
= get_cur_drv(fdctrl
);
2256 if (blk_pwrite(cur_drv
->blk
, fd_offset(cur_drv
), fdctrl
->fifo
,
2257 BDRV_SECTOR_SIZE
, 0) < 0) {
2258 FLOPPY_DPRINTF("error writing sector %d\n",
2259 fd_sector(cur_drv
));
2262 if (!fdctrl_seek_to_next_sect(fdctrl
, cur_drv
)) {
2263 FLOPPY_DPRINTF("error seeking to next sector %d\n",
2264 fd_sector(cur_drv
));
2269 /* Switch to result phase when done with the transfer */
2270 if (fdctrl
->data_pos
== fdctrl
->data_len
) {
2271 fdctrl_stop_transfer(fdctrl
, 0x00, 0x00, 0x00);
2275 case FD_PHASE_COMMAND
:
2276 assert(!(fdctrl
->msr
& FD_MSR_NONDMA
));
2277 assert(fdctrl
->data_pos
< FD_SECTOR_LEN
);
2280 /* The first byte specifies the command. Now we start reading
2281 * as many parameters as this command requires. */
2282 cmd
= get_command(value
);
2283 fdctrl
->data_len
= cmd
->parameters
+ 1;
2284 if (cmd
->parameters
) {
2285 fdctrl
->msr
|= FD_MSR_RQM
;
2287 fdctrl
->msr
|= FD_MSR_CMDBUSY
;
2290 if (fdctrl
->data_pos
== fdctrl
->data_len
) {
2291 /* We have all parameters now, execute the command */
2292 fdctrl
->phase
= FD_PHASE_EXECUTION
;
2294 if (fdctrl
->data_state
& FD_STATE_FORMAT
) {
2295 fdctrl_format_sector(fdctrl
);
2299 cmd
= get_command(fdctrl
->fifo
[0]);
2300 FLOPPY_DPRINTF("Calling handler for '%s'\n", cmd
->name
);
2301 cmd
->handler(fdctrl
, cmd
->direction
);
2305 case FD_PHASE_RESULT
:
2311 static void fdctrl_result_timer(void *opaque
)
2313 FDCtrl
*fdctrl
= opaque
;
2314 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
2316 /* Pretend we are spinning.
2317 * This is needed for Coherent, which uses READ ID to check for
2318 * sector interleaving.
2320 if (cur_drv
->last_sect
!= 0) {
2321 cur_drv
->sect
= (cur_drv
->sect
% cur_drv
->last_sect
) + 1;
2323 /* READ_ID can't automatically succeed! */
2324 if (fdctrl
->check_media_rate
&&
2325 (fdctrl
->dsr
& FD_DSR_DRATEMASK
) != cur_drv
->media_rate
) {
2326 FLOPPY_DPRINTF("read id rate mismatch (fdc=%d, media=%d)\n",
2327 fdctrl
->dsr
& FD_DSR_DRATEMASK
, cur_drv
->media_rate
);
2328 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, FD_SR1_MA
, 0x00);
2330 fdctrl_stop_transfer(fdctrl
, 0x00, 0x00, 0x00);
2334 static void fdctrl_change_cb(void *opaque
, bool load
)
2336 FDrive
*drive
= opaque
;
2338 drive
->media_changed
= 1;
2339 drive
->media_validated
= false;
2340 fd_revalidate(drive
);
2343 static const BlockDevOps fdctrl_block_ops
= {
2344 .change_media_cb
= fdctrl_change_cb
,
2347 /* Init functions */
2348 static void fdctrl_connect_drives(FDCtrl
*fdctrl
, Error
**errp
)
2353 for (i
= 0; i
< MAX_FD
; i
++) {
2354 drive
= &fdctrl
->drives
[i
];
2355 drive
->fdctrl
= fdctrl
;
2358 if (blk_get_on_error(drive
->blk
, 0) != BLOCKDEV_ON_ERROR_ENOSPC
) {
2359 error_setg(errp
, "fdc doesn't support drive option werror");
2362 if (blk_get_on_error(drive
->blk
, 1) != BLOCKDEV_ON_ERROR_REPORT
) {
2363 error_setg(errp
, "fdc doesn't support drive option rerror");
2370 blk_set_dev_ops(drive
->blk
, &fdctrl_block_ops
, drive
);
2371 pick_drive_type(drive
);
2373 fd_revalidate(drive
);
2377 ISADevice
*fdctrl_init_isa(ISABus
*bus
, DriveInfo
**fds
)
2382 isadev
= isa_try_create(bus
, TYPE_ISA_FDC
);
2386 dev
= DEVICE(isadev
);
2389 qdev_prop_set_drive(dev
, "driveA", blk_by_legacy_dinfo(fds
[0]),
2393 qdev_prop_set_drive(dev
, "driveB", blk_by_legacy_dinfo(fds
[1]),
2396 qdev_init_nofail(dev
);
2401 void fdctrl_init_sysbus(qemu_irq irq
, int dma_chann
,
2402 hwaddr mmio_base
, DriveInfo
**fds
)
2409 dev
= qdev_create(NULL
, "sysbus-fdc");
2410 sys
= SYSBUS_FDC(dev
);
2411 fdctrl
= &sys
->state
;
2412 fdctrl
->dma_chann
= dma_chann
; /* FIXME */
2414 qdev_prop_set_drive(dev
, "driveA", blk_by_legacy_dinfo(fds
[0]),
2418 qdev_prop_set_drive(dev
, "driveB", blk_by_legacy_dinfo(fds
[1]),
2421 qdev_init_nofail(dev
);
2422 sbd
= SYS_BUS_DEVICE(dev
);
2423 sysbus_connect_irq(sbd
, 0, irq
);
2424 sysbus_mmio_map(sbd
, 0, mmio_base
);
2427 void sun4m_fdctrl_init(qemu_irq irq
, hwaddr io_base
,
2428 DriveInfo
**fds
, qemu_irq
*fdc_tc
)
2433 dev
= qdev_create(NULL
, "SUNW,fdtwo");
2435 qdev_prop_set_drive(dev
, "drive", blk_by_legacy_dinfo(fds
[0]),
2438 qdev_init_nofail(dev
);
2439 sys
= SYSBUS_FDC(dev
);
2440 sysbus_connect_irq(SYS_BUS_DEVICE(sys
), 0, irq
);
2441 sysbus_mmio_map(SYS_BUS_DEVICE(sys
), 0, io_base
);
2442 *fdc_tc
= qdev_get_gpio_in(dev
, 0);
2445 static void fdctrl_realize_common(FDCtrl
*fdctrl
, Error
**errp
)
2448 static int command_tables_inited
= 0;
2450 if (fdctrl
->fallback
== FLOPPY_DRIVE_TYPE_AUTO
) {
2451 error_setg(errp
, "Cannot choose a fallback FDrive type of 'auto'");
2454 /* Fill 'command_to_handler' lookup table */
2455 if (!command_tables_inited
) {
2456 command_tables_inited
= 1;
2457 for (i
= ARRAY_SIZE(handlers
) - 1; i
>= 0; i
--) {
2458 for (j
= 0; j
< sizeof(command_to_handler
); j
++) {
2459 if ((j
& handlers
[i
].mask
) == handlers
[i
].value
) {
2460 command_to_handler
[j
] = i
;
2466 FLOPPY_DPRINTF("init controller\n");
2467 fdctrl
->fifo
= qemu_memalign(512, FD_SECTOR_LEN
);
2468 fdctrl
->fifo_size
= 512;
2469 fdctrl
->result_timer
= timer_new_ns(QEMU_CLOCK_VIRTUAL
,
2470 fdctrl_result_timer
, fdctrl
);
2472 fdctrl
->version
= 0x90; /* Intel 82078 controller */
2473 fdctrl
->config
= FD_CONFIG_EIS
| FD_CONFIG_EFIFO
; /* Implicit seek, polling & FIFO enabled */
2474 fdctrl
->num_floppies
= MAX_FD
;
2476 if (fdctrl
->dma_chann
!= -1) {
2478 assert(fdctrl
->dma
);
2479 k
= ISADMA_GET_CLASS(fdctrl
->dma
);
2480 k
->register_channel(fdctrl
->dma
, fdctrl
->dma_chann
,
2481 &fdctrl_transfer_handler
, fdctrl
);
2483 fdctrl_connect_drives(fdctrl
, errp
);
2486 static const MemoryRegionPortio fdc_portio_list
[] = {
2487 { 1, 5, 1, .read
= fdctrl_read
, .write
= fdctrl_write
},
2488 { 7, 1, 1, .read
= fdctrl_read
, .write
= fdctrl_write
},
2489 PORTIO_END_OF_LIST(),
2492 static void isabus_fdc_realize(DeviceState
*dev
, Error
**errp
)
2494 ISADevice
*isadev
= ISA_DEVICE(dev
);
2495 FDCtrlISABus
*isa
= ISA_FDC(dev
);
2496 FDCtrl
*fdctrl
= &isa
->state
;
2499 isa_register_portio_list(isadev
, &fdctrl
->portio_list
,
2500 isa
->iobase
, fdc_portio_list
, fdctrl
,
2503 isa_init_irq(isadev
, &fdctrl
->irq
, isa
->irq
);
2504 fdctrl
->dma_chann
= isa
->dma
;
2505 if (fdctrl
->dma_chann
!= -1) {
2506 fdctrl
->dma
= isa_get_dma(isa_bus_from_device(isadev
), isa
->dma
);
2507 assert(fdctrl
->dma
);
2510 qdev_set_legacy_instance_id(dev
, isa
->iobase
, 2);
2511 fdctrl_realize_common(fdctrl
, &err
);
2513 error_propagate(errp
, err
);
2518 static void sysbus_fdc_initfn(Object
*obj
)
2520 SysBusDevice
*sbd
= SYS_BUS_DEVICE(obj
);
2521 FDCtrlSysBus
*sys
= SYSBUS_FDC(obj
);
2522 FDCtrl
*fdctrl
= &sys
->state
;
2524 fdctrl
->dma_chann
= -1;
2526 memory_region_init_io(&fdctrl
->iomem
, obj
, &fdctrl_mem_ops
, fdctrl
,
2528 sysbus_init_mmio(sbd
, &fdctrl
->iomem
);
2531 static void sun4m_fdc_initfn(Object
*obj
)
2533 SysBusDevice
*sbd
= SYS_BUS_DEVICE(obj
);
2534 FDCtrlSysBus
*sys
= SYSBUS_FDC(obj
);
2535 FDCtrl
*fdctrl
= &sys
->state
;
2537 fdctrl
->dma_chann
= -1;
2539 memory_region_init_io(&fdctrl
->iomem
, obj
, &fdctrl_mem_strict_ops
,
2540 fdctrl
, "fdctrl", 0x08);
2541 sysbus_init_mmio(sbd
, &fdctrl
->iomem
);
2544 static void sysbus_fdc_common_initfn(Object
*obj
)
2546 DeviceState
*dev
= DEVICE(obj
);
2547 SysBusDevice
*sbd
= SYS_BUS_DEVICE(dev
);
2548 FDCtrlSysBus
*sys
= SYSBUS_FDC(obj
);
2549 FDCtrl
*fdctrl
= &sys
->state
;
2551 qdev_set_legacy_instance_id(dev
, 0 /* io */, 2); /* FIXME */
2553 sysbus_init_irq(sbd
, &fdctrl
->irq
);
2554 qdev_init_gpio_in(dev
, fdctrl_handle_tc
, 1);
2557 static void sysbus_fdc_common_realize(DeviceState
*dev
, Error
**errp
)
2559 FDCtrlSysBus
*sys
= SYSBUS_FDC(dev
);
2560 FDCtrl
*fdctrl
= &sys
->state
;
2562 fdctrl_realize_common(fdctrl
, errp
);
2565 FloppyDriveType
isa_fdc_get_drive_type(ISADevice
*fdc
, int i
)
2567 FDCtrlISABus
*isa
= ISA_FDC(fdc
);
2569 return isa
->state
.drives
[i
].drive
;
2572 void isa_fdc_get_drive_max_chs(FloppyDriveType type
,
2573 uint8_t *maxc
, uint8_t *maxh
, uint8_t *maxs
)
2575 const FDFormat
*fdf
;
2577 *maxc
= *maxh
= *maxs
= 0;
2578 for (fdf
= fd_formats
; fdf
->drive
!= FLOPPY_DRIVE_TYPE_NONE
; fdf
++) {
2579 if (fdf
->drive
!= type
) {
2582 if (*maxc
< fdf
->max_track
) {
2583 *maxc
= fdf
->max_track
;
2585 if (*maxh
< fdf
->max_head
) {
2586 *maxh
= fdf
->max_head
;
2588 if (*maxs
< fdf
->last_sect
) {
2589 *maxs
= fdf
->last_sect
;
2595 static const VMStateDescription vmstate_isa_fdc
={
2598 .minimum_version_id
= 2,
2599 .fields
= (VMStateField
[]) {
2600 VMSTATE_STRUCT(state
, FDCtrlISABus
, 0, vmstate_fdc
, FDCtrl
),
2601 VMSTATE_END_OF_LIST()
2605 static Property isa_fdc_properties
[] = {
2606 DEFINE_PROP_UINT32("iobase", FDCtrlISABus
, iobase
, 0x3f0),
2607 DEFINE_PROP_UINT32("irq", FDCtrlISABus
, irq
, 6),
2608 DEFINE_PROP_UINT32("dma", FDCtrlISABus
, dma
, 2),
2609 DEFINE_PROP_DRIVE("driveA", FDCtrlISABus
, state
.drives
[0].blk
),
2610 DEFINE_PROP_DRIVE("driveB", FDCtrlISABus
, state
.drives
[1].blk
),
2611 DEFINE_PROP_BIT("check_media_rate", FDCtrlISABus
, state
.check_media_rate
,
2613 DEFINE_PROP_DEFAULT("fdtypeA", FDCtrlISABus
, state
.drives
[0].drive
,
2614 FLOPPY_DRIVE_TYPE_AUTO
, qdev_prop_fdc_drive_type
,
2616 DEFINE_PROP_DEFAULT("fdtypeB", FDCtrlISABus
, state
.drives
[1].drive
,
2617 FLOPPY_DRIVE_TYPE_AUTO
, qdev_prop_fdc_drive_type
,
2619 DEFINE_PROP_DEFAULT("fallback", FDCtrlISABus
, state
.fallback
,
2620 FLOPPY_DRIVE_TYPE_288
, qdev_prop_fdc_drive_type
,
2622 DEFINE_PROP_END_OF_LIST(),
2625 static void isabus_fdc_class_init(ObjectClass
*klass
, void *data
)
2627 DeviceClass
*dc
= DEVICE_CLASS(klass
);
2629 dc
->realize
= isabus_fdc_realize
;
2630 dc
->fw_name
= "fdc";
2631 dc
->reset
= fdctrl_external_reset_isa
;
2632 dc
->vmsd
= &vmstate_isa_fdc
;
2633 dc
->props
= isa_fdc_properties
;
2634 set_bit(DEVICE_CATEGORY_STORAGE
, dc
->categories
);
2637 static void isabus_fdc_instance_init(Object
*obj
)
2639 FDCtrlISABus
*isa
= ISA_FDC(obj
);
2641 device_add_bootindex_property(obj
, &isa
->bootindexA
,
2642 "bootindexA", "/floppy@0",
2644 device_add_bootindex_property(obj
, &isa
->bootindexB
,
2645 "bootindexB", "/floppy@1",
2649 static const TypeInfo isa_fdc_info
= {
2650 .name
= TYPE_ISA_FDC
,
2651 .parent
= TYPE_ISA_DEVICE
,
2652 .instance_size
= sizeof(FDCtrlISABus
),
2653 .class_init
= isabus_fdc_class_init
,
2654 .instance_init
= isabus_fdc_instance_init
,
2657 static const VMStateDescription vmstate_sysbus_fdc
={
2660 .minimum_version_id
= 2,
2661 .fields
= (VMStateField
[]) {
2662 VMSTATE_STRUCT(state
, FDCtrlSysBus
, 0, vmstate_fdc
, FDCtrl
),
2663 VMSTATE_END_OF_LIST()
2667 static Property sysbus_fdc_properties
[] = {
2668 DEFINE_PROP_DRIVE("driveA", FDCtrlSysBus
, state
.drives
[0].blk
),
2669 DEFINE_PROP_DRIVE("driveB", FDCtrlSysBus
, state
.drives
[1].blk
),
2670 DEFINE_PROP_DEFAULT("fdtypeA", FDCtrlSysBus
, state
.drives
[0].drive
,
2671 FLOPPY_DRIVE_TYPE_AUTO
, qdev_prop_fdc_drive_type
,
2673 DEFINE_PROP_DEFAULT("fdtypeB", FDCtrlSysBus
, state
.drives
[1].drive
,
2674 FLOPPY_DRIVE_TYPE_AUTO
, qdev_prop_fdc_drive_type
,
2676 DEFINE_PROP_DEFAULT("fallback", FDCtrlISABus
, state
.fallback
,
2677 FLOPPY_DRIVE_TYPE_144
, qdev_prop_fdc_drive_type
,
2679 DEFINE_PROP_END_OF_LIST(),
2682 static void sysbus_fdc_class_init(ObjectClass
*klass
, void *data
)
2684 DeviceClass
*dc
= DEVICE_CLASS(klass
);
2686 dc
->props
= sysbus_fdc_properties
;
2687 set_bit(DEVICE_CATEGORY_STORAGE
, dc
->categories
);
2690 static const TypeInfo sysbus_fdc_info
= {
2691 .name
= "sysbus-fdc",
2692 .parent
= TYPE_SYSBUS_FDC
,
2693 .instance_init
= sysbus_fdc_initfn
,
2694 .class_init
= sysbus_fdc_class_init
,
2697 static Property sun4m_fdc_properties
[] = {
2698 DEFINE_PROP_DRIVE("drive", FDCtrlSysBus
, state
.drives
[0].blk
),
2699 DEFINE_PROP_DEFAULT("fdtype", FDCtrlSysBus
, state
.drives
[0].drive
,
2700 FLOPPY_DRIVE_TYPE_AUTO
, qdev_prop_fdc_drive_type
,
2702 DEFINE_PROP_DEFAULT("fallback", FDCtrlISABus
, state
.fallback
,
2703 FLOPPY_DRIVE_TYPE_144
, qdev_prop_fdc_drive_type
,
2705 DEFINE_PROP_END_OF_LIST(),
2708 static void sun4m_fdc_class_init(ObjectClass
*klass
, void *data
)
2710 DeviceClass
*dc
= DEVICE_CLASS(klass
);
2712 dc
->props
= sun4m_fdc_properties
;
2713 set_bit(DEVICE_CATEGORY_STORAGE
, dc
->categories
);
2716 static const TypeInfo sun4m_fdc_info
= {
2717 .name
= "SUNW,fdtwo",
2718 .parent
= TYPE_SYSBUS_FDC
,
2719 .instance_init
= sun4m_fdc_initfn
,
2720 .class_init
= sun4m_fdc_class_init
,
2723 static void sysbus_fdc_common_class_init(ObjectClass
*klass
, void *data
)
2725 DeviceClass
*dc
= DEVICE_CLASS(klass
);
2727 dc
->realize
= sysbus_fdc_common_realize
;
2728 dc
->reset
= fdctrl_external_reset_sysbus
;
2729 dc
->vmsd
= &vmstate_sysbus_fdc
;
2732 static const TypeInfo sysbus_fdc_type_info
= {
2733 .name
= TYPE_SYSBUS_FDC
,
2734 .parent
= TYPE_SYS_BUS_DEVICE
,
2735 .instance_size
= sizeof(FDCtrlSysBus
),
2736 .instance_init
= sysbus_fdc_common_initfn
,
2738 .class_init
= sysbus_fdc_common_class_init
,
2741 static void fdc_register_types(void)
2743 type_register_static(&isa_fdc_info
);
2744 type_register_static(&sysbus_fdc_type_info
);
2745 type_register_static(&sysbus_fdc_info
);
2746 type_register_static(&sun4m_fdc_info
);
2749 type_init(fdc_register_types
)