hw/sd: sd: Only SDSC cards support CMD28/29/30
[qemu/ar7.git] / target / sparc / cpu-qom.h
blobf33949aaeec0998d7c73c292f4de29df915d6f1e
1 /*
2 * QEMU SPARC CPU
4 * Copyright (c) 2012 SUSE LINUX Products GmbH
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2.1 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see
18 * <http://www.gnu.org/licenses/lgpl-2.1.html>
20 #ifndef QEMU_SPARC_CPU_QOM_H
21 #define QEMU_SPARC_CPU_QOM_H
23 #include "hw/core/cpu.h"
24 #include "qom/object.h"
26 #ifdef TARGET_SPARC64
27 #define TYPE_SPARC_CPU "sparc64-cpu"
28 #else
29 #define TYPE_SPARC_CPU "sparc-cpu"
30 #endif
32 OBJECT_DECLARE_TYPE(SPARCCPU, SPARCCPUClass,
33 SPARC_CPU)
35 typedef struct sparc_def_t sparc_def_t;
36 /**
37 * SPARCCPUClass:
38 * @parent_realize: The parent class' realize handler.
39 * @parent_reset: The parent class' reset handler.
41 * A SPARC CPU model.
43 struct SPARCCPUClass {
44 /*< private >*/
45 CPUClass parent_class;
46 /*< public >*/
48 DeviceRealize parent_realize;
49 DeviceReset parent_reset;
50 sparc_def_t *cpu_def;
54 #endif