trace: switch position of headers to what Meson requires
[qemu/ar7.git] / target / riscv / insn_trans / trans_rvh.inc.c
blob263b652d90f1fca815dd1ed7a5d9756d71246ee6
1 /*
2 * RISC-V translation routines for the RVXI Base Integer Instruction Set.
4 * Copyright (c) 2020 Western Digital
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2 or later, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
15 * You should have received a copy of the GNU General Public License along with
16 * this program. If not, see <http://www.gnu.org/licenses/>.
19 static bool trans_hfence_gvma(DisasContext *ctx, arg_sfence_vma *a)
21 REQUIRE_EXT(ctx, RVH);
22 #ifndef CONFIG_USER_ONLY
23 gen_helper_hyp_tlb_flush(cpu_env);
24 return true;
25 #endif
26 return false;
29 static bool trans_hfence_vvma(DisasContext *ctx, arg_sfence_vma *a)
31 REQUIRE_EXT(ctx, RVH);
32 #ifndef CONFIG_USER_ONLY
33 gen_helper_hyp_tlb_flush(cpu_env);
34 return true;
35 #endif
36 return false;