2 * Tiny Code Generator for QEMU
4 * Copyright (c) 2008 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 /* define it to use liveness analysis (better code) */
26 #define USE_LIVENESS_ANALYSIS
27 #define USE_TCG_OPTIMIZATIONS
29 #include "qemu/osdep.h"
31 /* Define to jump the ELF file used to communicate with GDB. */
34 #if !defined(CONFIG_DEBUG_TCG) && !defined(NDEBUG)
35 /* define it to suppress various consistency checks (faster) */
39 #include "qemu-common.h"
40 #include "qemu/host-utils.h"
41 #include "qemu/timer.h"
43 /* Note: the long term plan is to reduce the dependencies on the QEMU
44 CPU definitions. Currently they are used for qemu_ld/st
46 #define NO_CPU_IO_DEFS
51 #if UINTPTR_MAX == UINT32_MAX
52 # define ELF_CLASS ELFCLASS32
54 # define ELF_CLASS ELFCLASS64
56 #ifdef HOST_WORDS_BIGENDIAN
57 # define ELF_DATA ELFDATA2MSB
59 # define ELF_DATA ELFDATA2LSB
65 /* Forward declarations for functions declared in tcg-target.c and used here. */
66 static void tcg_target_init(TCGContext
*s
);
67 static void tcg_target_qemu_prologue(TCGContext
*s
);
68 static void patch_reloc(tcg_insn_unit
*code_ptr
, int type
,
69 intptr_t value
, intptr_t addend
);
71 /* The CIE and FDE header definitions will be common to all hosts. */
73 uint32_t len
__attribute__((aligned((sizeof(void *)))));
79 uint8_t return_column
;
82 typedef struct QEMU_PACKED
{
83 uint32_t len
__attribute__((aligned((sizeof(void *)))));
87 } DebugFrameFDEHeader
;
89 typedef struct QEMU_PACKED
{
91 DebugFrameFDEHeader fde
;
94 static void tcg_register_jit_int(void *buf
, size_t size
,
95 const void *debug_frame
,
96 size_t debug_frame_size
)
97 __attribute__((unused
));
99 /* Forward declarations for functions declared and used in tcg-target.c. */
100 static int target_parse_constraint(TCGArgConstraint
*ct
, const char **pct_str
);
101 static void tcg_out_ld(TCGContext
*s
, TCGType type
, TCGReg ret
, TCGReg arg1
,
103 static void tcg_out_mov(TCGContext
*s
, TCGType type
, TCGReg ret
, TCGReg arg
);
104 static void tcg_out_movi(TCGContext
*s
, TCGType type
,
105 TCGReg ret
, tcg_target_long arg
);
106 static void tcg_out_op(TCGContext
*s
, TCGOpcode opc
, const TCGArg
*args
,
107 const int *const_args
);
108 static void tcg_out_st(TCGContext
*s
, TCGType type
, TCGReg arg
, TCGReg arg1
,
110 static void tcg_out_call(TCGContext
*s
, tcg_insn_unit
*target
);
111 static int tcg_target_const_match(tcg_target_long val
, TCGType type
,
112 const TCGArgConstraint
*arg_ct
);
113 static void tcg_out_tb_init(TCGContext
*s
);
114 static bool tcg_out_tb_finalize(TCGContext
*s
);
118 static TCGRegSet tcg_target_available_regs
[2];
119 static TCGRegSet tcg_target_call_clobber_regs
;
121 #if TCG_TARGET_INSN_UNIT_SIZE == 1
122 static __attribute__((unused
)) inline void tcg_out8(TCGContext
*s
, uint8_t v
)
127 static __attribute__((unused
)) inline void tcg_patch8(tcg_insn_unit
*p
,
134 #if TCG_TARGET_INSN_UNIT_SIZE <= 2
135 static __attribute__((unused
)) inline void tcg_out16(TCGContext
*s
, uint16_t v
)
137 if (TCG_TARGET_INSN_UNIT_SIZE
== 2) {
140 tcg_insn_unit
*p
= s
->code_ptr
;
141 memcpy(p
, &v
, sizeof(v
));
142 s
->code_ptr
= p
+ (2 / TCG_TARGET_INSN_UNIT_SIZE
);
146 static __attribute__((unused
)) inline void tcg_patch16(tcg_insn_unit
*p
,
149 if (TCG_TARGET_INSN_UNIT_SIZE
== 2) {
152 memcpy(p
, &v
, sizeof(v
));
157 #if TCG_TARGET_INSN_UNIT_SIZE <= 4
158 static __attribute__((unused
)) inline void tcg_out32(TCGContext
*s
, uint32_t v
)
160 if (TCG_TARGET_INSN_UNIT_SIZE
== 4) {
163 tcg_insn_unit
*p
= s
->code_ptr
;
164 memcpy(p
, &v
, sizeof(v
));
165 s
->code_ptr
= p
+ (4 / TCG_TARGET_INSN_UNIT_SIZE
);
169 static __attribute__((unused
)) inline void tcg_patch32(tcg_insn_unit
*p
,
172 if (TCG_TARGET_INSN_UNIT_SIZE
== 4) {
175 memcpy(p
, &v
, sizeof(v
));
180 #if TCG_TARGET_INSN_UNIT_SIZE <= 8
181 static __attribute__((unused
)) inline void tcg_out64(TCGContext
*s
, uint64_t v
)
183 if (TCG_TARGET_INSN_UNIT_SIZE
== 8) {
186 tcg_insn_unit
*p
= s
->code_ptr
;
187 memcpy(p
, &v
, sizeof(v
));
188 s
->code_ptr
= p
+ (8 / TCG_TARGET_INSN_UNIT_SIZE
);
192 static __attribute__((unused
)) inline void tcg_patch64(tcg_insn_unit
*p
,
195 if (TCG_TARGET_INSN_UNIT_SIZE
== 8) {
198 memcpy(p
, &v
, sizeof(v
));
203 /* label relocation processing */
205 static void tcg_out_reloc(TCGContext
*s
, tcg_insn_unit
*code_ptr
, int type
,
206 TCGLabel
*l
, intptr_t addend
)
211 /* FIXME: This may break relocations on RISC targets that
212 modify instruction fields in place. The caller may not have
213 written the initial value. */
214 patch_reloc(code_ptr
, type
, l
->u
.value
, addend
);
216 /* add a new relocation entry */
217 r
= tcg_malloc(sizeof(TCGRelocation
));
221 r
->next
= l
->u
.first_reloc
;
222 l
->u
.first_reloc
= r
;
226 static void tcg_out_label(TCGContext
*s
, TCGLabel
*l
, tcg_insn_unit
*ptr
)
228 intptr_t value
= (intptr_t)ptr
;
231 assert(!l
->has_value
);
233 for (r
= l
->u
.first_reloc
; r
!= NULL
; r
= r
->next
) {
234 patch_reloc(r
->ptr
, r
->type
, value
, r
->addend
);
238 l
->u
.value_ptr
= ptr
;
241 TCGLabel
*gen_new_label(void)
243 TCGContext
*s
= &tcg_ctx
;
244 TCGLabel
*l
= tcg_malloc(sizeof(TCGLabel
));
253 #include "tcg-target.c"
255 /* pool based memory allocation */
256 void *tcg_malloc_internal(TCGContext
*s
, int size
)
261 if (size
> TCG_POOL_CHUNK_SIZE
) {
262 /* big malloc: insert a new pool (XXX: could optimize) */
263 p
= g_malloc(sizeof(TCGPool
) + size
);
265 p
->next
= s
->pool_first_large
;
266 s
->pool_first_large
= p
;
277 pool_size
= TCG_POOL_CHUNK_SIZE
;
278 p
= g_malloc(sizeof(TCGPool
) + pool_size
);
282 s
->pool_current
->next
= p
;
291 s
->pool_cur
= p
->data
+ size
;
292 s
->pool_end
= p
->data
+ p
->size
;
296 void tcg_pool_reset(TCGContext
*s
)
299 for (p
= s
->pool_first_large
; p
; p
= t
) {
303 s
->pool_first_large
= NULL
;
304 s
->pool_cur
= s
->pool_end
= NULL
;
305 s
->pool_current
= NULL
;
308 typedef struct TCGHelperInfo
{
315 #include "exec/helper-proto.h"
317 static const TCGHelperInfo all_helpers
[] = {
318 #include "exec/helper-tcg.h"
321 void tcg_context_init(TCGContext
*s
)
323 int op
, total_args
, n
, i
;
325 TCGArgConstraint
*args_ct
;
327 GHashTable
*helper_table
;
329 memset(s
, 0, sizeof(*s
));
332 /* Count total number of arguments and allocate the corresponding
335 for(op
= 0; op
< NB_OPS
; op
++) {
336 def
= &tcg_op_defs
[op
];
337 n
= def
->nb_iargs
+ def
->nb_oargs
;
341 args_ct
= g_malloc(sizeof(TCGArgConstraint
) * total_args
);
342 sorted_args
= g_malloc(sizeof(int) * total_args
);
344 for(op
= 0; op
< NB_OPS
; op
++) {
345 def
= &tcg_op_defs
[op
];
346 def
->args_ct
= args_ct
;
347 def
->sorted_args
= sorted_args
;
348 n
= def
->nb_iargs
+ def
->nb_oargs
;
353 /* Register helpers. */
354 /* Use g_direct_hash/equal for direct pointer comparisons on func. */
355 s
->helpers
= helper_table
= g_hash_table_new(NULL
, NULL
);
357 for (i
= 0; i
< ARRAY_SIZE(all_helpers
); ++i
) {
358 g_hash_table_insert(helper_table
, (gpointer
)all_helpers
[i
].func
,
359 (gpointer
)&all_helpers
[i
]);
365 void tcg_prologue_init(TCGContext
*s
)
367 size_t prologue_size
, total_size
;
370 /* Put the prologue at the beginning of code_gen_buffer. */
371 buf0
= s
->code_gen_buffer
;
374 s
->code_gen_prologue
= buf0
;
376 /* Generate the prologue. */
377 tcg_target_qemu_prologue(s
);
379 flush_icache_range((uintptr_t)buf0
, (uintptr_t)buf1
);
381 /* Deduct the prologue from the buffer. */
382 prologue_size
= tcg_current_code_size(s
);
383 s
->code_gen_ptr
= buf1
;
384 s
->code_gen_buffer
= buf1
;
386 total_size
= s
->code_gen_buffer_size
- prologue_size
;
387 s
->code_gen_buffer_size
= total_size
;
389 /* Compute a high-water mark, at which we voluntarily flush the buffer
390 and start over. The size here is arbitrary, significantly larger
391 than we expect the code generation for any one opcode to require. */
392 s
->code_gen_highwater
= s
->code_gen_buffer
+ (total_size
- 1024);
394 tcg_register_jit(s
->code_gen_buffer
, total_size
);
397 if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM
)) {
398 qemu_log("PROLOGUE: [size=%zu]\n", prologue_size
);
399 log_disas(buf0
, prologue_size
);
406 void tcg_set_frame(TCGContext
*s
, int reg
, intptr_t start
, intptr_t size
)
408 s
->frame_start
= start
;
409 s
->frame_end
= start
+ size
;
413 void tcg_func_start(TCGContext
*s
)
416 s
->nb_temps
= s
->nb_globals
;
418 /* No temps have been previously allocated for size or locality. */
419 memset(s
->free_temps
, 0, sizeof(s
->free_temps
));
422 s
->current_frame_offset
= s
->frame_start
;
424 #ifdef CONFIG_DEBUG_TCG
425 s
->goto_tb_issue_mask
= 0;
428 s
->gen_first_op_idx
= 0;
429 s
->gen_last_op_idx
= -1;
430 s
->gen_next_op_idx
= 0;
431 s
->gen_next_parm_idx
= 0;
433 s
->be
= tcg_malloc(sizeof(TCGBackendData
));
436 static inline void tcg_temp_alloc(TCGContext
*s
, int n
)
438 if (n
> TCG_MAX_TEMPS
)
442 static inline int tcg_global_reg_new_internal(TCGType type
, int reg
,
445 TCGContext
*s
= &tcg_ctx
;
449 #if TCG_TARGET_REG_BITS == 32
450 if (type
!= TCG_TYPE_I32
)
453 if (tcg_regset_test_reg(s
->reserved_regs
, reg
))
456 tcg_temp_alloc(s
, s
->nb_globals
+ 1);
457 ts
= &s
->temps
[s
->nb_globals
];
458 ts
->base_type
= type
;
464 tcg_regset_set_reg(s
->reserved_regs
, reg
);
468 TCGv_i32
tcg_global_reg_new_i32(int reg
, const char *name
)
472 idx
= tcg_global_reg_new_internal(TCG_TYPE_I32
, reg
, name
);
473 return MAKE_TCGV_I32(idx
);
476 TCGv_i64
tcg_global_reg_new_i64(int reg
, const char *name
)
480 idx
= tcg_global_reg_new_internal(TCG_TYPE_I64
, reg
, name
);
481 return MAKE_TCGV_I64(idx
);
484 static inline int tcg_global_mem_new_internal(TCGType type
, int reg
,
488 TCGContext
*s
= &tcg_ctx
;
493 #if TCG_TARGET_REG_BITS == 32
494 if (type
== TCG_TYPE_I64
) {
496 tcg_temp_alloc(s
, s
->nb_globals
+ 2);
497 ts
= &s
->temps
[s
->nb_globals
];
498 ts
->base_type
= type
;
499 ts
->type
= TCG_TYPE_I32
;
501 ts
->mem_allocated
= 1;
503 #ifdef HOST_WORDS_BIGENDIAN
504 ts
->mem_offset
= offset
+ 4;
506 ts
->mem_offset
= offset
;
508 pstrcpy(buf
, sizeof(buf
), name
);
509 pstrcat(buf
, sizeof(buf
), "_0");
510 ts
->name
= strdup(buf
);
513 ts
->base_type
= type
;
514 ts
->type
= TCG_TYPE_I32
;
516 ts
->mem_allocated
= 1;
518 #ifdef HOST_WORDS_BIGENDIAN
519 ts
->mem_offset
= offset
;
521 ts
->mem_offset
= offset
+ 4;
523 pstrcpy(buf
, sizeof(buf
), name
);
524 pstrcat(buf
, sizeof(buf
), "_1");
525 ts
->name
= strdup(buf
);
531 tcg_temp_alloc(s
, s
->nb_globals
+ 1);
532 ts
= &s
->temps
[s
->nb_globals
];
533 ts
->base_type
= type
;
536 ts
->mem_allocated
= 1;
538 ts
->mem_offset
= offset
;
545 TCGv_i32
tcg_global_mem_new_i32(int reg
, intptr_t offset
, const char *name
)
547 int idx
= tcg_global_mem_new_internal(TCG_TYPE_I32
, reg
, offset
, name
);
548 return MAKE_TCGV_I32(idx
);
551 TCGv_i64
tcg_global_mem_new_i64(int reg
, intptr_t offset
, const char *name
)
553 int idx
= tcg_global_mem_new_internal(TCG_TYPE_I64
, reg
, offset
, name
);
554 return MAKE_TCGV_I64(idx
);
557 static inline int tcg_temp_new_internal(TCGType type
, int temp_local
)
559 TCGContext
*s
= &tcg_ctx
;
563 k
= type
+ (temp_local
? TCG_TYPE_COUNT
: 0);
564 idx
= find_first_bit(s
->free_temps
[k
].l
, TCG_MAX_TEMPS
);
565 if (idx
< TCG_MAX_TEMPS
) {
566 /* There is already an available temp with the right type. */
567 clear_bit(idx
, s
->free_temps
[k
].l
);
570 ts
->temp_allocated
= 1;
571 assert(ts
->base_type
== type
);
572 assert(ts
->temp_local
== temp_local
);
575 #if TCG_TARGET_REG_BITS == 32
576 if (type
== TCG_TYPE_I64
) {
577 tcg_temp_alloc(s
, s
->nb_temps
+ 2);
578 ts
= &s
->temps
[s
->nb_temps
];
579 ts
->base_type
= type
;
580 ts
->type
= TCG_TYPE_I32
;
581 ts
->temp_allocated
= 1;
582 ts
->temp_local
= temp_local
;
585 ts
->base_type
= type
;
586 ts
->type
= TCG_TYPE_I32
;
587 ts
->temp_allocated
= 1;
588 ts
->temp_local
= temp_local
;
594 tcg_temp_alloc(s
, s
->nb_temps
+ 1);
595 ts
= &s
->temps
[s
->nb_temps
];
596 ts
->base_type
= type
;
598 ts
->temp_allocated
= 1;
599 ts
->temp_local
= temp_local
;
605 #if defined(CONFIG_DEBUG_TCG)
611 TCGv_i32
tcg_temp_new_internal_i32(int temp_local
)
615 idx
= tcg_temp_new_internal(TCG_TYPE_I32
, temp_local
);
616 return MAKE_TCGV_I32(idx
);
619 TCGv_i64
tcg_temp_new_internal_i64(int temp_local
)
623 idx
= tcg_temp_new_internal(TCG_TYPE_I64
, temp_local
);
624 return MAKE_TCGV_I64(idx
);
627 static void tcg_temp_free_internal(int idx
)
629 TCGContext
*s
= &tcg_ctx
;
633 #if defined(CONFIG_DEBUG_TCG)
635 if (s
->temps_in_use
< 0) {
636 fprintf(stderr
, "More temporaries freed than allocated!\n");
640 assert(idx
>= s
->nb_globals
&& idx
< s
->nb_temps
);
642 assert(ts
->temp_allocated
!= 0);
643 ts
->temp_allocated
= 0;
645 k
= ts
->base_type
+ (ts
->temp_local
? TCG_TYPE_COUNT
: 0);
646 set_bit(idx
, s
->free_temps
[k
].l
);
649 void tcg_temp_free_i32(TCGv_i32 arg
)
651 tcg_temp_free_internal(GET_TCGV_I32(arg
));
654 void tcg_temp_free_i64(TCGv_i64 arg
)
656 tcg_temp_free_internal(GET_TCGV_I64(arg
));
659 TCGv_i32
tcg_const_i32(int32_t val
)
662 t0
= tcg_temp_new_i32();
663 tcg_gen_movi_i32(t0
, val
);
667 TCGv_i64
tcg_const_i64(int64_t val
)
670 t0
= tcg_temp_new_i64();
671 tcg_gen_movi_i64(t0
, val
);
675 TCGv_i32
tcg_const_local_i32(int32_t val
)
678 t0
= tcg_temp_local_new_i32();
679 tcg_gen_movi_i32(t0
, val
);
683 TCGv_i64
tcg_const_local_i64(int64_t val
)
686 t0
= tcg_temp_local_new_i64();
687 tcg_gen_movi_i64(t0
, val
);
691 #if defined(CONFIG_DEBUG_TCG)
692 void tcg_clear_temp_count(void)
694 TCGContext
*s
= &tcg_ctx
;
698 int tcg_check_temp_count(void)
700 TCGContext
*s
= &tcg_ctx
;
701 if (s
->temps_in_use
) {
702 /* Clear the count so that we don't give another
703 * warning immediately next time around.
712 /* Note: we convert the 64 bit args to 32 bit and do some alignment
713 and endian swap. Maybe it would be better to do the alignment
714 and endian swap in tcg_reg_alloc_call(). */
715 void tcg_gen_callN(TCGContext
*s
, void *func
, TCGArg ret
,
716 int nargs
, TCGArg
*args
)
718 int i
, real_args
, nb_rets
, pi
, pi_first
;
719 unsigned sizemask
, flags
;
722 info
= g_hash_table_lookup(s
->helpers
, (gpointer
)func
);
724 sizemask
= info
->sizemask
;
726 #if defined(__sparc__) && !defined(__arch64__) \
727 && !defined(CONFIG_TCG_INTERPRETER)
728 /* We have 64-bit values in one register, but need to pass as two
729 separate parameters. Split them. */
730 int orig_sizemask
= sizemask
;
731 int orig_nargs
= nargs
;
734 TCGV_UNUSED_I64(retl
);
735 TCGV_UNUSED_I64(reth
);
737 TCGArg
*split_args
= __builtin_alloca(sizeof(TCGArg
) * nargs
* 2);
738 for (i
= real_args
= 0; i
< nargs
; ++i
) {
739 int is_64bit
= sizemask
& (1 << (i
+1)*2);
741 TCGv_i64 orig
= MAKE_TCGV_I64(args
[i
]);
742 TCGv_i32 h
= tcg_temp_new_i32();
743 TCGv_i32 l
= tcg_temp_new_i32();
744 tcg_gen_extr_i64_i32(l
, h
, orig
);
745 split_args
[real_args
++] = GET_TCGV_I32(h
);
746 split_args
[real_args
++] = GET_TCGV_I32(l
);
748 split_args
[real_args
++] = args
[i
];
755 #elif defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64
756 for (i
= 0; i
< nargs
; ++i
) {
757 int is_64bit
= sizemask
& (1 << (i
+1)*2);
758 int is_signed
= sizemask
& (2 << (i
+1)*2);
760 TCGv_i64 temp
= tcg_temp_new_i64();
761 TCGv_i64 orig
= MAKE_TCGV_I64(args
[i
]);
763 tcg_gen_ext32s_i64(temp
, orig
);
765 tcg_gen_ext32u_i64(temp
, orig
);
767 args
[i
] = GET_TCGV_I64(temp
);
770 #endif /* TCG_TARGET_EXTEND_ARGS */
772 pi_first
= pi
= s
->gen_next_parm_idx
;
773 if (ret
!= TCG_CALL_DUMMY_ARG
) {
774 #if defined(__sparc__) && !defined(__arch64__) \
775 && !defined(CONFIG_TCG_INTERPRETER)
776 if (orig_sizemask
& 1) {
777 /* The 32-bit ABI is going to return the 64-bit value in
778 the %o0/%o1 register pair. Prepare for this by using
779 two return temporaries, and reassemble below. */
780 retl
= tcg_temp_new_i64();
781 reth
= tcg_temp_new_i64();
782 s
->gen_opparam_buf
[pi
++] = GET_TCGV_I64(reth
);
783 s
->gen_opparam_buf
[pi
++] = GET_TCGV_I64(retl
);
786 s
->gen_opparam_buf
[pi
++] = ret
;
790 if (TCG_TARGET_REG_BITS
< 64 && (sizemask
& 1)) {
791 #ifdef HOST_WORDS_BIGENDIAN
792 s
->gen_opparam_buf
[pi
++] = ret
+ 1;
793 s
->gen_opparam_buf
[pi
++] = ret
;
795 s
->gen_opparam_buf
[pi
++] = ret
;
796 s
->gen_opparam_buf
[pi
++] = ret
+ 1;
800 s
->gen_opparam_buf
[pi
++] = ret
;
808 for (i
= 0; i
< nargs
; i
++) {
809 int is_64bit
= sizemask
& (1 << (i
+1)*2);
810 if (TCG_TARGET_REG_BITS
< 64 && is_64bit
) {
811 #ifdef TCG_TARGET_CALL_ALIGN_ARGS
812 /* some targets want aligned 64 bit args */
814 s
->gen_opparam_buf
[pi
++] = TCG_CALL_DUMMY_ARG
;
818 /* If stack grows up, then we will be placing successive
819 arguments at lower addresses, which means we need to
820 reverse the order compared to how we would normally
821 treat either big or little-endian. For those arguments
822 that will wind up in registers, this still works for
823 HPPA (the only current STACK_GROWSUP target) since the
824 argument registers are *also* allocated in decreasing
825 order. If another such target is added, this logic may
826 have to get more complicated to differentiate between
827 stack arguments and register arguments. */
828 #if defined(HOST_WORDS_BIGENDIAN) != defined(TCG_TARGET_STACK_GROWSUP)
829 s
->gen_opparam_buf
[pi
++] = args
[i
] + 1;
830 s
->gen_opparam_buf
[pi
++] = args
[i
];
832 s
->gen_opparam_buf
[pi
++] = args
[i
];
833 s
->gen_opparam_buf
[pi
++] = args
[i
] + 1;
839 s
->gen_opparam_buf
[pi
++] = args
[i
];
842 s
->gen_opparam_buf
[pi
++] = (uintptr_t)func
;
843 s
->gen_opparam_buf
[pi
++] = flags
;
845 i
= s
->gen_next_op_idx
;
846 tcg_debug_assert(i
< OPC_BUF_SIZE
);
847 tcg_debug_assert(pi
<= OPPARAM_BUF_SIZE
);
849 /* Set links for sequential allocation during translation. */
850 s
->gen_op_buf
[i
] = (TCGOp
){
851 .opc
= INDEX_op_call
,
859 /* Make sure the calli field didn't overflow. */
860 tcg_debug_assert(s
->gen_op_buf
[i
].calli
== real_args
);
862 s
->gen_last_op_idx
= i
;
863 s
->gen_next_op_idx
= i
+ 1;
864 s
->gen_next_parm_idx
= pi
;
866 #if defined(__sparc__) && !defined(__arch64__) \
867 && !defined(CONFIG_TCG_INTERPRETER)
868 /* Free all of the parts we allocated above. */
869 for (i
= real_args
= 0; i
< orig_nargs
; ++i
) {
870 int is_64bit
= orig_sizemask
& (1 << (i
+1)*2);
872 TCGv_i32 h
= MAKE_TCGV_I32(args
[real_args
++]);
873 TCGv_i32 l
= MAKE_TCGV_I32(args
[real_args
++]);
874 tcg_temp_free_i32(h
);
875 tcg_temp_free_i32(l
);
880 if (orig_sizemask
& 1) {
881 /* The 32-bit ABI returned two 32-bit pieces. Re-assemble them.
882 Note that describing these as TCGv_i64 eliminates an unnecessary
883 zero-extension that tcg_gen_concat_i32_i64 would create. */
884 tcg_gen_concat32_i64(MAKE_TCGV_I64(ret
), retl
, reth
);
885 tcg_temp_free_i64(retl
);
886 tcg_temp_free_i64(reth
);
888 #elif defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64
889 for (i
= 0; i
< nargs
; ++i
) {
890 int is_64bit
= sizemask
& (1 << (i
+1)*2);
892 TCGv_i64 temp
= MAKE_TCGV_I64(args
[i
]);
893 tcg_temp_free_i64(temp
);
896 #endif /* TCG_TARGET_EXTEND_ARGS */
899 static void tcg_reg_alloc_start(TCGContext
*s
)
903 for(i
= 0; i
< s
->nb_globals
; i
++) {
906 ts
->val_type
= TEMP_VAL_REG
;
908 ts
->val_type
= TEMP_VAL_MEM
;
911 for(i
= s
->nb_globals
; i
< s
->nb_temps
; i
++) {
913 if (ts
->temp_local
) {
914 ts
->val_type
= TEMP_VAL_MEM
;
916 ts
->val_type
= TEMP_VAL_DEAD
;
918 ts
->mem_allocated
= 0;
921 for(i
= 0; i
< TCG_TARGET_NB_REGS
; i
++) {
922 s
->reg_to_temp
[i
] = -1;
926 static char *tcg_get_arg_str_idx(TCGContext
*s
, char *buf
, int buf_size
,
931 assert(idx
>= 0 && idx
< s
->nb_temps
);
933 if (idx
< s
->nb_globals
) {
934 pstrcpy(buf
, buf_size
, ts
->name
);
937 snprintf(buf
, buf_size
, "loc%d", idx
- s
->nb_globals
);
939 snprintf(buf
, buf_size
, "tmp%d", idx
- s
->nb_globals
);
944 char *tcg_get_arg_str_i32(TCGContext
*s
, char *buf
, int buf_size
, TCGv_i32 arg
)
946 return tcg_get_arg_str_idx(s
, buf
, buf_size
, GET_TCGV_I32(arg
));
949 char *tcg_get_arg_str_i64(TCGContext
*s
, char *buf
, int buf_size
, TCGv_i64 arg
)
951 return tcg_get_arg_str_idx(s
, buf
, buf_size
, GET_TCGV_I64(arg
));
954 /* Find helper name. */
955 static inline const char *tcg_find_helper(TCGContext
*s
, uintptr_t val
)
957 const char *ret
= NULL
;
959 TCGHelperInfo
*info
= g_hash_table_lookup(s
->helpers
, (gpointer
)val
);
967 static const char * const cond_name
[] =
969 [TCG_COND_NEVER
] = "never",
970 [TCG_COND_ALWAYS
] = "always",
971 [TCG_COND_EQ
] = "eq",
972 [TCG_COND_NE
] = "ne",
973 [TCG_COND_LT
] = "lt",
974 [TCG_COND_GE
] = "ge",
975 [TCG_COND_LE
] = "le",
976 [TCG_COND_GT
] = "gt",
977 [TCG_COND_LTU
] = "ltu",
978 [TCG_COND_GEU
] = "geu",
979 [TCG_COND_LEU
] = "leu",
980 [TCG_COND_GTU
] = "gtu"
983 static const char * const ldst_name
[] =
999 void tcg_dump_ops(TCGContext
*s
)
1005 for (oi
= s
->gen_first_op_idx
; oi
>= 0; oi
= op
->next
) {
1006 int i
, k
, nb_oargs
, nb_iargs
, nb_cargs
;
1007 const TCGOpDef
*def
;
1011 op
= &s
->gen_op_buf
[oi
];
1013 def
= &tcg_op_defs
[c
];
1014 args
= &s
->gen_opparam_buf
[op
->args
];
1016 if (c
== INDEX_op_insn_start
) {
1017 qemu_log("%s ----", oi
!= s
->gen_first_op_idx
? "\n" : "");
1019 for (i
= 0; i
< TARGET_INSN_START_WORDS
; ++i
) {
1021 #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
1022 a
= ((target_ulong
)args
[i
* 2 + 1] << 32) | args
[i
* 2];
1026 qemu_log(" " TARGET_FMT_lx
, a
);
1028 } else if (c
== INDEX_op_call
) {
1029 /* variable number of arguments */
1030 nb_oargs
= op
->callo
;
1031 nb_iargs
= op
->calli
;
1032 nb_cargs
= def
->nb_cargs
;
1034 /* function name, flags, out args */
1035 qemu_log(" %s %s,$0x%" TCG_PRIlx
",$%d", def
->name
,
1036 tcg_find_helper(s
, args
[nb_oargs
+ nb_iargs
]),
1037 args
[nb_oargs
+ nb_iargs
+ 1], nb_oargs
);
1038 for (i
= 0; i
< nb_oargs
; i
++) {
1039 qemu_log(",%s", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
1042 for (i
= 0; i
< nb_iargs
; i
++) {
1043 TCGArg arg
= args
[nb_oargs
+ i
];
1044 const char *t
= "<dummy>";
1045 if (arg
!= TCG_CALL_DUMMY_ARG
) {
1046 t
= tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), arg
);
1051 qemu_log(" %s ", def
->name
);
1053 nb_oargs
= def
->nb_oargs
;
1054 nb_iargs
= def
->nb_iargs
;
1055 nb_cargs
= def
->nb_cargs
;
1058 for (i
= 0; i
< nb_oargs
; i
++) {
1062 qemu_log("%s", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
1065 for (i
= 0; i
< nb_iargs
; i
++) {
1069 qemu_log("%s", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
1073 case INDEX_op_brcond_i32
:
1074 case INDEX_op_setcond_i32
:
1075 case INDEX_op_movcond_i32
:
1076 case INDEX_op_brcond2_i32
:
1077 case INDEX_op_setcond2_i32
:
1078 case INDEX_op_brcond_i64
:
1079 case INDEX_op_setcond_i64
:
1080 case INDEX_op_movcond_i64
:
1081 if (args
[k
] < ARRAY_SIZE(cond_name
) && cond_name
[args
[k
]]) {
1082 qemu_log(",%s", cond_name
[args
[k
++]]);
1084 qemu_log(",$0x%" TCG_PRIlx
, args
[k
++]);
1088 case INDEX_op_qemu_ld_i32
:
1089 case INDEX_op_qemu_st_i32
:
1090 case INDEX_op_qemu_ld_i64
:
1091 case INDEX_op_qemu_st_i64
:
1093 TCGMemOpIdx oi
= args
[k
++];
1094 TCGMemOp op
= get_memop(oi
);
1095 unsigned ix
= get_mmuidx(oi
);
1097 if (op
& ~(MO_AMASK
| MO_BSWAP
| MO_SSIZE
)) {
1098 qemu_log(",$0x%x,%u", op
, ix
);
1100 const char *s_al
= "", *s_op
;
1101 if (op
& MO_AMASK
) {
1102 if ((op
& MO_AMASK
) == MO_ALIGN
) {
1108 s_op
= ldst_name
[op
& (MO_BSWAP
| MO_SSIZE
)];
1109 qemu_log(",%s%s,%u", s_al
, s_op
, ix
);
1119 case INDEX_op_set_label
:
1121 case INDEX_op_brcond_i32
:
1122 case INDEX_op_brcond_i64
:
1123 case INDEX_op_brcond2_i32
:
1124 qemu_log("%s$L%d", k
? "," : "", arg_label(args
[k
])->id
);
1130 for (; i
< nb_cargs
; i
++, k
++) {
1131 qemu_log("%s$0x%" TCG_PRIlx
, k
? "," : "", args
[k
]);
1138 /* we give more priority to constraints with less registers */
1139 static int get_constraint_priority(const TCGOpDef
*def
, int k
)
1141 const TCGArgConstraint
*arg_ct
;
1144 arg_ct
= &def
->args_ct
[k
];
1145 if (arg_ct
->ct
& TCG_CT_ALIAS
) {
1146 /* an alias is equivalent to a single register */
1149 if (!(arg_ct
->ct
& TCG_CT_REG
))
1152 for(i
= 0; i
< TCG_TARGET_NB_REGS
; i
++) {
1153 if (tcg_regset_test_reg(arg_ct
->u
.regs
, i
))
1157 return TCG_TARGET_NB_REGS
- n
+ 1;
1160 /* sort from highest priority to lowest */
1161 static void sort_constraints(TCGOpDef
*def
, int start
, int n
)
1163 int i
, j
, p1
, p2
, tmp
;
1165 for(i
= 0; i
< n
; i
++)
1166 def
->sorted_args
[start
+ i
] = start
+ i
;
1169 for(i
= 0; i
< n
- 1; i
++) {
1170 for(j
= i
+ 1; j
< n
; j
++) {
1171 p1
= get_constraint_priority(def
, def
->sorted_args
[start
+ i
]);
1172 p2
= get_constraint_priority(def
, def
->sorted_args
[start
+ j
]);
1174 tmp
= def
->sorted_args
[start
+ i
];
1175 def
->sorted_args
[start
+ i
] = def
->sorted_args
[start
+ j
];
1176 def
->sorted_args
[start
+ j
] = tmp
;
1182 void tcg_add_target_add_op_defs(const TCGTargetOpDef
*tdefs
)
1190 if (tdefs
->op
== (TCGOpcode
)-1)
1193 assert((unsigned)op
< NB_OPS
);
1194 def
= &tcg_op_defs
[op
];
1195 #if defined(CONFIG_DEBUG_TCG)
1196 /* Duplicate entry in op definitions? */
1200 nb_args
= def
->nb_iargs
+ def
->nb_oargs
;
1201 for(i
= 0; i
< nb_args
; i
++) {
1202 ct_str
= tdefs
->args_ct_str
[i
];
1203 /* Incomplete TCGTargetOpDef entry? */
1204 assert(ct_str
!= NULL
);
1205 tcg_regset_clear(def
->args_ct
[i
].u
.regs
);
1206 def
->args_ct
[i
].ct
= 0;
1207 if (ct_str
[0] >= '0' && ct_str
[0] <= '9') {
1209 oarg
= ct_str
[0] - '0';
1210 assert(oarg
< def
->nb_oargs
);
1211 assert(def
->args_ct
[oarg
].ct
& TCG_CT_REG
);
1212 /* TCG_CT_ALIAS is for the output arguments. The input
1213 argument is tagged with TCG_CT_IALIAS. */
1214 def
->args_ct
[i
] = def
->args_ct
[oarg
];
1215 def
->args_ct
[oarg
].ct
= TCG_CT_ALIAS
;
1216 def
->args_ct
[oarg
].alias_index
= i
;
1217 def
->args_ct
[i
].ct
|= TCG_CT_IALIAS
;
1218 def
->args_ct
[i
].alias_index
= oarg
;
1221 if (*ct_str
== '\0')
1225 def
->args_ct
[i
].ct
|= TCG_CT_CONST
;
1229 if (target_parse_constraint(&def
->args_ct
[i
], &ct_str
) < 0) {
1230 fprintf(stderr
, "Invalid constraint '%s' for arg %d of operation '%s'\n",
1231 ct_str
, i
, def
->name
);
1239 /* TCGTargetOpDef entry with too much information? */
1240 assert(i
== TCG_MAX_OP_ARGS
|| tdefs
->args_ct_str
[i
] == NULL
);
1242 /* sort the constraints (XXX: this is just an heuristic) */
1243 sort_constraints(def
, 0, def
->nb_oargs
);
1244 sort_constraints(def
, def
->nb_oargs
, def
->nb_iargs
);
1250 printf("%s: sorted=", def
->name
);
1251 for(i
= 0; i
< def
->nb_oargs
+ def
->nb_iargs
; i
++)
1252 printf(" %d", def
->sorted_args
[i
]);
1259 #if defined(CONFIG_DEBUG_TCG)
1261 for (op
= 0; op
< tcg_op_defs_max
; op
++) {
1262 const TCGOpDef
*def
= &tcg_op_defs
[op
];
1263 if (def
->flags
& TCG_OPF_NOT_PRESENT
) {
1264 /* Wrong entry in op definitions? */
1266 fprintf(stderr
, "Invalid op definition for %s\n", def
->name
);
1270 /* Missing entry in op definitions? */
1272 fprintf(stderr
, "Missing op definition for %s\n", def
->name
);
1283 void tcg_op_remove(TCGContext
*s
, TCGOp
*op
)
1285 int next
= op
->next
;
1286 int prev
= op
->prev
;
1289 s
->gen_op_buf
[next
].prev
= prev
;
1291 s
->gen_last_op_idx
= prev
;
1294 s
->gen_op_buf
[prev
].next
= next
;
1296 s
->gen_first_op_idx
= next
;
1299 memset(op
, -1, sizeof(*op
));
1301 #ifdef CONFIG_PROFILER
1306 #ifdef USE_LIVENESS_ANALYSIS
1307 /* liveness analysis: end of function: all temps are dead, and globals
1308 should be in memory. */
1309 static inline void tcg_la_func_end(TCGContext
*s
, uint8_t *dead_temps
,
1312 memset(dead_temps
, 1, s
->nb_temps
);
1313 memset(mem_temps
, 1, s
->nb_globals
);
1314 memset(mem_temps
+ s
->nb_globals
, 0, s
->nb_temps
- s
->nb_globals
);
1317 /* liveness analysis: end of basic block: all temps are dead, globals
1318 and local temps should be in memory. */
1319 static inline void tcg_la_bb_end(TCGContext
*s
, uint8_t *dead_temps
,
1324 memset(dead_temps
, 1, s
->nb_temps
);
1325 memset(mem_temps
, 1, s
->nb_globals
);
1326 for(i
= s
->nb_globals
; i
< s
->nb_temps
; i
++) {
1327 mem_temps
[i
] = s
->temps
[i
].temp_local
;
1331 /* Liveness analysis : update the opc_dead_args array to tell if a
1332 given input arguments is dead. Instructions updating dead
1333 temporaries are removed. */
1334 static void tcg_liveness_analysis(TCGContext
*s
)
1336 uint8_t *dead_temps
, *mem_temps
;
1337 int oi
, oi_prev
, nb_ops
;
1339 nb_ops
= s
->gen_next_op_idx
;
1340 s
->op_dead_args
= tcg_malloc(nb_ops
* sizeof(uint16_t));
1341 s
->op_sync_args
= tcg_malloc(nb_ops
* sizeof(uint8_t));
1343 dead_temps
= tcg_malloc(s
->nb_temps
);
1344 mem_temps
= tcg_malloc(s
->nb_temps
);
1345 tcg_la_func_end(s
, dead_temps
, mem_temps
);
1347 for (oi
= s
->gen_last_op_idx
; oi
>= 0; oi
= oi_prev
) {
1348 int i
, nb_iargs
, nb_oargs
;
1349 TCGOpcode opc_new
, opc_new2
;
1355 TCGOp
* const op
= &s
->gen_op_buf
[oi
];
1356 TCGArg
* const args
= &s
->gen_opparam_buf
[op
->args
];
1357 TCGOpcode opc
= op
->opc
;
1358 const TCGOpDef
*def
= &tcg_op_defs
[opc
];
1367 nb_oargs
= op
->callo
;
1368 nb_iargs
= op
->calli
;
1369 call_flags
= args
[nb_oargs
+ nb_iargs
+ 1];
1371 /* pure functions can be removed if their result is unused */
1372 if (call_flags
& TCG_CALL_NO_SIDE_EFFECTS
) {
1373 for (i
= 0; i
< nb_oargs
; i
++) {
1375 if (!dead_temps
[arg
] || mem_temps
[arg
]) {
1376 goto do_not_remove_call
;
1383 /* output args are dead */
1386 for (i
= 0; i
< nb_oargs
; i
++) {
1388 if (dead_temps
[arg
]) {
1389 dead_args
|= (1 << i
);
1391 if (mem_temps
[arg
]) {
1392 sync_args
|= (1 << i
);
1394 dead_temps
[arg
] = 1;
1398 if (!(call_flags
& TCG_CALL_NO_READ_GLOBALS
)) {
1399 /* globals should be synced to memory */
1400 memset(mem_temps
, 1, s
->nb_globals
);
1402 if (!(call_flags
& (TCG_CALL_NO_WRITE_GLOBALS
|
1403 TCG_CALL_NO_READ_GLOBALS
))) {
1404 /* globals should go back to memory */
1405 memset(dead_temps
, 1, s
->nb_globals
);
1408 /* record arguments that die in this helper */
1409 for (i
= nb_oargs
; i
< nb_iargs
+ nb_oargs
; i
++) {
1411 if (arg
!= TCG_CALL_DUMMY_ARG
) {
1412 if (dead_temps
[arg
]) {
1413 dead_args
|= (1 << i
);
1417 /* input arguments are live for preceding opcodes */
1418 for (i
= nb_oargs
; i
< nb_oargs
+ nb_iargs
; i
++) {
1420 dead_temps
[arg
] = 0;
1422 s
->op_dead_args
[oi
] = dead_args
;
1423 s
->op_sync_args
[oi
] = sync_args
;
1427 case INDEX_op_insn_start
:
1429 case INDEX_op_discard
:
1430 /* mark the temporary as dead */
1431 dead_temps
[args
[0]] = 1;
1432 mem_temps
[args
[0]] = 0;
1435 case INDEX_op_add2_i32
:
1436 opc_new
= INDEX_op_add_i32
;
1438 case INDEX_op_sub2_i32
:
1439 opc_new
= INDEX_op_sub_i32
;
1441 case INDEX_op_add2_i64
:
1442 opc_new
= INDEX_op_add_i64
;
1444 case INDEX_op_sub2_i64
:
1445 opc_new
= INDEX_op_sub_i64
;
1449 /* Test if the high part of the operation is dead, but not
1450 the low part. The result can be optimized to a simple
1451 add or sub. This happens often for x86_64 guest when the
1452 cpu mode is set to 32 bit. */
1453 if (dead_temps
[args
[1]] && !mem_temps
[args
[1]]) {
1454 if (dead_temps
[args
[0]] && !mem_temps
[args
[0]]) {
1457 /* Replace the opcode and adjust the args in place,
1458 leaving 3 unused args at the end. */
1459 op
->opc
= opc
= opc_new
;
1462 /* Fall through and mark the single-word operation live. */
1468 case INDEX_op_mulu2_i32
:
1469 opc_new
= INDEX_op_mul_i32
;
1470 opc_new2
= INDEX_op_muluh_i32
;
1471 have_opc_new2
= TCG_TARGET_HAS_muluh_i32
;
1473 case INDEX_op_muls2_i32
:
1474 opc_new
= INDEX_op_mul_i32
;
1475 opc_new2
= INDEX_op_mulsh_i32
;
1476 have_opc_new2
= TCG_TARGET_HAS_mulsh_i32
;
1478 case INDEX_op_mulu2_i64
:
1479 opc_new
= INDEX_op_mul_i64
;
1480 opc_new2
= INDEX_op_muluh_i64
;
1481 have_opc_new2
= TCG_TARGET_HAS_muluh_i64
;
1483 case INDEX_op_muls2_i64
:
1484 opc_new
= INDEX_op_mul_i64
;
1485 opc_new2
= INDEX_op_mulsh_i64
;
1486 have_opc_new2
= TCG_TARGET_HAS_mulsh_i64
;
1491 if (dead_temps
[args
[1]] && !mem_temps
[args
[1]]) {
1492 if (dead_temps
[args
[0]] && !mem_temps
[args
[0]]) {
1493 /* Both parts of the operation are dead. */
1496 /* The high part of the operation is dead; generate the low. */
1497 op
->opc
= opc
= opc_new
;
1500 } else if (have_opc_new2
&& dead_temps
[args
[0]]
1501 && !mem_temps
[args
[0]]) {
1502 /* The low part of the operation is dead; generate the high. */
1503 op
->opc
= opc
= opc_new2
;
1510 /* Mark the single-word operation live. */
1515 /* XXX: optimize by hardcoding common cases (e.g. triadic ops) */
1516 nb_iargs
= def
->nb_iargs
;
1517 nb_oargs
= def
->nb_oargs
;
1519 /* Test if the operation can be removed because all
1520 its outputs are dead. We assume that nb_oargs == 0
1521 implies side effects */
1522 if (!(def
->flags
& TCG_OPF_SIDE_EFFECTS
) && nb_oargs
!= 0) {
1523 for (i
= 0; i
< nb_oargs
; i
++) {
1525 if (!dead_temps
[arg
] || mem_temps
[arg
]) {
1530 tcg_op_remove(s
, op
);
1533 /* output args are dead */
1536 for (i
= 0; i
< nb_oargs
; i
++) {
1538 if (dead_temps
[arg
]) {
1539 dead_args
|= (1 << i
);
1541 if (mem_temps
[arg
]) {
1542 sync_args
|= (1 << i
);
1544 dead_temps
[arg
] = 1;
1548 /* if end of basic block, update */
1549 if (def
->flags
& TCG_OPF_BB_END
) {
1550 tcg_la_bb_end(s
, dead_temps
, mem_temps
);
1551 } else if (def
->flags
& TCG_OPF_SIDE_EFFECTS
) {
1552 /* globals should be synced to memory */
1553 memset(mem_temps
, 1, s
->nb_globals
);
1556 /* record arguments that die in this opcode */
1557 for (i
= nb_oargs
; i
< nb_oargs
+ nb_iargs
; i
++) {
1559 if (dead_temps
[arg
]) {
1560 dead_args
|= (1 << i
);
1563 /* input arguments are live for preceding opcodes */
1564 for (i
= nb_oargs
; i
< nb_oargs
+ nb_iargs
; i
++) {
1566 dead_temps
[arg
] = 0;
1568 s
->op_dead_args
[oi
] = dead_args
;
1569 s
->op_sync_args
[oi
] = sync_args
;
1576 /* dummy liveness analysis */
1577 static void tcg_liveness_analysis(TCGContext
*s
)
1580 nb_ops
= s
->gen_opc_ptr
- s
->gen_opc_buf
;
1582 s
->op_dead_args
= tcg_malloc(nb_ops
* sizeof(uint16_t));
1583 memset(s
->op_dead_args
, 0, nb_ops
* sizeof(uint16_t));
1584 s
->op_sync_args
= tcg_malloc(nb_ops
* sizeof(uint8_t));
1585 memset(s
->op_sync_args
, 0, nb_ops
* sizeof(uint8_t));
1590 static void dump_regs(TCGContext
*s
)
1596 for(i
= 0; i
< s
->nb_temps
; i
++) {
1598 printf(" %10s: ", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), i
));
1599 switch(ts
->val_type
) {
1601 printf("%s", tcg_target_reg_names
[ts
->reg
]);
1604 printf("%d(%s)", (int)ts
->mem_offset
, tcg_target_reg_names
[ts
->mem_reg
]);
1606 case TEMP_VAL_CONST
:
1607 printf("$0x%" TCG_PRIlx
, ts
->val
);
1619 for(i
= 0; i
< TCG_TARGET_NB_REGS
; i
++) {
1620 if (s
->reg_to_temp
[i
] >= 0) {
1622 tcg_target_reg_names
[i
],
1623 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), s
->reg_to_temp
[i
]));
1628 static void check_regs(TCGContext
*s
)
1634 for(reg
= 0; reg
< TCG_TARGET_NB_REGS
; reg
++) {
1635 k
= s
->reg_to_temp
[reg
];
1638 if (ts
->val_type
!= TEMP_VAL_REG
||
1640 printf("Inconsistency for register %s:\n",
1641 tcg_target_reg_names
[reg
]);
1646 for(k
= 0; k
< s
->nb_temps
; k
++) {
1648 if (ts
->val_type
== TEMP_VAL_REG
&&
1650 s
->reg_to_temp
[ts
->reg
] != k
) {
1651 printf("Inconsistency for temp %s:\n",
1652 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), k
));
1654 printf("reg state:\n");
1662 static void temp_allocate_frame(TCGContext
*s
, int temp
)
1665 ts
= &s
->temps
[temp
];
1666 #if !(defined(__sparc__) && TCG_TARGET_REG_BITS == 64)
1667 /* Sparc64 stack is accessed with offset of 2047 */
1668 s
->current_frame_offset
= (s
->current_frame_offset
+
1669 (tcg_target_long
)sizeof(tcg_target_long
) - 1) &
1670 ~(sizeof(tcg_target_long
) - 1);
1672 if (s
->current_frame_offset
+ (tcg_target_long
)sizeof(tcg_target_long
) >
1676 ts
->mem_offset
= s
->current_frame_offset
;
1677 ts
->mem_reg
= s
->frame_reg
;
1678 ts
->mem_allocated
= 1;
1679 s
->current_frame_offset
+= sizeof(tcg_target_long
);
1682 /* sync register 'reg' by saving it to the corresponding temporary */
1683 static inline void tcg_reg_sync(TCGContext
*s
, int reg
)
1688 temp
= s
->reg_to_temp
[reg
];
1689 ts
= &s
->temps
[temp
];
1690 assert(ts
->val_type
== TEMP_VAL_REG
);
1691 if (!ts
->mem_coherent
&& !ts
->fixed_reg
) {
1692 if (!ts
->mem_allocated
) {
1693 temp_allocate_frame(s
, temp
);
1695 tcg_out_st(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
1697 ts
->mem_coherent
= 1;
1700 /* free register 'reg' by spilling the corresponding temporary if necessary */
1701 static void tcg_reg_free(TCGContext
*s
, int reg
)
1705 temp
= s
->reg_to_temp
[reg
];
1707 tcg_reg_sync(s
, reg
);
1708 s
->temps
[temp
].val_type
= TEMP_VAL_MEM
;
1709 s
->reg_to_temp
[reg
] = -1;
1713 /* Allocate a register belonging to reg1 & ~reg2 */
1714 static int tcg_reg_alloc(TCGContext
*s
, TCGRegSet reg1
, TCGRegSet reg2
)
1719 tcg_regset_andnot(reg_ct
, reg1
, reg2
);
1721 /* first try free registers */
1722 for(i
= 0; i
< ARRAY_SIZE(tcg_target_reg_alloc_order
); i
++) {
1723 reg
= tcg_target_reg_alloc_order
[i
];
1724 if (tcg_regset_test_reg(reg_ct
, reg
) && s
->reg_to_temp
[reg
] == -1)
1728 /* XXX: do better spill choice */
1729 for(i
= 0; i
< ARRAY_SIZE(tcg_target_reg_alloc_order
); i
++) {
1730 reg
= tcg_target_reg_alloc_order
[i
];
1731 if (tcg_regset_test_reg(reg_ct
, reg
)) {
1732 tcg_reg_free(s
, reg
);
1740 /* mark a temporary as dead. */
1741 static inline void temp_dead(TCGContext
*s
, int temp
)
1745 ts
= &s
->temps
[temp
];
1746 if (!ts
->fixed_reg
) {
1747 if (ts
->val_type
== TEMP_VAL_REG
) {
1748 s
->reg_to_temp
[ts
->reg
] = -1;
1750 if (temp
< s
->nb_globals
|| ts
->temp_local
) {
1751 ts
->val_type
= TEMP_VAL_MEM
;
1753 ts
->val_type
= TEMP_VAL_DEAD
;
1758 /* sync a temporary to memory. 'allocated_regs' is used in case a
1759 temporary registers needs to be allocated to store a constant. */
1760 static inline void temp_sync(TCGContext
*s
, int temp
, TCGRegSet allocated_regs
)
1764 ts
= &s
->temps
[temp
];
1765 if (!ts
->fixed_reg
) {
1766 switch(ts
->val_type
) {
1767 case TEMP_VAL_CONST
:
1768 ts
->reg
= tcg_reg_alloc(s
, tcg_target_available_regs
[ts
->type
],
1770 ts
->val_type
= TEMP_VAL_REG
;
1771 s
->reg_to_temp
[ts
->reg
] = temp
;
1772 ts
->mem_coherent
= 0;
1773 tcg_out_movi(s
, ts
->type
, ts
->reg
, ts
->val
);
1776 tcg_reg_sync(s
, ts
->reg
);
1787 /* save a temporary to memory. 'allocated_regs' is used in case a
1788 temporary registers needs to be allocated to store a constant. */
1789 static inline void temp_save(TCGContext
*s
, int temp
, TCGRegSet allocated_regs
)
1791 #ifdef USE_LIVENESS_ANALYSIS
1792 /* The liveness analysis already ensures that globals are back
1793 in memory. Keep an assert for safety. */
1794 assert(s
->temps
[temp
].val_type
== TEMP_VAL_MEM
|| s
->temps
[temp
].fixed_reg
);
1796 temp_sync(s
, temp
, allocated_regs
);
1801 /* save globals to their canonical location and assume they can be
1802 modified be the following code. 'allocated_regs' is used in case a
1803 temporary registers needs to be allocated to store a constant. */
1804 static void save_globals(TCGContext
*s
, TCGRegSet allocated_regs
)
1808 for(i
= 0; i
< s
->nb_globals
; i
++) {
1809 temp_save(s
, i
, allocated_regs
);
1813 /* sync globals to their canonical location and assume they can be
1814 read by the following code. 'allocated_regs' is used in case a
1815 temporary registers needs to be allocated to store a constant. */
1816 static void sync_globals(TCGContext
*s
, TCGRegSet allocated_regs
)
1820 for (i
= 0; i
< s
->nb_globals
; i
++) {
1821 #ifdef USE_LIVENESS_ANALYSIS
1822 assert(s
->temps
[i
].val_type
!= TEMP_VAL_REG
|| s
->temps
[i
].fixed_reg
||
1823 s
->temps
[i
].mem_coherent
);
1825 temp_sync(s
, i
, allocated_regs
);
1830 /* at the end of a basic block, we assume all temporaries are dead and
1831 all globals are stored at their canonical location. */
1832 static void tcg_reg_alloc_bb_end(TCGContext
*s
, TCGRegSet allocated_regs
)
1837 for(i
= s
->nb_globals
; i
< s
->nb_temps
; i
++) {
1839 if (ts
->temp_local
) {
1840 temp_save(s
, i
, allocated_regs
);
1842 #ifdef USE_LIVENESS_ANALYSIS
1843 /* The liveness analysis already ensures that temps are dead.
1844 Keep an assert for safety. */
1845 assert(ts
->val_type
== TEMP_VAL_DEAD
);
1852 save_globals(s
, allocated_regs
);
1855 #define IS_DEAD_ARG(n) ((dead_args >> (n)) & 1)
1856 #define NEED_SYNC_ARG(n) ((sync_args >> (n)) & 1)
1858 static void tcg_reg_alloc_movi(TCGContext
*s
, const TCGArg
*args
,
1859 uint16_t dead_args
, uint8_t sync_args
)
1862 tcg_target_ulong val
;
1864 ots
= &s
->temps
[args
[0]];
1867 if (ots
->fixed_reg
) {
1868 /* for fixed registers, we do not do any constant
1870 tcg_out_movi(s
, ots
->type
, ots
->reg
, val
);
1872 /* The movi is not explicitly generated here */
1873 if (ots
->val_type
== TEMP_VAL_REG
)
1874 s
->reg_to_temp
[ots
->reg
] = -1;
1875 ots
->val_type
= TEMP_VAL_CONST
;
1878 if (NEED_SYNC_ARG(0)) {
1879 temp_sync(s
, args
[0], s
->reserved_regs
);
1881 if (IS_DEAD_ARG(0)) {
1882 temp_dead(s
, args
[0]);
1886 static void tcg_reg_alloc_mov(TCGContext
*s
, const TCGOpDef
*def
,
1887 const TCGArg
*args
, uint16_t dead_args
,
1890 TCGRegSet allocated_regs
;
1892 TCGType otype
, itype
;
1894 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
1895 ots
= &s
->temps
[args
[0]];
1896 ts
= &s
->temps
[args
[1]];
1898 /* Note that otype != itype for no-op truncation. */
1902 /* If the source value is not in a register, and we're going to be
1903 forced to have it in a register in order to perform the copy,
1904 then copy the SOURCE value into its own register first. That way
1905 we don't have to reload SOURCE the next time it is used. */
1906 if (((NEED_SYNC_ARG(0) || ots
->fixed_reg
) && ts
->val_type
!= TEMP_VAL_REG
)
1907 || ts
->val_type
== TEMP_VAL_MEM
) {
1908 ts
->reg
= tcg_reg_alloc(s
, tcg_target_available_regs
[itype
],
1910 if (ts
->val_type
== TEMP_VAL_MEM
) {
1911 tcg_out_ld(s
, itype
, ts
->reg
, ts
->mem_reg
, ts
->mem_offset
);
1912 ts
->mem_coherent
= 1;
1913 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
1914 tcg_out_movi(s
, itype
, ts
->reg
, ts
->val
);
1915 ts
->mem_coherent
= 0;
1917 s
->reg_to_temp
[ts
->reg
] = args
[1];
1918 ts
->val_type
= TEMP_VAL_REG
;
1921 if (IS_DEAD_ARG(0) && !ots
->fixed_reg
) {
1922 /* mov to a non-saved dead register makes no sense (even with
1923 liveness analysis disabled). */
1924 assert(NEED_SYNC_ARG(0));
1925 /* The code above should have moved the temp to a register. */
1926 assert(ts
->val_type
== TEMP_VAL_REG
);
1927 if (!ots
->mem_allocated
) {
1928 temp_allocate_frame(s
, args
[0]);
1930 tcg_out_st(s
, otype
, ts
->reg
, ots
->mem_reg
, ots
->mem_offset
);
1931 if (IS_DEAD_ARG(1)) {
1932 temp_dead(s
, args
[1]);
1934 temp_dead(s
, args
[0]);
1935 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
1936 /* propagate constant */
1937 if (ots
->val_type
== TEMP_VAL_REG
) {
1938 s
->reg_to_temp
[ots
->reg
] = -1;
1940 ots
->val_type
= TEMP_VAL_CONST
;
1942 if (IS_DEAD_ARG(1)) {
1943 temp_dead(s
, args
[1]);
1946 /* The code in the first if block should have moved the
1947 temp to a register. */
1948 assert(ts
->val_type
== TEMP_VAL_REG
);
1949 if (IS_DEAD_ARG(1) && !ts
->fixed_reg
&& !ots
->fixed_reg
) {
1950 /* the mov can be suppressed */
1951 if (ots
->val_type
== TEMP_VAL_REG
) {
1952 s
->reg_to_temp
[ots
->reg
] = -1;
1955 temp_dead(s
, args
[1]);
1957 if (ots
->val_type
!= TEMP_VAL_REG
) {
1958 /* When allocating a new register, make sure to not spill the
1960 tcg_regset_set_reg(allocated_regs
, ts
->reg
);
1961 ots
->reg
= tcg_reg_alloc(s
, tcg_target_available_regs
[otype
],
1964 tcg_out_mov(s
, otype
, ots
->reg
, ts
->reg
);
1966 ots
->val_type
= TEMP_VAL_REG
;
1967 ots
->mem_coherent
= 0;
1968 s
->reg_to_temp
[ots
->reg
] = args
[0];
1969 if (NEED_SYNC_ARG(0)) {
1970 tcg_reg_sync(s
, ots
->reg
);
1975 static void tcg_reg_alloc_op(TCGContext
*s
,
1976 const TCGOpDef
*def
, TCGOpcode opc
,
1977 const TCGArg
*args
, uint16_t dead_args
,
1980 TCGRegSet allocated_regs
;
1981 int i
, k
, nb_iargs
, nb_oargs
, reg
;
1983 const TCGArgConstraint
*arg_ct
;
1985 TCGArg new_args
[TCG_MAX_OP_ARGS
];
1986 int const_args
[TCG_MAX_OP_ARGS
];
1988 nb_oargs
= def
->nb_oargs
;
1989 nb_iargs
= def
->nb_iargs
;
1991 /* copy constants */
1992 memcpy(new_args
+ nb_oargs
+ nb_iargs
,
1993 args
+ nb_oargs
+ nb_iargs
,
1994 sizeof(TCGArg
) * def
->nb_cargs
);
1996 /* satisfy input constraints */
1997 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
1998 for(k
= 0; k
< nb_iargs
; k
++) {
1999 i
= def
->sorted_args
[nb_oargs
+ k
];
2001 arg_ct
= &def
->args_ct
[i
];
2002 ts
= &s
->temps
[arg
];
2003 if (ts
->val_type
== TEMP_VAL_MEM
) {
2004 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
2005 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
2006 ts
->val_type
= TEMP_VAL_REG
;
2008 ts
->mem_coherent
= 1;
2009 s
->reg_to_temp
[reg
] = arg
;
2010 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
2011 if (tcg_target_const_match(ts
->val
, ts
->type
, arg_ct
)) {
2012 /* constant is OK for instruction */
2014 new_args
[i
] = ts
->val
;
2017 /* need to move to a register */
2018 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
2019 tcg_out_movi(s
, ts
->type
, reg
, ts
->val
);
2020 ts
->val_type
= TEMP_VAL_REG
;
2022 ts
->mem_coherent
= 0;
2023 s
->reg_to_temp
[reg
] = arg
;
2026 assert(ts
->val_type
== TEMP_VAL_REG
);
2027 if (arg_ct
->ct
& TCG_CT_IALIAS
) {
2028 if (ts
->fixed_reg
) {
2029 /* if fixed register, we must allocate a new register
2030 if the alias is not the same register */
2031 if (arg
!= args
[arg_ct
->alias_index
])
2032 goto allocate_in_reg
;
2034 /* if the input is aliased to an output and if it is
2035 not dead after the instruction, we must allocate
2036 a new register and move it */
2037 if (!IS_DEAD_ARG(i
)) {
2038 goto allocate_in_reg
;
2040 /* check if the current register has already been allocated
2041 for another input aliased to an output */
2043 for (k2
= 0 ; k2
< k
; k2
++) {
2044 i2
= def
->sorted_args
[nb_oargs
+ k2
];
2045 if ((def
->args_ct
[i2
].ct
& TCG_CT_IALIAS
) &&
2046 (new_args
[i2
] == ts
->reg
)) {
2047 goto allocate_in_reg
;
2053 if (tcg_regset_test_reg(arg_ct
->u
.regs
, reg
)) {
2054 /* nothing to do : the constraint is satisfied */
2057 /* allocate a new register matching the constraint
2058 and move the temporary register into it */
2059 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
2060 tcg_out_mov(s
, ts
->type
, reg
, ts
->reg
);
2064 tcg_regset_set_reg(allocated_regs
, reg
);
2068 /* mark dead temporaries and free the associated registers */
2069 for (i
= nb_oargs
; i
< nb_oargs
+ nb_iargs
; i
++) {
2070 if (IS_DEAD_ARG(i
)) {
2071 temp_dead(s
, args
[i
]);
2075 if (def
->flags
& TCG_OPF_BB_END
) {
2076 tcg_reg_alloc_bb_end(s
, allocated_regs
);
2078 if (def
->flags
& TCG_OPF_CALL_CLOBBER
) {
2079 /* XXX: permit generic clobber register list ? */
2080 for(reg
= 0; reg
< TCG_TARGET_NB_REGS
; reg
++) {
2081 if (tcg_regset_test_reg(tcg_target_call_clobber_regs
, reg
)) {
2082 tcg_reg_free(s
, reg
);
2086 if (def
->flags
& TCG_OPF_SIDE_EFFECTS
) {
2087 /* sync globals if the op has side effects and might trigger
2089 sync_globals(s
, allocated_regs
);
2092 /* satisfy the output constraints */
2093 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
2094 for(k
= 0; k
< nb_oargs
; k
++) {
2095 i
= def
->sorted_args
[k
];
2097 arg_ct
= &def
->args_ct
[i
];
2098 ts
= &s
->temps
[arg
];
2099 if (arg_ct
->ct
& TCG_CT_ALIAS
) {
2100 reg
= new_args
[arg_ct
->alias_index
];
2102 /* if fixed register, we try to use it */
2104 if (ts
->fixed_reg
&&
2105 tcg_regset_test_reg(arg_ct
->u
.regs
, reg
)) {
2108 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
2110 tcg_regset_set_reg(allocated_regs
, reg
);
2111 /* if a fixed register is used, then a move will be done afterwards */
2112 if (!ts
->fixed_reg
) {
2113 if (ts
->val_type
== TEMP_VAL_REG
) {
2114 s
->reg_to_temp
[ts
->reg
] = -1;
2116 ts
->val_type
= TEMP_VAL_REG
;
2118 /* temp value is modified, so the value kept in memory is
2119 potentially not the same */
2120 ts
->mem_coherent
= 0;
2121 s
->reg_to_temp
[reg
] = arg
;
2128 /* emit instruction */
2129 tcg_out_op(s
, opc
, new_args
, const_args
);
2131 /* move the outputs in the correct register if needed */
2132 for(i
= 0; i
< nb_oargs
; i
++) {
2133 ts
= &s
->temps
[args
[i
]];
2135 if (ts
->fixed_reg
&& ts
->reg
!= reg
) {
2136 tcg_out_mov(s
, ts
->type
, ts
->reg
, reg
);
2138 if (NEED_SYNC_ARG(i
)) {
2139 tcg_reg_sync(s
, reg
);
2141 if (IS_DEAD_ARG(i
)) {
2142 temp_dead(s
, args
[i
]);
2147 #ifdef TCG_TARGET_STACK_GROWSUP
2148 #define STACK_DIR(x) (-(x))
2150 #define STACK_DIR(x) (x)
2153 static void tcg_reg_alloc_call(TCGContext
*s
, int nb_oargs
, int nb_iargs
,
2154 const TCGArg
* const args
, uint16_t dead_args
,
2157 int flags
, nb_regs
, i
, reg
;
2160 intptr_t stack_offset
;
2161 size_t call_stack_size
;
2162 tcg_insn_unit
*func_addr
;
2164 TCGRegSet allocated_regs
;
2166 func_addr
= (tcg_insn_unit
*)(intptr_t)args
[nb_oargs
+ nb_iargs
];
2167 flags
= args
[nb_oargs
+ nb_iargs
+ 1];
2169 nb_regs
= ARRAY_SIZE(tcg_target_call_iarg_regs
);
2170 if (nb_regs
> nb_iargs
) {
2174 /* assign stack slots first */
2175 call_stack_size
= (nb_iargs
- nb_regs
) * sizeof(tcg_target_long
);
2176 call_stack_size
= (call_stack_size
+ TCG_TARGET_STACK_ALIGN
- 1) &
2177 ~(TCG_TARGET_STACK_ALIGN
- 1);
2178 allocate_args
= (call_stack_size
> TCG_STATIC_CALL_ARGS_SIZE
);
2179 if (allocate_args
) {
2180 /* XXX: if more than TCG_STATIC_CALL_ARGS_SIZE is needed,
2181 preallocate call stack */
2185 stack_offset
= TCG_TARGET_CALL_STACK_OFFSET
;
2186 for(i
= nb_regs
; i
< nb_iargs
; i
++) {
2187 arg
= args
[nb_oargs
+ i
];
2188 #ifdef TCG_TARGET_STACK_GROWSUP
2189 stack_offset
-= sizeof(tcg_target_long
);
2191 if (arg
!= TCG_CALL_DUMMY_ARG
) {
2192 ts
= &s
->temps
[arg
];
2193 if (ts
->val_type
== TEMP_VAL_REG
) {
2194 tcg_out_st(s
, ts
->type
, ts
->reg
, TCG_REG_CALL_STACK
, stack_offset
);
2195 } else if (ts
->val_type
== TEMP_VAL_MEM
) {
2196 reg
= tcg_reg_alloc(s
, tcg_target_available_regs
[ts
->type
],
2198 /* XXX: not correct if reading values from the stack */
2199 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
2200 tcg_out_st(s
, ts
->type
, reg
, TCG_REG_CALL_STACK
, stack_offset
);
2201 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
2202 reg
= tcg_reg_alloc(s
, tcg_target_available_regs
[ts
->type
],
2204 /* XXX: sign extend may be needed on some targets */
2205 tcg_out_movi(s
, ts
->type
, reg
, ts
->val
);
2206 tcg_out_st(s
, ts
->type
, reg
, TCG_REG_CALL_STACK
, stack_offset
);
2211 #ifndef TCG_TARGET_STACK_GROWSUP
2212 stack_offset
+= sizeof(tcg_target_long
);
2216 /* assign input registers */
2217 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
2218 for(i
= 0; i
< nb_regs
; i
++) {
2219 arg
= args
[nb_oargs
+ i
];
2220 if (arg
!= TCG_CALL_DUMMY_ARG
) {
2221 ts
= &s
->temps
[arg
];
2222 reg
= tcg_target_call_iarg_regs
[i
];
2223 tcg_reg_free(s
, reg
);
2224 if (ts
->val_type
== TEMP_VAL_REG
) {
2225 if (ts
->reg
!= reg
) {
2226 tcg_out_mov(s
, ts
->type
, reg
, ts
->reg
);
2228 } else if (ts
->val_type
== TEMP_VAL_MEM
) {
2229 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
2230 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
2231 /* XXX: sign extend ? */
2232 tcg_out_movi(s
, ts
->type
, reg
, ts
->val
);
2236 tcg_regset_set_reg(allocated_regs
, reg
);
2240 /* mark dead temporaries and free the associated registers */
2241 for(i
= nb_oargs
; i
< nb_iargs
+ nb_oargs
; i
++) {
2242 if (IS_DEAD_ARG(i
)) {
2243 temp_dead(s
, args
[i
]);
2247 /* clobber call registers */
2248 for(reg
= 0; reg
< TCG_TARGET_NB_REGS
; reg
++) {
2249 if (tcg_regset_test_reg(tcg_target_call_clobber_regs
, reg
)) {
2250 tcg_reg_free(s
, reg
);
2254 /* Save globals if they might be written by the helper, sync them if
2255 they might be read. */
2256 if (flags
& TCG_CALL_NO_READ_GLOBALS
) {
2258 } else if (flags
& TCG_CALL_NO_WRITE_GLOBALS
) {
2259 sync_globals(s
, allocated_regs
);
2261 save_globals(s
, allocated_regs
);
2264 tcg_out_call(s
, func_addr
);
2266 /* assign output registers and emit moves if needed */
2267 for(i
= 0; i
< nb_oargs
; i
++) {
2269 ts
= &s
->temps
[arg
];
2270 reg
= tcg_target_call_oarg_regs
[i
];
2271 assert(s
->reg_to_temp
[reg
] == -1);
2273 if (ts
->fixed_reg
) {
2274 if (ts
->reg
!= reg
) {
2275 tcg_out_mov(s
, ts
->type
, ts
->reg
, reg
);
2278 if (ts
->val_type
== TEMP_VAL_REG
) {
2279 s
->reg_to_temp
[ts
->reg
] = -1;
2281 ts
->val_type
= TEMP_VAL_REG
;
2283 ts
->mem_coherent
= 0;
2284 s
->reg_to_temp
[reg
] = arg
;
2285 if (NEED_SYNC_ARG(i
)) {
2286 tcg_reg_sync(s
, reg
);
2288 if (IS_DEAD_ARG(i
)) {
2289 temp_dead(s
, args
[i
]);
2295 #ifdef CONFIG_PROFILER
2297 static int64_t tcg_table_op_count
[NB_OPS
];
2299 void tcg_dump_op_count(FILE *f
, fprintf_function cpu_fprintf
)
2303 for (i
= 0; i
< NB_OPS
; i
++) {
2304 cpu_fprintf(f
, "%s %" PRId64
"\n", tcg_op_defs
[i
].name
,
2305 tcg_table_op_count
[i
]);
2309 void tcg_dump_op_count(FILE *f
, fprintf_function cpu_fprintf
)
2311 cpu_fprintf(f
, "[TCG profiler not compiled]\n");
2316 int tcg_gen_code(TCGContext
*s
, tcg_insn_unit
*gen_code_buf
)
2318 int i
, oi
, oi_next
, num_insns
;
2320 #ifdef CONFIG_PROFILER
2324 n
= s
->gen_last_op_idx
+ 1;
2326 if (n
> s
->op_count_max
) {
2327 s
->op_count_max
= n
;
2332 if (n
> s
->temp_count_max
) {
2333 s
->temp_count_max
= n
;
2339 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP
))) {
2346 #ifdef CONFIG_PROFILER
2347 s
->opt_time
-= profile_getclock();
2350 #ifdef USE_TCG_OPTIMIZATIONS
2354 #ifdef CONFIG_PROFILER
2355 s
->opt_time
+= profile_getclock();
2356 s
->la_time
-= profile_getclock();
2359 tcg_liveness_analysis(s
);
2361 #ifdef CONFIG_PROFILER
2362 s
->la_time
+= profile_getclock();
2366 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_OPT
))) {
2367 qemu_log("OP after optimization and liveness analysis:\n");
2373 tcg_reg_alloc_start(s
);
2375 s
->code_buf
= gen_code_buf
;
2376 s
->code_ptr
= gen_code_buf
;
2381 for (oi
= s
->gen_first_op_idx
; oi
>= 0; oi
= oi_next
) {
2382 TCGOp
* const op
= &s
->gen_op_buf
[oi
];
2383 TCGArg
* const args
= &s
->gen_opparam_buf
[op
->args
];
2384 TCGOpcode opc
= op
->opc
;
2385 const TCGOpDef
*def
= &tcg_op_defs
[opc
];
2386 uint16_t dead_args
= s
->op_dead_args
[oi
];
2387 uint8_t sync_args
= s
->op_sync_args
[oi
];
2390 #ifdef CONFIG_PROFILER
2391 tcg_table_op_count
[opc
]++;
2395 case INDEX_op_mov_i32
:
2396 case INDEX_op_mov_i64
:
2397 tcg_reg_alloc_mov(s
, def
, args
, dead_args
, sync_args
);
2399 case INDEX_op_movi_i32
:
2400 case INDEX_op_movi_i64
:
2401 tcg_reg_alloc_movi(s
, args
, dead_args
, sync_args
);
2403 case INDEX_op_insn_start
:
2404 if (num_insns
>= 0) {
2405 s
->gen_insn_end_off
[num_insns
] = tcg_current_code_size(s
);
2408 for (i
= 0; i
< TARGET_INSN_START_WORDS
; ++i
) {
2410 #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
2411 a
= ((target_ulong
)args
[i
* 2 + 1] << 32) | args
[i
* 2];
2415 s
->gen_insn_data
[num_insns
][i
] = a
;
2418 case INDEX_op_discard
:
2419 temp_dead(s
, args
[0]);
2421 case INDEX_op_set_label
:
2422 tcg_reg_alloc_bb_end(s
, s
->reserved_regs
);
2423 tcg_out_label(s
, arg_label(args
[0]), s
->code_ptr
);
2426 tcg_reg_alloc_call(s
, op
->callo
, op
->calli
, args
,
2427 dead_args
, sync_args
);
2430 /* Sanity check that we've not introduced any unhandled opcodes. */
2431 if (def
->flags
& TCG_OPF_NOT_PRESENT
) {
2434 /* Note: in order to speed up the code, it would be much
2435 faster to have specialized register allocator functions for
2436 some common argument patterns */
2437 tcg_reg_alloc_op(s
, def
, opc
, args
, dead_args
, sync_args
);
2443 /* Test for (pending) buffer overflow. The assumption is that any
2444 one operation beginning below the high water mark cannot overrun
2445 the buffer completely. Thus we can test for overflow after
2446 generating code without having to check during generation. */
2447 if (unlikely((void *)s
->code_ptr
> s
->code_gen_highwater
)) {
2451 tcg_debug_assert(num_insns
>= 0);
2452 s
->gen_insn_end_off
[num_insns
] = tcg_current_code_size(s
);
2454 /* Generate TB finalization at the end of block */
2455 if (!tcg_out_tb_finalize(s
)) {
2459 /* flush instruction cache */
2460 flush_icache_range((uintptr_t)s
->code_buf
, (uintptr_t)s
->code_ptr
);
2462 return tcg_current_code_size(s
);
2465 #ifdef CONFIG_PROFILER
2466 void tcg_dump_info(FILE *f
, fprintf_function cpu_fprintf
)
2468 TCGContext
*s
= &tcg_ctx
;
2469 int64_t tb_count
= s
->tb_count
;
2470 int64_t tb_div_count
= tb_count
? tb_count
: 1;
2471 int64_t tot
= s
->interm_time
+ s
->code_time
;
2473 cpu_fprintf(f
, "JIT cycles %" PRId64
" (%0.3f s at 2.4 GHz)\n",
2475 cpu_fprintf(f
, "translated TBs %" PRId64
" (aborted=%" PRId64
" %0.1f%%)\n",
2476 tb_count
, s
->tb_count1
- tb_count
,
2477 (double)(s
->tb_count1
- s
->tb_count
)
2478 / (s
->tb_count1
? s
->tb_count1
: 1) * 100.0);
2479 cpu_fprintf(f
, "avg ops/TB %0.1f max=%d\n",
2480 (double)s
->op_count
/ tb_div_count
, s
->op_count_max
);
2481 cpu_fprintf(f
, "deleted ops/TB %0.2f\n",
2482 (double)s
->del_op_count
/ tb_div_count
);
2483 cpu_fprintf(f
, "avg temps/TB %0.2f max=%d\n",
2484 (double)s
->temp_count
/ tb_div_count
, s
->temp_count_max
);
2485 cpu_fprintf(f
, "avg host code/TB %0.1f\n",
2486 (double)s
->code_out_len
/ tb_div_count
);
2487 cpu_fprintf(f
, "avg search data/TB %0.1f\n",
2488 (double)s
->search_out_len
/ tb_div_count
);
2490 cpu_fprintf(f
, "cycles/op %0.1f\n",
2491 s
->op_count
? (double)tot
/ s
->op_count
: 0);
2492 cpu_fprintf(f
, "cycles/in byte %0.1f\n",
2493 s
->code_in_len
? (double)tot
/ s
->code_in_len
: 0);
2494 cpu_fprintf(f
, "cycles/out byte %0.1f\n",
2495 s
->code_out_len
? (double)tot
/ s
->code_out_len
: 0);
2496 cpu_fprintf(f
, "cycles/search byte %0.1f\n",
2497 s
->search_out_len
? (double)tot
/ s
->search_out_len
: 0);
2501 cpu_fprintf(f
, " gen_interm time %0.1f%%\n",
2502 (double)s
->interm_time
/ tot
* 100.0);
2503 cpu_fprintf(f
, " gen_code time %0.1f%%\n",
2504 (double)s
->code_time
/ tot
* 100.0);
2505 cpu_fprintf(f
, "optim./code time %0.1f%%\n",
2506 (double)s
->opt_time
/ (s
->code_time
? s
->code_time
: 1)
2508 cpu_fprintf(f
, "liveness/code time %0.1f%%\n",
2509 (double)s
->la_time
/ (s
->code_time
? s
->code_time
: 1) * 100.0);
2510 cpu_fprintf(f
, "cpu_restore count %" PRId64
"\n",
2512 cpu_fprintf(f
, " avg cycles %0.1f\n",
2513 s
->restore_count
? (double)s
->restore_time
/ s
->restore_count
: 0);
2516 void tcg_dump_info(FILE *f
, fprintf_function cpu_fprintf
)
2518 cpu_fprintf(f
, "[TCG profiler not compiled]\n");
2522 #ifdef ELF_HOST_MACHINE
2523 /* In order to use this feature, the backend needs to do three things:
2525 (1) Define ELF_HOST_MACHINE to indicate both what value to
2526 put into the ELF image and to indicate support for the feature.
2528 (2) Define tcg_register_jit. This should create a buffer containing
2529 the contents of a .debug_frame section that describes the post-
2530 prologue unwind info for the tcg machine.
2532 (3) Call tcg_register_jit_int, with the constructed .debug_frame.
2535 /* Begin GDB interface. THE FOLLOWING MUST MATCH GDB DOCS. */
2542 struct jit_code_entry
{
2543 struct jit_code_entry
*next_entry
;
2544 struct jit_code_entry
*prev_entry
;
2545 const void *symfile_addr
;
2546 uint64_t symfile_size
;
2549 struct jit_descriptor
{
2551 uint32_t action_flag
;
2552 struct jit_code_entry
*relevant_entry
;
2553 struct jit_code_entry
*first_entry
;
2556 void __jit_debug_register_code(void) __attribute__((noinline
));
2557 void __jit_debug_register_code(void)
2562 /* Must statically initialize the version, because GDB may check
2563 the version before we can set it. */
2564 struct jit_descriptor __jit_debug_descriptor
= { 1, 0, 0, 0 };
2566 /* End GDB interface. */
2568 static int find_string(const char *strtab
, const char *str
)
2570 const char *p
= strtab
+ 1;
2573 if (strcmp(p
, str
) == 0) {
2580 static void tcg_register_jit_int(void *buf_ptr
, size_t buf_size
,
2581 const void *debug_frame
,
2582 size_t debug_frame_size
)
2584 struct __attribute__((packed
)) DebugInfo
{
2591 uintptr_t cu_low_pc
;
2592 uintptr_t cu_high_pc
;
2595 uintptr_t fn_low_pc
;
2596 uintptr_t fn_high_pc
;
2605 struct DebugInfo di
;
2610 struct ElfImage
*img
;
2612 static const struct ElfImage img_template
= {
2614 .e_ident
[EI_MAG0
] = ELFMAG0
,
2615 .e_ident
[EI_MAG1
] = ELFMAG1
,
2616 .e_ident
[EI_MAG2
] = ELFMAG2
,
2617 .e_ident
[EI_MAG3
] = ELFMAG3
,
2618 .e_ident
[EI_CLASS
] = ELF_CLASS
,
2619 .e_ident
[EI_DATA
] = ELF_DATA
,
2620 .e_ident
[EI_VERSION
] = EV_CURRENT
,
2622 .e_machine
= ELF_HOST_MACHINE
,
2623 .e_version
= EV_CURRENT
,
2624 .e_phoff
= offsetof(struct ElfImage
, phdr
),
2625 .e_shoff
= offsetof(struct ElfImage
, shdr
),
2626 .e_ehsize
= sizeof(ElfW(Shdr
)),
2627 .e_phentsize
= sizeof(ElfW(Phdr
)),
2629 .e_shentsize
= sizeof(ElfW(Shdr
)),
2630 .e_shnum
= ARRAY_SIZE(img
->shdr
),
2631 .e_shstrndx
= ARRAY_SIZE(img
->shdr
) - 1,
2632 #ifdef ELF_HOST_FLAGS
2633 .e_flags
= ELF_HOST_FLAGS
,
2636 .e_ident
[EI_OSABI
] = ELF_OSABI
,
2644 [0] = { .sh_type
= SHT_NULL
},
2645 /* Trick: The contents of code_gen_buffer are not present in
2646 this fake ELF file; that got allocated elsewhere. Therefore
2647 we mark .text as SHT_NOBITS (similar to .bss) so that readers
2648 will not look for contents. We can record any address. */
2650 .sh_type
= SHT_NOBITS
,
2651 .sh_flags
= SHF_EXECINSTR
| SHF_ALLOC
,
2653 [2] = { /* .debug_info */
2654 .sh_type
= SHT_PROGBITS
,
2655 .sh_offset
= offsetof(struct ElfImage
, di
),
2656 .sh_size
= sizeof(struct DebugInfo
),
2658 [3] = { /* .debug_abbrev */
2659 .sh_type
= SHT_PROGBITS
,
2660 .sh_offset
= offsetof(struct ElfImage
, da
),
2661 .sh_size
= sizeof(img
->da
),
2663 [4] = { /* .debug_frame */
2664 .sh_type
= SHT_PROGBITS
,
2665 .sh_offset
= sizeof(struct ElfImage
),
2667 [5] = { /* .symtab */
2668 .sh_type
= SHT_SYMTAB
,
2669 .sh_offset
= offsetof(struct ElfImage
, sym
),
2670 .sh_size
= sizeof(img
->sym
),
2672 .sh_link
= ARRAY_SIZE(img
->shdr
) - 1,
2673 .sh_entsize
= sizeof(ElfW(Sym
)),
2675 [6] = { /* .strtab */
2676 .sh_type
= SHT_STRTAB
,
2677 .sh_offset
= offsetof(struct ElfImage
, str
),
2678 .sh_size
= sizeof(img
->str
),
2682 [1] = { /* code_gen_buffer */
2683 .st_info
= ELF_ST_INFO(STB_GLOBAL
, STT_FUNC
),
2688 .len
= sizeof(struct DebugInfo
) - 4,
2690 .ptr_size
= sizeof(void *),
2692 .cu_lang
= 0x8001, /* DW_LANG_Mips_Assembler */
2694 .fn_name
= "code_gen_buffer"
2697 1, /* abbrev number (the cu) */
2698 0x11, 1, /* DW_TAG_compile_unit, has children */
2699 0x13, 0x5, /* DW_AT_language, DW_FORM_data2 */
2700 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */
2701 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */
2702 0, 0, /* end of abbrev */
2703 2, /* abbrev number (the fn) */
2704 0x2e, 0, /* DW_TAG_subprogram, no children */
2705 0x3, 0x8, /* DW_AT_name, DW_FORM_string */
2706 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */
2707 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */
2708 0, 0, /* end of abbrev */
2709 0 /* no more abbrev */
2711 .str
= "\0" ".text\0" ".debug_info\0" ".debug_abbrev\0"
2712 ".debug_frame\0" ".symtab\0" ".strtab\0" "code_gen_buffer",
2715 /* We only need a single jit entry; statically allocate it. */
2716 static struct jit_code_entry one_entry
;
2718 uintptr_t buf
= (uintptr_t)buf_ptr
;
2719 size_t img_size
= sizeof(struct ElfImage
) + debug_frame_size
;
2720 DebugFrameHeader
*dfh
;
2722 img
= g_malloc(img_size
);
2723 *img
= img_template
;
2725 img
->phdr
.p_vaddr
= buf
;
2726 img
->phdr
.p_paddr
= buf
;
2727 img
->phdr
.p_memsz
= buf_size
;
2729 img
->shdr
[1].sh_name
= find_string(img
->str
, ".text");
2730 img
->shdr
[1].sh_addr
= buf
;
2731 img
->shdr
[1].sh_size
= buf_size
;
2733 img
->shdr
[2].sh_name
= find_string(img
->str
, ".debug_info");
2734 img
->shdr
[3].sh_name
= find_string(img
->str
, ".debug_abbrev");
2736 img
->shdr
[4].sh_name
= find_string(img
->str
, ".debug_frame");
2737 img
->shdr
[4].sh_size
= debug_frame_size
;
2739 img
->shdr
[5].sh_name
= find_string(img
->str
, ".symtab");
2740 img
->shdr
[6].sh_name
= find_string(img
->str
, ".strtab");
2742 img
->sym
[1].st_name
= find_string(img
->str
, "code_gen_buffer");
2743 img
->sym
[1].st_value
= buf
;
2744 img
->sym
[1].st_size
= buf_size
;
2746 img
->di
.cu_low_pc
= buf
;
2747 img
->di
.cu_high_pc
= buf
+ buf_size
;
2748 img
->di
.fn_low_pc
= buf
;
2749 img
->di
.fn_high_pc
= buf
+ buf_size
;
2751 dfh
= (DebugFrameHeader
*)(img
+ 1);
2752 memcpy(dfh
, debug_frame
, debug_frame_size
);
2753 dfh
->fde
.func_start
= buf
;
2754 dfh
->fde
.func_len
= buf_size
;
2757 /* Enable this block to be able to debug the ELF image file creation.
2758 One can use readelf, objdump, or other inspection utilities. */
2760 FILE *f
= fopen("/tmp/qemu.jit", "w+b");
2762 if (fwrite(img
, img_size
, 1, f
) != img_size
) {
2763 /* Avoid stupid unused return value warning for fwrite. */
2770 one_entry
.symfile_addr
= img
;
2771 one_entry
.symfile_size
= img_size
;
2773 __jit_debug_descriptor
.action_flag
= JIT_REGISTER_FN
;
2774 __jit_debug_descriptor
.relevant_entry
= &one_entry
;
2775 __jit_debug_descriptor
.first_entry
= &one_entry
;
2776 __jit_debug_register_code();
2779 /* No support for the feature. Provide the entry point expected by exec.c,
2780 and implement the internal function we declared earlier. */
2782 static void tcg_register_jit_int(void *buf
, size_t size
,
2783 const void *debug_frame
,
2784 size_t debug_frame_size
)
2788 void tcg_register_jit(void *buf
, size_t buf_size
)
2791 #endif /* ELF_HOST_MACHINE */