hw/i386/pc_q35.c

   1 /*
   2  * Q35 chipset based pc system emulator
   3  *
   4  * Copyright (c) 2003-2004 Fabrice Bellard
   5  * Copyright (c) 2009, 2010
   6  *               Isaku Yamahata <yamahata at valinux co jp>
   7  *               VA Linux Systems Japan K.K.
   8  * Copyright (C) 2012 Jason Baron <jbaron@redhat.com>
   9  *
  10  * This is based on pc.c, but heavily modified.
  11  *
  12  * Permission is hereby granted, free of charge, to any person obtaining a copy
  13  * of this software and associated documentation files (the "Software"), to deal
  14  * in the Software without restriction, including without limitation the rights
  15  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  16  * copies of the Software, and to permit persons to whom the Software is
  17  * furnished to do so, subject to the following conditions:
  18  *
  19  * The above copyright notice and this permission notice shall be included in
  20  * all copies or substantial portions of the Software.
  21  *
  22  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  23  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  24  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  25  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  26  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  27  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  28  * THE SOFTWARE.
  29  */
  30 #include "qemu/osdep.h"
  31 #include "hw/hw.h"
  32 #include "hw/loader.h"
  33 #include "sysemu/arch_init.h"
  34 #include "hw/i2c/smbus.h"
  35 #include "hw/boards.h"
  36 #include "hw/timer/mc146818rtc.h"
  37 #include "hw/xen/xen.h"
  38 #include "sysemu/kvm.h"
  39 #include "hw/kvm/clock.h"
  40 #include "hw/pci-host/q35.h"
  41 #include "exec/address-spaces.h"
  42 #include "hw/i386/ich9.h"
  43 #include "hw/smbios/smbios.h"
  44 #include "hw/ide/pci.h"
  45 #include "hw/ide/ahci.h"
  46 #include "hw/usb.h"
  47 #include "qemu/error-report.h"
  48 #include "migration/migration.h"
  49
  50 /* ICH9 AHCI has 6 ports */
  51 #define MAX_SATA_PORTS     6
  52
  53 /* PC hardware initialisation */
  54 static void pc_q35_init(MachineState *machine)
  55 {
  56     PCMachineState *pcms = PC_MACHINE(machine);
  57     PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
  58     Q35PCIHost *q35_host;
  59     PCIHostState *phb;
  60     PCIBus *host_bus;
  61     PCIDevice *lpc;
  62     BusState *idebus[MAX_SATA_PORTS];
  63     ISADevice *rtc_state;
  64     MemoryRegion *pci_memory;
  65     MemoryRegion *rom_memory;
  66     MemoryRegion *ram_memory;
  67     GSIState *gsi_state;
  68     ISABus *isa_bus;
  69     qemu_irq *gsi;
  70     qemu_irq *i8259;
  71     int i;
  72     ICH9LPCState *ich9_lpc;
  73     PCIDevice *ahci;
  74     ram_addr_t lowmem;
  75     DriveInfo *hd[MAX_SATA_PORTS];
  76     MachineClass *mc = MACHINE_GET_CLASS(machine);
  77
  78     /* Check whether RAM fits below 4G (leaving 1/2 GByte for IO memory
  79      * and 256 Mbytes for PCI Express Enhanced Configuration Access Mapping
  80      * also known as MMCFG).
  81      * If it doesn't, we need to split it in chunks below and above 4G.
  82      * In any case, try to make sure that guest addresses aligned at
  83      * 1G boundaries get mapped to host addresses aligned at 1G boundaries.
  84      * For old machine types, use whatever split we used historically to avoid
  85      * breaking migration.
  86      */
  87     if (machine->ram_size >= 0xb0000000) {
  88         lowmem = pcmc->gigabyte_align ? 0x80000000 : 0xb0000000;
  89     } else {
  90         lowmem = 0xb0000000;
  91     }
  92
  93     /* Handle the machine opt max-ram-below-4g.  It is basically doing
  94      * min(qemu limit, user limit).
  95      */
  96     if (lowmem > pcms->max_ram_below_4g) {
  97         lowmem = pcms->max_ram_below_4g;
  98         if (machine->ram_size - lowmem > lowmem &&
  99             lowmem & ((1ULL << 30) - 1)) {
 100             error_report("Warning: Large machine and max_ram_below_4g(%"PRIu64
 101                          ") not a multiple of 1G; possible bad performance.",
 102                          pcms->max_ram_below_4g);
 103         }
 104     }
 105
 106     if (machine->ram_size >= lowmem) {
 107         pcms->above_4g_mem_size = machine->ram_size - lowmem;
 108         pcms->below_4g_mem_size = lowmem;
 109     } else {
 110         pcms->above_4g_mem_size = 0;
 111         pcms->below_4g_mem_size = machine->ram_size;
 112     }
 113
 114     if (xen_enabled()) {
 115         xen_hvm_init(pcms, &ram_memory);
 116     }
 117
 118     pc_cpus_init(pcms);
 119     if (!pcmc->has_acpi_build) {
 120         /* only machine types 1.7 & older need this */
 121         pc_acpi_init("q35-acpi-dsdt.aml");
 122     }
 123
 124     kvmclock_create();
 125
 126     /* pci enabled */
 127     if (pcmc->pci_enabled) {
 128         pci_memory = g_new(MemoryRegion, 1);
 129         memory_region_init(pci_memory, NULL, "pci", UINT64_MAX);
 130         rom_memory = pci_memory;
 131     } else {
 132         pci_memory = NULL;
 133         rom_memory = get_system_memory();
 134     }
 135
 136     pc_guest_info_init(pcms);
 137
 138     if (pcmc->smbios_defaults) {
 139         /* These values are guest ABI, do not change */
 140         smbios_set_defaults("QEMU", "Standard PC (Q35 + ICH9, 2009)",
 141                             mc->name, pcmc->smbios_legacy_mode,
 142                             pcmc->smbios_uuid_encoded,
 143                             SMBIOS_ENTRY_POINT_21);
 144     }
 145
 146     /* allocate ram and load rom/bios */
 147     if (!xen_enabled()) {
 148         pc_memory_init(pcms, get_system_memory(),
 149                        rom_memory, &ram_memory);
 150     }
 151
 152     /* irq lines */
 153     gsi_state = g_malloc0(sizeof(*gsi_state));
 154     if (kvm_irqchip_in_kernel()) {
 155         kvm_pc_setup_irq_routing(pcmc->pci_enabled);
 156         gsi = qemu_allocate_irqs(kvm_pc_gsi_handler, gsi_state,
 157                                  GSI_NUM_PINS);
 158     } else {
 159         gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS);
 160     }
 161
 162     /* create pci host bus */
 163     q35_host = Q35_HOST_DEVICE(qdev_create(NULL, TYPE_Q35_HOST_DEVICE));
 164
 165     object_property_add_child(qdev_get_machine(), "q35", OBJECT(q35_host), NULL);
 166     q35_host->mch.ram_memory = ram_memory;
 167     q35_host->mch.pci_address_space = pci_memory;
 168     q35_host->mch.system_memory = get_system_memory();
 169     q35_host->mch.address_space_io = get_system_io();
 170     q35_host->mch.below_4g_mem_size = pcms->below_4g_mem_size;
 171     q35_host->mch.above_4g_mem_size = pcms->above_4g_mem_size;
 172     /* pci */
 173     qdev_init_nofail(DEVICE(q35_host));
 174     phb = PCI_HOST_BRIDGE(q35_host);
 175     host_bus = phb->bus;
 176     pcms->bus = phb->bus;
 177     /* create ISA bus */
 178     lpc = pci_create_simple_multifunction(host_bus, PCI_DEVFN(ICH9_LPC_DEV,
 179                                           ICH9_LPC_FUNC), true,
 180                                           TYPE_ICH9_LPC_DEVICE);
 181
 182     object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
 183                              TYPE_HOTPLUG_HANDLER,
 184                              (Object **)&pcms->acpi_dev,
 185                              object_property_allow_set_link,
 186                              OBJ_PROP_LINK_UNREF_ON_RELEASE, &error_abort);
 187     object_property_set_link(OBJECT(machine), OBJECT(lpc),
 188                              PC_MACHINE_ACPI_DEVICE_PROP, &error_abort);
 189
 190     ich9_lpc = ICH9_LPC_DEVICE(lpc);
 191     ich9_lpc->pic = gsi;
 192     ich9_lpc->ioapic = gsi_state->ioapic_irq;
 193     pci_bus_irqs(host_bus, ich9_lpc_set_irq, ich9_lpc_map_irq, ich9_lpc,
 194                  ICH9_LPC_NB_PIRQS);
 195     pci_bus_set_route_irq_fn(host_bus, ich9_route_intx_pin_to_irq);
 196     isa_bus = ich9_lpc->isa_bus;
 197
 198     /*end early*/
 199     isa_bus_irqs(isa_bus, gsi);
 200
 201     if (kvm_irqchip_in_kernel()) {
 202         i8259 = kvm_i8259_init(isa_bus);
 203     } else if (xen_enabled()) {
 204         i8259 = xen_interrupt_controller_init();
 205     } else {
 206         i8259 = i8259_init(isa_bus, pc_allocate_cpu_irq());
 207     }
 208
 209     for (i = 0; i < ISA_NUM_IRQS; i++) {
 210         gsi_state->i8259_irq[i] = i8259[i];
 211     }
 212     if (pcmc->pci_enabled) {
 213         ioapic_init_gsi(gsi_state, "q35");
 214     }
 215
 216     pc_register_ferr_irq(gsi[13]);
 217
 218     assert(pcms->vmport != ON_OFF_AUTO__MAX);
 219     if (pcms->vmport == ON_OFF_AUTO_AUTO) {
 220         pcms->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON;
 221     }
 222
 223     /* init basic PC hardware */
 224     pc_basic_device_init(isa_bus, gsi, &rtc_state, !mc->no_floppy,
 225                          (pcms->vmport != ON_OFF_AUTO_ON), 0xff0104);
 226
 227     /* connect pm stuff to lpc */
 228     ich9_lpc_pm_init(lpc, pc_machine_is_smm_enabled(pcms), !mc->no_tco);
 229
 230     /* ahci and SATA device, for q35 1 ahci controller is built-in */
 231     ahci = pci_create_simple_multifunction(host_bus,
 232                                            PCI_DEVFN(ICH9_SATA1_DEV,
 233                                                      ICH9_SATA1_FUNC),
 234                                            true, "ich9-ahci");
 235     idebus[0] = qdev_get_child_bus(&ahci->qdev, "ide.0");
 236     idebus[1] = qdev_get_child_bus(&ahci->qdev, "ide.1");
 237     g_assert(MAX_SATA_PORTS == ICH_AHCI(ahci)->ahci.ports);
 238     ide_drive_get(hd, ICH_AHCI(ahci)->ahci.ports);
 239     ahci_ide_create_devs(ahci, hd);
 240
 241     if (usb_enabled()) {
 242         /* Should we create 6 UHCI according to ich9 spec? */
 243         ehci_create_ich9_with_companions(host_bus, 0x1d);
 244     }
 245
 246     /* TODO: Populate SPD eeprom data.  */
 247     smbus_eeprom_init(ich9_smb_init(host_bus,
 248                                     PCI_DEVFN(ICH9_SMB_DEV, ICH9_SMB_FUNC),
 249                                     0xb100),
 250                       8, NULL, 0);
 251
 252     pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
 253
 254     /* the rest devices to which pci devfn is automatically assigned */
 255     pc_vga_init(isa_bus, host_bus);
 256     pc_nic_init(isa_bus, host_bus);
 257     if (pcmc->pci_enabled) {
 258         pc_pci_device_init(host_bus);
 259     }
 260 }
 261
 262 /* Looking for a pc_compat_2_4() function? It doesn't exist.
 263  * pc_compat_*() functions that run on machine-init time and
 264  * change global QEMU state are deprecated. Please don't create
 265  * one, and implement any pc-*-2.4 (and newer) compat code in
 266  * HW_COMPAT_*, PC_COMPAT_*, or * pc_*_machine_options().
 267  */
 268
 269 static void pc_compat_2_3(MachineState *machine)
 270 {
 271     PCMachineState *pcms = PC_MACHINE(machine);
 272     savevm_skip_section_footers();
 273     if (kvm_enabled()) {
 274         pcms->smm = ON_OFF_AUTO_OFF;
 275     }
 276     global_state_set_optional();
 277     savevm_skip_configuration();
 278 }
 279
 280 static void pc_compat_2_2(MachineState *machine)
 281 {
 282     pc_compat_2_3(machine);
 283     machine->suppress_vmdesc = true;
 284 }
 285
 286 static void pc_compat_2_1(MachineState *machine)
 287 {
 288     pc_compat_2_2(machine);
 289     x86_cpu_change_kvm_default("svm", NULL);
 290 }
 291
 292 static void pc_compat_2_0(MachineState *machine)
 293 {
 294     pc_compat_2_1(machine);
 295 }
 296
 297 static void pc_compat_1_7(MachineState *machine)
 298 {
 299     pc_compat_2_0(machine);
 300     x86_cpu_change_kvm_default("x2apic", NULL);
 301 }
 302
 303 static void pc_compat_1_6(MachineState *machine)
 304 {
 305     pc_compat_1_7(machine);
 306 }
 307
 308 static void pc_compat_1_5(MachineState *machine)
 309 {
 310     pc_compat_1_6(machine);
 311 }
 312
 313 static void pc_compat_1_4(MachineState *machine)
 314 {
 315     pc_compat_1_5(machine);
 316 }
 317
 318 #define DEFINE_Q35_MACHINE(suffix, name, compatfn, optionfn) \
 319     static void pc_init_##suffix(MachineState *machine) \
 320     { \
 321         void (*compat)(MachineState *m) = (compatfn); \
 322         if (compat) { \
 323             compat(machine); \
 324         } \
 325         pc_q35_init(machine); \
 326     } \
 327     DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn)
 328
 329
 330 static void pc_q35_machine_options(MachineClass *m)
 331 {
 332     m->family = "pc_q35";
 333     m->desc = "Standard PC (Q35 + ICH9, 2009)";
 334     m->hot_add_cpu = pc_hot_add_cpu;
 335     m->units_per_default_bus = 1;
 336     m->default_machine_opts = "firmware=bios-256k.bin";
 337     m->default_display = "std";
 338     m->no_floppy = 1;
 339     m->no_tco = 0;
 340 }
 341
 342 static void pc_q35_2_6_machine_options(MachineClass *m)
 343 {
 344     pc_q35_machine_options(m);
 345     m->alias = "q35";
 346 }
 347
 348 DEFINE_Q35_MACHINE(v2_6, "pc-q35-2.6", NULL,
 349                    pc_q35_2_6_machine_options);
 350
 351 static void pc_q35_2_5_machine_options(MachineClass *m)
 352 {
 353     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
 354     pc_q35_2_6_machine_options(m);
 355     m->alias = NULL;
 356     pcmc->save_tsc_khz = false;
 357     SET_MACHINE_COMPAT(m, PC_COMPAT_2_5);
 358 }
 359
 360 DEFINE_Q35_MACHINE(v2_5, "pc-q35-2.5", NULL,
 361                    pc_q35_2_5_machine_options);
 362
 363 static void pc_q35_2_4_machine_options(MachineClass *m)
 364 {
 365     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
 366     pc_q35_2_5_machine_options(m);
 367     m->hw_version = "2.4.0";
 368     pcmc->broken_reserved_end = true;
 369     SET_MACHINE_COMPAT(m, PC_COMPAT_2_4);
 370 }
 371
 372 DEFINE_Q35_MACHINE(v2_4, "pc-q35-2.4", NULL,
 373                    pc_q35_2_4_machine_options);
 374
 375
 376 static void pc_q35_2_3_machine_options(MachineClass *m)
 377 {
 378     pc_q35_2_4_machine_options(m);
 379     m->hw_version = "2.3.0";
 380     m->no_floppy = 0;
 381     m->no_tco = 1;
 382     SET_MACHINE_COMPAT(m, PC_COMPAT_2_3);
 383 }
 384
 385 DEFINE_Q35_MACHINE(v2_3, "pc-q35-2.3", pc_compat_2_3,
 386                    pc_q35_2_3_machine_options);
 387
 388
 389 static void pc_q35_2_2_machine_options(MachineClass *m)
 390 {
 391     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
 392     pc_q35_2_3_machine_options(m);
 393     m->hw_version = "2.2.0";
 394     SET_MACHINE_COMPAT(m, PC_COMPAT_2_2);
 395     pcmc->rsdp_in_ram = false;
 396 }
 397
 398 DEFINE_Q35_MACHINE(v2_2, "pc-q35-2.2", pc_compat_2_2,
 399                    pc_q35_2_2_machine_options);
 400
 401
 402 static void pc_q35_2_1_machine_options(MachineClass *m)
 403 {
 404     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
 405     pc_q35_2_2_machine_options(m);
 406     m->hw_version = "2.1.0";
 407     m->default_display = NULL;
 408     SET_MACHINE_COMPAT(m, PC_COMPAT_2_1);
 409     pcmc->smbios_uuid_encoded = false;
 410     pcmc->enforce_aligned_dimm = false;
 411 }
 412
 413 DEFINE_Q35_MACHINE(v2_1, "pc-q35-2.1", pc_compat_2_1,
 414                    pc_q35_2_1_machine_options);
 415
 416
 417 static void pc_q35_2_0_machine_options(MachineClass *m)
 418 {
 419     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
 420     pc_q35_2_1_machine_options(m);
 421     m->hw_version = "2.0.0";
 422     SET_MACHINE_COMPAT(m, PC_COMPAT_2_0);
 423     pcmc->has_reserved_memory = false;
 424     pcmc->smbios_legacy_mode = true;
 425     pcmc->acpi_data_size = 0x10000;
 426 }
 427
 428 DEFINE_Q35_MACHINE(v2_0, "pc-q35-2.0", pc_compat_2_0,
 429                    pc_q35_2_0_machine_options);
 430
 431
 432 static void pc_q35_1_7_machine_options(MachineClass *m)
 433 {
 434     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
 435     pc_q35_2_0_machine_options(m);
 436     m->hw_version = "1.7.0";
 437     m->default_machine_opts = NULL;
 438     m->option_rom_has_mr = true;
 439     SET_MACHINE_COMPAT(m, PC_COMPAT_1_7);
 440     pcmc->smbios_defaults = false;
 441     pcmc->gigabyte_align = false;
 442 }
 443
 444 DEFINE_Q35_MACHINE(v1_7, "pc-q35-1.7", pc_compat_1_7,
 445                    pc_q35_1_7_machine_options);
 446
 447
 448 static void pc_q35_1_6_machine_options(MachineClass *m)
 449 {
 450     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
 451     pc_q35_machine_options(m);
 452     m->hw_version = "1.6.0";
 453     m->rom_file_has_mr = false;
 454     SET_MACHINE_COMPAT(m, PC_COMPAT_1_6);
 455     pcmc->has_acpi_build = false;
 456 }
 457
 458 DEFINE_Q35_MACHINE(v1_6, "pc-q35-1.6", pc_compat_1_6,
 459                    pc_q35_1_6_machine_options);
 460
 461
 462 static void pc_q35_1_5_machine_options(MachineClass *m)
 463 {
 464     pc_q35_1_6_machine_options(m);
 465     m->hw_version = "1.5.0";
 466     SET_MACHINE_COMPAT(m, PC_COMPAT_1_5);
 467 }
 468
 469 DEFINE_Q35_MACHINE(v1_5, "pc-q35-1.5", pc_compat_1_5,
 470                    pc_q35_1_5_machine_options);
 471
 472
 473 static void pc_q35_1_4_machine_options(MachineClass *m)
 474 {
 475     pc_q35_1_5_machine_options(m);
 476     m->hw_version = "1.4.0";
 477     m->hot_add_cpu = NULL;
 478     SET_MACHINE_COMPAT(m, PC_COMPAT_1_4);
 479 }
 480
 481 DEFINE_Q35_MACHINE(v1_4, "pc-q35-1.4", pc_compat_1_4,
 482                    pc_q35_1_4_machine_options);