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memory: Replace skip_dump flag with "ram_device"
[qemu/ar7.git] / memory.c
blob7ffcff1d341ab87bab194f9781c045f834914c1c
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "qemu/osdep.h"
17 #include "qapi/error.h"
18 #include "qemu-common.h"
19 #include "cpu.h"
20 #include "exec/memory.h"
21 #include "exec/address-spaces.h"
22 #include "exec/ioport.h"
23 #include "qapi/visitor.h"
24 #include "qemu/bitops.h"
25 #include "qemu/error-report.h"
26 #include "qom/object.h"
27 #include "trace.h"
28
29 #include "exec/memory-internal.h"
30 #include "exec/ram_addr.h"
31 #include "sysemu/kvm.h"
32 #include "sysemu/sysemu.h"
33
34 //#define DEBUG_UNASSIGNED
35
36 static unsigned memory_region_transaction_depth;
37 static bool memory_region_update_pending;
38 static bool ioeventfd_update_pending;
39 static bool global_dirty_log = false;
40
41 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
42 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
43
44 static QTAILQ_HEAD(, AddressSpace) address_spaces
45 = QTAILQ_HEAD_INITIALIZER(address_spaces);
46
47 typedef struct AddrRange AddrRange;
48
49 /*
50 * Note that signed integers are needed for negative offsetting in aliases
51 * (large MemoryRegion::alias_offset).
52 */
53 struct AddrRange {
54 Int128 start;
55 Int128 size;
56 };
57
58 static AddrRange addrrange_make(Int128 start, Int128 size)
59 {
60 return (AddrRange) { start, size };
61 }
62
63 static bool addrrange_equal(AddrRange r1, AddrRange r2)
64 {
65 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
66 }
67
68 static Int128 addrrange_end(AddrRange r)
69 {
70 return int128_add(r.start, r.size);
71 }
72
73 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
74 {
75 int128_addto(&range.start, delta);
76 return range;
77 }
78
79 static bool addrrange_contains(AddrRange range, Int128 addr)
80 {
81 return int128_ge(addr, range.start)
82 && int128_lt(addr, addrrange_end(range));
83 }
84
85 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
86 {
87 return addrrange_contains(r1, r2.start)
88 || addrrange_contains(r2, r1.start);
89 }
90
91 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
92 {
93 Int128 start = int128_max(r1.start, r2.start);
94 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
95 return addrrange_make(start, int128_sub(end, start));
96 }
97
98 enum ListenerDirection { Forward, Reverse };
99
100 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
101 do { \
102 MemoryListener *_listener; \
103 \
104 switch (_direction) { \
105 case Forward: \
106 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
107 if (_listener->_callback) { \
108 _listener->_callback(_listener, ##_args); \
109 } \
110 } \
111 break; \
112 case Reverse: \
113 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
114 memory_listeners, link) { \
115 if (_listener->_callback) { \
116 _listener->_callback(_listener, ##_args); \
117 } \
118 } \
119 break; \
120 default: \
121 abort(); \
122 } \
123 } while (0)
124
125 #define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \
126 do { \
127 MemoryListener *_listener; \
128 struct memory_listeners_as *list = &(_as)->listeners; \
129 \
130 switch (_direction) { \
131 case Forward: \
132 QTAILQ_FOREACH(_listener, list, link_as) { \
133 if (_listener->_callback) { \
134 _listener->_callback(_listener, _section, ##_args); \
135 } \
136 } \
137 break; \
138 case Reverse: \
139 QTAILQ_FOREACH_REVERSE(_listener, list, memory_listeners_as, \
140 link_as) { \
141 if (_listener->_callback) { \
142 _listener->_callback(_listener, _section, ##_args); \
143 } \
144 } \
145 break; \
146 default: \
147 abort(); \
148 } \
149 } while (0)
150
151 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
152 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
153 do { \
154 MemoryRegionSection mrs = section_from_flat_range(fr, as); \
155 MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args); \
156 } while(0)
157
158 struct CoalescedMemoryRange {
159 AddrRange addr;
160 QTAILQ_ENTRY(CoalescedMemoryRange) link;
161 };
162
163 struct MemoryRegionIoeventfd {
164 AddrRange addr;
165 bool match_data;
166 uint64_t data;
167 EventNotifier *e;
168 };
169
170 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
171 MemoryRegionIoeventfd b)
172 {
173 if (int128_lt(a.addr.start, b.addr.start)) {
174 return true;
175 } else if (int128_gt(a.addr.start, b.addr.start)) {
176 return false;
177 } else if (int128_lt(a.addr.size, b.addr.size)) {
178 return true;
179 } else if (int128_gt(a.addr.size, b.addr.size)) {
180 return false;
181 } else if (a.match_data < b.match_data) {
182 return true;
183 } else if (a.match_data > b.match_data) {
184 return false;
185 } else if (a.match_data) {
186 if (a.data < b.data) {
187 return true;
188 } else if (a.data > b.data) {
189 return false;
190 }
191 }
192 if (a.e < b.e) {
193 return true;
194 } else if (a.e > b.e) {
195 return false;
196 }
197 return false;
198 }
199
200 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
201 MemoryRegionIoeventfd b)
202 {
203 return !memory_region_ioeventfd_before(a, b)
204 && !memory_region_ioeventfd_before(b, a);
205 }
206
207 typedef struct FlatRange FlatRange;
208 typedef struct FlatView FlatView;
209
210 /* Range of memory in the global map. Addresses are absolute. */
211 struct FlatRange {
212 MemoryRegion *mr;
213 hwaddr offset_in_region;
214 AddrRange addr;
215 uint8_t dirty_log_mask;
216 bool romd_mode;
217 bool readonly;
218 };
219
220 /* Flattened global view of current active memory hierarchy. Kept in sorted
221 * order.
222 */
223 struct FlatView {
224 struct rcu_head rcu;
225 unsigned ref;
226 FlatRange *ranges;
227 unsigned nr;
228 unsigned nr_allocated;
229 };
230
231 typedef struct AddressSpaceOps AddressSpaceOps;
232
233 #define FOR_EACH_FLAT_RANGE(var, view) \
234 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
235
236 static inline MemoryRegionSection
237 section_from_flat_range(FlatRange *fr, AddressSpace *as)
238 {
239 return (MemoryRegionSection) {
240 .mr = fr->mr,
241 .address_space = as,
242 .offset_within_region = fr->offset_in_region,
243 .size = fr->addr.size,
244 .offset_within_address_space = int128_get64(fr->addr.start),
245 .readonly = fr->readonly,
246 };
247 }
248
249 static bool flatrange_equal(FlatRange *a, FlatRange *b)
250 {
251 return a->mr == b->mr
252 && addrrange_equal(a->addr, b->addr)
253 && a->offset_in_region == b->offset_in_region
254 && a->romd_mode == b->romd_mode
255 && a->readonly == b->readonly;
256 }
257
258 static void flatview_init(FlatView *view)
259 {
260 view->ref = 1;
261 view->ranges = NULL;
262 view->nr = 0;
263 view->nr_allocated = 0;
264 }
265
266 /* Insert a range into a given position. Caller is responsible for maintaining
267 * sorting order.
268 */
269 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
270 {
271 if (view->nr == view->nr_allocated) {
272 view->nr_allocated = MAX(2 * view->nr, 10);
273 view->ranges = g_realloc(view->ranges,
274 view->nr_allocated * sizeof(*view->ranges));
275 }
276 memmove(view->ranges + pos + 1, view->ranges + pos,
277 (view->nr - pos) * sizeof(FlatRange));
278 view->ranges[pos] = *range;
279 memory_region_ref(range->mr);
280 ++view->nr;
281 }
282
283 static void flatview_destroy(FlatView *view)
284 {
285 int i;
286
287 for (i = 0; i < view->nr; i++) {
288 memory_region_unref(view->ranges[i].mr);
289 }
290 g_free(view->ranges);
291 g_free(view);
292 }
293
294 static void flatview_ref(FlatView *view)
295 {
296 atomic_inc(&view->ref);
297 }
298
299 static void flatview_unref(FlatView *view)
300 {
301 if (atomic_fetch_dec(&view->ref) == 1) {
302 flatview_destroy(view);
303 }
304 }
305
306 static bool can_merge(FlatRange *r1, FlatRange *r2)
307 {
308 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
309 && r1->mr == r2->mr
310 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
311 r1->addr.size),
312 int128_make64(r2->offset_in_region))
313 && r1->dirty_log_mask == r2->dirty_log_mask
314 && r1->romd_mode == r2->romd_mode
315 && r1->readonly == r2->readonly;
316 }
317
318 /* Attempt to simplify a view by merging adjacent ranges */
319 static void flatview_simplify(FlatView *view)
320 {
321 unsigned i, j;
322
323 i = 0;
324 while (i < view->nr) {
325 j = i + 1;
326 while (j < view->nr
327 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
328 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
329 ++j;
330 }
331 ++i;
332 memmove(&view->ranges[i], &view->ranges[j],
333 (view->nr - j) * sizeof(view->ranges[j]));
334 view->nr -= j - i;
335 }
336 }
337
338 static bool memory_region_big_endian(MemoryRegion *mr)
339 {
340 #ifdef TARGET_WORDS_BIGENDIAN
341 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
342 #else
343 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
344 #endif
345 }
346
347 static bool memory_region_wrong_endianness(MemoryRegion *mr)
348 {
349 #ifdef TARGET_WORDS_BIGENDIAN
350 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
351 #else
352 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
353 #endif
354 }
355
356 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
357 {
358 if (memory_region_wrong_endianness(mr)) {
359 switch (size) {
360 case 1:
361 break;
362 case 2:
363 *data = bswap16(*data);
364 break;
365 case 4:
366 *data = bswap32(*data);
367 break;
368 case 8:
369 *data = bswap64(*data);
370 break;
371 default:
372 abort();
373 }
374 }
375 }
376
377 static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
378 {
379 MemoryRegion *root;
380 hwaddr abs_addr = offset;
381
382 abs_addr += mr->addr;
383 for (root = mr; root->container; ) {
384 root = root->container;
385 abs_addr += root->addr;
386 }
387
388 return abs_addr;
389 }
390
391 static int get_cpu_index(void)
392 {
393 if (current_cpu) {
394 return current_cpu->cpu_index;
395 }
396 return -1;
397 }
398
399 static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr,
400 hwaddr addr,
401 uint64_t *value,
402 unsigned size,
403 unsigned shift,
404 uint64_t mask,
405 MemTxAttrs attrs)
406 {
407 uint64_t tmp;
408
409 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
410 if (mr->subpage) {
411 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
412 } else if (mr == &io_mem_notdirty) {
413 /* Accesses to code which has previously been translated into a TB show
414 * up in the MMIO path, as accesses to the io_mem_notdirty
415 * MemoryRegion. */
416 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
417 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
418 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
419 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
420 }
421 *value |= (tmp & mask) << shift;
422 return MEMTX_OK;
423 }
424
425 static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
426 hwaddr addr,
427 uint64_t *value,
428 unsigned size,
429 unsigned shift,
430 uint64_t mask,
431 MemTxAttrs attrs)
432 {
433 uint64_t tmp;
434
435 tmp = mr->ops->read(mr->opaque, addr, size);
436 if (mr->subpage) {
437 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
438 } else if (mr == &io_mem_notdirty) {
439 /* Accesses to code which has previously been translated into a TB show
440 * up in the MMIO path, as accesses to the io_mem_notdirty
441 * MemoryRegion. */
442 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
443 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
444 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
445 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
446 }
447 *value |= (tmp & mask) << shift;
448 return MEMTX_OK;
449 }
450
451 static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
452 hwaddr addr,
453 uint64_t *value,
454 unsigned size,
455 unsigned shift,
456 uint64_t mask,
457 MemTxAttrs attrs)
458 {
459 uint64_t tmp = 0;
460 MemTxResult r;
461
462 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
463 if (mr->subpage) {
464 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
465 } else if (mr == &io_mem_notdirty) {
466 /* Accesses to code which has previously been translated into a TB show
467 * up in the MMIO path, as accesses to the io_mem_notdirty
468 * MemoryRegion. */
469 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
470 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
471 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
472 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
473 }
474 *value |= (tmp & mask) << shift;
475 return r;
476 }
477
478 static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr,
479 hwaddr addr,
480 uint64_t *value,
481 unsigned size,
482 unsigned shift,
483 uint64_t mask,
484 MemTxAttrs attrs)
485 {
486 uint64_t tmp;
487
488 tmp = (*value >> shift) & mask;
489 if (mr->subpage) {
490 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
491 } else if (mr == &io_mem_notdirty) {
492 /* Accesses to code which has previously been translated into a TB show
493 * up in the MMIO path, as accesses to the io_mem_notdirty
494 * MemoryRegion. */
495 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
496 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
497 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
498 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
499 }
500 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
501 return MEMTX_OK;
502 }
503
504 static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
505 hwaddr addr,
506 uint64_t *value,
507 unsigned size,
508 unsigned shift,
509 uint64_t mask,
510 MemTxAttrs attrs)
511 {
512 uint64_t tmp;
513
514 tmp = (*value >> shift) & mask;
515 if (mr->subpage) {
516 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
517 } else if (mr == &io_mem_notdirty) {
518 /* Accesses to code which has previously been translated into a TB show
519 * up in the MMIO path, as accesses to the io_mem_notdirty
520 * MemoryRegion. */
521 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
522 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
523 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
524 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
525 }
526 mr->ops->write(mr->opaque, addr, tmp, size);
527 return MEMTX_OK;
528 }
529
530 static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
531 hwaddr addr,
532 uint64_t *value,
533 unsigned size,
534 unsigned shift,
535 uint64_t mask,
536 MemTxAttrs attrs)
537 {
538 uint64_t tmp;
539
540 tmp = (*value >> shift) & mask;
541 if (mr->subpage) {
542 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
543 } else if (mr == &io_mem_notdirty) {
544 /* Accesses to code which has previously been translated into a TB show
545 * up in the MMIO path, as accesses to the io_mem_notdirty
546 * MemoryRegion. */
547 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
548 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
549 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
550 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
551 }
552 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
553 }
554
555 static MemTxResult access_with_adjusted_size(hwaddr addr,
556 uint64_t *value,
557 unsigned size,
558 unsigned access_size_min,
559 unsigned access_size_max,
560 MemTxResult (*access)(MemoryRegion *mr,
561 hwaddr addr,
562 uint64_t *value,
563 unsigned size,
564 unsigned shift,
565 uint64_t mask,
566 MemTxAttrs attrs),
567 MemoryRegion *mr,
568 MemTxAttrs attrs)
569 {
570 uint64_t access_mask;
571 unsigned access_size;
572 unsigned i;
573 MemTxResult r = MEMTX_OK;
574
575 if (!access_size_min) {
576 access_size_min = 1;
577 }
578 if (!access_size_max) {
579 access_size_max = 4;
580 }
581
582 /* FIXME: support unaligned access? */
583 access_size = MAX(MIN(size, access_size_max), access_size_min);
584 access_mask = -1ULL >> (64 - access_size * 8);
585 if (memory_region_big_endian(mr)) {
586 for (i = 0; i < size; i += access_size) {
587 r |= access(mr, addr + i, value, access_size,
588 (size - access_size - i) * 8, access_mask, attrs);
589 }
590 } else {
591 for (i = 0; i < size; i += access_size) {
592 r |= access(mr, addr + i, value, access_size, i * 8,
593 access_mask, attrs);
594 }
595 }
596 return r;
597 }
598
599 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
600 {
601 AddressSpace *as;
602
603 while (mr->container) {
604 mr = mr->container;
605 }
606 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
607 if (mr == as->root) {
608 return as;
609 }
610 }
611 return NULL;
612 }
613
614 /* Render a memory region into the global view. Ranges in @view obscure
615 * ranges in @mr.
616 */
617 static void render_memory_region(FlatView *view,
618 MemoryRegion *mr,
619 Int128 base,
620 AddrRange clip,
621 bool readonly)
622 {
623 MemoryRegion *subregion;
624 unsigned i;
625 hwaddr offset_in_region;
626 Int128 remain;
627 Int128 now;
628 FlatRange fr;
629 AddrRange tmp;
630
631 if (!mr->enabled) {
632 return;
633 }
634
635 int128_addto(&base, int128_make64(mr->addr));
636 readonly |= mr->readonly;
637
638 tmp = addrrange_make(base, mr->size);
639
640 if (!addrrange_intersects(tmp, clip)) {
641 return;
642 }
643
644 clip = addrrange_intersection(tmp, clip);
645
646 if (mr->alias) {
647 int128_subfrom(&base, int128_make64(mr->alias->addr));
648 int128_subfrom(&base, int128_make64(mr->alias_offset));
649 render_memory_region(view, mr->alias, base, clip, readonly);
650 return;
651 }
652
653 /* Render subregions in priority order. */
654 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
655 render_memory_region(view, subregion, base, clip, readonly);
656 }
657
658 if (!mr->terminates) {
659 return;
660 }
661
662 offset_in_region = int128_get64(int128_sub(clip.start, base));
663 base = clip.start;
664 remain = clip.size;
665
666 fr.mr = mr;
667 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
668 fr.romd_mode = mr->romd_mode;
669 fr.readonly = readonly;
670
671 /* Render the region itself into any gaps left by the current view. */
672 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
673 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
674 continue;
675 }
676 if (int128_lt(base, view->ranges[i].addr.start)) {
677 now = int128_min(remain,
678 int128_sub(view->ranges[i].addr.start, base));
679 fr.offset_in_region = offset_in_region;
680 fr.addr = addrrange_make(base, now);
681 flatview_insert(view, i, &fr);
682 ++i;
683 int128_addto(&base, now);
684 offset_in_region += int128_get64(now);
685 int128_subfrom(&remain, now);
686 }
687 now = int128_sub(int128_min(int128_add(base, remain),
688 addrrange_end(view->ranges[i].addr)),
689 base);
690 int128_addto(&base, now);
691 offset_in_region += int128_get64(now);
692 int128_subfrom(&remain, now);
693 }
694 if (int128_nz(remain)) {
695 fr.offset_in_region = offset_in_region;
696 fr.addr = addrrange_make(base, remain);
697 flatview_insert(view, i, &fr);
698 }
699 }
700
701 /* Render a memory topology into a list of disjoint absolute ranges. */
702 static FlatView *generate_memory_topology(MemoryRegion *mr)
703 {
704 FlatView *view;
705
706 view = g_new(FlatView, 1);
707 flatview_init(view);
708
709 if (mr) {
710 render_memory_region(view, mr, int128_zero(),
711 addrrange_make(int128_zero(), int128_2_64()), false);
712 }
713 flatview_simplify(view);
714
715 return view;
716 }
717
718 static void address_space_add_del_ioeventfds(AddressSpace *as,
719 MemoryRegionIoeventfd *fds_new,
720 unsigned fds_new_nb,
721 MemoryRegionIoeventfd *fds_old,
722 unsigned fds_old_nb)
723 {
724 unsigned iold, inew;
725 MemoryRegionIoeventfd *fd;
726 MemoryRegionSection section;
727
728 /* Generate a symmetric difference of the old and new fd sets, adding
729 * and deleting as necessary.
730 */
731
732 iold = inew = 0;
733 while (iold < fds_old_nb || inew < fds_new_nb) {
734 if (iold < fds_old_nb
735 && (inew == fds_new_nb
736 || memory_region_ioeventfd_before(fds_old[iold],
737 fds_new[inew]))) {
738 fd = &fds_old[iold];
739 section = (MemoryRegionSection) {
740 .address_space = as,
741 .offset_within_address_space = int128_get64(fd->addr.start),
742 .size = fd->addr.size,
743 };
744 MEMORY_LISTENER_CALL(as, eventfd_del, Forward, &section,
745 fd->match_data, fd->data, fd->e);
746 ++iold;
747 } else if (inew < fds_new_nb
748 && (iold == fds_old_nb
749 || memory_region_ioeventfd_before(fds_new[inew],
750 fds_old[iold]))) {
751 fd = &fds_new[inew];
752 section = (MemoryRegionSection) {
753 .address_space = as,
754 .offset_within_address_space = int128_get64(fd->addr.start),
755 .size = fd->addr.size,
756 };
757 MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, &section,
758 fd->match_data, fd->data, fd->e);
759 ++inew;
760 } else {
761 ++iold;
762 ++inew;
763 }
764 }
765 }
766
767 static FlatView *address_space_get_flatview(AddressSpace *as)
768 {
769 FlatView *view;
770
771 rcu_read_lock();
772 view = atomic_rcu_read(&as->current_map);
773 flatview_ref(view);
774 rcu_read_unlock();
775 return view;
776 }
777
778 static void address_space_update_ioeventfds(AddressSpace *as)
779 {
780 FlatView *view;
781 FlatRange *fr;
782 unsigned ioeventfd_nb = 0;
783 MemoryRegionIoeventfd *ioeventfds = NULL;
784 AddrRange tmp;
785 unsigned i;
786
787 view = address_space_get_flatview(as);
788 FOR_EACH_FLAT_RANGE(fr, view) {
789 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
790 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
791 int128_sub(fr->addr.start,
792 int128_make64(fr->offset_in_region)));
793 if (addrrange_intersects(fr->addr, tmp)) {
794 ++ioeventfd_nb;
795 ioeventfds = g_realloc(ioeventfds,
796 ioeventfd_nb * sizeof(*ioeventfds));
797 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
798 ioeventfds[ioeventfd_nb-1].addr = tmp;
799 }
800 }
801 }
802
803 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
804 as->ioeventfds, as->ioeventfd_nb);
805
806 g_free(as->ioeventfds);
807 as->ioeventfds = ioeventfds;
808 as->ioeventfd_nb = ioeventfd_nb;
809 flatview_unref(view);
810 }
811
812 static void address_space_update_topology_pass(AddressSpace *as,
813 const FlatView *old_view,
814 const FlatView *new_view,
815 bool adding)
816 {
817 unsigned iold, inew;
818 FlatRange *frold, *frnew;
819
820 /* Generate a symmetric difference of the old and new memory maps.
821 * Kill ranges in the old map, and instantiate ranges in the new map.
822 */
823 iold = inew = 0;
824 while (iold < old_view->nr || inew < new_view->nr) {
825 if (iold < old_view->nr) {
826 frold = &old_view->ranges[iold];
827 } else {
828 frold = NULL;
829 }
830 if (inew < new_view->nr) {
831 frnew = &new_view->ranges[inew];
832 } else {
833 frnew = NULL;
834 }
835
836 if (frold
837 && (!frnew
838 || int128_lt(frold->addr.start, frnew->addr.start)
839 || (int128_eq(frold->addr.start, frnew->addr.start)
840 && !flatrange_equal(frold, frnew)))) {
841 /* In old but not in new, or in both but attributes changed. */
842
843 if (!adding) {
844 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
845 }
846
847 ++iold;
848 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
849 /* In both and unchanged (except logging may have changed) */
850
851 if (adding) {
852 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
853 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
854 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
855 frold->dirty_log_mask,
856 frnew->dirty_log_mask);
857 }
858 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
859 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
860 frold->dirty_log_mask,
861 frnew->dirty_log_mask);
862 }
863 }
864
865 ++iold;
866 ++inew;
867 } else {
868 /* In new */
869
870 if (adding) {
871 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
872 }
873
874 ++inew;
875 }
876 }
877 }
878
879
880 static void address_space_update_topology(AddressSpace *as)
881 {
882 FlatView *old_view = address_space_get_flatview(as);
883 FlatView *new_view = generate_memory_topology(as->root);
884
885 address_space_update_topology_pass(as, old_view, new_view, false);
886 address_space_update_topology_pass(as, old_view, new_view, true);
887
888 /* Writes are protected by the BQL. */
889 atomic_rcu_set(&as->current_map, new_view);
890 call_rcu(old_view, flatview_unref, rcu);
891
892 /* Note that all the old MemoryRegions are still alive up to this
893 * point. This relieves most MemoryListeners from the need to
894 * ref/unref the MemoryRegions they get---unless they use them
895 * outside the iothread mutex, in which case precise reference
896 * counting is necessary.
897 */
898 flatview_unref(old_view);
899
900 address_space_update_ioeventfds(as);
901 }
902
903 void memory_region_transaction_begin(void)
904 {
905 qemu_flush_coalesced_mmio_buffer();
906 ++memory_region_transaction_depth;
907 }
908
909 static void memory_region_clear_pending(void)
910 {
911 memory_region_update_pending = false;
912 ioeventfd_update_pending = false;
913 }
914
915 void memory_region_transaction_commit(void)
916 {
917 AddressSpace *as;
918
919 assert(memory_region_transaction_depth);
920 --memory_region_transaction_depth;
921 if (!memory_region_transaction_depth) {
922 if (memory_region_update_pending) {
923 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
924
925 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
926 address_space_update_topology(as);
927 }
928
929 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
930 } else if (ioeventfd_update_pending) {
931 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
932 address_space_update_ioeventfds(as);
933 }
934 }
935 memory_region_clear_pending();
936 }
937 }
938
939 static void memory_region_destructor_none(MemoryRegion *mr)
940 {
941 }
942
943 static void memory_region_destructor_ram(MemoryRegion *mr)
944 {
945 qemu_ram_free(mr->ram_block);
946 }
947
948 static bool memory_region_need_escape(char c)
949 {
950 return c == '/' || c == '[' || c == '\\' || c == ']';
951 }
952
953 static char *memory_region_escape_name(const char *name)
954 {
955 const char *p;
956 char *escaped, *q;
957 uint8_t c;
958 size_t bytes = 0;
959
960 for (p = name; *p; p++) {
961 bytes += memory_region_need_escape(*p) ? 4 : 1;
962 }
963 if (bytes == p - name) {
964 return g_memdup(name, bytes + 1);
965 }
966
967 escaped = g_malloc(bytes + 1);
968 for (p = name, q = escaped; *p; p++) {
969 c = *p;
970 if (unlikely(memory_region_need_escape(c))) {
971 *q++ = '\\';
972 *q++ = 'x';
973 *q++ = "0123456789abcdef"[c >> 4];
974 c = "0123456789abcdef"[c & 15];
975 }
976 *q++ = c;
977 }
978 *q = 0;
979 return escaped;
980 }
981
982 void memory_region_init(MemoryRegion *mr,
983 Object *owner,
984 const char *name,
985 uint64_t size)
986 {
987 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
988 mr->size = int128_make64(size);
989 if (size == UINT64_MAX) {
990 mr->size = int128_2_64();
991 }
992 mr->name = g_strdup(name);
993 mr->owner = owner;
994 mr->ram_block = NULL;
995
996 if (name) {
997 char *escaped_name = memory_region_escape_name(name);
998 char *name_array = g_strdup_printf("%s[*]", escaped_name);
999
1000 if (!owner) {
1001 owner = container_get(qdev_get_machine(), "/unattached");
1002 }
1003
1004 object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
1005 object_unref(OBJECT(mr));
1006 g_free(name_array);
1007 g_free(escaped_name);
1008 }
1009 }
1010
1011 static void memory_region_get_addr(Object *obj, Visitor *v, const char *name,
1012 void *opaque, Error **errp)
1013 {
1014 MemoryRegion *mr = MEMORY_REGION(obj);
1015 uint64_t value = mr->addr;
1016
1017 visit_type_uint64(v, name, &value, errp);
1018 }
1019
1020 static void memory_region_get_container(Object *obj, Visitor *v,
1021 const char *name, void *opaque,
1022 Error **errp)
1023 {
1024 MemoryRegion *mr = MEMORY_REGION(obj);
1025 gchar *path = (gchar *)"";
1026
1027 if (mr->container) {
1028 path = object_get_canonical_path(OBJECT(mr->container));
1029 }
1030 visit_type_str(v, name, &path, errp);
1031 if (mr->container) {
1032 g_free(path);
1033 }
1034 }
1035
1036 static Object *memory_region_resolve_container(Object *obj, void *opaque,
1037 const char *part)
1038 {
1039 MemoryRegion *mr = MEMORY_REGION(obj);
1040
1041 return OBJECT(mr->container);
1042 }
1043
1044 static void memory_region_get_priority(Object *obj, Visitor *v,
1045 const char *name, void *opaque,
1046 Error **errp)
1047 {
1048 MemoryRegion *mr = MEMORY_REGION(obj);
1049 int32_t value = mr->priority;
1050
1051 visit_type_int32(v, name, &value, errp);
1052 }
1053
1054 static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1055 void *opaque, Error **errp)
1056 {
1057 MemoryRegion *mr = MEMORY_REGION(obj);
1058 uint64_t value = memory_region_size(mr);
1059
1060 visit_type_uint64(v, name, &value, errp);
1061 }
1062
1063 static void memory_region_initfn(Object *obj)
1064 {
1065 MemoryRegion *mr = MEMORY_REGION(obj);
1066 ObjectProperty *op;
1067
1068 mr->ops = &unassigned_mem_ops;
1069 mr->enabled = true;
1070 mr->romd_mode = true;
1071 mr->global_locking = true;
1072 mr->destructor = memory_region_destructor_none;
1073 QTAILQ_INIT(&mr->subregions);
1074 QTAILQ_INIT(&mr->coalesced);
1075
1076 op = object_property_add(OBJECT(mr), "container",
1077 "link<" TYPE_MEMORY_REGION ">",
1078 memory_region_get_container,
1079 NULL, /* memory_region_set_container */
1080 NULL, NULL, &error_abort);
1081 op->resolve = memory_region_resolve_container;
1082
1083 object_property_add(OBJECT(mr), "addr", "uint64",
1084 memory_region_get_addr,
1085 NULL, /* memory_region_set_addr */
1086 NULL, NULL, &error_abort);
1087 object_property_add(OBJECT(mr), "priority", "uint32",
1088 memory_region_get_priority,
1089 NULL, /* memory_region_set_priority */
1090 NULL, NULL, &error_abort);
1091 object_property_add(OBJECT(mr), "size", "uint64",
1092 memory_region_get_size,
1093 NULL, /* memory_region_set_size, */
1094 NULL, NULL, &error_abort);
1095 }
1096
1097 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1098 unsigned size)
1099 {
1100 #ifdef DEBUG_UNASSIGNED
1101 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
1102 #endif
1103 if (current_cpu != NULL) {
1104 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
1105 }
1106 return 0;
1107 }
1108
1109 static void unassigned_mem_write(void *opaque, hwaddr addr,
1110 uint64_t val, unsigned size)
1111 {
1112 #ifdef DEBUG_UNASSIGNED
1113 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1114 #endif
1115 if (current_cpu != NULL) {
1116 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
1117 }
1118 }
1119
1120 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1121 unsigned size, bool is_write)
1122 {
1123 return false;
1124 }
1125
1126 const MemoryRegionOps unassigned_mem_ops = {
1127 .valid.accepts = unassigned_mem_accepts,
1128 .endianness = DEVICE_NATIVE_ENDIAN,
1129 };
1130
1131 bool memory_region_access_valid(MemoryRegion *mr,
1132 hwaddr addr,
1133 unsigned size,
1134 bool is_write)
1135 {
1136 int access_size_min, access_size_max;
1137 int access_size, i;
1138
1139 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1140 return false;
1141 }
1142
1143 if (!mr->ops->valid.accepts) {
1144 return true;
1145 }
1146
1147 access_size_min = mr->ops->valid.min_access_size;
1148 if (!mr->ops->valid.min_access_size) {
1149 access_size_min = 1;
1150 }
1151
1152 access_size_max = mr->ops->valid.max_access_size;
1153 if (!mr->ops->valid.max_access_size) {
1154 access_size_max = 4;
1155 }
1156
1157 access_size = MAX(MIN(size, access_size_max), access_size_min);
1158 for (i = 0; i < size; i += access_size) {
1159 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1160 is_write)) {
1161 return false;
1162 }
1163 }
1164
1165 return true;
1166 }
1167
1168 static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1169 hwaddr addr,
1170 uint64_t *pval,
1171 unsigned size,
1172 MemTxAttrs attrs)
1173 {
1174 *pval = 0;
1175
1176 if (mr->ops->read) {
1177 return access_with_adjusted_size(addr, pval, size,
1178 mr->ops->impl.min_access_size,
1179 mr->ops->impl.max_access_size,
1180 memory_region_read_accessor,
1181 mr, attrs);
1182 } else if (mr->ops->read_with_attrs) {
1183 return access_with_adjusted_size(addr, pval, size,
1184 mr->ops->impl.min_access_size,
1185 mr->ops->impl.max_access_size,
1186 memory_region_read_with_attrs_accessor,
1187 mr, attrs);
1188 } else {
1189 return access_with_adjusted_size(addr, pval, size, 1, 4,
1190 memory_region_oldmmio_read_accessor,
1191 mr, attrs);
1192 }
1193 }
1194
1195 MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1196 hwaddr addr,
1197 uint64_t *pval,
1198 unsigned size,
1199 MemTxAttrs attrs)
1200 {
1201 MemTxResult r;
1202
1203 if (!memory_region_access_valid(mr, addr, size, false)) {
1204 *pval = unassigned_mem_read(mr, addr, size);
1205 return MEMTX_DECODE_ERROR;
1206 }
1207
1208 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1209 adjust_endianness(mr, pval, size);
1210 return r;
1211 }
1212
1213 /* Return true if an eventfd was signalled */
1214 static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1215 hwaddr addr,
1216 uint64_t data,
1217 unsigned size,
1218 MemTxAttrs attrs)
1219 {
1220 MemoryRegionIoeventfd ioeventfd = {
1221 .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1222 .data = data,
1223 };
1224 unsigned i;
1225
1226 for (i = 0; i < mr->ioeventfd_nb; i++) {
1227 ioeventfd.match_data = mr->ioeventfds[i].match_data;
1228 ioeventfd.e = mr->ioeventfds[i].e;
1229
1230 if (memory_region_ioeventfd_equal(ioeventfd, mr->ioeventfds[i])) {
1231 event_notifier_set(ioeventfd.e);
1232 return true;
1233 }
1234 }
1235
1236 return false;
1237 }
1238
1239 MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1240 hwaddr addr,
1241 uint64_t data,
1242 unsigned size,
1243 MemTxAttrs attrs)
1244 {
1245 if (!memory_region_access_valid(mr, addr, size, true)) {
1246 unassigned_mem_write(mr, addr, data, size);
1247 return MEMTX_DECODE_ERROR;
1248 }
1249
1250 adjust_endianness(mr, &data, size);
1251
1252 if ((!kvm_eventfds_enabled()) &&
1253 memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1254 return MEMTX_OK;
1255 }
1256
1257 if (mr->ops->write) {
1258 return access_with_adjusted_size(addr, &data, size,
1259 mr->ops->impl.min_access_size,
1260 mr->ops->impl.max_access_size,
1261 memory_region_write_accessor, mr,
1262 attrs);
1263 } else if (mr->ops->write_with_attrs) {
1264 return
1265 access_with_adjusted_size(addr, &data, size,
1266 mr->ops->impl.min_access_size,
1267 mr->ops->impl.max_access_size,
1268 memory_region_write_with_attrs_accessor,
1269 mr, attrs);
1270 } else {
1271 return access_with_adjusted_size(addr, &data, size, 1, 4,
1272 memory_region_oldmmio_write_accessor,
1273 mr, attrs);
1274 }
1275 }
1276
1277 void memory_region_init_io(MemoryRegion *mr,
1278 Object *owner,
1279 const MemoryRegionOps *ops,
1280 void *opaque,
1281 const char *name,
1282 uint64_t size)
1283 {
1284 memory_region_init(mr, owner, name, size);
1285 mr->ops = ops ? ops : &unassigned_mem_ops;
1286 mr->opaque = opaque;
1287 mr->terminates = true;
1288 }
1289
1290 void memory_region_init_ram(MemoryRegion *mr,
1291 Object *owner,
1292 const char *name,
1293 uint64_t size,
1294 Error **errp)
1295 {
1296 memory_region_init(mr, owner, name, size);
1297 mr->ram = true;
1298 mr->terminates = true;
1299 mr->destructor = memory_region_destructor_ram;
1300 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1301 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1302 }
1303
1304 void memory_region_init_resizeable_ram(MemoryRegion *mr,
1305 Object *owner,
1306 const char *name,
1307 uint64_t size,
1308 uint64_t max_size,
1309 void (*resized)(const char*,
1310 uint64_t length,
1311 void *host),
1312 Error **errp)
1313 {
1314 memory_region_init(mr, owner, name, size);
1315 mr->ram = true;
1316 mr->terminates = true;
1317 mr->destructor = memory_region_destructor_ram;
1318 mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1319 mr, errp);
1320 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1321 }
1322
1323 #ifdef __linux__
1324 void memory_region_init_ram_from_file(MemoryRegion *mr,
1325 struct Object *owner,
1326 const char *name,
1327 uint64_t size,
1328 bool share,
1329 const char *path,
1330 Error **errp)
1331 {
1332 memory_region_init(mr, owner, name, size);
1333 mr->ram = true;
1334 mr->terminates = true;
1335 mr->destructor = memory_region_destructor_ram;
1336 mr->ram_block = qemu_ram_alloc_from_file(size, mr, share, path, errp);
1337 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1338 }
1339 #endif
1340
1341 void memory_region_init_ram_ptr(MemoryRegion *mr,
1342 Object *owner,
1343 const char *name,
1344 uint64_t size,
1345 void *ptr)
1346 {
1347 memory_region_init(mr, owner, name, size);
1348 mr->ram = true;
1349 mr->terminates = true;
1350 mr->destructor = memory_region_destructor_ram;
1351 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1352
1353 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1354 assert(ptr != NULL);
1355 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1356 }
1357
1358 void memory_region_init_ram_device_ptr(MemoryRegion *mr,
1359 Object *owner,
1360 const char *name,
1361 uint64_t size,
1362 void *ptr)
1363 {
1364 memory_region_init_ram_ptr(mr, owner, name, size, ptr);
1365 mr->ram_device = true;
1366 }
1367
1368 void memory_region_init_alias(MemoryRegion *mr,
1369 Object *owner,
1370 const char *name,
1371 MemoryRegion *orig,
1372 hwaddr offset,
1373 uint64_t size)
1374 {
1375 memory_region_init(mr, owner, name, size);
1376 mr->alias = orig;
1377 mr->alias_offset = offset;
1378 }
1379
1380 void memory_region_init_rom(MemoryRegion *mr,
1381 struct Object *owner,
1382 const char *name,
1383 uint64_t size,
1384 Error **errp)
1385 {
1386 memory_region_init(mr, owner, name, size);
1387 mr->ram = true;
1388 mr->readonly = true;
1389 mr->terminates = true;
1390 mr->destructor = memory_region_destructor_ram;
1391 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1392 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1393 }
1394
1395 void memory_region_init_rom_device(MemoryRegion *mr,
1396 Object *owner,
1397 const MemoryRegionOps *ops,
1398 void *opaque,
1399 const char *name,
1400 uint64_t size,
1401 Error **errp)
1402 {
1403 assert(ops);
1404 memory_region_init(mr, owner, name, size);
1405 mr->ops = ops;
1406 mr->opaque = opaque;
1407 mr->terminates = true;
1408 mr->rom_device = true;
1409 mr->destructor = memory_region_destructor_ram;
1410 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1411 }
1412
1413 void memory_region_init_iommu(MemoryRegion *mr,
1414 Object *owner,
1415 const MemoryRegionIOMMUOps *ops,
1416 const char *name,
1417 uint64_t size)
1418 {
1419 memory_region_init(mr, owner, name, size);
1420 mr->iommu_ops = ops,
1421 mr->terminates = true; /* then re-forwards */
1422 QLIST_INIT(&mr->iommu_notify);
1423 mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE;
1424 }
1425
1426 static void memory_region_finalize(Object *obj)
1427 {
1428 MemoryRegion *mr = MEMORY_REGION(obj);
1429
1430 assert(!mr->container);
1431
1432 /* We know the region is not visible in any address space (it
1433 * does not have a container and cannot be a root either because
1434 * it has no references, so we can blindly clear mr->enabled.
1435 * memory_region_set_enabled instead could trigger a transaction
1436 * and cause an infinite loop.
1437 */
1438 mr->enabled = false;
1439 memory_region_transaction_begin();
1440 while (!QTAILQ_EMPTY(&mr->subregions)) {
1441 MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1442 memory_region_del_subregion(mr, subregion);
1443 }
1444 memory_region_transaction_commit();
1445
1446 mr->destructor(mr);
1447 memory_region_clear_coalescing(mr);
1448 g_free((char *)mr->name);
1449 g_free(mr->ioeventfds);
1450 }
1451
1452 Object *memory_region_owner(MemoryRegion *mr)
1453 {
1454 Object *obj = OBJECT(mr);
1455 return obj->parent;
1456 }
1457
1458 void memory_region_ref(MemoryRegion *mr)
1459 {
1460 /* MMIO callbacks most likely will access data that belongs
1461 * to the owner, hence the need to ref/unref the owner whenever
1462 * the memory region is in use.
1463 *
1464 * The memory region is a child of its owner. As long as the
1465 * owner doesn't call unparent itself on the memory region,
1466 * ref-ing the owner will also keep the memory region alive.
1467 * Memory regions without an owner are supposed to never go away;
1468 * we do not ref/unref them because it slows down DMA sensibly.
1469 */
1470 if (mr && mr->owner) {
1471 object_ref(mr->owner);
1472 }
1473 }
1474
1475 void memory_region_unref(MemoryRegion *mr)
1476 {
1477 if (mr && mr->owner) {
1478 object_unref(mr->owner);
1479 }
1480 }
1481
1482 uint64_t memory_region_size(MemoryRegion *mr)
1483 {
1484 if (int128_eq(mr->size, int128_2_64())) {
1485 return UINT64_MAX;
1486 }
1487 return int128_get64(mr->size);
1488 }
1489
1490 const char *memory_region_name(const MemoryRegion *mr)
1491 {
1492 if (!mr->name) {
1493 ((MemoryRegion *)mr)->name =
1494 object_get_canonical_path_component(OBJECT(mr));
1495 }
1496 return mr->name;
1497 }
1498
1499 bool memory_region_is_ram_device(MemoryRegion *mr)
1500 {
1501 return mr->ram_device;
1502 }
1503
1504 uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1505 {
1506 uint8_t mask = mr->dirty_log_mask;
1507 if (global_dirty_log && mr->ram_block) {
1508 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1509 }
1510 return mask;
1511 }
1512
1513 bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1514 {
1515 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1516 }
1517
1518 static void memory_region_update_iommu_notify_flags(MemoryRegion *mr)
1519 {
1520 IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE;
1521 IOMMUNotifier *iommu_notifier;
1522
1523 QLIST_FOREACH(iommu_notifier, &mr->iommu_notify, node) {
1524 flags |= iommu_notifier->notifier_flags;
1525 }
1526
1527 if (flags != mr->iommu_notify_flags &&
1528 mr->iommu_ops->notify_flag_changed) {
1529 mr->iommu_ops->notify_flag_changed(mr, mr->iommu_notify_flags,
1530 flags);
1531 }
1532
1533 mr->iommu_notify_flags = flags;
1534 }
1535
1536 void memory_region_register_iommu_notifier(MemoryRegion *mr,
1537 IOMMUNotifier *n)
1538 {
1539 /* We need to register for at least one bitfield */
1540 assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
1541 QLIST_INSERT_HEAD(&mr->iommu_notify, n, node);
1542 memory_region_update_iommu_notify_flags(mr);
1543 }
1544
1545 uint64_t memory_region_iommu_get_min_page_size(MemoryRegion *mr)
1546 {
1547 assert(memory_region_is_iommu(mr));
1548 if (mr->iommu_ops && mr->iommu_ops->get_min_page_size) {
1549 return mr->iommu_ops->get_min_page_size(mr);
1550 }
1551 return TARGET_PAGE_SIZE;
1552 }
1553
1554 void memory_region_iommu_replay(MemoryRegion *mr, IOMMUNotifier *n,
1555 bool is_write)
1556 {
1557 hwaddr addr, granularity;
1558 IOMMUTLBEntry iotlb;
1559
1560 granularity = memory_region_iommu_get_min_page_size(mr);
1561
1562 for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1563 iotlb = mr->iommu_ops->translate(mr, addr, is_write);
1564 if (iotlb.perm != IOMMU_NONE) {
1565 n->notify(n, &iotlb);
1566 }
1567
1568 /* if (2^64 - MR size) < granularity, it's possible to get an
1569 * infinite loop here. This should catch such a wraparound */
1570 if ((addr + granularity) < addr) {
1571 break;
1572 }
1573 }
1574 }
1575
1576 void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
1577 IOMMUNotifier *n)
1578 {
1579 QLIST_REMOVE(n, node);
1580 memory_region_update_iommu_notify_flags(mr);
1581 }
1582
1583 void memory_region_notify_iommu(MemoryRegion *mr,
1584 IOMMUTLBEntry entry)
1585 {
1586 IOMMUNotifier *iommu_notifier;
1587 IOMMUNotifierFlag request_flags;
1588
1589 assert(memory_region_is_iommu(mr));
1590
1591 if (entry.perm & IOMMU_RW) {
1592 request_flags = IOMMU_NOTIFIER_MAP;
1593 } else {
1594 request_flags = IOMMU_NOTIFIER_UNMAP;
1595 }
1596
1597 QLIST_FOREACH(iommu_notifier, &mr->iommu_notify, node) {
1598 if (iommu_notifier->notifier_flags & request_flags) {
1599 iommu_notifier->notify(iommu_notifier, &entry);
1600 }
1601 }
1602 }
1603
1604 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1605 {
1606 uint8_t mask = 1 << client;
1607 uint8_t old_logging;
1608
1609 assert(client == DIRTY_MEMORY_VGA);
1610 old_logging = mr->vga_logging_count;
1611 mr->vga_logging_count += log ? 1 : -1;
1612 if (!!old_logging == !!mr->vga_logging_count) {
1613 return;
1614 }
1615
1616 memory_region_transaction_begin();
1617 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1618 memory_region_update_pending |= mr->enabled;
1619 memory_region_transaction_commit();
1620 }
1621
1622 bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1623 hwaddr size, unsigned client)
1624 {
1625 assert(mr->ram_block);
1626 return cpu_physical_memory_get_dirty(memory_region_get_ram_addr(mr) + addr,
1627 size, client);
1628 }
1629
1630 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1631 hwaddr size)
1632 {
1633 assert(mr->ram_block);
1634 cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
1635 size,
1636 memory_region_get_dirty_log_mask(mr));
1637 }
1638
1639 bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1640 hwaddr size, unsigned client)
1641 {
1642 assert(mr->ram_block);
1643 return cpu_physical_memory_test_and_clear_dirty(
1644 memory_region_get_ram_addr(mr) + addr, size, client);
1645 }
1646
1647
1648 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1649 {
1650 MemoryListener *listener;
1651 AddressSpace *as;
1652 FlatView *view;
1653 FlatRange *fr;
1654
1655 /* If the same address space has multiple log_sync listeners, we
1656 * visit that address space's FlatView multiple times. But because
1657 * log_sync listeners are rare, it's still cheaper than walking each
1658 * address space once.
1659 */
1660 QTAILQ_FOREACH(listener, &memory_listeners, link) {
1661 if (!listener->log_sync) {
1662 continue;
1663 }
1664 as = listener->address_space;
1665 view = address_space_get_flatview(as);
1666 FOR_EACH_FLAT_RANGE(fr, view) {
1667 if (fr->mr == mr) {
1668 MemoryRegionSection mrs = section_from_flat_range(fr, as);
1669 listener->log_sync(listener, &mrs);
1670 }
1671 }
1672 flatview_unref(view);
1673 }
1674 }
1675
1676 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1677 {
1678 if (mr->readonly != readonly) {
1679 memory_region_transaction_begin();
1680 mr->readonly = readonly;
1681 memory_region_update_pending |= mr->enabled;
1682 memory_region_transaction_commit();
1683 }
1684 }
1685
1686 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
1687 {
1688 if (mr->romd_mode != romd_mode) {
1689 memory_region_transaction_begin();
1690 mr->romd_mode = romd_mode;
1691 memory_region_update_pending |= mr->enabled;
1692 memory_region_transaction_commit();
1693 }
1694 }
1695
1696 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1697 hwaddr size, unsigned client)
1698 {
1699 assert(mr->ram_block);
1700 cpu_physical_memory_test_and_clear_dirty(
1701 memory_region_get_ram_addr(mr) + addr, size, client);
1702 }
1703
1704 int memory_region_get_fd(MemoryRegion *mr)
1705 {
1706 int fd;
1707
1708 rcu_read_lock();
1709 while (mr->alias) {
1710 mr = mr->alias;
1711 }
1712 fd = mr->ram_block->fd;
1713 rcu_read_unlock();
1714
1715 return fd;
1716 }
1717
1718 void memory_region_set_fd(MemoryRegion *mr, int fd)
1719 {
1720 rcu_read_lock();
1721 while (mr->alias) {
1722 mr = mr->alias;
1723 }
1724 mr->ram_block->fd = fd;
1725 rcu_read_unlock();
1726 }
1727
1728 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1729 {
1730 void *ptr;
1731 uint64_t offset = 0;
1732
1733 rcu_read_lock();
1734 while (mr->alias) {
1735 offset += mr->alias_offset;
1736 mr = mr->alias;
1737 }
1738 assert(mr->ram_block);
1739 ptr = qemu_map_ram_ptr(mr->ram_block, offset);
1740 rcu_read_unlock();
1741
1742 return ptr;
1743 }
1744
1745 MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
1746 {
1747 RAMBlock *block;
1748
1749 block = qemu_ram_block_from_host(ptr, false, offset);
1750 if (!block) {
1751 return NULL;
1752 }
1753
1754 return block->mr;
1755 }
1756
1757 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1758 {
1759 return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
1760 }
1761
1762 void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
1763 {
1764 assert(mr->ram_block);
1765
1766 qemu_ram_resize(mr->ram_block, newsize, errp);
1767 }
1768
1769 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1770 {
1771 FlatView *view;
1772 FlatRange *fr;
1773 CoalescedMemoryRange *cmr;
1774 AddrRange tmp;
1775 MemoryRegionSection section;
1776
1777 view = address_space_get_flatview(as);
1778 FOR_EACH_FLAT_RANGE(fr, view) {
1779 if (fr->mr == mr) {
1780 section = (MemoryRegionSection) {
1781 .address_space = as,
1782 .offset_within_address_space = int128_get64(fr->addr.start),
1783 .size = fr->addr.size,
1784 };
1785
1786 MEMORY_LISTENER_CALL(as, coalesced_mmio_del, Reverse, &section,
1787 int128_get64(fr->addr.start),
1788 int128_get64(fr->addr.size));
1789 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1790 tmp = addrrange_shift(cmr->addr,
1791 int128_sub(fr->addr.start,
1792 int128_make64(fr->offset_in_region)));
1793 if (!addrrange_intersects(tmp, fr->addr)) {
1794 continue;
1795 }
1796 tmp = addrrange_intersection(tmp, fr->addr);
1797 MEMORY_LISTENER_CALL(as, coalesced_mmio_add, Forward, &section,
1798 int128_get64(tmp.start),
1799 int128_get64(tmp.size));
1800 }
1801 }
1802 }
1803 flatview_unref(view);
1804 }
1805
1806 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1807 {
1808 AddressSpace *as;
1809
1810 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1811 memory_region_update_coalesced_range_as(mr, as);
1812 }
1813 }
1814
1815 void memory_region_set_coalescing(MemoryRegion *mr)
1816 {
1817 memory_region_clear_coalescing(mr);
1818 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1819 }
1820
1821 void memory_region_add_coalescing(MemoryRegion *mr,
1822 hwaddr offset,
1823 uint64_t size)
1824 {
1825 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1826
1827 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1828 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1829 memory_region_update_coalesced_range(mr);
1830 memory_region_set_flush_coalesced(mr);
1831 }
1832
1833 void memory_region_clear_coalescing(MemoryRegion *mr)
1834 {
1835 CoalescedMemoryRange *cmr;
1836 bool updated = false;
1837
1838 qemu_flush_coalesced_mmio_buffer();
1839 mr->flush_coalesced_mmio = false;
1840
1841 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1842 cmr = QTAILQ_FIRST(&mr->coalesced);
1843 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1844 g_free(cmr);
1845 updated = true;
1846 }
1847
1848 if (updated) {
1849 memory_region_update_coalesced_range(mr);
1850 }
1851 }
1852
1853 void memory_region_set_flush_coalesced(MemoryRegion *mr)
1854 {
1855 mr->flush_coalesced_mmio = true;
1856 }
1857
1858 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1859 {
1860 qemu_flush_coalesced_mmio_buffer();
1861 if (QTAILQ_EMPTY(&mr->coalesced)) {
1862 mr->flush_coalesced_mmio = false;
1863 }
1864 }
1865
1866 void memory_region_set_global_locking(MemoryRegion *mr)
1867 {
1868 mr->global_locking = true;
1869 }
1870
1871 void memory_region_clear_global_locking(MemoryRegion *mr)
1872 {
1873 mr->global_locking = false;
1874 }
1875
1876 static bool userspace_eventfd_warning;
1877
1878 void memory_region_add_eventfd(MemoryRegion *mr,
1879 hwaddr addr,
1880 unsigned size,
1881 bool match_data,
1882 uint64_t data,
1883 EventNotifier *e)
1884 {
1885 MemoryRegionIoeventfd mrfd = {
1886 .addr.start = int128_make64(addr),
1887 .addr.size = int128_make64(size),
1888 .match_data = match_data,
1889 .data = data,
1890 .e = e,
1891 };
1892 unsigned i;
1893
1894 if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
1895 userspace_eventfd_warning))) {
1896 userspace_eventfd_warning = true;
1897 error_report("Using eventfd without MMIO binding in KVM. "
1898 "Suboptimal performance expected");
1899 }
1900
1901 if (size) {
1902 adjust_endianness(mr, &mrfd.data, size);
1903 }
1904 memory_region_transaction_begin();
1905 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1906 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1907 break;
1908 }
1909 }
1910 ++mr->ioeventfd_nb;
1911 mr->ioeventfds = g_realloc(mr->ioeventfds,
1912 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1913 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1914 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1915 mr->ioeventfds[i] = mrfd;
1916 ioeventfd_update_pending |= mr->enabled;
1917 memory_region_transaction_commit();
1918 }
1919
1920 void memory_region_del_eventfd(MemoryRegion *mr,
1921 hwaddr addr,
1922 unsigned size,
1923 bool match_data,
1924 uint64_t data,
1925 EventNotifier *e)
1926 {
1927 MemoryRegionIoeventfd mrfd = {
1928 .addr.start = int128_make64(addr),
1929 .addr.size = int128_make64(size),
1930 .match_data = match_data,
1931 .data = data,
1932 .e = e,
1933 };
1934 unsigned i;
1935
1936 if (size) {
1937 adjust_endianness(mr, &mrfd.data, size);
1938 }
1939 memory_region_transaction_begin();
1940 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1941 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1942 break;
1943 }
1944 }
1945 assert(i != mr->ioeventfd_nb);
1946 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1947 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1948 --mr->ioeventfd_nb;
1949 mr->ioeventfds = g_realloc(mr->ioeventfds,
1950 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1951 ioeventfd_update_pending |= mr->enabled;
1952 memory_region_transaction_commit();
1953 }
1954
1955 static void memory_region_update_container_subregions(MemoryRegion *subregion)
1956 {
1957 MemoryRegion *mr = subregion->container;
1958 MemoryRegion *other;
1959
1960 memory_region_transaction_begin();
1961
1962 memory_region_ref(subregion);
1963 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1964 if (subregion->priority >= other->priority) {
1965 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1966 goto done;
1967 }
1968 }
1969 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1970 done:
1971 memory_region_update_pending |= mr->enabled && subregion->enabled;
1972 memory_region_transaction_commit();
1973 }
1974
1975 static void memory_region_add_subregion_common(MemoryRegion *mr,
1976 hwaddr offset,
1977 MemoryRegion *subregion)
1978 {
1979 assert(!subregion->container);
1980 subregion->container = mr;
1981 subregion->addr = offset;
1982 memory_region_update_container_subregions(subregion);
1983 }
1984
1985 void memory_region_add_subregion(MemoryRegion *mr,
1986 hwaddr offset,
1987 MemoryRegion *subregion)
1988 {
1989 subregion->priority = 0;
1990 memory_region_add_subregion_common(mr, offset, subregion);
1991 }
1992
1993 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1994 hwaddr offset,
1995 MemoryRegion *subregion,
1996 int priority)
1997 {
1998 subregion->priority = priority;
1999 memory_region_add_subregion_common(mr, offset, subregion);
2000 }
2001
2002 void memory_region_del_subregion(MemoryRegion *mr,
2003 MemoryRegion *subregion)
2004 {
2005 memory_region_transaction_begin();
2006 assert(subregion->container == mr);
2007 subregion->container = NULL;
2008 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
2009 memory_region_unref(subregion);
2010 memory_region_update_pending |= mr->enabled && subregion->enabled;
2011 memory_region_transaction_commit();
2012 }
2013
2014 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
2015 {
2016 if (enabled == mr->enabled) {
2017 return;
2018 }
2019 memory_region_transaction_begin();
2020 mr->enabled = enabled;
2021 memory_region_update_pending = true;
2022 memory_region_transaction_commit();
2023 }
2024
2025 void memory_region_set_size(MemoryRegion *mr, uint64_t size)
2026 {
2027 Int128 s = int128_make64(size);
2028
2029 if (size == UINT64_MAX) {
2030 s = int128_2_64();
2031 }
2032 if (int128_eq(s, mr->size)) {
2033 return;
2034 }
2035 memory_region_transaction_begin();
2036 mr->size = s;
2037 memory_region_update_pending = true;
2038 memory_region_transaction_commit();
2039 }
2040
2041 static void memory_region_readd_subregion(MemoryRegion *mr)
2042 {
2043 MemoryRegion *container = mr->container;
2044
2045 if (container) {
2046 memory_region_transaction_begin();
2047 memory_region_ref(mr);
2048 memory_region_del_subregion(container, mr);
2049 mr->container = container;
2050 memory_region_update_container_subregions(mr);
2051 memory_region_unref(mr);
2052 memory_region_transaction_commit();
2053 }
2054 }
2055
2056 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2057 {
2058 if (addr != mr->addr) {
2059 mr->addr = addr;
2060 memory_region_readd_subregion(mr);
2061 }
2062 }
2063
2064 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
2065 {
2066 assert(mr->alias);
2067
2068 if (offset == mr->alias_offset) {
2069 return;
2070 }
2071
2072 memory_region_transaction_begin();
2073 mr->alias_offset = offset;
2074 memory_region_update_pending |= mr->enabled;
2075 memory_region_transaction_commit();
2076 }
2077
2078 uint64_t memory_region_get_alignment(const MemoryRegion *mr)
2079 {
2080 return mr->align;
2081 }
2082
2083 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
2084 {
2085 const AddrRange *addr = addr_;
2086 const FlatRange *fr = fr_;
2087
2088 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2089 return -1;
2090 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2091 return 1;
2092 }
2093 return 0;
2094 }
2095
2096 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
2097 {
2098 return bsearch(&addr, view->ranges, view->nr,
2099 sizeof(FlatRange), cmp_flatrange_addr);
2100 }
2101
2102 bool memory_region_is_mapped(MemoryRegion *mr)
2103 {
2104 return mr->container ? true : false;
2105 }
2106
2107 /* Same as memory_region_find, but it does not add a reference to the
2108 * returned region. It must be called from an RCU critical section.
2109 */
2110 static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2111 hwaddr addr, uint64_t size)
2112 {
2113 MemoryRegionSection ret = { .mr = NULL };
2114 MemoryRegion *root;
2115 AddressSpace *as;
2116 AddrRange range;
2117 FlatView *view;
2118 FlatRange *fr;
2119
2120 addr += mr->addr;
2121 for (root = mr; root->container; ) {
2122 root = root->container;
2123 addr += root->addr;
2124 }
2125
2126 as = memory_region_to_address_space(root);
2127 if (!as) {
2128 return ret;
2129 }
2130 range = addrrange_make(int128_make64(addr), int128_make64(size));
2131
2132 view = atomic_rcu_read(&as->current_map);
2133 fr = flatview_lookup(view, range);
2134 if (!fr) {
2135 return ret;
2136 }
2137
2138 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
2139 --fr;
2140 }
2141
2142 ret.mr = fr->mr;
2143 ret.address_space = as;
2144 range = addrrange_intersection(range, fr->addr);
2145 ret.offset_within_region = fr->offset_in_region;
2146 ret.offset_within_region += int128_get64(int128_sub(range.start,
2147 fr->addr.start));
2148 ret.size = range.size;
2149 ret.offset_within_address_space = int128_get64(range.start);
2150 ret.readonly = fr->readonly;
2151 return ret;
2152 }
2153
2154 MemoryRegionSection memory_region_find(MemoryRegion *mr,
2155 hwaddr addr, uint64_t size)
2156 {
2157 MemoryRegionSection ret;
2158 rcu_read_lock();
2159 ret = memory_region_find_rcu(mr, addr, size);
2160 if (ret.mr) {
2161 memory_region_ref(ret.mr);
2162 }
2163 rcu_read_unlock();
2164 return ret;
2165 }
2166
2167 bool memory_region_present(MemoryRegion *container, hwaddr addr)
2168 {
2169 MemoryRegion *mr;
2170
2171 rcu_read_lock();
2172 mr = memory_region_find_rcu(container, addr, 1).mr;
2173 rcu_read_unlock();
2174 return mr && mr != container;
2175 }
2176
2177 void memory_global_dirty_log_sync(void)
2178 {
2179 MemoryListener *listener;
2180 AddressSpace *as;
2181 FlatView *view;
2182 FlatRange *fr;
2183
2184 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2185 if (!listener->log_sync) {
2186 continue;
2187 }
2188 as = listener->address_space;
2189 view = address_space_get_flatview(as);
2190 FOR_EACH_FLAT_RANGE(fr, view) {
2191 if (fr->dirty_log_mask) {
2192 MemoryRegionSection mrs = section_from_flat_range(fr, as);
2193 listener->log_sync(listener, &mrs);
2194 }
2195 }
2196 flatview_unref(view);
2197 }
2198 }
2199
2200 void memory_global_dirty_log_start(void)
2201 {
2202 global_dirty_log = true;
2203
2204 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
2205
2206 /* Refresh DIRTY_LOG_MIGRATION bit. */
2207 memory_region_transaction_begin();
2208 memory_region_update_pending = true;
2209 memory_region_transaction_commit();
2210 }
2211
2212 void memory_global_dirty_log_stop(void)
2213 {
2214 global_dirty_log = false;
2215
2216 /* Refresh DIRTY_LOG_MIGRATION bit. */
2217 memory_region_transaction_begin();
2218 memory_region_update_pending = true;
2219 memory_region_transaction_commit();
2220
2221 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2222 }
2223
2224 static void listener_add_address_space(MemoryListener *listener,
2225 AddressSpace *as)
2226 {
2227 FlatView *view;
2228 FlatRange *fr;
2229
2230 if (listener->begin) {
2231 listener->begin(listener);
2232 }
2233 if (global_dirty_log) {
2234 if (listener->log_global_start) {
2235 listener->log_global_start(listener);
2236 }
2237 }
2238
2239 view = address_space_get_flatview(as);
2240 FOR_EACH_FLAT_RANGE(fr, view) {
2241 MemoryRegionSection section = {
2242 .mr = fr->mr,
2243 .address_space = as,
2244 .offset_within_region = fr->offset_in_region,
2245 .size = fr->addr.size,
2246 .offset_within_address_space = int128_get64(fr->addr.start),
2247 .readonly = fr->readonly,
2248 };
2249 if (fr->dirty_log_mask && listener->log_start) {
2250 listener->log_start(listener, &section, 0, fr->dirty_log_mask);
2251 }
2252 if (listener->region_add) {
2253 listener->region_add(listener, &section);
2254 }
2255 }
2256 if (listener->commit) {
2257 listener->commit(listener);
2258 }
2259 flatview_unref(view);
2260 }
2261
2262 void memory_listener_register(MemoryListener *listener, AddressSpace *as)
2263 {
2264 MemoryListener *other = NULL;
2265
2266 listener->address_space = as;
2267 if (QTAILQ_EMPTY(&memory_listeners)
2268 || listener->priority >= QTAILQ_LAST(&memory_listeners,
2269 memory_listeners)->priority) {
2270 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2271 } else {
2272 QTAILQ_FOREACH(other, &memory_listeners, link) {
2273 if (listener->priority < other->priority) {
2274 break;
2275 }
2276 }
2277 QTAILQ_INSERT_BEFORE(other, listener, link);
2278 }
2279
2280 if (QTAILQ_EMPTY(&as->listeners)
2281 || listener->priority >= QTAILQ_LAST(&as->listeners,
2282 memory_listeners)->priority) {
2283 QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as);
2284 } else {
2285 QTAILQ_FOREACH(other, &as->listeners, link_as) {
2286 if (listener->priority < other->priority) {
2287 break;
2288 }
2289 }
2290 QTAILQ_INSERT_BEFORE(other, listener, link_as);
2291 }
2292
2293 listener_add_address_space(listener, as);
2294 }
2295
2296 void memory_listener_unregister(MemoryListener *listener)
2297 {
2298 QTAILQ_REMOVE(&memory_listeners, listener, link);
2299 QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as);
2300 }
2301
2302 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
2303 {
2304 memory_region_ref(root);
2305 memory_region_transaction_begin();
2306 as->ref_count = 1;
2307 as->root = root;
2308 as->malloced = false;
2309 as->current_map = g_new(FlatView, 1);
2310 flatview_init(as->current_map);
2311 as->ioeventfd_nb = 0;
2312 as->ioeventfds = NULL;
2313 QTAILQ_INIT(&as->listeners);
2314 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
2315 as->name = g_strdup(name ? name : "anonymous");
2316 address_space_init_dispatch(as);
2317 memory_region_update_pending |= root->enabled;
2318 memory_region_transaction_commit();
2319 }
2320
2321 static void do_address_space_destroy(AddressSpace *as)
2322 {
2323 bool do_free = as->malloced;
2324
2325 address_space_destroy_dispatch(as);
2326 assert(QTAILQ_EMPTY(&as->listeners));
2327
2328 flatview_unref(as->current_map);
2329 g_free(as->name);
2330 g_free(as->ioeventfds);
2331 memory_region_unref(as->root);
2332 if (do_free) {
2333 g_free(as);
2334 }
2335 }
2336
2337 AddressSpace *address_space_init_shareable(MemoryRegion *root, const char *name)
2338 {
2339 AddressSpace *as;
2340
2341 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2342 if (root == as->root && as->malloced) {
2343 as->ref_count++;
2344 return as;
2345 }
2346 }
2347
2348 as = g_malloc0(sizeof *as);
2349 address_space_init(as, root, name);
2350 as->malloced = true;
2351 return as;
2352 }
2353
2354 void address_space_destroy(AddressSpace *as)
2355 {
2356 MemoryRegion *root = as->root;
2357
2358 as->ref_count--;
2359 if (as->ref_count) {
2360 return;
2361 }
2362 /* Flush out anything from MemoryListeners listening in on this */
2363 memory_region_transaction_begin();
2364 as->root = NULL;
2365 memory_region_transaction_commit();
2366 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
2367 address_space_unregister(as);
2368
2369 /* At this point, as->dispatch and as->current_map are dummy
2370 * entries that the guest should never use. Wait for the old
2371 * values to expire before freeing the data.
2372 */
2373 as->root = root;
2374 call_rcu(as, do_address_space_destroy, rcu);
2375 }
2376
2377 typedef struct MemoryRegionList MemoryRegionList;
2378
2379 struct MemoryRegionList {
2380 const MemoryRegion *mr;
2381 QTAILQ_ENTRY(MemoryRegionList) queue;
2382 };
2383
2384 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
2385
2386 static void mtree_print_mr(fprintf_function mon_printf, void *f,
2387 const MemoryRegion *mr, unsigned int level,
2388 hwaddr base,
2389 MemoryRegionListHead *alias_print_queue)
2390 {
2391 MemoryRegionList *new_ml, *ml, *next_ml;
2392 MemoryRegionListHead submr_print_queue;
2393 const MemoryRegion *submr;
2394 unsigned int i;
2395
2396 if (!mr) {
2397 return;
2398 }
2399
2400 for (i = 0; i < level; i++) {
2401 mon_printf(f, " ");
2402 }
2403
2404 if (mr->alias) {
2405 MemoryRegionList *ml;
2406 bool found = false;
2407
2408 /* check if the alias is already in the queue */
2409 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
2410 if (ml->mr == mr->alias) {
2411 found = true;
2412 }
2413 }
2414
2415 if (!found) {
2416 ml = g_new(MemoryRegionList, 1);
2417 ml->mr = mr->alias;
2418 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
2419 }
2420 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
2421 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
2422 "-" TARGET_FMT_plx "%s\n",
2423 base + mr->addr,
2424 base + mr->addr
2425 + (int128_nz(mr->size) ?
2426 (hwaddr)int128_get64(int128_sub(mr->size,
2427 int128_one())) : 0),
2428 mr->priority,
2429 mr->romd_mode ? 'R' : '-',
2430 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2431 : '-',
2432 memory_region_name(mr),
2433 memory_region_name(mr->alias),
2434 mr->alias_offset,
2435 mr->alias_offset
2436 + (int128_nz(mr->size) ?
2437 (hwaddr)int128_get64(int128_sub(mr->size,
2438 int128_one())) : 0),
2439 mr->enabled ? "" : " [disabled]");
2440 } else {
2441 mon_printf(f,
2442 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s%s\n",
2443 base + mr->addr,
2444 base + mr->addr
2445 + (int128_nz(mr->size) ?
2446 (hwaddr)int128_get64(int128_sub(mr->size,
2447 int128_one())) : 0),
2448 mr->priority,
2449 mr->romd_mode ? 'R' : '-',
2450 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2451 : '-',
2452 memory_region_name(mr),
2453 mr->enabled ? "" : " [disabled]");
2454 }
2455
2456 QTAILQ_INIT(&submr_print_queue);
2457
2458 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
2459 new_ml = g_new(MemoryRegionList, 1);
2460 new_ml->mr = submr;
2461 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2462 if (new_ml->mr->addr < ml->mr->addr ||
2463 (new_ml->mr->addr == ml->mr->addr &&
2464 new_ml->mr->priority > ml->mr->priority)) {
2465 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
2466 new_ml = NULL;
2467 break;
2468 }
2469 }
2470 if (new_ml) {
2471 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
2472 }
2473 }
2474
2475 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2476 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
2477 alias_print_queue);
2478 }
2479
2480 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
2481 g_free(ml);
2482 }
2483 }
2484
2485 void mtree_info(fprintf_function mon_printf, void *f)
2486 {
2487 MemoryRegionListHead ml_head;
2488 MemoryRegionList *ml, *ml2;
2489 AddressSpace *as;
2490
2491 QTAILQ_INIT(&ml_head);
2492
2493 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2494 mon_printf(f, "address-space: %s\n", as->name);
2495 mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head);
2496 mon_printf(f, "\n");
2497 }
2498
2499 /* print aliased regions */
2500 QTAILQ_FOREACH(ml, &ml_head, queue) {
2501 mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr));
2502 mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head);
2503 mon_printf(f, "\n");
2504 }
2505
2506 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
2507 g_free(ml);
2508 }
2509 }
2510
2511 static const TypeInfo memory_region_info = {
2512 .parent = TYPE_OBJECT,
2513 .name = TYPE_MEMORY_REGION,
2514 .instance_size = sizeof(MemoryRegion),
2515 .instance_init = memory_region_initfn,
2516 .instance_finalize = memory_region_finalize,
2517 };
2518
2519 static void memory_register_types(void)
2520 {
2521 type_register_static(&memory_region_info);
2522 }
2523
2524 type_init(memory_register_types)
AR7 emulation for QEMU