target-arm: Implement missing AMAIR registers
[qemu/ar7.git] / target-s390x / misc_helper.c
blob8eac0e12b99403bc535ab063d989be6795abf844
1 /*
2 * S/390 misc helper routines
4 * Copyright (c) 2009 Ulrich Hecht
5 * Copyright (c) 2009 Alexander Graf
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
21 #include "cpu.h"
22 #include "exec/memory.h"
23 #include "qemu/host-utils.h"
24 #include "exec/helper-proto.h"
25 #include <string.h>
26 #include "sysemu/kvm.h"
27 #include "qemu/timer.h"
28 #include "exec/address-spaces.h"
29 #ifdef CONFIG_KVM
30 #include <linux/kvm.h>
31 #endif
32 #include "exec/cpu_ldst.h"
33 #include "hw/watchdog/wdt_diag288.h"
35 #if !defined(CONFIG_USER_ONLY)
36 #include "sysemu/cpus.h"
37 #include "sysemu/sysemu.h"
38 #include "hw/s390x/ebcdic.h"
39 #include "hw/s390x/ipl.h"
40 #endif
42 /* #define DEBUG_HELPER */
43 #ifdef DEBUG_HELPER
44 #define HELPER_LOG(x...) qemu_log(x)
45 #else
46 #define HELPER_LOG(x...)
47 #endif
49 /* Raise an exception dynamically from a helper function. */
50 void QEMU_NORETURN runtime_exception(CPUS390XState *env, int excp,
51 uintptr_t retaddr)
53 CPUState *cs = CPU(s390_env_get_cpu(env));
54 int t;
56 cs->exception_index = EXCP_PGM;
57 env->int_pgm_code = excp;
59 /* Use the (ultimate) callers address to find the insn that trapped. */
60 cpu_restore_state(cs, retaddr);
62 /* Advance past the insn. */
63 t = cpu_ldub_code(env, env->psw.addr);
64 env->int_pgm_ilen = t = get_ilen(t);
65 env->psw.addr += t;
67 cpu_loop_exit(cs);
70 /* Raise an exception statically from a TB. */
71 void HELPER(exception)(CPUS390XState *env, uint32_t excp)
73 CPUState *cs = CPU(s390_env_get_cpu(env));
75 HELPER_LOG("%s: exception %d\n", __func__, excp);
76 cs->exception_index = excp;
77 cpu_loop_exit(cs);
80 #ifndef CONFIG_USER_ONLY
82 void program_interrupt(CPUS390XState *env, uint32_t code, int ilen)
84 S390CPU *cpu = s390_env_get_cpu(env);
86 qemu_log_mask(CPU_LOG_INT, "program interrupt at %#" PRIx64 "\n",
87 env->psw.addr);
89 if (kvm_enabled()) {
90 #ifdef CONFIG_KVM
91 struct kvm_s390_irq irq = {
92 .type = KVM_S390_PROGRAM_INT,
93 .u.pgm.code = code,
96 kvm_s390_vcpu_interrupt(cpu, &irq);
97 #endif
98 } else {
99 CPUState *cs = CPU(cpu);
101 env->int_pgm_code = code;
102 env->int_pgm_ilen = ilen;
103 cs->exception_index = EXCP_PGM;
104 cpu_loop_exit(cs);
108 /* SCLP service call */
109 uint32_t HELPER(servc)(CPUS390XState *env, uint64_t r1, uint64_t r2)
111 int r = sclp_service_call(env, r1, r2);
112 if (r < 0) {
113 program_interrupt(env, -r, 4);
114 return 0;
116 return r;
119 #ifndef CONFIG_USER_ONLY
120 static int modified_clear_reset(S390CPU *cpu)
122 S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
123 CPUState *t;
125 pause_all_vcpus();
126 cpu_synchronize_all_states();
127 CPU_FOREACH(t) {
128 run_on_cpu(t, s390_do_cpu_full_reset, t);
130 cmma_reset(cpu);
131 io_subsystem_reset();
132 scc->load_normal(CPU(cpu));
133 cpu_synchronize_all_post_reset();
134 resume_all_vcpus();
135 return 0;
138 static int load_normal_reset(S390CPU *cpu)
140 S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
141 CPUState *t;
143 pause_all_vcpus();
144 cpu_synchronize_all_states();
145 CPU_FOREACH(t) {
146 run_on_cpu(t, s390_do_cpu_reset, t);
148 cmma_reset(cpu);
149 io_subsystem_reset();
150 scc->initial_cpu_reset(CPU(cpu));
151 scc->load_normal(CPU(cpu));
152 cpu_synchronize_all_post_reset();
153 resume_all_vcpus();
154 return 0;
157 int handle_diag_288(CPUS390XState *env, uint64_t r1, uint64_t r3)
159 uint64_t func = env->regs[r1];
160 uint64_t timeout = env->regs[r1 + 1];
161 uint64_t action = env->regs[r3];
162 Object *obj;
163 DIAG288State *diag288;
164 DIAG288Class *diag288_class;
166 if (r1 % 2 || action != 0) {
167 return -1;
170 /* Timeout must be more than 15 seconds except for timer deletion */
171 if (func != WDT_DIAG288_CANCEL && timeout < 15) {
172 return -1;
175 obj = object_resolve_path_type("", TYPE_WDT_DIAG288, NULL);
176 if (!obj) {
177 return -1;
180 diag288 = DIAG288(obj);
181 diag288_class = DIAG288_GET_CLASS(diag288);
182 return diag288_class->handle_timer(diag288, func, timeout);
185 #define DIAG_308_RC_OK 0x0001
186 #define DIAG_308_RC_NO_CONF 0x0102
187 #define DIAG_308_RC_INVALID 0x0402
189 void handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3)
191 uint64_t addr = env->regs[r1];
192 uint64_t subcode = env->regs[r3];
193 IplParameterBlock *iplb;
195 if (env->psw.mask & PSW_MASK_PSTATE) {
196 program_interrupt(env, PGM_PRIVILEGED, ILEN_LATER_INC);
197 return;
200 if ((subcode & ~0x0ffffULL) || (subcode > 6)) {
201 program_interrupt(env, PGM_SPECIFICATION, ILEN_LATER_INC);
202 return;
205 switch (subcode) {
206 case 0:
207 modified_clear_reset(s390_env_get_cpu(env));
208 if (tcg_enabled()) {
209 cpu_loop_exit(CPU(s390_env_get_cpu(env)));
211 break;
212 case 1:
213 load_normal_reset(s390_env_get_cpu(env));
214 if (tcg_enabled()) {
215 cpu_loop_exit(CPU(s390_env_get_cpu(env)));
217 break;
218 case 3:
219 s390_reipl_request();
220 if (tcg_enabled()) {
221 cpu_loop_exit(CPU(s390_env_get_cpu(env)));
223 break;
224 case 5:
225 if ((r1 & 1) || (addr & 0x0fffULL)) {
226 program_interrupt(env, PGM_SPECIFICATION, ILEN_LATER_INC);
227 return;
229 if (!address_space_access_valid(&address_space_memory, addr,
230 sizeof(IplParameterBlock), false)) {
231 program_interrupt(env, PGM_ADDRESSING, ILEN_LATER_INC);
232 return;
234 iplb = g_malloc0(sizeof(struct IplParameterBlock));
235 cpu_physical_memory_read(addr, iplb, sizeof(struct IplParameterBlock));
236 if (!s390_ipl_update_diag308(iplb)) {
237 env->regs[r1 + 1] = DIAG_308_RC_OK;
238 } else {
239 env->regs[r1 + 1] = DIAG_308_RC_INVALID;
241 g_free(iplb);
242 return;
243 case 6:
244 if ((r1 & 1) || (addr & 0x0fffULL)) {
245 program_interrupt(env, PGM_SPECIFICATION, ILEN_LATER_INC);
246 return;
248 if (!address_space_access_valid(&address_space_memory, addr,
249 sizeof(IplParameterBlock), true)) {
250 program_interrupt(env, PGM_ADDRESSING, ILEN_LATER_INC);
251 return;
253 iplb = s390_ipl_get_iplb();
254 if (iplb) {
255 cpu_physical_memory_write(addr, iplb,
256 sizeof(struct IplParameterBlock));
257 env->regs[r1 + 1] = DIAG_308_RC_OK;
258 } else {
259 env->regs[r1 + 1] = DIAG_308_RC_NO_CONF;
261 return;
262 default:
263 hw_error("Unhandled diag308 subcode %" PRIx64, subcode);
264 break;
267 #endif
269 void HELPER(diag)(CPUS390XState *env, uint32_t r1, uint32_t r3, uint32_t num)
271 uint64_t r;
273 switch (num) {
274 case 0x500:
275 /* KVM hypercall */
276 r = s390_virtio_hypercall(env);
277 break;
278 case 0x44:
279 /* yield */
280 r = 0;
281 break;
282 case 0x308:
283 /* ipl */
284 handle_diag_308(env, r1, r3);
285 r = 0;
286 break;
287 default:
288 r = -1;
289 break;
292 if (r) {
293 program_interrupt(env, PGM_OPERATION, ILEN_LATER_INC);
297 /* Set Prefix */
298 void HELPER(spx)(CPUS390XState *env, uint64_t a1)
300 CPUState *cs = CPU(s390_env_get_cpu(env));
301 uint32_t prefix = a1 & 0x7fffe000;
303 env->psa = prefix;
304 qemu_log("prefix: %#x\n", prefix);
305 tlb_flush_page(cs, 0);
306 tlb_flush_page(cs, TARGET_PAGE_SIZE);
309 /* Store Clock */
310 uint64_t HELPER(stck)(CPUS390XState *env)
312 uint64_t time;
314 time = env->tod_offset +
315 time2tod(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - env->tod_basetime);
317 return time;
320 /* Set Clock Comparator */
321 void HELPER(sckc)(CPUS390XState *env, uint64_t time)
323 if (time == -1ULL) {
324 return;
327 env->ckc = time;
329 /* difference between origins */
330 time -= env->tod_offset;
332 /* nanoseconds */
333 time = tod2time(time);
335 timer_mod(env->tod_timer, env->tod_basetime + time);
338 /* Store Clock Comparator */
339 uint64_t HELPER(stckc)(CPUS390XState *env)
341 return env->ckc;
344 /* Set CPU Timer */
345 void HELPER(spt)(CPUS390XState *env, uint64_t time)
347 if (time == -1ULL) {
348 return;
351 /* nanoseconds */
352 time = tod2time(time);
354 env->cputm = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + time;
356 timer_mod(env->cpu_timer, env->cputm);
359 /* Store CPU Timer */
360 uint64_t HELPER(stpt)(CPUS390XState *env)
362 return time2tod(env->cputm - qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
365 /* Store System Information */
366 uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0,
367 uint64_t r0, uint64_t r1)
369 int cc = 0;
370 int sel1, sel2;
372 if ((r0 & STSI_LEVEL_MASK) <= STSI_LEVEL_3 &&
373 ((r0 & STSI_R0_RESERVED_MASK) || (r1 & STSI_R1_RESERVED_MASK))) {
374 /* valid function code, invalid reserved bits */
375 program_interrupt(env, PGM_SPECIFICATION, 2);
378 sel1 = r0 & STSI_R0_SEL1_MASK;
379 sel2 = r1 & STSI_R1_SEL2_MASK;
381 /* XXX: spec exception if sysib is not 4k-aligned */
383 switch (r0 & STSI_LEVEL_MASK) {
384 case STSI_LEVEL_1:
385 if ((sel1 == 1) && (sel2 == 1)) {
386 /* Basic Machine Configuration */
387 struct sysib_111 sysib;
389 memset(&sysib, 0, sizeof(sysib));
390 ebcdic_put(sysib.manuf, "QEMU ", 16);
391 /* same as machine type number in STORE CPU ID */
392 ebcdic_put(sysib.type, "QEMU", 4);
393 /* same as model number in STORE CPU ID */
394 ebcdic_put(sysib.model, "QEMU ", 16);
395 ebcdic_put(sysib.sequence, "QEMU ", 16);
396 ebcdic_put(sysib.plant, "QEMU", 4);
397 cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
398 } else if ((sel1 == 2) && (sel2 == 1)) {
399 /* Basic Machine CPU */
400 struct sysib_121 sysib;
402 memset(&sysib, 0, sizeof(sysib));
403 /* XXX make different for different CPUs? */
404 ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16);
405 ebcdic_put(sysib.plant, "QEMU", 4);
406 stw_p(&sysib.cpu_addr, env->cpu_num);
407 cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
408 } else if ((sel1 == 2) && (sel2 == 2)) {
409 /* Basic Machine CPUs */
410 struct sysib_122 sysib;
412 memset(&sysib, 0, sizeof(sysib));
413 stl_p(&sysib.capability, 0x443afc29);
414 /* XXX change when SMP comes */
415 stw_p(&sysib.total_cpus, 1);
416 stw_p(&sysib.active_cpus, 1);
417 stw_p(&sysib.standby_cpus, 0);
418 stw_p(&sysib.reserved_cpus, 0);
419 cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
420 } else {
421 cc = 3;
423 break;
424 case STSI_LEVEL_2:
426 if ((sel1 == 2) && (sel2 == 1)) {
427 /* LPAR CPU */
428 struct sysib_221 sysib;
430 memset(&sysib, 0, sizeof(sysib));
431 /* XXX make different for different CPUs? */
432 ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16);
433 ebcdic_put(sysib.plant, "QEMU", 4);
434 stw_p(&sysib.cpu_addr, env->cpu_num);
435 stw_p(&sysib.cpu_id, 0);
436 cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
437 } else if ((sel1 == 2) && (sel2 == 2)) {
438 /* LPAR CPUs */
439 struct sysib_222 sysib;
441 memset(&sysib, 0, sizeof(sysib));
442 stw_p(&sysib.lpar_num, 0);
443 sysib.lcpuc = 0;
444 /* XXX change when SMP comes */
445 stw_p(&sysib.total_cpus, 1);
446 stw_p(&sysib.conf_cpus, 1);
447 stw_p(&sysib.standby_cpus, 0);
448 stw_p(&sysib.reserved_cpus, 0);
449 ebcdic_put(sysib.name, "QEMU ", 8);
450 stl_p(&sysib.caf, 1000);
451 stw_p(&sysib.dedicated_cpus, 0);
452 stw_p(&sysib.shared_cpus, 0);
453 cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
454 } else {
455 cc = 3;
457 break;
459 case STSI_LEVEL_3:
461 if ((sel1 == 2) && (sel2 == 2)) {
462 /* VM CPUs */
463 struct sysib_322 sysib;
465 memset(&sysib, 0, sizeof(sysib));
466 sysib.count = 1;
467 /* XXX change when SMP comes */
468 stw_p(&sysib.vm[0].total_cpus, 1);
469 stw_p(&sysib.vm[0].conf_cpus, 1);
470 stw_p(&sysib.vm[0].standby_cpus, 0);
471 stw_p(&sysib.vm[0].reserved_cpus, 0);
472 ebcdic_put(sysib.vm[0].name, "KVMguest", 8);
473 stl_p(&sysib.vm[0].caf, 1000);
474 ebcdic_put(sysib.vm[0].cpi, "KVM/Linux ", 16);
475 cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
476 } else {
477 cc = 3;
479 break;
481 case STSI_LEVEL_CURRENT:
482 env->regs[0] = STSI_LEVEL_3;
483 break;
484 default:
485 cc = 3;
486 break;
489 return cc;
492 uint32_t HELPER(sigp)(CPUS390XState *env, uint64_t order_code, uint32_t r1,
493 uint64_t cpu_addr)
495 int cc = SIGP_CC_ORDER_CODE_ACCEPTED;
497 HELPER_LOG("%s: %016" PRIx64 " %08x %016" PRIx64 "\n",
498 __func__, order_code, r1, cpu_addr);
500 /* Remember: Use "R1 or R1 + 1, whichever is the odd-numbered register"
501 as parameter (input). Status (output) is always R1. */
503 switch (order_code) {
504 case SIGP_SET_ARCH:
505 /* switch arch */
506 break;
507 case SIGP_SENSE:
508 /* enumerate CPU status */
509 if (cpu_addr) {
510 /* XXX implement when SMP comes */
511 return 3;
513 env->regs[r1] &= 0xffffffff00000000ULL;
514 cc = 1;
515 break;
516 #if !defined(CONFIG_USER_ONLY)
517 case SIGP_RESTART:
518 qemu_system_reset_request();
519 cpu_loop_exit(CPU(s390_env_get_cpu(env)));
520 break;
521 case SIGP_STOP:
522 qemu_system_shutdown_request();
523 cpu_loop_exit(CPU(s390_env_get_cpu(env)));
524 break;
525 #endif
526 default:
527 /* unknown sigp */
528 fprintf(stderr, "XXX unknown sigp: 0x%" PRIx64 "\n", order_code);
529 cc = SIGP_CC_NOT_OPERATIONAL;
532 return cc;
534 #endif
536 #ifndef CONFIG_USER_ONLY
537 void HELPER(xsch)(CPUS390XState *env, uint64_t r1)
539 S390CPU *cpu = s390_env_get_cpu(env);
540 ioinst_handle_xsch(cpu, r1);
543 void HELPER(csch)(CPUS390XState *env, uint64_t r1)
545 S390CPU *cpu = s390_env_get_cpu(env);
546 ioinst_handle_csch(cpu, r1);
549 void HELPER(hsch)(CPUS390XState *env, uint64_t r1)
551 S390CPU *cpu = s390_env_get_cpu(env);
552 ioinst_handle_hsch(cpu, r1);
555 void HELPER(msch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
557 S390CPU *cpu = s390_env_get_cpu(env);
558 ioinst_handle_msch(cpu, r1, inst >> 16);
561 void HELPER(rchp)(CPUS390XState *env, uint64_t r1)
563 S390CPU *cpu = s390_env_get_cpu(env);
564 ioinst_handle_rchp(cpu, r1);
567 void HELPER(rsch)(CPUS390XState *env, uint64_t r1)
569 S390CPU *cpu = s390_env_get_cpu(env);
570 ioinst_handle_rsch(cpu, r1);
573 void HELPER(ssch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
575 S390CPU *cpu = s390_env_get_cpu(env);
576 ioinst_handle_ssch(cpu, r1, inst >> 16);
579 void HELPER(stsch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
581 S390CPU *cpu = s390_env_get_cpu(env);
582 ioinst_handle_stsch(cpu, r1, inst >> 16);
585 void HELPER(tsch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
587 S390CPU *cpu = s390_env_get_cpu(env);
588 ioinst_handle_tsch(cpu, r1, inst >> 16);
591 void HELPER(chsc)(CPUS390XState *env, uint64_t inst)
593 S390CPU *cpu = s390_env_get_cpu(env);
594 ioinst_handle_chsc(cpu, inst >> 16);
596 #endif
598 #ifndef CONFIG_USER_ONLY
599 void HELPER(per_check_exception)(CPUS390XState *env)
601 CPUState *cs = CPU(s390_env_get_cpu(env));
603 if (env->per_perc_atmid) {
604 env->int_pgm_code = PGM_PER;
605 env->int_pgm_ilen = get_ilen(cpu_ldub_code(env, env->per_address));
607 cs->exception_index = EXCP_PGM;
608 cpu_loop_exit(cs);
612 void HELPER(per_branch)(CPUS390XState *env, uint64_t from, uint64_t to)
614 if ((env->cregs[9] & PER_CR9_EVENT_BRANCH)) {
615 if (!(env->cregs[9] & PER_CR9_CONTROL_BRANCH_ADDRESS)
616 || get_per_in_range(env, to)) {
617 env->per_address = from;
618 env->per_perc_atmid = PER_CODE_EVENT_BRANCH | get_per_atmid(env);
623 void HELPER(per_ifetch)(CPUS390XState *env, uint64_t addr)
625 if ((env->cregs[9] & PER_CR9_EVENT_IFETCH) && get_per_in_range(env, addr)) {
626 env->per_address = addr;
627 env->per_perc_atmid = PER_CODE_EVENT_IFETCH | get_per_atmid(env);
629 /* If the instruction has to be nullified, trigger the
630 exception immediately. */
631 if (env->cregs[9] & PER_CR9_EVENT_NULLIFICATION) {
632 CPUState *cs = CPU(s390_env_get_cpu(env));
634 env->int_pgm_code = PGM_PER;
635 env->int_pgm_ilen = get_ilen(cpu_ldub_code(env, addr));
637 cs->exception_index = EXCP_PGM;
638 cpu_loop_exit(cs);
642 #endif