target/mips: Convert Rel6 LLD/SCD opcodes to decodetree
[qemu/ar7.git] / accel / meson.build
blobb26cca227a4075145283dcc057c5e0da1218b14c
1 softmmu_ss.add(files('accel.c'))
3 subdir('qtest')
4 subdir('kvm')
5 subdir('tcg')
6 subdir('xen')
7 subdir('stubs')
9 dummy_ss = ss.source_set()
10 dummy_ss.add(files(
11   'dummy-cpus.c',
14 specific_ss.add_all(when: ['CONFIG_SOFTMMU', 'CONFIG_POSIX'], if_true: dummy_ss)
15 specific_ss.add_all(when: ['CONFIG_XEN'], if_true: dummy_ss)