intel_iommu: define several structs for IOMMU IR
[qemu/ar7.git] / target-arm / op_addsub.h
blobca4a1893c3fc366d93f2ccd6c447a735a06d6a41
1 /*
2 * ARMv6 integer SIMD operations.
4 * Copyright (c) 2007 CodeSourcery.
5 * Written by Paul Brook
7 * This code is licensed under the GPL.
8 */
10 #ifdef ARITH_GE
11 #define GE_ARG , void *gep
12 #define DECLARE_GE uint32_t ge = 0
13 #define SET_GE *(uint32_t *)gep = ge
14 #else
15 #define GE_ARG
16 #define DECLARE_GE do{}while(0)
17 #define SET_GE do{}while(0)
18 #endif
20 #define RESULT(val, n, width) \
21 res |= ((uint32_t)(glue(glue(uint,width),_t))(val)) << (n * width)
23 uint32_t HELPER(glue(PFX,add16))(uint32_t a, uint32_t b GE_ARG)
25 uint32_t res = 0;
26 DECLARE_GE;
28 ADD16(a, b, 0);
29 ADD16(a >> 16, b >> 16, 1);
30 SET_GE;
31 return res;
34 uint32_t HELPER(glue(PFX,add8))(uint32_t a, uint32_t b GE_ARG)
36 uint32_t res = 0;
37 DECLARE_GE;
39 ADD8(a, b, 0);
40 ADD8(a >> 8, b >> 8, 1);
41 ADD8(a >> 16, b >> 16, 2);
42 ADD8(a >> 24, b >> 24, 3);
43 SET_GE;
44 return res;
47 uint32_t HELPER(glue(PFX,sub16))(uint32_t a, uint32_t b GE_ARG)
49 uint32_t res = 0;
50 DECLARE_GE;
52 SUB16(a, b, 0);
53 SUB16(a >> 16, b >> 16, 1);
54 SET_GE;
55 return res;
58 uint32_t HELPER(glue(PFX,sub8))(uint32_t a, uint32_t b GE_ARG)
60 uint32_t res = 0;
61 DECLARE_GE;
63 SUB8(a, b, 0);
64 SUB8(a >> 8, b >> 8, 1);
65 SUB8(a >> 16, b >> 16, 2);
66 SUB8(a >> 24, b >> 24, 3);
67 SET_GE;
68 return res;
71 uint32_t HELPER(glue(PFX,subaddx))(uint32_t a, uint32_t b GE_ARG)
73 uint32_t res = 0;
74 DECLARE_GE;
76 ADD16(a, b >> 16, 0);
77 SUB16(a >> 16, b, 1);
78 SET_GE;
79 return res;
82 uint32_t HELPER(glue(PFX,addsubx))(uint32_t a, uint32_t b GE_ARG)
84 uint32_t res = 0;
85 DECLARE_GE;
87 SUB16(a, b >> 16, 0);
88 ADD16(a >> 16, b, 1);
89 SET_GE;
90 return res;
93 #undef GE_ARG
94 #undef DECLARE_GE
95 #undef SET_GE
96 #undef RESULT
98 #undef ARITH_GE
99 #undef PFX
100 #undef ADD16
101 #undef SUB16
102 #undef ADD8
103 #undef SUB8