hw/dma/i82374.c

   1 /*
   2  * QEMU Intel 82374 emulation (Enhanced DMA controller)
   3  *
   4  * Copyright (c) 2010 Hervé Poussineau
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #include "qemu/osdep.h"
  26 #include "qapi/error.h"
  27 #include "qemu/module.h"
  28 #include "hw/isa/isa.h"
  29 #include "hw/qdev-properties.h"
  30 #include "migration/vmstate.h"
  31 #include "hw/dma/i8257.h"
  32
  33 #define TYPE_I82374 "i82374"
  34 #define I82374(obj) OBJECT_CHECK(I82374State, (obj), TYPE_I82374)
  35
  36 //#define DEBUG_I82374
  37
  38 #ifdef DEBUG_I82374
  39 #define DPRINTF(fmt, ...) \
  40 do { fprintf(stderr, "i82374: " fmt , ## __VA_ARGS__); } while (0)
  41 #else
  42 #define DPRINTF(fmt, ...) \
  43 do {} while (0)
  44 #endif
  45 #define BADF(fmt, ...) \
  46 do { fprintf(stderr, "i82374 ERROR: " fmt , ## __VA_ARGS__); } while (0)
  47
  48 typedef struct I82374State {
  49     ISADevice parent_obj;
  50
  51     uint32_t iobase;
  52     uint8_t commands[8];
  53     PortioList port_list;
  54 } I82374State;
  55
  56 static const VMStateDescription vmstate_i82374 = {
  57     .name = "i82374",
  58     .version_id = 0,
  59     .minimum_version_id = 0,
  60     .fields = (VMStateField[]) {
  61         VMSTATE_UINT8_ARRAY(commands, I82374State, 8),
  62         VMSTATE_END_OF_LIST()
  63     },
  64 };
  65
  66 static uint32_t i82374_read_isr(void *opaque, uint32_t nport)
  67 {
  68     uint32_t val = 0;
  69
  70     BADF("%s: %08x\n", __func__, nport);
  71
  72     DPRINTF("%s: %08x=%08x\n", __func__, nport, val);
  73     return val;
  74 }
  75
  76 static void i82374_write_command(void *opaque, uint32_t nport, uint32_t data)
  77 {
  78     DPRINTF("%s: %08x=%08x\n", __func__, nport, data);
  79
  80     if (data != 0x42) {
  81         /* Not Stop S/G command */
  82         BADF("%s: %08x=%08x\n", __func__, nport, data);
  83     }
  84 }
  85
  86 static uint32_t i82374_read_status(void *opaque, uint32_t nport)
  87 {
  88     uint32_t val = 0;
  89
  90     BADF("%s: %08x\n", __func__, nport);
  91
  92     DPRINTF("%s: %08x=%08x\n", __func__, nport, val);
  93     return val;
  94 }
  95
  96 static void i82374_write_descriptor(void *opaque, uint32_t nport, uint32_t data)
  97 {
  98     DPRINTF("%s: %08x=%08x\n", __func__, nport, data);
  99
 100     BADF("%s: %08x=%08x\n", __func__, nport, data);
 101 }
 102
 103 static uint32_t i82374_read_descriptor(void *opaque, uint32_t nport)
 104 {
 105     uint32_t val = 0;
 106
 107     BADF("%s: %08x\n", __func__, nport);
 108
 109     DPRINTF("%s: %08x=%08x\n", __func__, nport, val);
 110     return val;
 111 }
 112
 113 static const MemoryRegionPortio i82374_portio_list[] = {
 114     { 0x0A, 1, 1, .read = i82374_read_isr, },
 115     { 0x10, 8, 1, .write = i82374_write_command, },
 116     { 0x18, 8, 1, .read = i82374_read_status, },
 117     { 0x20, 0x20, 1,
 118       .write = i82374_write_descriptor, .read = i82374_read_descriptor, },
 119     PORTIO_END_OF_LIST(),
 120 };
 121
 122 static void i82374_realize(DeviceState *dev, Error **errp)
 123 {
 124     I82374State *s = I82374(dev);
 125     ISABus *isa_bus = isa_bus_from_device(ISA_DEVICE(dev));
 126
 127     if (isa_get_dma(isa_bus, 0)) {
 128         error_setg(errp, "DMA already initialized on ISA bus");
 129         return;
 130     }
 131     i8257_dma_init(isa_bus, true);
 132
 133     portio_list_init(&s->port_list, OBJECT(s), i82374_portio_list, s,
 134                      "i82374");
 135     portio_list_add(&s->port_list, isa_address_space_io(&s->parent_obj),
 136                     s->iobase);
 137
 138     memset(s->commands, 0, sizeof(s->commands));
 139 }
 140
 141 static Property i82374_properties[] = {
 142     DEFINE_PROP_UINT32("iobase", I82374State, iobase, 0x400),
 143     DEFINE_PROP_END_OF_LIST()
 144 };
 145
 146 static void i82374_class_init(ObjectClass *klass, void *data)
 147 {
 148     DeviceClass *dc = DEVICE_CLASS(klass);
 149
 150     dc->realize = i82374_realize;
 151     dc->vmsd = &vmstate_i82374;
 152     device_class_set_props(dc, i82374_properties);
 153 }
 154
 155 static const TypeInfo i82374_info = {
 156     .name  = TYPE_I82374,
 157     .parent = TYPE_ISA_DEVICE,
 158     .instance_size  = sizeof(I82374State),
 159     .class_init = i82374_class_init,
 160 };
 161
 162 static void i82374_register_types(void)
 163 {
 164     type_register_static(&i82374_info);
 165 }
 166
 167 type_init(i82374_register_types)