hw/i386/pc_q35.c

   1 /*
   2  * Q35 chipset based pc system emulator
   3  *
   4  * Copyright (c) 2003-2004 Fabrice Bellard
   5  * Copyright (c) 2009, 2010
   6  *               Isaku Yamahata <yamahata at valinux co jp>
   7  *               VA Linux Systems Japan K.K.
   8  * Copyright (C) 2012 Jason Baron <jbaron@redhat.com>
   9  *
  10  * This is based on pc.c, but heavily modified.
  11  *
  12  * Permission is hereby granted, free of charge, to any person obtaining a copy
  13  * of this software and associated documentation files (the "Software"), to deal
  14  * in the Software without restriction, including without limitation the rights
  15  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  16  * copies of the Software, and to permit persons to whom the Software is
  17  * furnished to do so, subject to the following conditions:
  18  *
  19  * The above copyright notice and this permission notice shall be included in
  20  * all copies or substantial portions of the Software.
  21  *
  22  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  23  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  24  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  25  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  26  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  27  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  28  * THE SOFTWARE.
  29  */
  30 #include "hw/hw.h"
  31 #include "hw/loader.h"
  32 #include "sysemu/arch_init.h"
  33 #include "hw/i2c/smbus.h"
  34 #include "hw/boards.h"
  35 #include "hw/timer/mc146818rtc.h"
  36 #include "hw/xen/xen.h"
  37 #include "sysemu/kvm.h"
  38 #include "hw/kvm/clock.h"
  39 #include "hw/pci-host/q35.h"
  40 #include "exec/address-spaces.h"
  41 #include "hw/i386/ich9.h"
  42 #include "hw/smbios/smbios.h"
  43 #include "hw/ide/pci.h"
  44 #include "hw/ide/ahci.h"
  45 #include "hw/usb.h"
  46 #include "qemu/error-report.h"
  47 #include "migration/migration.h"
  48
  49 /* ICH9 AHCI has 6 ports */
  50 #define MAX_SATA_PORTS     6
  51
  52 /* PC hardware initialisation */
  53 static void pc_q35_init(MachineState *machine)
  54 {
  55     PCMachineState *pcms = PC_MACHINE(machine);
  56     PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
  57     Q35PCIHost *q35_host;
  58     PCIHostState *phb;
  59     PCIBus *host_bus;
  60     PCIDevice *lpc;
  61     BusState *idebus[MAX_SATA_PORTS];
  62     ISADevice *rtc_state;
  63     MemoryRegion *pci_memory;
  64     MemoryRegion *rom_memory;
  65     MemoryRegion *ram_memory;
  66     GSIState *gsi_state;
  67     ISABus *isa_bus;
  68     qemu_irq *gsi;
  69     qemu_irq *i8259;
  70     int i;
  71     ICH9LPCState *ich9_lpc;
  72     PCIDevice *ahci;
  73     PcGuestInfo *guest_info;
  74     ram_addr_t lowmem;
  75     DriveInfo *hd[MAX_SATA_PORTS];
  76     MachineClass *mc = MACHINE_GET_CLASS(machine);
  77
  78     /* Check whether RAM fits below 4G (leaving 1/2 GByte for IO memory
  79      * and 256 Mbytes for PCI Express Enhanced Configuration Access Mapping
  80      * also known as MMCFG).
  81      * If it doesn't, we need to split it in chunks below and above 4G.
  82      * In any case, try to make sure that guest addresses aligned at
  83      * 1G boundaries get mapped to host addresses aligned at 1G boundaries.
  84      * For old machine types, use whatever split we used historically to avoid
  85      * breaking migration.
  86      */
  87     if (machine->ram_size >= 0xb0000000) {
  88         lowmem = pcmc->gigabyte_align ? 0x80000000 : 0xb0000000;
  89     } else {
  90         lowmem = 0xb0000000;
  91     }
  92
  93     /* Handle the machine opt max-ram-below-4g.  It is basically doing
  94      * min(qemu limit, user limit).
  95      */
  96     if (lowmem > pcms->max_ram_below_4g) {
  97         lowmem = pcms->max_ram_below_4g;
  98         if (machine->ram_size - lowmem > lowmem &&
  99             lowmem & ((1ULL << 30) - 1)) {
 100             error_report("Warning: Large machine and max_ram_below_4g(%"PRIu64
 101                          ") not a multiple of 1G; possible bad performance.",
 102                          pcms->max_ram_below_4g);
 103         }
 104     }
 105
 106     if (machine->ram_size >= lowmem) {
 107         pcms->above_4g_mem_size = machine->ram_size - lowmem;
 108         pcms->below_4g_mem_size = lowmem;
 109     } else {
 110         pcms->above_4g_mem_size = 0;
 111         pcms->below_4g_mem_size = machine->ram_size;
 112     }
 113
 114     if (xen_enabled() && xen_hvm_init(pcms, &ram_memory) != 0) {
 115         fprintf(stderr, "xen hardware virtual machine initialisation failed\n");
 116         exit(1);
 117     }
 118
 119     pc_cpus_init(pcms);
 120     if (!pcmc->has_acpi_build) {
 121         /* only machine types 1.7 & older need this */
 122         pc_acpi_init("q35-acpi-dsdt.aml");
 123     }
 124
 125     kvmclock_create();
 126
 127     /* pci enabled */
 128     if (pcmc->pci_enabled) {
 129         pci_memory = g_new(MemoryRegion, 1);
 130         memory_region_init(pci_memory, NULL, "pci", UINT64_MAX);
 131         rom_memory = pci_memory;
 132     } else {
 133         pci_memory = NULL;
 134         rom_memory = get_system_memory();
 135     }
 136
 137     guest_info = pc_guest_info_init(pcms);
 138     guest_info->isapc_ram_fw = false;
 139     guest_info->has_acpi_build = pcmc->has_acpi_build;
 140     guest_info->has_reserved_memory = pcmc->has_reserved_memory;
 141     guest_info->rsdp_in_ram = pcmc->rsdp_in_ram;
 142
 143     /* Migration was not supported in 2.0 for Q35, so do not bother
 144      * with this hack (see hw/i386/acpi-build.c).
 145      */
 146     guest_info->legacy_acpi_table_size = 0;
 147
 148     if (pcmc->smbios_defaults) {
 149         /* These values are guest ABI, do not change */
 150         smbios_set_defaults("QEMU", "Standard PC (Q35 + ICH9, 2009)",
 151                             mc->name, pcmc->smbios_legacy_mode,
 152                             pcmc->smbios_uuid_encoded,
 153                             SMBIOS_ENTRY_POINT_21);
 154     }
 155
 156     /* allocate ram and load rom/bios */
 157     if (!xen_enabled()) {
 158         pc_memory_init(pcms, get_system_memory(),
 159                        rom_memory, &ram_memory, guest_info);
 160     }
 161
 162     /* irq lines */
 163     gsi_state = g_malloc0(sizeof(*gsi_state));
 164     if (kvm_irqchip_in_kernel()) {
 165         kvm_pc_setup_irq_routing(pcmc->pci_enabled);
 166         gsi = qemu_allocate_irqs(kvm_pc_gsi_handler, gsi_state,
 167                                  GSI_NUM_PINS);
 168     } else {
 169         gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS);
 170     }
 171
 172     /* create pci host bus */
 173     q35_host = Q35_HOST_DEVICE(qdev_create(NULL, TYPE_Q35_HOST_DEVICE));
 174
 175     object_property_add_child(qdev_get_machine(), "q35", OBJECT(q35_host), NULL);
 176     q35_host->mch.ram_memory = ram_memory;
 177     q35_host->mch.pci_address_space = pci_memory;
 178     q35_host->mch.system_memory = get_system_memory();
 179     q35_host->mch.address_space_io = get_system_io();
 180     q35_host->mch.below_4g_mem_size = pcms->below_4g_mem_size;
 181     q35_host->mch.above_4g_mem_size = pcms->above_4g_mem_size;
 182     /* pci */
 183     qdev_init_nofail(DEVICE(q35_host));
 184     phb = PCI_HOST_BRIDGE(q35_host);
 185     host_bus = phb->bus;
 186     pcms->bus = phb->bus;
 187     /* create ISA bus */
 188     lpc = pci_create_simple_multifunction(host_bus, PCI_DEVFN(ICH9_LPC_DEV,
 189                                           ICH9_LPC_FUNC), true,
 190                                           TYPE_ICH9_LPC_DEVICE);
 191
 192     object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
 193                              TYPE_HOTPLUG_HANDLER,
 194                              (Object **)&pcms->acpi_dev,
 195                              object_property_allow_set_link,
 196                              OBJ_PROP_LINK_UNREF_ON_RELEASE, &error_abort);
 197     object_property_set_link(OBJECT(machine), OBJECT(lpc),
 198                              PC_MACHINE_ACPI_DEVICE_PROP, &error_abort);
 199
 200     ich9_lpc = ICH9_LPC_DEVICE(lpc);
 201     ich9_lpc->pic = gsi;
 202     ich9_lpc->ioapic = gsi_state->ioapic_irq;
 203     pci_bus_irqs(host_bus, ich9_lpc_set_irq, ich9_lpc_map_irq, ich9_lpc,
 204                  ICH9_LPC_NB_PIRQS);
 205     pci_bus_set_route_irq_fn(host_bus, ich9_route_intx_pin_to_irq);
 206     isa_bus = ich9_lpc->isa_bus;
 207
 208     /*end early*/
 209     isa_bus_irqs(isa_bus, gsi);
 210
 211     if (kvm_irqchip_in_kernel()) {
 212         i8259 = kvm_i8259_init(isa_bus);
 213     } else if (xen_enabled()) {
 214         i8259 = xen_interrupt_controller_init();
 215     } else {
 216         i8259 = i8259_init(isa_bus, pc_allocate_cpu_irq());
 217     }
 218
 219     for (i = 0; i < ISA_NUM_IRQS; i++) {
 220         gsi_state->i8259_irq[i] = i8259[i];
 221     }
 222     if (pcmc->pci_enabled) {
 223         ioapic_init_gsi(gsi_state, "q35");
 224     }
 225
 226     pc_register_ferr_irq(gsi[13]);
 227
 228     assert(pcms->vmport != ON_OFF_AUTO__MAX);
 229     if (pcms->vmport == ON_OFF_AUTO_AUTO) {
 230         pcms->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON;
 231     }
 232
 233     /* init basic PC hardware */
 234     pc_basic_device_init(isa_bus, gsi, &rtc_state, !mc->no_floppy,
 235                          (pcms->vmport != ON_OFF_AUTO_ON), 0xff0104);
 236
 237     /* connect pm stuff to lpc */
 238     ich9_lpc_pm_init(lpc, pc_machine_is_smm_enabled(pcms), !mc->no_tco);
 239
 240     /* ahci and SATA device, for q35 1 ahci controller is built-in */
 241     ahci = pci_create_simple_multifunction(host_bus,
 242                                            PCI_DEVFN(ICH9_SATA1_DEV,
 243                                                      ICH9_SATA1_FUNC),
 244                                            true, "ich9-ahci");
 245     idebus[0] = qdev_get_child_bus(&ahci->qdev, "ide.0");
 246     idebus[1] = qdev_get_child_bus(&ahci->qdev, "ide.1");
 247     g_assert(MAX_SATA_PORTS == ICH_AHCI(ahci)->ahci.ports);
 248     ide_drive_get(hd, ICH_AHCI(ahci)->ahci.ports);
 249     ahci_ide_create_devs(ahci, hd);
 250
 251     if (usb_enabled()) {
 252         /* Should we create 6 UHCI according to ich9 spec? */
 253         ehci_create_ich9_with_companions(host_bus, 0x1d);
 254     }
 255
 256     /* TODO: Populate SPD eeprom data.  */
 257     smbus_eeprom_init(ich9_smb_init(host_bus,
 258                                     PCI_DEVFN(ICH9_SMB_DEV, ICH9_SMB_FUNC),
 259                                     0xb100),
 260                       8, NULL, 0);
 261
 262     pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
 263
 264     /* the rest devices to which pci devfn is automatically assigned */
 265     pc_vga_init(isa_bus, host_bus);
 266     pc_nic_init(isa_bus, host_bus);
 267     if (pcmc->pci_enabled) {
 268         pc_pci_device_init(host_bus);
 269     }
 270 }
 271
 272 /* Looking for a pc_compat_2_4() function? It doesn't exist.
 273  * pc_compat_*() functions that run on machine-init time and
 274  * change global QEMU state are deprecated. Please don't create
 275  * one, and implement any pc-*-2.4 (and newer) compat code in
 276  * HW_COMPAT_*, PC_COMPAT_*, or * pc_*_machine_options().
 277  */
 278
 279 static void pc_compat_2_3(MachineState *machine)
 280 {
 281     PCMachineState *pcms = PC_MACHINE(machine);
 282     savevm_skip_section_footers();
 283     if (kvm_enabled()) {
 284         pcms->smm = ON_OFF_AUTO_OFF;
 285     }
 286     global_state_set_optional();
 287     savevm_skip_configuration();
 288 }
 289
 290 static void pc_compat_2_2(MachineState *machine)
 291 {
 292     pc_compat_2_3(machine);
 293     machine->suppress_vmdesc = true;
 294 }
 295
 296 static void pc_compat_2_1(MachineState *machine)
 297 {
 298     pc_compat_2_2(machine);
 299     x86_cpu_change_kvm_default("svm", NULL);
 300 }
 301
 302 static void pc_compat_2_0(MachineState *machine)
 303 {
 304     pc_compat_2_1(machine);
 305 }
 306
 307 static void pc_compat_1_7(MachineState *machine)
 308 {
 309     pc_compat_2_0(machine);
 310     x86_cpu_change_kvm_default("x2apic", NULL);
 311 }
 312
 313 static void pc_compat_1_6(MachineState *machine)
 314 {
 315     pc_compat_1_7(machine);
 316 }
 317
 318 static void pc_compat_1_5(MachineState *machine)
 319 {
 320     pc_compat_1_6(machine);
 321 }
 322
 323 static void pc_compat_1_4(MachineState *machine)
 324 {
 325     pc_compat_1_5(machine);
 326 }
 327
 328 #define DEFINE_Q35_MACHINE(suffix, name, compatfn, optionfn) \
 329     static void pc_init_##suffix(MachineState *machine) \
 330     { \
 331         void (*compat)(MachineState *m) = (compatfn); \
 332         if (compat) { \
 333             compat(machine); \
 334         } \
 335         pc_q35_init(machine); \
 336     } \
 337     DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn)
 338
 339
 340 static void pc_q35_machine_options(MachineClass *m)
 341 {
 342     m->family = "pc_q35";
 343     m->desc = "Standard PC (Q35 + ICH9, 2009)";
 344     m->hot_add_cpu = pc_hot_add_cpu;
 345     m->units_per_default_bus = 1;
 346     m->default_machine_opts = "firmware=bios-256k.bin";
 347     m->default_display = "std";
 348     m->no_floppy = 1;
 349     m->no_tco = 0;
 350 }
 351
 352 static void pc_q35_2_5_machine_options(MachineClass *m)
 353 {
 354     pc_q35_machine_options(m);
 355     m->alias = "q35";
 356 }
 357
 358 DEFINE_Q35_MACHINE(v2_5, "pc-q35-2.5", NULL,
 359                    pc_q35_2_5_machine_options);
 360
 361 static void pc_q35_2_4_machine_options(MachineClass *m)
 362 {
 363     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
 364     pc_q35_2_5_machine_options(m);
 365     m->hw_version = "2.4.0";
 366     m->alias = NULL;
 367     pcmc->broken_reserved_end = true;
 368     SET_MACHINE_COMPAT(m, PC_COMPAT_2_4);
 369 }
 370
 371 DEFINE_Q35_MACHINE(v2_4, "pc-q35-2.4", NULL,
 372                    pc_q35_2_4_machine_options);
 373
 374
 375 static void pc_q35_2_3_machine_options(MachineClass *m)
 376 {
 377     pc_q35_2_4_machine_options(m);
 378     m->hw_version = "2.3.0";
 379     m->no_floppy = 0;
 380     m->no_tco = 1;
 381     SET_MACHINE_COMPAT(m, PC_COMPAT_2_3);
 382 }
 383
 384 DEFINE_Q35_MACHINE(v2_3, "pc-q35-2.3", pc_compat_2_3,
 385                    pc_q35_2_3_machine_options);
 386
 387
 388 static void pc_q35_2_2_machine_options(MachineClass *m)
 389 {
 390     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
 391     pc_q35_2_3_machine_options(m);
 392     m->hw_version = "2.2.0";
 393     SET_MACHINE_COMPAT(m, PC_COMPAT_2_2);
 394     pcmc->rsdp_in_ram = false;
 395 }
 396
 397 DEFINE_Q35_MACHINE(v2_2, "pc-q35-2.2", pc_compat_2_2,
 398                    pc_q35_2_2_machine_options);
 399
 400
 401 static void pc_q35_2_1_machine_options(MachineClass *m)
 402 {
 403     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
 404     pc_q35_2_2_machine_options(m);
 405     m->hw_version = "2.1.0";
 406     m->default_display = NULL;
 407     SET_MACHINE_COMPAT(m, PC_COMPAT_2_1);
 408     pcmc->smbios_uuid_encoded = false;
 409     pcmc->enforce_aligned_dimm = false;
 410 }
 411
 412 DEFINE_Q35_MACHINE(v2_1, "pc-q35-2.1", pc_compat_2_1,
 413                    pc_q35_2_1_machine_options);
 414
 415
 416 static void pc_q35_2_0_machine_options(MachineClass *m)
 417 {
 418     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
 419     pc_q35_2_1_machine_options(m);
 420     m->hw_version = "2.0.0";
 421     SET_MACHINE_COMPAT(m, PC_COMPAT_2_0);
 422     pcmc->has_reserved_memory = false;
 423     pcmc->smbios_legacy_mode = true;
 424     pcmc->acpi_data_size = 0x10000;
 425 }
 426
 427 DEFINE_Q35_MACHINE(v2_0, "pc-q35-2.0", pc_compat_2_0,
 428                    pc_q35_2_0_machine_options);
 429
 430
 431 static void pc_q35_1_7_machine_options(MachineClass *m)
 432 {
 433     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
 434     pc_q35_2_0_machine_options(m);
 435     m->hw_version = "1.7.0";
 436     m->default_machine_opts = NULL;
 437     m->option_rom_has_mr = true;
 438     SET_MACHINE_COMPAT(m, PC_COMPAT_1_7);
 439     pcmc->smbios_defaults = false;
 440     pcmc->gigabyte_align = false;
 441 }
 442
 443 DEFINE_Q35_MACHINE(v1_7, "pc-q35-1.7", pc_compat_1_7,
 444                    pc_q35_1_7_machine_options);
 445
 446
 447 static void pc_q35_1_6_machine_options(MachineClass *m)
 448 {
 449     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
 450     pc_q35_machine_options(m);
 451     m->hw_version = "1.6.0";
 452     m->rom_file_has_mr = false;
 453     SET_MACHINE_COMPAT(m, PC_COMPAT_1_6);
 454     pcmc->has_acpi_build = false;
 455 }
 456
 457 DEFINE_Q35_MACHINE(v1_6, "pc-q35-1.6", pc_compat_1_6,
 458                    pc_q35_1_6_machine_options);
 459
 460
 461 static void pc_q35_1_5_machine_options(MachineClass *m)
 462 {
 463     pc_q35_1_6_machine_options(m);
 464     m->hw_version = "1.5.0";
 465     SET_MACHINE_COMPAT(m, PC_COMPAT_1_5);
 466 }
 467
 468 DEFINE_Q35_MACHINE(v1_5, "pc-q35-1.5", pc_compat_1_5,
 469                    pc_q35_1_5_machine_options);
 470
 471
 472 static void pc_q35_1_4_machine_options(MachineClass *m)
 473 {
 474     pc_q35_1_5_machine_options(m);
 475     m->hw_version = "1.4.0";
 476     m->hot_add_cpu = NULL;
 477     SET_MACHINE_COMPAT(m, PC_COMPAT_1_4);
 478 }
 479
 480 DEFINE_Q35_MACHINE(v1_4, "pc-q35-1.4", pc_compat_1_4,
 481                    pc_q35_1_4_machine_options);