disas/i386.c

   1 /* opcodes/i386-dis.c r1.126 */
   2 /* Print i386 instructions for GDB, the GNU debugger.
   3    Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
   4    2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
   5
   6    This file is part of GDB.
   7
   8    This program is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 2 of the License, or
  11    (at your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16    GNU General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program; if not, see <http://www.gnu.org/licenses/>. */
  20
  21 /* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
  22    July 1988
  23     modified by John Hassey (hassey@dg-rtp.dg.com)
  24     x86-64 support added by Jan Hubicka (jh@suse.cz)
  25     VIA PadLock support by Michal Ludvig (mludvig@suse.cz).  */
  26
  27 /* The main tables describing the instructions is essentially a copy
  28    of the "Opcode Map" chapter (Appendix A) of the Intel 80386
  29    Programmers Manual.  Usually, there is a capital letter, followed
  30    by a small letter.  The capital letter tell the addressing mode,
  31    and the small letter tells about the operand size.  Refer to
  32    the Intel manual for details.  */
  33
  34 #include "qemu/osdep.h"
  35 #include "disas/dis-asm.h"
  36 #include "qemu/cutils.h"
  37
  38 /* include/opcode/i386.h r1.78 */
  39
  40 /* opcode/i386.h -- Intel 80386 opcode macros
  41    Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
  42    2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
  43    Free Software Foundation, Inc.
  44
  45    This file is part of GAS, the GNU Assembler, and GDB, the GNU Debugger.
  46
  47    This program is free software; you can redistribute it and/or modify
  48    it under the terms of the GNU General Public License as published by
  49    the Free Software Foundation; either version 2 of the License, or
  50    (at your option) any later version.
  51
  52    This program is distributed in the hope that it will be useful,
  53    but WITHOUT ANY WARRANTY; without even the implied warranty of
  54    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  55    GNU General Public License for more details.
  56
  57    You should have received a copy of the GNU General Public License
  58    along with this program; if not, see <http://www.gnu.org/licenses/>.  */
  59
  60 /* The SystemV/386 SVR3.2 assembler, and probably all AT&T derived
  61    ix86 Unix assemblers, generate floating point instructions with
  62    reversed source and destination registers in certain cases.
  63    Unfortunately, gcc and possibly many other programs use this
  64    reversed syntax, so we're stuck with it.
  65
  66    eg. `fsub %st(3),%st' results in st = st - st(3) as expected, but
  67    `fsub %st,%st(3)' results in st(3) = st - st(3), rather than
  68    the expected st(3) = st(3) - st
  69
  70    This happens with all the non-commutative arithmetic floating point
  71    operations with two register operands, where the source register is
  72    %st, and destination register is %st(i).
  73
  74    The affected opcode map is dceX, dcfX, deeX, defX.  */
  75
  76 #ifndef SYSV386_COMPAT
  77 /* Set non-zero for broken, compatible instructions.  Set to zero for
  78    non-broken opcodes at your peril.  gcc generates SystemV/386
  79    compatible instructions.  */
  80 #define SYSV386_COMPAT 1
  81 #endif
  82 #ifndef OLDGCC_COMPAT
  83 /* Set non-zero to cater for old (<= 2.8.1) versions of gcc that could
  84    generate nonsense fsubp, fsubrp, fdivp and fdivrp with operands
  85    reversed.  */
  86 #define OLDGCC_COMPAT SYSV386_COMPAT
  87 #endif
  88
  89 #define MOV_AX_DISP32 0xa0
  90 #define POP_SEG_SHORT 0x07
  91 #define JUMP_PC_RELATIVE 0xeb
  92 #define INT_OPCODE  0xcd
  93 #define INT3_OPCODE 0xcc
  94 /* The opcode for the fwait instruction, which disassembler treats as a
  95    prefix when it can.  */
  96 #define FWAIT_OPCODE 0x9b
  97 #define ADDR_PREFIX_OPCODE 0x67
  98 #define DATA_PREFIX_OPCODE 0x66
  99 #define LOCK_PREFIX_OPCODE 0xf0
 100 #define CS_PREFIX_OPCODE 0x2e
 101 #define DS_PREFIX_OPCODE 0x3e
 102 #define ES_PREFIX_OPCODE 0x26
 103 #define FS_PREFIX_OPCODE 0x64
 104 #define GS_PREFIX_OPCODE 0x65
 105 #define SS_PREFIX_OPCODE 0x36
 106 #define REPNE_PREFIX_OPCODE 0xf2
 107 #define REPE_PREFIX_OPCODE  0xf3
 108
 109 #define TWO_BYTE_OPCODE_ESCAPE 0x0f
 110 #define NOP_OPCODE (char) 0x90
 111
 112 /* register numbers */
 113 #define EBP_REG_NUM 5
 114 #define ESP_REG_NUM 4
 115
 116 /* modrm_byte.regmem for twobyte escape */
 117 #define ESCAPE_TO_TWO_BYTE_ADDRESSING ESP_REG_NUM
 118 /* index_base_byte.index for no index register addressing */
 119 #define NO_INDEX_REGISTER ESP_REG_NUM
 120 /* index_base_byte.base for no base register addressing */
 121 #define NO_BASE_REGISTER EBP_REG_NUM
 122 #define NO_BASE_REGISTER_16 6
 123
 124 /* modrm.mode = REGMEM_FIELD_HAS_REG when a register is in there */
 125 #define REGMEM_FIELD_HAS_REG 0x3/* always = 0x3 */
 126 #define REGMEM_FIELD_HAS_MEM (~REGMEM_FIELD_HAS_REG)
 127
 128 /* x86-64 extension prefix.  */
 129 #define REX_OPCODE      0x40
 130
 131 /* Indicates 64 bit operand size.  */
 132 #define REX_W   8
 133 /* High extension to reg field of modrm byte.  */
 134 #define REX_R   4
 135 /* High extension to SIB index field.  */
 136 #define REX_X   2
 137 /* High extension to base field of modrm or SIB, or reg field of opcode.  */
 138 #define REX_B   1
 139
 140 /* max operands per insn */
 141 #define MAX_OPERANDS 4
 142
 143 /* max immediates per insn (lcall, ljmp, insertq, extrq) */
 144 #define MAX_IMMEDIATE_OPERANDS 2
 145
 146 /* max memory refs per insn (string ops) */
 147 #define MAX_MEMORY_OPERANDS 2
 148
 149 /* max size of insn mnemonics.  */
 150 #define MAX_MNEM_SIZE 16
 151
 152 /* max size of register name in insn mnemonics.  */
 153 #define MAX_REG_NAME_SIZE 8
 154
 155 /* opcodes/i386-dis.c r1.126 */
 156
 157 static int fetch_data2(struct disassemble_info *, bfd_byte *);
 158 static int fetch_data(struct disassemble_info *, bfd_byte *);
 159 static void ckprefix (void);
 160 static const char *prefix_name (int, int);
 161 static int print_insn (bfd_vma, disassemble_info *);
 162 static void dofloat (int);
 163 static void OP_ST (int, int);
 164 static void OP_STi (int, int);
 165 static int putop (const char *, int);
 166 static void oappend (const char *);
 167 static void append_seg (void);
 168 static void OP_indirE (int, int);
 169 static void print_operand_value (char *buf, size_t bufsize, int hex, bfd_vma disp);
 170 static void print_displacement (char *, bfd_vma);
 171 static void OP_E (int, int);
 172 static void OP_G (int, int);
 173 static void OP_vvvv (int, int);
 174 static bfd_vma get64 (void);
 175 static bfd_signed_vma get32 (void);
 176 static bfd_signed_vma get32s (void);
 177 static int get16 (void);
 178 static void set_op (bfd_vma, int);
 179 static void OP_REG (int, int);
 180 static void OP_IMREG (int, int);
 181 static void OP_I (int, int);
 182 static void OP_I64 (int, int);
 183 static void OP_sI (int, int);
 184 static void OP_J (int, int);
 185 static void OP_SEG (int, int);
 186 static void OP_DIR (int, int);
 187 static void OP_OFF (int, int);
 188 static void OP_OFF64 (int, int);
 189 static void ptr_reg (int, int);
 190 static void OP_ESreg (int, int);
 191 static void OP_DSreg (int, int);
 192 static void OP_C (int, int);
 193 static void OP_D (int, int);
 194 static void OP_T (int, int);
 195 static void OP_R (int, int);
 196 static void OP_MMX (int, int);
 197 static void OP_XMM (int, int);
 198 static void OP_EM (int, int);
 199 static void OP_EX (int, int);
 200 static void OP_EMC (int,int);
 201 static void OP_MXC (int,int);
 202 static void OP_MS (int, int);
 203 static void OP_XS (int, int);
 204 static void OP_M (int, int);
 205 static void OP_VMX (int, int);
 206 static void OP_0fae (int, int);
 207 static void OP_0f07 (int, int);
 208 static void NOP_Fixup1 (int, int);
 209 static void NOP_Fixup2 (int, int);
 210 static void OP_3DNowSuffix (int, int);
 211 static void OP_SIMD_Suffix (int, int);
 212 static void SIMD_Fixup (int, int);
 213 static void PNI_Fixup (int, int);
 214 static void SVME_Fixup (int, int);
 215 static void INVLPG_Fixup (int, int);
 216 static void BadOp (void);
 217 static void VMX_Fixup (int, int);
 218 static void REP_Fixup (int, int);
 219 static void CMPXCHG8B_Fixup (int, int);
 220 static void XMM_Fixup (int, int);
 221 static void CRC32_Fixup (int, int);
 222
 223 struct dis_private {
 224   /* Points to first byte not fetched.  */
 225   bfd_byte *max_fetched;
 226   bfd_byte the_buffer[MAX_MNEM_SIZE];
 227   bfd_vma insn_start;
 228   int orig_sizeflag;
 229   sigjmp_buf bailout;
 230 };
 231
 232 enum address_mode
 233 {
 234   mode_16bit,
 235   mode_32bit,
 236   mode_64bit
 237 };
 238
 239 static enum address_mode address_mode;
 240
 241 /* Flags for the prefixes for the current instruction.  See below.  */
 242 static int prefixes;
 243
 244 /* REX prefix the current instruction.  See below.  */
 245 static int rex;
 246 /* Bits of REX we've already used.  */
 247 static int rex_used;
 248 /* Mark parts used in the REX prefix.  When we are testing for
 249    empty prefix (for 8bit register REX extension), just mask it
 250    out.  Otherwise test for REX bit is excuse for existence of REX
 251    only in case value is nonzero.  */
 252 #define USED_REX(value)                                 \
 253   {                                                     \
 254     if (value)                                          \
 255       {                                                 \
 256         if ((rex & value))                              \
 257           rex_used |= (value) | REX_OPCODE;             \
 258       }                                                 \
 259     else                                                \
 260       rex_used |= REX_OPCODE;                           \
 261   }
 262
 263 /* Flags for prefixes which we somehow handled when printing the
 264    current instruction.  */
 265 static int used_prefixes;
 266
 267 /* The VEX.vvvv register, unencoded.  */
 268 static int vex_reg;
 269
 270 /* Flags stored in PREFIXES.  */
 271 #define PREFIX_REPZ 1
 272 #define PREFIX_REPNZ 2
 273 #define PREFIX_LOCK 4
 274 #define PREFIX_CS 8
 275 #define PREFIX_SS 0x10
 276 #define PREFIX_DS 0x20
 277 #define PREFIX_ES 0x40
 278 #define PREFIX_FS 0x80
 279 #define PREFIX_GS 0x100
 280 #define PREFIX_DATA 0x200
 281 #define PREFIX_ADDR 0x400
 282 #define PREFIX_FWAIT 0x800
 283
 284 #define PREFIX_VEX_0F    0x1000
 285 #define PREFIX_VEX_0F38  0x2000
 286 #define PREFIX_VEX_0F3A  0x4000
 287
 288 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
 289    to ADDR (exclusive) are valid.  Returns 1 for success, longjmps
 290    on error.  */
 291 static int
 292 fetch_data2(struct disassemble_info *info, bfd_byte *addr)
 293 {
 294   int status;
 295   struct dis_private *priv = (struct dis_private *) info->private_data;
 296   bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
 297
 298   if (addr <= priv->the_buffer + MAX_MNEM_SIZE)
 299     status = (*info->read_memory_func) (start,
 300                                         priv->max_fetched,
 301                                         addr - priv->max_fetched,
 302                                         info);
 303   else
 304     status = -1;
 305   if (status != 0)
 306     {
 307       /* If we did manage to read at least one byte, then
 308          print_insn_i386 will do something sensible.  Otherwise, print
 309          an error.  We do that here because this is where we know
 310          STATUS.  */
 311       if (priv->max_fetched == priv->the_buffer)
 312         (*info->memory_error_func) (status, start, info);
 313       siglongjmp(priv->bailout, 1);
 314     }
 315   else
 316     priv->max_fetched = addr;
 317   return 1;
 318 }
 319
 320 static int
 321 fetch_data(struct disassemble_info *info, bfd_byte *addr)
 322 {
 323     if (addr <= ((struct dis_private *) (info->private_data))->max_fetched) {
 324         return 1;
 325     } else {
 326         return fetch_data2(info, addr);
 327     }
 328 }
 329
 330
 331 #define XX { NULL, 0 }
 332
 333 #define Bv { OP_vvvv, v_mode }
 334 #define Eb { OP_E, b_mode }
 335 #define Ev { OP_E, v_mode }
 336 #define Ed { OP_E, d_mode }
 337 #define Edq { OP_E, dq_mode }
 338 #define Edqw { OP_E, dqw_mode }
 339 #define Edqb { OP_E, dqb_mode }
 340 #define Edqd { OP_E, dqd_mode }
 341 #define indirEv { OP_indirE, stack_v_mode }
 342 #define indirEp { OP_indirE, f_mode }
 343 #define stackEv { OP_E, stack_v_mode }
 344 #define Em { OP_E, m_mode }
 345 #define Ew { OP_E, w_mode }
 346 #define M { OP_M, 0 }           /* lea, lgdt, etc. */
 347 #define Ma { OP_M, v_mode }
 348 #define Mp { OP_M, f_mode }             /* 32 or 48 bit memory operand for LDS, LES etc */
 349 #define Mq { OP_M, q_mode }
 350 #define Gb { OP_G, b_mode }
 351 #define Gv { OP_G, v_mode }
 352 #define Gd { OP_G, d_mode }
 353 #define Gdq { OP_G, dq_mode }
 354 #define Gm { OP_G, m_mode }
 355 #define Gw { OP_G, w_mode }
 356 #define Rd { OP_R, d_mode }
 357 #define Rm { OP_R, m_mode }
 358 #define Ib { OP_I, b_mode }
 359 #define sIb { OP_sI, b_mode }   /* sign extended byte */
 360 #define Iv { OP_I, v_mode }
 361 #define Iq { OP_I, q_mode }
 362 #define Iv64 { OP_I64, v_mode }
 363 #define Iw { OP_I, w_mode }
 364 #define I1 { OP_I, const_1_mode }
 365 #define Jb { OP_J, b_mode }
 366 #define Jv { OP_J, v_mode }
 367 #define Cm { OP_C, m_mode }
 368 #define Dm { OP_D, m_mode }
 369 #define Td { OP_T, d_mode }
 370
 371 #define RMeAX { OP_REG, eAX_reg }
 372 #define RMeBX { OP_REG, eBX_reg }
 373 #define RMeCX { OP_REG, eCX_reg }
 374 #define RMeDX { OP_REG, eDX_reg }
 375 #define RMeSP { OP_REG, eSP_reg }
 376 #define RMeBP { OP_REG, eBP_reg }
 377 #define RMeSI { OP_REG, eSI_reg }
 378 #define RMeDI { OP_REG, eDI_reg }
 379 #define RMrAX { OP_REG, rAX_reg }
 380 #define RMrBX { OP_REG, rBX_reg }
 381 #define RMrCX { OP_REG, rCX_reg }
 382 #define RMrDX { OP_REG, rDX_reg }
 383 #define RMrSP { OP_REG, rSP_reg }
 384 #define RMrBP { OP_REG, rBP_reg }
 385 #define RMrSI { OP_REG, rSI_reg }
 386 #define RMrDI { OP_REG, rDI_reg }
 387 #define RMAL { OP_REG, al_reg }
 388 #define RMAL { OP_REG, al_reg }
 389 #define RMCL { OP_REG, cl_reg }
 390 #define RMDL { OP_REG, dl_reg }
 391 #define RMBL { OP_REG, bl_reg }
 392 #define RMAH { OP_REG, ah_reg }
 393 #define RMCH { OP_REG, ch_reg }
 394 #define RMDH { OP_REG, dh_reg }
 395 #define RMBH { OP_REG, bh_reg }
 396 #define RMAX { OP_REG, ax_reg }
 397 #define RMDX { OP_REG, dx_reg }
 398
 399 #define eAX { OP_IMREG, eAX_reg }
 400 #define eBX { OP_IMREG, eBX_reg }
 401 #define eCX { OP_IMREG, eCX_reg }
 402 #define eDX { OP_IMREG, eDX_reg }
 403 #define eSP { OP_IMREG, eSP_reg }
 404 #define eBP { OP_IMREG, eBP_reg }
 405 #define eSI { OP_IMREG, eSI_reg }
 406 #define eDI { OP_IMREG, eDI_reg }
 407 #define AL { OP_IMREG, al_reg }
 408 #define CL { OP_IMREG, cl_reg }
 409 #define DL { OP_IMREG, dl_reg }
 410 #define BL { OP_IMREG, bl_reg }
 411 #define AH { OP_IMREG, ah_reg }
 412 #define CH { OP_IMREG, ch_reg }
 413 #define DH { OP_IMREG, dh_reg }
 414 #define BH { OP_IMREG, bh_reg }
 415 #define AX { OP_IMREG, ax_reg }
 416 #define DX { OP_IMREG, dx_reg }
 417 #define zAX { OP_IMREG, z_mode_ax_reg }
 418 #define indirDX { OP_IMREG, indir_dx_reg }
 419
 420 #define Sw { OP_SEG, w_mode }
 421 #define Sv { OP_SEG, v_mode }
 422 #define Ap { OP_DIR, 0 }
 423 #define Ob { OP_OFF64, b_mode }
 424 #define Ov { OP_OFF64, v_mode }
 425 #define Xb { OP_DSreg, eSI_reg }
 426 #define Xv { OP_DSreg, eSI_reg }
 427 #define Xz { OP_DSreg, eSI_reg }
 428 #define Yb { OP_ESreg, eDI_reg }
 429 #define Yv { OP_ESreg, eDI_reg }
 430 #define DSBX { OP_DSreg, eBX_reg }
 431
 432 #define es { OP_REG, es_reg }
 433 #define ss { OP_REG, ss_reg }
 434 #define cs { OP_REG, cs_reg }
 435 #define ds { OP_REG, ds_reg }
 436 #define fs { OP_REG, fs_reg }
 437 #define gs { OP_REG, gs_reg }
 438
 439 #define MX { OP_MMX, 0 }
 440 #define XM { OP_XMM, 0 }
 441 #define EM { OP_EM, v_mode }
 442 #define EMd { OP_EM, d_mode }
 443 #define EMq { OP_EM, q_mode }
 444 #define EXd { OP_EX, d_mode }
 445 #define EXq { OP_EX, q_mode }
 446 #define EXx { OP_EX, x_mode }
 447 #define MS { OP_MS, v_mode }
 448 #define XS { OP_XS, v_mode }
 449 #define EMC { OP_EMC, v_mode }
 450 #define MXC { OP_MXC, 0 }
 451 #define VM { OP_VMX, q_mode }
 452 #define OPSUF { OP_3DNowSuffix, 0 }
 453 #define OPSIMD { OP_SIMD_Suffix, 0 }
 454 #define XMM0 { XMM_Fixup, 0 }
 455
 456 /* Used handle "rep" prefix for string instructions.  */
 457 #define Xbr { REP_Fixup, eSI_reg }
 458 #define Xvr { REP_Fixup, eSI_reg }
 459 #define Ybr { REP_Fixup, eDI_reg }
 460 #define Yvr { REP_Fixup, eDI_reg }
 461 #define Yzr { REP_Fixup, eDI_reg }
 462 #define indirDXr { REP_Fixup, indir_dx_reg }
 463 #define ALr { REP_Fixup, al_reg }
 464 #define eAXr { REP_Fixup, eAX_reg }
 465
 466 #define cond_jump_flag { NULL, cond_jump_mode }
 467 #define loop_jcxz_flag { NULL, loop_jcxz_mode }
 468
 469 /* bits in sizeflag */
 470 #define SUFFIX_ALWAYS 4
 471 #define AFLAG 2
 472 #define DFLAG 1
 473
 474 #define b_mode 1  /* byte operand */
 475 #define v_mode 2  /* operand size depends on prefixes */
 476 #define w_mode 3  /* word operand */
 477 #define d_mode 4  /* double word operand  */
 478 #define q_mode 5  /* quad word operand */
 479 #define t_mode 6  /* ten-byte operand */
 480 #define x_mode 7  /* 16-byte XMM operand */
 481 #define m_mode 8  /* d_mode in 32bit, q_mode in 64bit mode.  */
 482 #define cond_jump_mode 9
 483 #define loop_jcxz_mode 10
 484 #define dq_mode 11 /* operand size depends on REX prefixes.  */
 485 #define dqw_mode 12 /* registers like dq_mode, memory like w_mode.  */
 486 #define f_mode 13 /* 4- or 6-byte pointer operand */
 487 #define const_1_mode 14
 488 #define stack_v_mode 15 /* v_mode for stack-related opcodes.  */
 489 #define z_mode 16 /* non-quad operand size depends on prefixes */
 490 #define o_mode 17  /* 16-byte operand */
 491 #define dqb_mode 18 /* registers like dq_mode, memory like b_mode.  */
 492 #define dqd_mode 19 /* registers like dq_mode, memory like d_mode.  */
 493
 494 #define es_reg 100
 495 #define cs_reg 101
 496 #define ss_reg 102
 497 #define ds_reg 103
 498 #define fs_reg 104
 499 #define gs_reg 105
 500
 501 #define eAX_reg 108
 502 #define eCX_reg 109
 503 #define eDX_reg 110
 504 #define eBX_reg 111
 505 #define eSP_reg 112
 506 #define eBP_reg 113
 507 #define eSI_reg 114
 508 #define eDI_reg 115
 509
 510 #define al_reg 116
 511 #define cl_reg 117
 512 #define dl_reg 118
 513 #define bl_reg 119
 514 #define ah_reg 120
 515 #define ch_reg 121
 516 #define dh_reg 122
 517 #define bh_reg 123
 518
 519 #define ax_reg 124
 520 #define cx_reg 125
 521 #define dx_reg 126
 522 #define bx_reg 127
 523 #define sp_reg 128
 524 #define bp_reg 129
 525 #define si_reg 130
 526 #define di_reg 131
 527
 528 #define rAX_reg 132
 529 #define rCX_reg 133
 530 #define rDX_reg 134
 531 #define rBX_reg 135
 532 #define rSP_reg 136
 533 #define rBP_reg 137
 534 #define rSI_reg 138
 535 #define rDI_reg 139
 536
 537 #define z_mode_ax_reg 149
 538 #define indir_dx_reg 150
 539
 540 #define FLOATCODE 1
 541 #define USE_GROUPS 2
 542 #define USE_PREFIX_USER_TABLE 3
 543 #define X86_64_SPECIAL 4
 544 #define IS_3BYTE_OPCODE 5
 545
 546 #define FLOAT     NULL, { { NULL, FLOATCODE } }
 547
 548 #define GRP1a     NULL, { { NULL, USE_GROUPS }, { NULL,  0 } }
 549 #define GRP1b     NULL, { { NULL, USE_GROUPS }, { NULL,  1 } }
 550 #define GRP1S     NULL, { { NULL, USE_GROUPS }, { NULL,  2 } }
 551 #define GRP1Ss    NULL, { { NULL, USE_GROUPS }, { NULL,  3 } }
 552 #define GRP2b     NULL, { { NULL, USE_GROUPS }, { NULL,  4 } }
 553 #define GRP2S     NULL, { { NULL, USE_GROUPS }, { NULL,  5 } }
 554 #define GRP2b_one NULL, { { NULL, USE_GROUPS }, { NULL,  6 } }
 555 #define GRP2S_one NULL, { { NULL, USE_GROUPS }, { NULL,  7 } }
 556 #define GRP2b_cl  NULL, { { NULL, USE_GROUPS }, { NULL,  8 } }
 557 #define GRP2S_cl  NULL, { { NULL, USE_GROUPS }, { NULL,  9 } }
 558 #define GRP3b     NULL, { { NULL, USE_GROUPS }, { NULL, 10 } }
 559 #define GRP3S     NULL, { { NULL, USE_GROUPS }, { NULL, 11 } }
 560 #define GRP4      NULL, { { NULL, USE_GROUPS }, { NULL, 12 } }
 561 #define GRP5      NULL, { { NULL, USE_GROUPS }, { NULL, 13 } }
 562 #define GRP6      NULL, { { NULL, USE_GROUPS }, { NULL, 14 } }
 563 #define GRP7      NULL, { { NULL, USE_GROUPS }, { NULL, 15 } }
 564 #define GRP8      NULL, { { NULL, USE_GROUPS }, { NULL, 16 } }
 565 #define GRP9      NULL, { { NULL, USE_GROUPS }, { NULL, 17 } }
 566 #define GRP11_C6  NULL, { { NULL, USE_GROUPS }, { NULL, 18 } }
 567 #define GRP11_C7  NULL, { { NULL, USE_GROUPS }, { NULL, 19 } }
 568 #define GRP12     NULL, { { NULL, USE_GROUPS }, { NULL, 20 } }
 569 #define GRP13     NULL, { { NULL, USE_GROUPS }, { NULL, 21 } }
 570 #define GRP14     NULL, { { NULL, USE_GROUPS }, { NULL, 22 } }
 571 #define GRP15     NULL, { { NULL, USE_GROUPS }, { NULL, 23 } }
 572 #define GRP16     NULL, { { NULL, USE_GROUPS }, { NULL, 24 } }
 573 #define GRPAMD    NULL, { { NULL, USE_GROUPS }, { NULL, 25 } }
 574 #define GRPPADLCK1 NULL, { { NULL, USE_GROUPS }, { NULL, 26 } }
 575 #define GRPPADLCK2 NULL, { { NULL, USE_GROUPS }, { NULL, 27 } }
 576
 577 #define PREGRP0   NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL,  0 } }
 578 #define PREGRP1   NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL,  1 } }
 579 #define PREGRP2   NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL,  2 } }
 580 #define PREGRP3   NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL,  3 } }
 581 #define PREGRP4   NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL,  4 } }
 582 #define PREGRP5   NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL,  5 } }
 583 #define PREGRP6   NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL,  6 } }
 584 #define PREGRP7   NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL,  7 } }
 585 #define PREGRP8   NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL,  8 } }
 586 #define PREGRP9   NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL,  9 } }
 587 #define PREGRP10  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 10 } }
 588 #define PREGRP11  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 11 } }
 589 #define PREGRP12  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 12 } }
 590 #define PREGRP13  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 13 } }
 591 #define PREGRP14  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 14 } }
 592 #define PREGRP15  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 15 } }
 593 #define PREGRP16  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 16 } }
 594 #define PREGRP17  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 17 } }
 595 #define PREGRP18  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 18 } }
 596 #define PREGRP19  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 19 } }
 597 #define PREGRP20  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 20 } }
 598 #define PREGRP21  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 21 } }
 599 #define PREGRP22  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 22 } }
 600 #define PREGRP23  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 23 } }
 601 #define PREGRP24  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 24 } }
 602 #define PREGRP25  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 25 } }
 603 #define PREGRP26  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 26 } }
 604 #define PREGRP27  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 27 } }
 605 #define PREGRP28  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 28 } }
 606 #define PREGRP29  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 29 } }
 607 #define PREGRP30  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 30 } }
 608 #define PREGRP31  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 31 } }
 609 #define PREGRP32  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 32 } }
 610 #define PREGRP33  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 33 } }
 611 #define PREGRP34  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 34 } }
 612 #define PREGRP35  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 35 } }
 613 #define PREGRP36  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 36 } }
 614 #define PREGRP37  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 37 } }
 615 #define PREGRP38  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 38 } }
 616 #define PREGRP39  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 39 } }
 617 #define PREGRP40  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 40 } }
 618 #define PREGRP41  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 41 } }
 619 #define PREGRP42  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 42 } }
 620 #define PREGRP43  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 43 } }
 621 #define PREGRP44  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 44 } }
 622 #define PREGRP45  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 45 } }
 623 #define PREGRP46  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 46 } }
 624 #define PREGRP47  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 47 } }
 625 #define PREGRP48  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 48 } }
 626 #define PREGRP49  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 49 } }
 627 #define PREGRP50  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 50 } }
 628 #define PREGRP51  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 51 } }
 629 #define PREGRP52  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 52 } }
 630 #define PREGRP53  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 53 } }
 631 #define PREGRP54  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 54 } }
 632 #define PREGRP55  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 55 } }
 633 #define PREGRP56  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 56 } }
 634 #define PREGRP57  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 57 } }
 635 #define PREGRP58  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 58 } }
 636 #define PREGRP59  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 59 } }
 637 #define PREGRP60  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 60 } }
 638 #define PREGRP61  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 61 } }
 639 #define PREGRP62  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 62 } }
 640 #define PREGRP63  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 63 } }
 641 #define PREGRP64  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 64 } }
 642 #define PREGRP65  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 65 } }
 643 #define PREGRP66  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 66 } }
 644 #define PREGRP67  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 67 } }
 645 #define PREGRP68  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 68 } }
 646 #define PREGRP69  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 69 } }
 647 #define PREGRP70  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 70 } }
 648 #define PREGRP71  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 71 } }
 649 #define PREGRP72  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 72 } }
 650 #define PREGRP73  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 73 } }
 651 #define PREGRP74  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 74 } }
 652 #define PREGRP75  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 75 } }
 653 #define PREGRP76  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 76 } }
 654 #define PREGRP77  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 77 } }
 655 #define PREGRP78  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 78 } }
 656 #define PREGRP79  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 79 } }
 657 #define PREGRP80  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 80 } }
 658 #define PREGRP81  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 81 } }
 659 #define PREGRP82  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 82 } }
 660 #define PREGRP83  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 83 } }
 661 #define PREGRP84  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 84 } }
 662 #define PREGRP85  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 85 } }
 663 #define PREGRP86  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 86 } }
 664 #define PREGRP87  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 87 } }
 665 #define PREGRP88  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 88 } }
 666 #define PREGRP89  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 89 } }
 667 #define PREGRP90  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 90 } }
 668 #define PREGRP91  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 91 } }
 669 #define PREGRP92  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 92 } }
 670 #define PREGRP93  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 93 } }
 671 #define PREGRP94  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 94 } }
 672 #define PREGRP95  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 95 } }
 673 #define PREGRP96  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 96 } }
 674 #define PREGRP97  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 97 } }
 675 #define PREGRP98  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 98 } }
 676 #define PREGRP99  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 99 } }
 677 #define PREGRP100 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 100 } }
 678 #define PREGRP101 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 101 } }
 679 #define PREGRP102 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 102 } }
 680 #define PREGRP103 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 103 } }
 681 #define PREGRP104 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 104 } }
 682 #define PREGRP105 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 105 } }
 683 #define PREGRP106 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 106 } }
 684 #define PREGRP107 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 107 } }
 685 #define PREGRP108 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 108 } }
 686 #define PREGRP109 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 109 } }
 687
 688 #define X86_64_0  NULL, { { NULL, X86_64_SPECIAL }, { NULL, 0 } }
 689 #define X86_64_1  NULL, { { NULL, X86_64_SPECIAL }, { NULL, 1 } }
 690 #define X86_64_2  NULL, { { NULL, X86_64_SPECIAL }, { NULL, 2 } }
 691 #define X86_64_3  NULL, { { NULL, X86_64_SPECIAL }, { NULL, 3 } }
 692
 693 #define THREE_BYTE_0 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 0 } }
 694 #define THREE_BYTE_1 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 1 } }
 695
 696 typedef void (*op_rtn) (int bytemode, int sizeflag);
 697
 698 struct dis386 {
 699   const char *name;
 700   struct
 701     {
 702       op_rtn rtn;
 703       int bytemode;
 704     } op[MAX_OPERANDS];
 705 };
 706
 707 /* Upper case letters in the instruction names here are macros.
 708    'A' => print 'b' if no register operands or suffix_always is true
 709    'B' => print 'b' if suffix_always is true
 710    'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
 711    .      size prefix
 712    'D' => print 'w' if no register operands or 'w', 'l' or 'q', if
 713    .      suffix_always is true
 714    'E' => print 'e' if 32-bit form of jcxz
 715    'F' => print 'w' or 'l' depending on address size prefix (loop insns)
 716    'G' => print 'w' or 'l' depending on operand size prefix (i/o insns)
 717    'H' => print ",pt" or ",pn" branch hint
 718    'I' => honor following macro letter even in Intel mode (implemented only
 719    .      for some of the macro letters)
 720    'J' => print 'l'
 721    'K' => print 'd' or 'q' if rex prefix is present.
 722    'L' => print 'l' if suffix_always is true
 723    'N' => print 'n' if instruction has no wait "prefix"
 724    'O' => print 'd' or 'o' (or 'q' in Intel mode)
 725    'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
 726    .      or suffix_always is true.  print 'q' if rex prefix is present.
 727    'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
 728    .      is true
 729    'R' => print 'w', 'l' or 'q' ('d' for 'l' and 'e' in Intel mode)
 730    'S' => print 'w', 'l' or 'q' if suffix_always is true
 731    'T' => print 'q' in 64bit mode and behave as 'P' otherwise
 732    'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
 733    'V' => print 'q' in 64bit mode and behave as 'S' otherwise
 734    'W' => print 'b', 'w' or 'l' ('d' in Intel mode)
 735    'X' => print 's', 'd' depending on data16 prefix (for XMM)
 736    'Y' => 'q' if instruction has an REX 64bit overwrite prefix
 737    'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
 738
 739    Many of the above letters print nothing in Intel mode.  See "putop"
 740    for the details.
 741
 742    Braces '{' and '}', and vertical bars '|', indicate alternative
 743    mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
 744    modes.  In cases where there are only two alternatives, the X86_64
 745    instruction is reserved, and "(bad)" is printed.
 746 */
 747
 748 static const struct dis386 dis386[] = {
 749   /* 00 */
 750   { "addB",             { Eb, Gb } },
 751   { "addS",             { Ev, Gv } },
 752   { "addB",             { Gb, Eb } },
 753   { "addS",             { Gv, Ev } },
 754   { "addB",             { AL, Ib } },
 755   { "addS",             { eAX, Iv } },
 756   { "push{T|}",         { es } },
 757   { "pop{T|}",          { es } },
 758   /* 08 */
 759   { "orB",              { Eb, Gb } },
 760   { "orS",              { Ev, Gv } },
 761   { "orB",              { Gb, Eb } },
 762   { "orS",              { Gv, Ev } },
 763   { "orB",              { AL, Ib } },
 764   { "orS",              { eAX, Iv } },
 765   { "push{T|}",         { cs } },
 766   { "(bad)",            { XX } },       /* 0x0f extended opcode escape */
 767   /* 10 */
 768   { "adcB",             { Eb, Gb } },
 769   { "adcS",             { Ev, Gv } },
 770   { "adcB",             { Gb, Eb } },
 771   { "adcS",             { Gv, Ev } },
 772   { "adcB",             { AL, Ib } },
 773   { "adcS",             { eAX, Iv } },
 774   { "push{T|}",         { ss } },
 775   { "pop{T|}",          { ss } },
 776   /* 18 */
 777   { "sbbB",             { Eb, Gb } },
 778   { "sbbS",             { Ev, Gv } },
 779   { "sbbB",             { Gb, Eb } },
 780   { "sbbS",             { Gv, Ev } },
 781   { "sbbB",             { AL, Ib } },
 782   { "sbbS",             { eAX, Iv } },
 783   { "push{T|}",         { ds } },
 784   { "pop{T|}",          { ds } },
 785   /* 20 */
 786   { "andB",             { Eb, Gb } },
 787   { "andS",             { Ev, Gv } },
 788   { "andB",             { Gb, Eb } },
 789   { "andS",             { Gv, Ev } },
 790   { "andB",             { AL, Ib } },
 791   { "andS",             { eAX, Iv } },
 792   { "(bad)",            { XX } },       /* SEG ES prefix */
 793   { "daa{|}",           { XX } },
 794   /* 28 */
 795   { "subB",             { Eb, Gb } },
 796   { "subS",             { Ev, Gv } },
 797   { "subB",             { Gb, Eb } },
 798   { "subS",             { Gv, Ev } },
 799   { "subB",             { AL, Ib } },
 800   { "subS",             { eAX, Iv } },
 801   { "(bad)",            { XX } },       /* SEG CS prefix */
 802   { "das{|}",           { XX } },
 803   /* 30 */
 804   { "xorB",             { Eb, Gb } },
 805   { "xorS",             { Ev, Gv } },
 806   { "xorB",             { Gb, Eb } },
 807   { "xorS",             { Gv, Ev } },
 808   { "xorB",             { AL, Ib } },
 809   { "xorS",             { eAX, Iv } },
 810   { "(bad)",            { XX } },       /* SEG SS prefix */
 811   { "aaa{|}",           { XX } },
 812   /* 38 */
 813   { "cmpB",             { Eb, Gb } },
 814   { "cmpS",             { Ev, Gv } },
 815   { "cmpB",             { Gb, Eb } },
 816   { "cmpS",             { Gv, Ev } },
 817   { "cmpB",             { AL, Ib } },
 818   { "cmpS",             { eAX, Iv } },
 819   { "(bad)",            { XX } },       /* SEG DS prefix */
 820   { "aas{|}",           { XX } },
 821   /* 40 */
 822   { "inc{S|}",          { RMeAX } },
 823   { "inc{S|}",          { RMeCX } },
 824   { "inc{S|}",          { RMeDX } },
 825   { "inc{S|}",          { RMeBX } },
 826   { "inc{S|}",          { RMeSP } },
 827   { "inc{S|}",          { RMeBP } },
 828   { "inc{S|}",          { RMeSI } },
 829   { "inc{S|}",          { RMeDI } },
 830   /* 48 */
 831   { "dec{S|}",          { RMeAX } },
 832   { "dec{S|}",          { RMeCX } },
 833   { "dec{S|}",          { RMeDX } },
 834   { "dec{S|}",          { RMeBX } },
 835   { "dec{S|}",          { RMeSP } },
 836   { "dec{S|}",          { RMeBP } },
 837   { "dec{S|}",          { RMeSI } },
 838   { "dec{S|}",          { RMeDI } },
 839   /* 50 */
 840   { "pushV",            { RMrAX } },
 841   { "pushV",            { RMrCX } },
 842   { "pushV",            { RMrDX } },
 843   { "pushV",            { RMrBX } },
 844   { "pushV",            { RMrSP } },
 845   { "pushV",            { RMrBP } },
 846   { "pushV",            { RMrSI } },
 847   { "pushV",            { RMrDI } },
 848   /* 58 */
 849   { "popV",             { RMrAX } },
 850   { "popV",             { RMrCX } },
 851   { "popV",             { RMrDX } },
 852   { "popV",             { RMrBX } },
 853   { "popV",             { RMrSP } },
 854   { "popV",             { RMrBP } },
 855   { "popV",             { RMrSI } },
 856   { "popV",             { RMrDI } },
 857   /* 60 */
 858   { X86_64_0 },
 859   { X86_64_1 },
 860   { X86_64_2 },
 861   { X86_64_3 },
 862   { "(bad)",            { XX } },       /* seg fs */
 863   { "(bad)",            { XX } },       /* seg gs */
 864   { "(bad)",            { XX } },       /* op size prefix */
 865   { "(bad)",            { XX } },       /* adr size prefix */
 866   /* 68 */
 867   { "pushT",            { Iq } },
 868   { "imulS",            { Gv, Ev, Iv } },
 869   { "pushT",            { sIb } },
 870   { "imulS",            { Gv, Ev, sIb } },
 871   { "ins{b||b|}",       { Ybr, indirDX } },
 872   { "ins{R||G|}",       { Yzr, indirDX } },
 873   { "outs{b||b|}",      { indirDXr, Xb } },
 874   { "outs{R||G|}",      { indirDXr, Xz } },
 875   /* 70 */
 876   { "joH",              { Jb, XX, cond_jump_flag } },
 877   { "jnoH",             { Jb, XX, cond_jump_flag } },
 878   { "jbH",              { Jb, XX, cond_jump_flag } },
 879   { "jaeH",             { Jb, XX, cond_jump_flag } },
 880   { "jeH",              { Jb, XX, cond_jump_flag } },
 881   { "jneH",             { Jb, XX, cond_jump_flag } },
 882   { "jbeH",             { Jb, XX, cond_jump_flag } },
 883   { "jaH",              { Jb, XX, cond_jump_flag } },
 884   /* 78 */
 885   { "jsH",              { Jb, XX, cond_jump_flag } },
 886   { "jnsH",             { Jb, XX, cond_jump_flag } },
 887   { "jpH",              { Jb, XX, cond_jump_flag } },
 888   { "jnpH",             { Jb, XX, cond_jump_flag } },
 889   { "jlH",              { Jb, XX, cond_jump_flag } },
 890   { "jgeH",             { Jb, XX, cond_jump_flag } },
 891   { "jleH",             { Jb, XX, cond_jump_flag } },
 892   { "jgH",              { Jb, XX, cond_jump_flag } },
 893   /* 80 */
 894   { GRP1b },
 895   { GRP1S },
 896   { "(bad)",            { XX } },
 897   { GRP1Ss },
 898   { "testB",            { Eb, Gb } },
 899   { "testS",            { Ev, Gv } },
 900   { "xchgB",            { Eb, Gb } },
 901   { "xchgS",            { Ev, Gv } },
 902   /* 88 */
 903   { "movB",             { Eb, Gb } },
 904   { "movS",             { Ev, Gv } },
 905   { "movB",             { Gb, Eb } },
 906   { "movS",             { Gv, Ev } },
 907   { "movD",             { Sv, Sw } },
 908   { "leaS",             { Gv, M } },
 909   { "movD",             { Sw, Sv } },
 910   { GRP1a },
 911   /* 90 */
 912   { PREGRP38 },
 913   { "xchgS",            { RMeCX, eAX } },
 914   { "xchgS",            { RMeDX, eAX } },
 915   { "xchgS",            { RMeBX, eAX } },
 916   { "xchgS",            { RMeSP, eAX } },
 917   { "xchgS",            { RMeBP, eAX } },
 918   { "xchgS",            { RMeSI, eAX } },
 919   { "xchgS",            { RMeDI, eAX } },
 920   /* 98 */
 921   { "cW{t||t|}R",       { XX } },
 922   { "cR{t||t|}O",       { XX } },
 923   { "Jcall{T|}",        { Ap } },
 924   { "(bad)",            { XX } },       /* fwait */
 925   { "pushfT",           { XX } },
 926   { "popfT",            { XX } },
 927   { "sahf{|}",          { XX } },
 928   { "lahf{|}",          { XX } },
 929   /* a0 */
 930   { "movB",             { AL, Ob } },
 931   { "movS",             { eAX, Ov } },
 932   { "movB",             { Ob, AL } },
 933   { "movS",             { Ov, eAX } },
 934   { "movs{b||b|}",      { Ybr, Xb } },
 935   { "movs{R||R|}",      { Yvr, Xv } },
 936   { "cmps{b||b|}",      { Xb, Yb } },
 937   { "cmps{R||R|}",      { Xv, Yv } },
 938   /* a8 */
 939   { "testB",            { AL, Ib } },
 940   { "testS",            { eAX, Iv } },
 941   { "stosB",            { Ybr, AL } },
 942   { "stosS",            { Yvr, eAX } },
 943   { "lodsB",            { ALr, Xb } },
 944   { "lodsS",            { eAXr, Xv } },
 945   { "scasB",            { AL, Yb } },
 946   { "scasS",            { eAX, Yv } },
 947   /* b0 */
 948   { "movB",             { RMAL, Ib } },
 949   { "movB",             { RMCL, Ib } },
 950   { "movB",             { RMDL, Ib } },
 951   { "movB",             { RMBL, Ib } },
 952   { "movB",             { RMAH, Ib } },
 953   { "movB",             { RMCH, Ib } },
 954   { "movB",             { RMDH, Ib } },
 955   { "movB",             { RMBH, Ib } },
 956   /* b8 */
 957   { "movS",             { RMeAX, Iv64 } },
 958   { "movS",             { RMeCX, Iv64 } },
 959   { "movS",             { RMeDX, Iv64 } },
 960   { "movS",             { RMeBX, Iv64 } },
 961   { "movS",             { RMeSP, Iv64 } },
 962   { "movS",             { RMeBP, Iv64 } },
 963   { "movS",             { RMeSI, Iv64 } },
 964   { "movS",             { RMeDI, Iv64 } },
 965   /* c0 */
 966   { GRP2b },
 967   { GRP2S },
 968   { "retT",             { Iw } },
 969   { "retT",             { XX } },
 970   { "les{S|}",          { Gv, Mp } },
 971   { "ldsS",             { Gv, Mp } },
 972   { GRP11_C6 },
 973   { GRP11_C7 },
 974   /* c8 */
 975   { "enterT",           { Iw, Ib } },
 976   { "leaveT",           { XX } },
 977   { "lretP",            { Iw } },
 978   { "lretP",            { XX } },
 979   { "int3",             { XX } },
 980   { "int",              { Ib } },
 981   { "into{|}",          { XX } },
 982   { "iretP",            { XX } },
 983   /* d0 */
 984   { GRP2b_one },
 985   { GRP2S_one },
 986   { GRP2b_cl },
 987   { GRP2S_cl },
 988   { "aam{|}",           { sIb } },
 989   { "aad{|}",           { sIb } },
 990   { "(bad)",            { XX } },
 991   { "xlat",             { DSBX } },
 992   /* d8 */
 993   { FLOAT },
 994   { FLOAT },
 995   { FLOAT },
 996   { FLOAT },
 997   { FLOAT },
 998   { FLOAT },
 999   { FLOAT },
1000   { FLOAT },
1001   /* e0 */
1002   { "loopneFH",         { Jb, XX, loop_jcxz_flag } },
1003   { "loopeFH",          { Jb, XX, loop_jcxz_flag } },
1004   { "loopFH",           { Jb, XX, loop_jcxz_flag } },
1005   { "jEcxzH",           { Jb, XX, loop_jcxz_flag } },
1006   { "inB",              { AL, Ib } },
1007   { "inG",              { zAX, Ib } },
1008   { "outB",             { Ib, AL } },
1009   { "outG",             { Ib, zAX } },
1010   /* e8 */
1011   { "callT",            { Jv } },
1012   { "jmpT",             { Jv } },
1013   { "Jjmp{T|}",         { Ap } },
1014   { "jmp",              { Jb } },
1015   { "inB",              { AL, indirDX } },
1016   { "inG",              { zAX, indirDX } },
1017   { "outB",             { indirDX, AL } },
1018   { "outG",             { indirDX, zAX } },
1019   /* f0 */
1020   { "(bad)",            { XX } },       /* lock prefix */
1021   { "icebp",            { XX } },
1022   { "(bad)",            { XX } },       /* repne */
1023   { "(bad)",            { XX } },       /* repz */
1024   { "hlt",              { XX } },
1025   { "cmc",              { XX } },
1026   { GRP3b },
1027   { GRP3S },
1028   /* f8 */
1029   { "clc",              { XX } },
1030   { "stc",              { XX } },
1031   { "cli",              { XX } },
1032   { "sti",              { XX } },
1033   { "cld",              { XX } },
1034   { "std",              { XX } },
1035   { GRP4 },
1036   { GRP5 },
1037 };
1038
1039 static const struct dis386 dis386_twobyte[] = {
1040   /* 00 */
1041   { GRP6 },
1042   { GRP7 },
1043   { "larS",             { Gv, Ew } },
1044   { "lslS",             { Gv, Ew } },
1045   { "(bad)",            { XX } },
1046   { "syscall",          { XX } },
1047   { "clts",             { XX } },
1048   { "sysretP",          { XX } },
1049   /* 08 */
1050   { "invd",             { XX } },
1051   { "wbinvd",           { XX } },
1052   { "(bad)",            { XX } },
1053   { "ud2a",             { XX } },
1054   { "(bad)",            { XX } },
1055   { GRPAMD },
1056   { "femms",            { XX } },
1057   { "",                 { MX, EM, OPSUF } }, /* See OP_3DNowSuffix.  */
1058   /* 10 */
1059   { PREGRP8 },
1060   { PREGRP9 },
1061   { PREGRP30 },
1062   { "movlpX",           { EXq, XM, { SIMD_Fixup, 'h' } } },
1063   { "unpcklpX",         { XM, EXq } },
1064   { "unpckhpX",         { XM, EXq } },
1065   { PREGRP31 },
1066   { "movhpX",           { EXq, XM, { SIMD_Fixup, 'l' } } },
1067   /* 18 */
1068   { GRP16 },
1069   { "(bad)",            { XX } },
1070   { "(bad)",            { XX } },
1071   { "(bad)",            { XX } },
1072   { "(bad)",            { XX } },
1073   { "(bad)",            { XX } },
1074   { "(bad)",            { XX } },
1075   { "nopQ",             { Ev } },
1076   /* 20 */
1077   { "movZ",             { Rm, Cm } },
1078   { "movZ",             { Rm, Dm } },
1079   { "movZ",             { Cm, Rm } },
1080   { "movZ",             { Dm, Rm } },
1081   { "movL",             { Rd, Td } },
1082   { "(bad)",            { XX } },
1083   { "movL",             { Td, Rd } },
1084   { "(bad)",            { XX } },
1085   /* 28 */
1086   { "movapX",           { XM, EXx } },
1087   { "movapX",           { EXx,  XM } },
1088   { PREGRP2 },
1089   { PREGRP33 },
1090   { PREGRP4 },
1091   { PREGRP3 },
1092   { PREGRP93 },
1093   { PREGRP94 },
1094   /* 30 */
1095   { "wrmsr",            { XX } },
1096   { "rdtsc",            { XX } },
1097   { "rdmsr",            { XX } },
1098   { "rdpmc",            { XX } },
1099   { "sysenter",         { XX } },
1100   { "sysexit",          { XX } },
1101   { "(bad)",            { XX } },
1102   { "(bad)",            { XX } },
1103   /* 38 */
1104   { THREE_BYTE_0 },
1105   { "(bad)",            { XX } },
1106   { THREE_BYTE_1 },
1107   { "(bad)",            { XX } },
1108   { "(bad)",            { XX } },
1109   { "(bad)",            { XX } },
1110   { "(bad)",            { XX } },
1111   { "(bad)",            { XX } },
1112   /* 40 */
1113   { "cmovo",            { Gv, Ev } },
1114   { "cmovno",           { Gv, Ev } },
1115   { "cmovb",            { Gv, Ev } },
1116   { "cmovae",           { Gv, Ev } },
1117   { "cmove",            { Gv, Ev } },
1118   { "cmovne",           { Gv, Ev } },
1119   { "cmovbe",           { Gv, Ev } },
1120   { "cmova",            { Gv, Ev } },
1121   /* 48 */
1122   { "cmovs",            { Gv, Ev } },
1123   { "cmovns",           { Gv, Ev } },
1124   { "cmovp",            { Gv, Ev } },
1125   { "cmovnp",           { Gv, Ev } },
1126   { "cmovl",            { Gv, Ev } },
1127   { "cmovge",           { Gv, Ev } },
1128   { "cmovle",           { Gv, Ev } },
1129   { "cmovg",            { Gv, Ev } },
1130   /* 50 */
1131   { "movmskpX",         { Gdq, XS } },
1132   { PREGRP13 },
1133   { PREGRP12 },
1134   { PREGRP11 },
1135   { "andpX",            { XM, EXx } },
1136   { "andnpX",           { XM, EXx } },
1137   { "orpX",             { XM, EXx } },
1138   { "xorpX",            { XM, EXx } },
1139   /* 58 */
1140   { PREGRP0 },
1141   { PREGRP10 },
1142   { PREGRP17 },
1143   { PREGRP16 },
1144   { PREGRP14 },
1145   { PREGRP7 },
1146   { PREGRP5 },
1147   { PREGRP6 },
1148   /* 60 */
1149   { PREGRP95 },
1150   { PREGRP96 },
1151   { PREGRP97 },
1152   { "packsswb",         { MX, EM } },
1153   { "pcmpgtb",          { MX, EM } },
1154   { "pcmpgtw",          { MX, EM } },
1155   { "pcmpgtd",          { MX, EM } },
1156   { "packuswb",         { MX, EM } },
1157   /* 68 */
1158   { "punpckhbw",        { MX, EM } },
1159   { "punpckhwd",        { MX, EM } },
1160   { "punpckhdq",        { MX, EM } },
1161   { "packssdw",         { MX, EM } },
1162   { PREGRP26 },
1163   { PREGRP24 },
1164   { "movd",             { MX, Edq } },
1165   { PREGRP19 },
1166   /* 70 */
1167   { PREGRP22 },
1168   { GRP12 },
1169   { GRP13 },
1170   { GRP14 },
1171   { "pcmpeqb",          { MX, EM } },
1172   { "pcmpeqw",          { MX, EM } },
1173   { "pcmpeqd",          { MX, EM } },
1174   { "emms",             { XX } },
1175   /* 78 */
1176   { PREGRP34 },
1177   { PREGRP35 },
1178   { "(bad)",            { XX } },
1179   { "(bad)",            { XX } },
1180   { PREGRP28 },
1181   { PREGRP29 },
1182   { PREGRP23 },
1183   { PREGRP20 },
1184   /* 80 */
1185   { "joH",              { Jv, XX, cond_jump_flag } },
1186   { "jnoH",             { Jv, XX, cond_jump_flag } },
1187   { "jbH",              { Jv, XX, cond_jump_flag } },
1188   { "jaeH",             { Jv, XX, cond_jump_flag } },
1189   { "jeH",              { Jv, XX, cond_jump_flag } },
1190   { "jneH",             { Jv, XX, cond_jump_flag } },
1191   { "jbeH",             { Jv, XX, cond_jump_flag } },
1192   { "jaH",              { Jv, XX, cond_jump_flag } },
1193   /* 88 */
1194   { "jsH",              { Jv, XX, cond_jump_flag } },
1195   { "jnsH",             { Jv, XX, cond_jump_flag } },
1196   { "jpH",              { Jv, XX, cond_jump_flag } },
1197   { "jnpH",             { Jv, XX, cond_jump_flag } },
1198   { "jlH",              { Jv, XX, cond_jump_flag } },
1199   { "jgeH",             { Jv, XX, cond_jump_flag } },
1200   { "jleH",             { Jv, XX, cond_jump_flag } },
1201   { "jgH",              { Jv, XX, cond_jump_flag } },
1202   /* 90 */
1203   { "seto",             { Eb } },
1204   { "setno",            { Eb } },
1205   { "setb",             { Eb } },
1206   { "setae",            { Eb } },
1207   { "sete",             { Eb } },
1208   { "setne",            { Eb } },
1209   { "setbe",            { Eb } },
1210   { "seta",             { Eb } },
1211   /* 98 */
1212   { "sets",             { Eb } },
1213   { "setns",            { Eb } },
1214   { "setp",             { Eb } },
1215   { "setnp",            { Eb } },
1216   { "setl",             { Eb } },
1217   { "setge",            { Eb } },
1218   { "setle",            { Eb } },
1219   { "setg",             { Eb } },
1220   /* a0 */
1221   { "pushT",            { fs } },
1222   { "popT",             { fs } },
1223   { "cpuid",            { XX } },
1224   { "btS",              { Ev, Gv } },
1225   { "shldS",            { Ev, Gv, Ib } },
1226   { "shldS",            { Ev, Gv, CL } },
1227   { GRPPADLCK2 },
1228   { GRPPADLCK1 },
1229   /* a8 */
1230   { "pushT",            { gs } },
1231   { "popT",             { gs } },
1232   { "rsm",              { XX } },
1233   { "btsS",             { Ev, Gv } },
1234   { "shrdS",            { Ev, Gv, Ib } },
1235   { "shrdS",            { Ev, Gv, CL } },
1236   { GRP15 },
1237   { "imulS",            { Gv, Ev } },
1238   /* b0 */
1239   { "cmpxchgB",         { Eb, Gb } },
1240   { "cmpxchgS",         { Ev, Gv } },
1241   { "lssS",             { Gv, Mp } },
1242   { "btrS",             { Ev, Gv } },
1243   { "lfsS",             { Gv, Mp } },
1244   { "lgsS",             { Gv, Mp } },
1245   { "movz{bR|x|bR|x}",  { Gv, Eb } },
1246   { "movz{wR|x|wR|x}",  { Gv, Ew } }, /* yes, there really is movzww ! */
1247   /* b8 */
1248   { PREGRP37 },
1249   { "ud2b",             { XX } },
1250   { GRP8 },
1251   { "btcS",             { Ev, Gv } },
1252   { PREGRP107 },
1253   { PREGRP36 },
1254   { "movs{bR|x|bR|x}",  { Gv, Eb } },
1255   { "movs{wR|x|wR|x}",  { Gv, Ew } }, /* yes, there really is movsww ! */
1256   /* c0 */
1257   { "xaddB",            { Eb, Gb } },
1258   { "xaddS",            { Ev, Gv } },
1259   { PREGRP1 },
1260   { "movntiS",          { Ev, Gv } },
1261   { "pinsrw",           { MX, Edqw, Ib } },
1262   { "pextrw",           { Gdq, MS, Ib } },
1263   { "shufpX",           { XM, EXx, Ib } },
1264   { GRP9 },
1265   /* c8 */
1266   { "bswap",            { RMeAX } },
1267   { "bswap",            { RMeCX } },
1268   { "bswap",            { RMeDX } },
1269   { "bswap",            { RMeBX } },
1270   { "bswap",            { RMeSP } },
1271   { "bswap",            { RMeBP } },
1272   { "bswap",            { RMeSI } },
1273   { "bswap",            { RMeDI } },
1274   /* d0 */
1275   { PREGRP27 },
1276   { "psrlw",            { MX, EM } },
1277   { "psrld",            { MX, EM } },
1278   { "psrlq",            { MX, EM } },
1279   { "paddq",            { MX, EM } },
1280   { "pmullw",           { MX, EM } },
1281   { PREGRP21 },
1282   { "pmovmskb",         { Gdq, MS } },
1283   /* d8 */
1284   { "psubusb",          { MX, EM } },
1285   { "psubusw",          { MX, EM } },
1286   { "pminub",           { MX, EM } },
1287   { "pand",             { MX, EM } },
1288   { "paddusb",          { MX, EM } },
1289   { "paddusw",          { MX, EM } },
1290   { "pmaxub",           { MX, EM } },
1291   { "pandn",            { MX, EM } },
1292   /* e0 */
1293   { "pavgb",            { MX, EM } },
1294   { "psraw",            { MX, EM } },
1295   { "psrad",            { MX, EM } },
1296   { "pavgw",            { MX, EM } },
1297   { "pmulhuw",          { MX, EM } },
1298   { "pmulhw",           { MX, EM } },
1299   { PREGRP15 },
1300   { PREGRP25 },
1301   /* e8 */
1302   { "psubsb",           { MX, EM } },
1303   { "psubsw",           { MX, EM } },
1304   { "pminsw",           { MX, EM } },
1305   { "por",              { MX, EM } },
1306   { "paddsb",           { MX, EM } },
1307   { "paddsw",           { MX, EM } },
1308   { "pmaxsw",           { MX, EM } },
1309   { "pxor",             { MX, EM } },
1310   /* f0 */
1311   { PREGRP32 },
1312   { "psllw",            { MX, EM } },
1313   { "pslld",            { MX, EM } },
1314   { "psllq",            { MX, EM } },
1315   { "pmuludq",          { MX, EM } },
1316   { "pmaddwd",          { MX, EM } },
1317   { "psadbw",           { MX, EM } },
1318   { PREGRP18 },
1319   /* f8 */
1320   { "psubb",            { MX, EM } },
1321   { "psubw",            { MX, EM } },
1322   { "psubd",            { MX, EM } },
1323   { "psubq",            { MX, EM } },
1324   { "paddb",            { MX, EM } },
1325   { "paddw",            { MX, EM } },
1326   { "paddd",            { MX, EM } },
1327   { "(bad)",            { XX } },
1328 };
1329
1330 static const unsigned char onebyte_has_modrm[256] = {
1331   /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1332   /*       -------------------------------        */
1333   /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1334   /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1335   /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1336   /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1337   /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1338   /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1339   /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1340   /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1341   /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1342   /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1343   /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1344   /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1345   /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1346   /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1347   /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1348   /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1  /* f0 */
1349   /*       -------------------------------        */
1350   /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1351 };
1352
1353 static const unsigned char twobyte_has_modrm[256] = {
1354   /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1355   /*       -------------------------------        */
1356   /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1357   /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,1, /* 1f */
1358   /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
1359   /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1360   /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1361   /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1362   /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1363   /* 70 */ 1,1,1,1,1,1,1,0,1,1,0,0,1,1,1,1, /* 7f */
1364   /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1365   /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1366   /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
1367   /* b0 */ 1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1, /* bf */
1368   /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1369   /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1370   /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1371   /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0  /* ff */
1372   /*       -------------------------------        */
1373   /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1374 };
1375
1376 static const unsigned char twobyte_uses_DATA_prefix[256] = {
1377   /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1378   /*       -------------------------------        */
1379   /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1380   /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1381   /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1382   /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1383   /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1384   /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1385   /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
1386   /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,1,1, /* 7f */
1387   /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1388   /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1389   /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1390   /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1391   /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1392   /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1393   /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1394   /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0  /* ff */
1395   /*       -------------------------------        */
1396   /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1397 };
1398
1399 static const unsigned char twobyte_uses_REPNZ_prefix[256] = {
1400   /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1401   /*       -------------------------------        */
1402   /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1403   /* 10 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1404   /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1405   /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1406   /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1407   /* 50 */ 0,1,0,0,0,0,0,0,1,1,1,0,1,1,1,1, /* 5f */
1408   /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1409   /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,0,0, /* 7f */
1410   /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1411   /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1412   /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1413   /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1414   /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1415   /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1416   /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1417   /* f0 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1418   /*       -------------------------------        */
1419   /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1420 };
1421
1422 static const unsigned char twobyte_uses_REPZ_prefix[256] = {
1423   /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1424   /*       -------------------------------        */
1425   /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1426   /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1427   /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1428   /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1429   /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1430   /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1431   /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1, /* 6f */
1432   /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1, /* 7f */
1433   /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1434   /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1435   /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1436   /* b0 */ 0,0,0,0,0,0,0,0,1,0,0,0,1,1,0,0, /* bf */
1437   /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1438   /* d0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1439   /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1440   /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1441   /*       -------------------------------        */
1442   /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1443 };
1444
1445 /* This is used to determine if opcode 0f 38 XX uses DATA prefix.  */
1446 static const unsigned char threebyte_0x38_uses_DATA_prefix[256] = {
1447   /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1448   /*       -------------------------------        */
1449   /* 00 */ 1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0, /* 0f */
1450   /* 10 */ 1,0,0,0,1,1,0,1,0,0,0,0,1,1,1,0, /* 1f */
1451   /* 20 */ 1,1,1,1,1,1,0,0,1,1,1,1,0,0,0,0, /* 2f */
1452   /* 30 */ 1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1, /* 3f */
1453   /* 40 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1454   /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1455   /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1456   /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1457   /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1458   /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1459   /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1460   /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1461   /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1462   /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1, /* df */
1463   /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1464   /* f0 */ 0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0, /* ff */
1465   /*       -------------------------------        */
1466   /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1467 };
1468
1469 /* This is used to determine if opcode 0f 38 XX uses REPNZ prefix.  */
1470 static const unsigned char threebyte_0x38_uses_REPNZ_prefix[256] = {
1471   /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1472   /*       -------------------------------        */
1473   /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1474   /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1475   /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1476   /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1477   /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1478   /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1479   /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1480   /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1481   /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1482   /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1483   /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1484   /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1485   /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1486   /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1487   /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1488   /* f0 */ 1,1,0,0,0,1,0,1,0,0,0,0,0,0,0,0, /* ff */
1489   /*       -------------------------------        */
1490   /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1491 };
1492
1493 /* This is used to determine if opcode 0f 38 XX uses REPZ prefix.  */
1494 static const unsigned char threebyte_0x38_uses_REPZ_prefix[256] = {
1495   /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1496   /*       -------------------------------        */
1497   /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1498   /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1499   /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1500   /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1501   /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1502   /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1503   /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1504   /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1505   /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1506   /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1507   /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1508   /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1509   /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1510   /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1511   /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1512   /* f0 */ 0,0,0,0,0,1,0,1,0,0,0,0,0,0,0,0, /* ff */
1513   /*       -------------------------------        */
1514   /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1515 };
1516
1517 /* This is used to determine if opcode 0f 3a XX uses DATA prefix.  */
1518 static const unsigned char threebyte_0x3a_uses_DATA_prefix[256] = {
1519   /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1520   /*       -------------------------------        */
1521   /* 00 */ 0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1, /* 0f */
1522   /* 10 */ 0,0,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* 1f */
1523   /* 20 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1524   /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1525   /* 40 */ 1,1,1,0,1,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1526   /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1527   /* 60 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1528   /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1529   /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1530   /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1531   /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1532   /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1533   /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1534   /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1, /* df */
1535   /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1536   /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1537   /*       -------------------------------        */
1538   /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1539 };
1540
1541 /* This is used to determine if opcode 0f 3a XX uses REPNZ prefix.  */
1542 static const unsigned char threebyte_0x3a_uses_REPNZ_prefix[256] = {
1543   /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1544   /*       -------------------------------        */
1545   /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1546   /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1547   /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1548   /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1549   /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1550   /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1551   /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1552   /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1553   /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1554   /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1555   /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1556   /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1557   /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1558   /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1559   /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1560   /* f0 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1561   /*       -------------------------------        */
1562   /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1563 };
1564
1565 /* This is used to determine if opcode 0f 3a XX uses REPZ prefix.  */
1566 static const unsigned char threebyte_0x3a_uses_REPZ_prefix[256] = {
1567   /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1568   /*       -------------------------------        */
1569   /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1570   /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1571   /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1572   /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1573   /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1574   /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1575   /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1576   /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1577   /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1578   /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1579   /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1580   /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1581   /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1582   /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1583   /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1584   /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1585   /*       -------------------------------        */
1586   /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1587 };
1588
1589 static char obuf[100];
1590 static char *obufp;
1591 static char scratchbuf[100];
1592 static unsigned char *start_codep;
1593 static unsigned char *insn_codep;
1594 static unsigned char *codep;
1595 static disassemble_info *the_info;
1596 static struct
1597   {
1598     int mod;
1599     int reg;
1600     int rm;
1601   }
1602 modrm;
1603 static unsigned char need_modrm;
1604
1605 /* If we are accessing mod/rm/reg without need_modrm set, then the
1606    values are stale.  Hitting this abort likely indicates that you
1607    need to update onebyte_has_modrm or twobyte_has_modrm.  */
1608 #define MODRM_CHECK  if (!need_modrm) abort ()
1609
1610 static const char * const *names64;
1611 static const char * const *names32;
1612 static const char * const *names16;
1613 static const char * const *names8;
1614 static const char * const *names8rex;
1615 static const char * const *names_seg;
1616 static const char * const *index16;
1617
1618 static const char * const intel_names64[] = {
1619   "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1620   "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1621 };
1622 static const char * const intel_names32[] = {
1623   "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1624   "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1625 };
1626 static const char * const intel_names16[] = {
1627   "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1628   "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1629 };
1630 static const char * const intel_names8[] = {
1631   "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1632 };
1633 static const char * const intel_names8rex[] = {
1634   "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1635   "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1636 };
1637 static const char * const intel_names_seg[] = {
1638   "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1639 };
1640 static const char * const intel_index16[] = {
1641   "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1642 };
1643
1644 static const char * const att_names64[] = {
1645   "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1646   "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1647 };
1648 static const char * const att_names32[] = {
1649   "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1650   "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1651 };
1652 static const char * const att_names16[] = {
1653   "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1654   "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1655 };
1656 static const char * const att_names8[] = {
1657   "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1658 };
1659 static const char * const att_names8rex[] = {
1660   "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1661   "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1662 };
1663 static const char * const att_names_seg[] = {
1664   "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1665 };
1666 static const char * const att_index16[] = {
1667   "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1668 };
1669
1670 static const struct dis386 grps[][8] = {
1671   /* GRP1a */
1672   {
1673     { "popU",   { stackEv } },
1674     { "(bad)",  { XX } },
1675     { "(bad)",  { XX } },
1676     { "(bad)",  { XX } },
1677     { "(bad)",  { XX } },
1678     { "(bad)",  { XX } },
1679     { "(bad)",  { XX } },
1680     { "(bad)",  { XX } },
1681   },
1682   /* GRP1b */
1683   {
1684     { "addA",   { Eb, Ib } },
1685     { "orA",    { Eb, Ib } },
1686     { "adcA",   { Eb, Ib } },
1687     { "sbbA",   { Eb, Ib } },
1688     { "andA",   { Eb, Ib } },
1689     { "subA",   { Eb, Ib } },
1690     { "xorA",   { Eb, Ib } },
1691     { "cmpA",   { Eb, Ib } },
1692   },
1693   /* GRP1S */
1694   {
1695     { "addQ",   { Ev, Iv } },
1696     { "orQ",    { Ev, Iv } },
1697     { "adcQ",   { Ev, Iv } },
1698     { "sbbQ",   { Ev, Iv } },
1699     { "andQ",   { Ev, Iv } },
1700     { "subQ",   { Ev, Iv } },
1701     { "xorQ",   { Ev, Iv } },
1702     { "cmpQ",   { Ev, Iv } },
1703   },
1704   /* GRP1Ss */
1705   {
1706     { "addQ",   { Ev, sIb } },
1707     { "orQ",    { Ev, sIb } },
1708     { "adcQ",   { Ev, sIb } },
1709     { "sbbQ",   { Ev, sIb } },
1710     { "andQ",   { Ev, sIb } },
1711     { "subQ",   { Ev, sIb } },
1712     { "xorQ",   { Ev, sIb } },
1713     { "cmpQ",   { Ev, sIb } },
1714   },
1715   /* GRP2b */
1716   {
1717     { "rolA",   { Eb, Ib } },
1718     { "rorA",   { Eb, Ib } },
1719     { "rclA",   { Eb, Ib } },
1720     { "rcrA",   { Eb, Ib } },
1721     { "shlA",   { Eb, Ib } },
1722     { "shrA",   { Eb, Ib } },
1723     { "(bad)",  { XX } },
1724     { "sarA",   { Eb, Ib } },
1725   },
1726   /* GRP2S */
1727   {
1728     { "rolQ",   { Ev, Ib } },
1729     { "rorQ",   { Ev, Ib } },
1730     { "rclQ",   { Ev, Ib } },
1731     { "rcrQ",   { Ev, Ib } },
1732     { "shlQ",   { Ev, Ib } },
1733     { "shrQ",   { Ev, Ib } },
1734     { "(bad)",  { XX } },
1735     { "sarQ",   { Ev, Ib } },
1736   },
1737   /* GRP2b_one */
1738   {
1739     { "rolA",   { Eb, I1 } },
1740     { "rorA",   { Eb, I1 } },
1741     { "rclA",   { Eb, I1 } },
1742     { "rcrA",   { Eb, I1 } },
1743     { "shlA",   { Eb, I1 } },
1744     { "shrA",   { Eb, I1 } },
1745     { "(bad)",  { XX } },
1746     { "sarA",   { Eb, I1 } },
1747   },
1748   /* GRP2S_one */
1749   {
1750     { "rolQ",   { Ev, I1 } },
1751     { "rorQ",   { Ev, I1 } },
1752     { "rclQ",   { Ev, I1 } },
1753     { "rcrQ",   { Ev, I1 } },
1754     { "shlQ",   { Ev, I1 } },
1755     { "shrQ",   { Ev, I1 } },
1756     { "(bad)",  { XX } },
1757     { "sarQ",   { Ev, I1 } },
1758   },
1759   /* GRP2b_cl */
1760   {
1761     { "rolA",   { Eb, CL } },
1762     { "rorA",   { Eb, CL } },
1763     { "rclA",   { Eb, CL } },
1764     { "rcrA",   { Eb, CL } },
1765     { "shlA",   { Eb, CL } },
1766     { "shrA",   { Eb, CL } },
1767     { "(bad)",  { XX } },
1768     { "sarA",   { Eb, CL } },
1769   },
1770   /* GRP2S_cl */
1771   {
1772     { "rolQ",   { Ev, CL } },
1773     { "rorQ",   { Ev, CL } },
1774     { "rclQ",   { Ev, CL } },
1775     { "rcrQ",   { Ev, CL } },
1776     { "shlQ",   { Ev, CL } },
1777     { "shrQ",   { Ev, CL } },
1778     { "(bad)",  { XX } },
1779     { "sarQ",   { Ev, CL } },
1780   },
1781   /* GRP3b */
1782   {
1783     { "testA",  { Eb, Ib } },
1784     { "(bad)",  { Eb } },
1785     { "notA",   { Eb } },
1786     { "negA",   { Eb } },
1787     { "mulA",   { Eb } },       /* Don't print the implicit %al register,  */
1788     { "imulA",  { Eb } },       /* to distinguish these opcodes from other */
1789     { "divA",   { Eb } },       /* mul/imul opcodes.  Do the same for div  */
1790     { "idivA",  { Eb } },       /* and idiv for consistency.               */
1791   },
1792   /* GRP3S */
1793   {
1794     { "testQ",  { Ev, Iv } },
1795     { "(bad)",  { XX } },
1796     { "notQ",   { Ev } },
1797     { "negQ",   { Ev } },
1798     { "mulQ",   { Ev } },       /* Don't print the implicit register.  */
1799     { "imulQ",  { Ev } },
1800     { "divQ",   { Ev } },
1801     { "idivQ",  { Ev } },
1802   },
1803   /* GRP4 */
1804   {
1805     { "incA",   { Eb } },
1806     { "decA",   { Eb } },
1807     { "(bad)",  { XX } },
1808     { "(bad)",  { XX } },
1809     { "(bad)",  { XX } },
1810     { "(bad)",  { XX } },
1811     { "(bad)",  { XX } },
1812     { "(bad)",  { XX } },
1813   },
1814   /* GRP5 */
1815   {
1816     { "incQ",   { Ev } },
1817     { "decQ",   { Ev } },
1818     { "callT",  { indirEv } },
1819     { "JcallT", { indirEp } },
1820     { "jmpT",   { indirEv } },
1821     { "JjmpT",  { indirEp } },
1822     { "pushU",  { stackEv } },
1823     { "(bad)",  { XX } },
1824   },
1825   /* GRP6 */
1826   {
1827     { "sldtD",  { Sv } },
1828     { "strD",   { Sv } },
1829     { "lldt",   { Ew } },
1830     { "ltr",    { Ew } },
1831     { "verr",   { Ew } },
1832     { "verw",   { Ew } },
1833     { "(bad)",  { XX } },
1834     { "(bad)",  { XX } },
1835   },
1836   /* GRP7 */
1837   {
1838     { "sgdt{Q|IQ||}", { { VMX_Fixup, 0 } } },
1839     { "sidt{Q|IQ||}", { { PNI_Fixup, 0 } } },
1840     { "lgdt{Q|Q||}",     { M } },
1841     { "lidt{Q|Q||}",     { { SVME_Fixup, 0 } } },
1842     { "smswD",  { Sv } },
1843     { "(bad)",  { XX } },
1844     { "lmsw",   { Ew } },
1845     { "invlpg", { { INVLPG_Fixup, w_mode } } },
1846   },
1847   /* GRP8 */
1848   {
1849     { "(bad)",  { XX } },
1850     { "(bad)",  { XX } },
1851     { "(bad)",  { XX } },
1852     { "(bad)",  { XX } },
1853     { "btQ",    { Ev, Ib } },
1854     { "btsQ",   { Ev, Ib } },
1855     { "btrQ",   { Ev, Ib } },
1856     { "btcQ",   { Ev, Ib } },
1857   },
1858   /* GRP9 */
1859   {
1860     { "(bad)",  { XX } },
1861     { "cmpxchg8b", { { CMPXCHG8B_Fixup, q_mode } } },
1862     { "(bad)",  { XX } },
1863     { "(bad)",  { XX } },
1864     { "(bad)",  { XX } },
1865     { "(bad)",  { XX } },
1866     { "",       { VM } },               /* See OP_VMX.  */
1867     { "vmptrst", { Mq } },
1868   },
1869   /* GRP11_C6 */
1870   {
1871     { "movA",   { Eb, Ib } },
1872     { "(bad)",  { XX } },
1873     { "(bad)",  { XX } },
1874     { "(bad)",  { XX } },
1875     { "(bad)",  { XX } },
1876     { "(bad)",  { XX } },
1877     { "(bad)",  { XX } },
1878     { "(bad)",  { XX } },
1879   },
1880   /* GRP11_C7 */
1881   {
1882     { "movQ",   { Ev, Iv } },
1883     { "(bad)",  { XX } },
1884     { "(bad)",  { XX } },
1885     { "(bad)",  { XX } },
1886     { "(bad)",  { XX } },
1887     { "(bad)",  { XX } },
1888     { "(bad)",  { XX } },
1889     { "(bad)",  { XX } },
1890   },
1891   /* GRP12 */
1892   {
1893     { "(bad)",  { XX } },
1894     { "(bad)",  { XX } },
1895     { "psrlw",  { MS, Ib } },
1896     { "(bad)",  { XX } },
1897     { "psraw",  { MS, Ib } },
1898     { "(bad)",  { XX } },
1899     { "psllw",  { MS, Ib } },
1900     { "(bad)",  { XX } },
1901   },
1902   /* GRP13 */
1903   {
1904     { "(bad)",  { XX } },
1905     { "(bad)",  { XX } },
1906     { "psrld",  { MS, Ib } },
1907     { "(bad)",  { XX } },
1908     { "psrad",  { MS, Ib } },
1909     { "(bad)",  { XX } },
1910     { "pslld",  { MS, Ib } },
1911     { "(bad)",  { XX } },
1912   },
1913   /* GRP14 */
1914   {
1915     { "(bad)",  { XX } },
1916     { "(bad)",  { XX } },
1917     { "psrlq",  { MS, Ib } },
1918     { "psrldq", { MS, Ib } },
1919     { "(bad)",  { XX } },
1920     { "(bad)",  { XX } },
1921     { "psllq",  { MS, Ib } },
1922     { "pslldq", { MS, Ib } },
1923   },
1924   /* GRP15 */
1925   {
1926     { "fxsave",         { Ev } },
1927     { "fxrstor",        { Ev } },
1928     { "ldmxcsr",        { Ev } },
1929     { "stmxcsr",        { Ev } },
1930     { "(bad)",          { XX } },
1931     { "lfence",         { { OP_0fae, 0 } } },
1932     { "mfence",         { { OP_0fae, 0 } } },
1933     { "clflush",        { { OP_0fae, 0 } } },
1934   },
1935   /* GRP16 */
1936   {
1937     { "prefetchnta",    { Ev } },
1938     { "prefetcht0",     { Ev } },
1939     { "prefetcht1",     { Ev } },
1940     { "prefetcht2",     { Ev } },
1941     { "(bad)",          { XX } },
1942     { "(bad)",          { XX } },
1943     { "(bad)",          { XX } },
1944     { "(bad)",          { XX } },
1945   },
1946   /* GRPAMD */
1947   {
1948     { "prefetch",       { Eb } },
1949     { "prefetchw",      { Eb } },
1950     { "(bad)",          { XX } },
1951     { "(bad)",          { XX } },
1952     { "(bad)",          { XX } },
1953     { "(bad)",          { XX } },
1954     { "(bad)",          { XX } },
1955     { "(bad)",          { XX } },
1956   },
1957   /* GRPPADLCK1 */
1958   {
1959     { "xstore-rng",     { { OP_0f07, 0 } } },
1960     { "xcrypt-ecb",     { { OP_0f07, 0 } } },
1961     { "xcrypt-cbc",     { { OP_0f07, 0 } } },
1962     { "xcrypt-ctr",     { { OP_0f07, 0 } } },
1963     { "xcrypt-cfb",     { { OP_0f07, 0 } } },
1964     { "xcrypt-ofb",     { { OP_0f07, 0 } } },
1965     { "(bad)",          { { OP_0f07, 0 } } },
1966     { "(bad)",          { { OP_0f07, 0 } } },
1967   },
1968   /* GRPPADLCK2 */
1969   {
1970     { "montmul",        { { OP_0f07, 0 } } },
1971     { "xsha1",          { { OP_0f07, 0 } } },
1972     { "xsha256",        { { OP_0f07, 0 } } },
1973     { "(bad)",          { { OP_0f07, 0 } } },
1974     { "(bad)",          { { OP_0f07, 0 } } },
1975     { "(bad)",          { { OP_0f07, 0 } } },
1976     { "(bad)",          { { OP_0f07, 0 } } },
1977     { "(bad)",          { { OP_0f07, 0 } } },
1978   }
1979 };
1980
1981 static const struct dis386 prefix_user_table[][4] = {
1982   /* PREGRP0 */
1983   {
1984     { "addps", { XM, EXx } },
1985     { "addss", { XM, EXd } },
1986     { "addpd", { XM, EXx } },
1987     { "addsd", { XM, EXq } },
1988   },
1989   /* PREGRP1 */
1990   {
1991     { "", { XM, EXx, OPSIMD } },        /* See OP_SIMD_SUFFIX.  */
1992     { "", { XM, EXx, OPSIMD } },
1993     { "", { XM, EXx, OPSIMD } },
1994     { "", { XM, EXx, OPSIMD } },
1995   },
1996   /* PREGRP2 */
1997   {
1998     { "cvtpi2ps", { XM, EMC } },
1999     { "cvtsi2ssY", { XM, Ev } },
2000     { "cvtpi2pd", { XM, EMC } },
2001     { "cvtsi2sdY", { XM, Ev } },
2002   },
2003   /* PREGRP3 */
2004   {
2005     { "cvtps2pi", { MXC, EXx } },
2006     { "cvtss2siY", { Gv, EXx } },
2007     { "cvtpd2pi", { MXC, EXx } },
2008     { "cvtsd2siY", { Gv, EXx } },
2009   },
2010   /* PREGRP4 */
2011   {
2012     { "cvttps2pi", { MXC, EXx } },
2013     { "cvttss2siY", { Gv, EXx } },
2014     { "cvttpd2pi", { MXC, EXx } },
2015     { "cvttsd2siY", { Gv, EXx } },
2016   },
2017   /* PREGRP5 */
2018   {
2019     { "divps",  { XM, EXx } },
2020     { "divss",  { XM, EXx } },
2021     { "divpd",  { XM, EXx } },
2022     { "divsd",  { XM, EXx } },
2023   },
2024   /* PREGRP6 */
2025   {
2026     { "maxps",  { XM, EXx } },
2027     { "maxss",  { XM, EXx } },
2028     { "maxpd",  { XM, EXx } },
2029     { "maxsd",  { XM, EXx } },
2030   },
2031   /* PREGRP7 */
2032   {
2033     { "minps",  { XM, EXx } },
2034     { "minss",  { XM, EXx } },
2035     { "minpd",  { XM, EXx } },
2036     { "minsd",  { XM, EXx } },
2037   },
2038   /* PREGRP8 */
2039   {
2040     { "movups", { XM, EXx } },
2041     { "movss",  { XM, EXx } },
2042     { "movupd", { XM, EXx } },
2043     { "movsd",  { XM, EXx } },
2044   },
2045   /* PREGRP9 */
2046   {
2047     { "movups", { EXx,  XM } },
2048     { "movss",  { EXx,  XM } },
2049     { "movupd", { EXx,  XM } },
2050     { "movsd",  { EXx,  XM } },
2051   },
2052   /* PREGRP10 */
2053   {
2054     { "mulps",  { XM, EXx } },
2055     { "mulss",  { XM, EXx } },
2056     { "mulpd",  { XM, EXx } },
2057     { "mulsd",  { XM, EXx } },
2058   },
2059   /* PREGRP11 */
2060   {
2061     { "rcpps",  { XM, EXx } },
2062     { "rcpss",  { XM, EXx } },
2063     { "(bad)",  { XM, EXx } },
2064     { "(bad)",  { XM, EXx } },
2065   },
2066   /* PREGRP12 */
2067   {
2068     { "rsqrtps",{ XM, EXx } },
2069     { "rsqrtss",{ XM, EXx } },
2070     { "(bad)",  { XM, EXx } },
2071     { "(bad)",  { XM, EXx } },
2072   },
2073   /* PREGRP13 */
2074   {
2075     { "sqrtps", { XM, EXx } },
2076     { "sqrtss", { XM, EXx } },
2077     { "sqrtpd", { XM, EXx } },
2078     { "sqrtsd", { XM, EXx } },
2079   },
2080   /* PREGRP14 */
2081   {
2082     { "subps",  { XM, EXx } },
2083     { "subss",  { XM, EXx } },
2084     { "subpd",  { XM, EXx } },
2085     { "subsd",  { XM, EXx } },
2086   },
2087   /* PREGRP15 */
2088   {
2089     { "(bad)",  { XM, EXx } },
2090     { "cvtdq2pd", { XM, EXq } },
2091     { "cvttpd2dq", { XM, EXx } },
2092     { "cvtpd2dq", { XM, EXx } },
2093   },
2094   /* PREGRP16 */
2095   {
2096     { "cvtdq2ps", { XM, EXx } },
2097     { "cvttps2dq", { XM, EXx } },
2098     { "cvtps2dq", { XM, EXx } },
2099     { "(bad)",  { XM, EXx } },
2100   },
2101   /* PREGRP17 */
2102   {
2103     { "cvtps2pd", { XM, EXq } },
2104     { "cvtss2sd", { XM, EXx } },
2105     { "cvtpd2ps", { XM, EXx } },
2106     { "cvtsd2ss", { XM, EXx } },
2107   },
2108   /* PREGRP18 */
2109   {
2110     { "maskmovq", { MX, MS } },
2111     { "(bad)",  { XM, EXx } },
2112     { "maskmovdqu", { XM, XS } },
2113     { "(bad)",  { XM, EXx } },
2114   },
2115   /* PREGRP19 */
2116   {
2117     { "movq",   { MX, EM } },
2118     { "movdqu", { XM, EXx } },
2119     { "movdqa", { XM, EXx } },
2120     { "(bad)",  { XM, EXx } },
2121   },
2122   /* PREGRP20 */
2123   {
2124     { "movq",   { EM, MX } },
2125     { "movdqu", { EXx,  XM } },
2126     { "movdqa", { EXx,  XM } },
2127     { "(bad)",  { EXx,  XM } },
2128   },
2129   /* PREGRP21 */
2130   {
2131     { "(bad)",  { EXx,  XM } },
2132     { "movq2dq",{ XM, MS } },
2133     { "movq",   { EXx,  XM } },
2134     { "movdq2q",{ MX, XS } },
2135   },
2136   /* PREGRP22 */
2137   {
2138     { "pshufw", { MX, EM, Ib } },
2139     { "pshufhw",{ XM, EXx, Ib } },
2140     { "pshufd", { XM, EXx, Ib } },
2141     { "pshuflw",{ XM, EXx, Ib } },
2142   },
2143   /* PREGRP23 */
2144   {
2145     { "movd",   { Edq, MX } },
2146     { "movq",   { XM, EXx } },
2147     { "movd",   { Edq, XM } },
2148     { "(bad)",  { Ed, XM } },
2149   },
2150   /* PREGRP24 */
2151   {
2152     { "(bad)",  { MX, EXx } },
2153     { "(bad)",  { XM, EXx } },
2154     { "punpckhqdq", { XM, EXx } },
2155     { "(bad)",  { XM, EXx } },
2156   },
2157   /* PREGRP25 */
2158   {
2159     { "movntq", { EM, MX } },
2160     { "(bad)",  { EM, XM } },
2161     { "movntdq",{ EM, XM } },
2162     { "(bad)",  { EM, XM } },
2163   },
2164   /* PREGRP26 */
2165   {
2166     { "(bad)",  { MX, EXx } },
2167     { "(bad)",  { XM, EXx } },
2168     { "punpcklqdq", { XM, EXx } },
2169     { "(bad)",  { XM, EXx } },
2170   },
2171   /* PREGRP27 */
2172   {
2173     { "(bad)",  { MX, EXx } },
2174     { "(bad)",  { XM, EXx } },
2175     { "addsubpd", { XM, EXx } },
2176     { "addsubps", { XM, EXx } },
2177   },
2178   /* PREGRP28 */
2179   {
2180     { "(bad)",  { MX, EXx } },
2181     { "(bad)",  { XM, EXx } },
2182     { "haddpd", { XM, EXx } },
2183     { "haddps", { XM, EXx } },
2184   },
2185   /* PREGRP29 */
2186   {
2187     { "(bad)",  { MX, EXx } },
2188     { "(bad)",  { XM, EXx } },
2189     { "hsubpd", { XM, EXx } },
2190     { "hsubps", { XM, EXx } },
2191   },
2192   /* PREGRP30 */
2193   {
2194     { "movlpX", { XM, EXq, { SIMD_Fixup, 'h' } } }, /* really only 2 operands */
2195     { "movsldup", { XM, EXx } },
2196     { "movlpd", { XM, EXq } },
2197     { "movddup", { XM, EXq } },
2198   },
2199   /* PREGRP31 */
2200   {
2201     { "movhpX", { XM, EXq, { SIMD_Fixup, 'l' } } },
2202     { "movshdup", { XM, EXx } },
2203     { "movhpd", { XM, EXq } },
2204     { "(bad)",  { XM, EXq } },
2205   },
2206   /* PREGRP32 */
2207   {
2208     { "(bad)",  { XM, EXx } },
2209     { "(bad)",  { XM, EXx } },
2210     { "(bad)",  { XM, EXx } },
2211     { "lddqu",  { XM, M } },
2212   },
2213   /* PREGRP33 */
2214   {
2215     {"movntps", { Ev, XM } },
2216     {"movntss", { Ev, XM } },
2217     {"movntpd", { Ev, XM } },
2218     {"movntsd", { Ev, XM } },
2219   },
2220
2221   /* PREGRP34 */
2222   {
2223     {"vmread",  { Em, Gm } },
2224     {"(bad)",   { XX } },
2225     {"extrq",   { XS, Ib, Ib } },
2226     {"insertq", { XM, XS, Ib, Ib } },
2227   },
2228
2229  /* PREGRP35 */
2230   {
2231     {"vmwrite", { Gm, Em } },
2232     {"(bad)",   { XX } },
2233     {"extrq",   { XM, XS } },
2234     {"insertq", { XM, XS } },
2235   },
2236
2237   /* PREGRP36 */
2238   {
2239     { "bsrS",   { Gv, Ev } },
2240     { "lzcntS", { Gv, Ev } },
2241     { "bsrS",   { Gv, Ev } },
2242     { "(bad)",  { XX } },
2243   },
2244
2245   /* PREGRP37 */
2246   {
2247     { "(bad)", { XX } },
2248     { "popcntS", { Gv, Ev } },
2249     { "(bad)", { XX } },
2250     { "(bad)", { XX } },
2251   },
2252
2253   /* PREGRP38 */
2254   {
2255     { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
2256     { "pause", { XX } },
2257     { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
2258     { "(bad)", { XX } },
2259   },
2260
2261   /* PREGRP39 */
2262   {
2263     { "(bad)",  { XX } },
2264     { "(bad)",  { XX } },
2265     { "pblendvb", {XM, EXx, XMM0 } },
2266     { "(bad)",  { XX } },
2267   },
2268
2269   /* PREGRP40 */
2270   {
2271     { "(bad)",  { XX } },
2272     { "(bad)",  { XX } },
2273     { "blendvps", {XM, EXx, XMM0 } },
2274     { "(bad)",  { XX } },
2275   },
2276
2277   /* PREGRP41 */
2278   {
2279     { "(bad)",  { XX } },
2280     { "(bad)",  { XX } },
2281     { "blendvpd", { XM, EXx, XMM0 } },
2282     { "(bad)",  { XX } },
2283   },
2284
2285   /* PREGRP42 */
2286   {
2287     { "(bad)",  { XX } },
2288     { "(bad)",  { XX } },
2289     { "ptest",  { XM, EXx } },
2290     { "(bad)",  { XX } },
2291   },
2292
2293   /* PREGRP43 */
2294   {
2295     { "(bad)",  { XX } },
2296     { "(bad)",  { XX } },
2297     { "pmovsxbw", { XM, EXx } },
2298     { "(bad)",  { XX } },
2299   },
2300
2301   /* PREGRP44 */
2302   {
2303     { "(bad)",  { XX } },
2304     { "(bad)",  { XX } },
2305     { "pmovsxbd", { XM, EXx } },
2306     { "(bad)",  { XX } },
2307   },
2308
2309   /* PREGRP45 */
2310   {
2311     { "(bad)",  { XX } },
2312     { "(bad)",  { XX } },
2313     { "pmovsxbq", { XM, EXx } },
2314     { "(bad)",  { XX } },
2315   },
2316
2317   /* PREGRP46 */
2318   {
2319     { "(bad)",  { XX } },
2320     { "(bad)",  { XX } },
2321     { "pmovsxwd", { XM, EXx } },
2322     { "(bad)",  { XX } },
2323   },
2324
2325   /* PREGRP47 */
2326   {
2327     { "(bad)",  { XX } },
2328     { "(bad)",  { XX } },
2329     { "pmovsxwq", { XM, EXx } },
2330     { "(bad)",  { XX } },
2331   },
2332
2333   /* PREGRP48 */
2334   {
2335     { "(bad)",  { XX } },
2336     { "(bad)",  { XX } },
2337     { "pmovsxdq", { XM, EXx } },
2338     { "(bad)",  { XX } },
2339   },
2340
2341   /* PREGRP49 */
2342   {
2343     { "(bad)",  { XX } },
2344     { "(bad)",  { XX } },
2345     { "pmuldq", { XM, EXx } },
2346     { "(bad)",  { XX } },
2347   },
2348
2349   /* PREGRP50 */
2350   {
2351     { "(bad)",  { XX } },
2352     { "(bad)",  { XX } },
2353     { "pcmpeqq", { XM, EXx } },
2354     { "(bad)",  { XX } },
2355   },
2356
2357   /* PREGRP51 */
2358   {
2359     { "(bad)",  { XX } },
2360     { "(bad)",  { XX } },
2361     { "movntdqa", { XM, EM } },
2362     { "(bad)",  { XX } },
2363   },
2364
2365   /* PREGRP52 */
2366   {
2367     { "(bad)",  { XX } },
2368     { "(bad)",  { XX } },
2369     { "packusdw", { XM, EXx } },
2370     { "(bad)",  { XX } },
2371   },
2372
2373   /* PREGRP53 */
2374   {
2375     { "(bad)",  { XX } },
2376     { "(bad)",  { XX } },
2377     { "pmovzxbw", { XM, EXx } },
2378     { "(bad)",  { XX } },
2379   },
2380
2381   /* PREGRP54 */
2382   {
2383     { "(bad)",  { XX } },
2384     { "(bad)",  { XX } },
2385     { "pmovzxbd", { XM, EXx } },
2386     { "(bad)",  { XX } },
2387   },
2388
2389   /* PREGRP55 */
2390   {
2391     { "(bad)",  { XX } },
2392     { "(bad)",  { XX } },
2393     { "pmovzxbq", { XM, EXx } },
2394     { "(bad)",  { XX } },
2395   },
2396
2397   /* PREGRP56 */
2398   {
2399     { "(bad)",  { XX } },
2400     { "(bad)",  { XX } },
2401     { "pmovzxwd", { XM, EXx } },
2402     { "(bad)",  { XX } },
2403   },
2404
2405   /* PREGRP57 */
2406   {
2407     { "(bad)",  { XX } },
2408     { "(bad)",  { XX } },
2409     { "pmovzxwq", { XM, EXx } },
2410     { "(bad)",  { XX } },
2411   },
2412
2413   /* PREGRP58 */
2414   {
2415     { "(bad)",  { XX } },
2416     { "(bad)",  { XX } },
2417     { "pmovzxdq", { XM, EXx } },
2418     { "(bad)",  { XX } },
2419   },
2420
2421   /* PREGRP59 */
2422   {
2423     { "(bad)",  { XX } },
2424     { "(bad)",  { XX } },
2425     { "pminsb", { XM, EXx } },
2426     { "(bad)",  { XX } },
2427   },
2428
2429   /* PREGRP60 */
2430   {
2431     { "(bad)",  { XX } },
2432     { "(bad)",  { XX } },
2433     { "pminsd", { XM, EXx } },
2434     { "(bad)",  { XX } },
2435   },
2436
2437   /* PREGRP61 */
2438   {
2439     { "(bad)",  { XX } },
2440     { "(bad)",  { XX } },
2441     { "pminuw", { XM, EXx } },
2442     { "(bad)",  { XX } },
2443   },
2444
2445   /* PREGRP62 */
2446   {
2447     { "(bad)",  { XX } },
2448     { "(bad)",  { XX } },
2449     { "pminud", { XM, EXx } },
2450     { "(bad)",  { XX } },
2451   },
2452
2453   /* PREGRP63 */
2454   {
2455     { "(bad)",  { XX } },
2456     { "(bad)",  { XX } },
2457     { "pmaxsb", { XM, EXx } },
2458     { "(bad)",  { XX } },
2459   },
2460
2461   /* PREGRP64 */
2462   {
2463     { "(bad)",  { XX } },
2464     { "(bad)",  { XX } },
2465     { "pmaxsd", { XM, EXx } },
2466     { "(bad)",  { XX } },
2467   },
2468
2469   /* PREGRP65 */
2470   {
2471     { "(bad)",  { XX } },
2472     { "(bad)",  { XX } },
2473     { "pmaxuw", { XM, EXx } },
2474     { "(bad)",  { XX } },
2475   },
2476
2477   /* PREGRP66 */
2478   {
2479     { "(bad)",  { XX } },
2480     { "(bad)",  { XX } },
2481     { "pmaxud", { XM, EXx } },
2482     { "(bad)",  { XX } },
2483   },
2484
2485   /* PREGRP67 */
2486   {
2487     { "(bad)",  { XX } },
2488     { "(bad)",  { XX } },
2489     { "pmulld", { XM, EXx } },
2490     { "(bad)",  { XX } },
2491   },
2492
2493   /* PREGRP68 */
2494   {
2495     { "(bad)",  { XX } },
2496     { "(bad)",  { XX } },
2497     { "phminposuw", { XM, EXx } },
2498     { "(bad)",  { XX } },
2499   },
2500
2501   /* PREGRP69 */
2502   {
2503     { "(bad)",  { XX } },
2504     { "(bad)",  { XX } },
2505     { "roundps", { XM, EXx, Ib } },
2506     { "(bad)",  { XX } },
2507   },
2508
2509   /* PREGRP70 */
2510   {
2511     { "(bad)",  { XX } },
2512     { "(bad)",  { XX } },
2513     { "roundpd", { XM, EXx, Ib } },
2514     { "(bad)",  { XX } },
2515   },
2516
2517   /* PREGRP71 */
2518   {
2519     { "(bad)",  { XX } },
2520     { "(bad)",  { XX } },
2521     { "roundss", { XM, EXx, Ib } },
2522     { "(bad)",  { XX } },
2523   },
2524
2525   /* PREGRP72 */
2526   {
2527     { "(bad)",  { XX } },
2528     { "(bad)",  { XX } },
2529     { "roundsd", { XM, EXx, Ib } },
2530     { "(bad)",  { XX } },
2531   },
2532
2533   /* PREGRP73 */
2534   {
2535     { "(bad)",  { XX } },
2536     { "(bad)",  { XX } },
2537     { "blendps", { XM, EXx, Ib } },
2538     { "(bad)",  { XX } },
2539   },
2540
2541   /* PREGRP74 */
2542   {
2543     { "(bad)",  { XX } },
2544     { "(bad)",  { XX } },
2545     { "blendpd", { XM, EXx, Ib } },
2546     { "(bad)",  { XX } },
2547   },
2548
2549   /* PREGRP75 */
2550   {
2551     { "(bad)",  { XX } },
2552     { "(bad)",  { XX } },
2553     { "pblendw", { XM, EXx, Ib } },
2554     { "(bad)",  { XX } },
2555   },
2556
2557   /* PREGRP76 */
2558   {
2559     { "(bad)",  { XX } },
2560     { "(bad)",  { XX } },
2561     { "pextrb", { Edqb, XM, Ib } },
2562     { "(bad)",  { XX } },
2563   },
2564
2565   /* PREGRP77 */
2566   {
2567     { "(bad)",  { XX } },
2568     { "(bad)",  { XX } },
2569     { "pextrw", { Edqw, XM, Ib } },
2570     { "(bad)",  { XX } },
2571   },
2572
2573   /* PREGRP78 */
2574   {
2575     { "(bad)",  { XX } },
2576     { "(bad)",  { XX } },
2577     { "pextrK", { Edq, XM, Ib } },
2578     { "(bad)",  { XX } },
2579   },
2580
2581   /* PREGRP79 */
2582   {
2583     { "(bad)",  { XX } },
2584     { "(bad)",  { XX } },
2585     { "extractps", { Edqd, XM, Ib } },
2586     { "(bad)",  { XX } },
2587   },
2588
2589   /* PREGRP80 */
2590   {
2591     { "(bad)",  { XX } },
2592     { "(bad)",  { XX } },
2593     { "pinsrb", { XM, Edqb, Ib } },
2594     { "(bad)",  { XX } },
2595   },
2596
2597   /* PREGRP81 */
2598   {
2599     { "(bad)",  { XX } },
2600     { "(bad)",  { XX } },
2601     { "insertps", { XM, EXx, Ib } },
2602     { "(bad)",  { XX } },
2603   },
2604
2605   /* PREGRP82 */
2606   {
2607     { "(bad)",  { XX } },
2608     { "(bad)",  { XX } },
2609     { "pinsrK", { XM, Edq, Ib } },
2610     { "(bad)",  { XX } },
2611   },
2612
2613   /* PREGRP83 */
2614   {
2615     { "(bad)",  { XX } },
2616     { "(bad)",  { XX } },
2617     { "dpps",   { XM, EXx, Ib } },
2618     { "(bad)",  { XX } },
2619   },
2620
2621   /* PREGRP84 */
2622   {
2623     { "(bad)",  { XX } },
2624     { "(bad)",  { XX } },
2625     { "dppd",   { XM, EXx, Ib } },
2626     { "(bad)",  { XX } },
2627   },
2628
2629   /* PREGRP85 */
2630   {
2631     { "(bad)",  { XX } },
2632     { "(bad)",  { XX } },
2633     { "mpsadbw", { XM, EXx, Ib } },
2634     { "(bad)",  { XX } },
2635   },
2636
2637   /* PREGRP86 */
2638   {
2639     { "(bad)",  { XX } },
2640     { "(bad)",  { XX } },
2641     { "pcmpgtq", { XM, EXx } },
2642     { "(bad)",  { XX } },
2643   },
2644
2645   /* PREGRP87 */
2646   {
2647     { "movbe",  { Gv, Ev } },
2648     { "(bad)",  { XX } },
2649     { "movbe",  { Gv, Ev } },
2650     { "crc32",  { Gdq, { CRC32_Fixup, b_mode } } },
2651   },
2652
2653   /* PREGRP88 */
2654   {
2655     { "movbe",  { Ev, Gv } },
2656     { "(bad)",  { XX } },
2657     { "movbe",  { Ev, Gv } },
2658     { "crc32",  { Gdq, { CRC32_Fixup, v_mode } } },
2659   },
2660
2661   /* PREGRP89 */
2662   {
2663     { "(bad)",  { XX } },
2664     { "(bad)",  { XX } },
2665     { "pcmpestrm", { XM, EXx, Ib } },
2666     { "(bad)",  { XX } },
2667   },
2668
2669   /* PREGRP90 */
2670   {
2671     { "(bad)",  { XX } },
2672     { "(bad)",  { XX } },
2673     { "pcmpestri", { XM, EXx, Ib } },
2674     { "(bad)",  { XX } },
2675   },
2676
2677   /* PREGRP91 */
2678   {
2679     { "(bad)",  { XX } },
2680     { "(bad)",  { XX } },
2681     { "pcmpistrm", { XM, EXx, Ib } },
2682     { "(bad)",  { XX } },
2683   },
2684
2685   /* PREGRP92 */
2686   {
2687     { "(bad)",  { XX } },
2688     { "(bad)",  { XX } },
2689     { "pcmpistri", { XM, EXx, Ib } },
2690     { "(bad)",  { XX } },
2691   },
2692
2693   /* PREGRP93 */
2694   {
2695     { "ucomiss",{ XM, EXd } },
2696     { "(bad)",  { XX } },
2697     { "ucomisd",{ XM, EXq } },
2698     { "(bad)",  { XX } },
2699   },
2700
2701   /* PREGRP94 */
2702   {
2703     { "comiss", { XM, EXd } },
2704     { "(bad)",  { XX } },
2705     { "comisd", { XM, EXq } },
2706     { "(bad)",  { XX } },
2707   },
2708
2709   /* PREGRP95 */
2710   {
2711     { "punpcklbw",{ MX, EMd } },
2712     { "(bad)",  { XX } },
2713     { "punpcklbw",{ MX, EMq } },
2714     { "(bad)",  { XX } },
2715   },
2716
2717   /* PREGRP96 */
2718   {
2719     { "punpcklwd",{ MX, EMd } },
2720     { "(bad)",  { XX } },
2721     { "punpcklwd",{ MX, EMq } },
2722     { "(bad)",  { XX } },
2723   },
2724
2725   /* PREGRP97 */
2726   {
2727     { "punpckldq",{ MX, EMd } },
2728     { "(bad)",  { XX } },
2729     { "punpckldq",{ MX, EMq } },
2730     { "(bad)",  { XX } },
2731   },
2732
2733   /* PREGRP98 */
2734   {
2735     { "(bad)",  { XX } },
2736     { "(bad)",  { XX } },
2737     { "pclmulqdq", { XM, EXx, Ib } },
2738     { "(bad)",  { XX } },
2739   },
2740
2741   /* PREGRP99 */
2742   {
2743     { "(bad)",  { XX } },
2744     { "(bad)",  { XX } },
2745     { "aesimc", { XM, EXx } },
2746     { "(bad)",  { XX } },
2747   },
2748
2749   /* PREGRP100 */
2750   {
2751     { "(bad)",  { XX } },
2752     { "(bad)",  { XX } },
2753     { "aesenc", { XM, EXx } },
2754     { "(bad)",  { XX } },
2755   },
2756
2757   /* PREGRP101 */
2758   {
2759     { "(bad)",  { XX } },
2760     { "(bad)",  { XX } },
2761     { "aesenclast", { XM, EXx } },
2762     { "(bad)",  { XX } },
2763   },
2764
2765   /* PREGRP102 */
2766   {
2767     { "(bad)",  { XX } },
2768     { "(bad)",  { XX } },
2769     { "aesdec", { XM, EXx } },
2770     { "(bad)",  { XX } },
2771   },
2772
2773   /* PREGRP103 */
2774   {
2775     { "(bad)",  { XX } },
2776     { "(bad)",  { XX } },
2777     { "aesdeclast", { XM, EXx } },
2778     { "(bad)",  { XX } },
2779   },
2780
2781   /* PREGRP104 */
2782   {
2783     { "(bad)",  { XX } },
2784     { "(bad)",  { XX } },
2785     { "aeskeygenassist", { XM, EXx, Ib } },
2786     { "(bad)",  { XX } },
2787   },
2788
2789   /* PREGRP105 */
2790   {
2791     { "andnS",  { Gv, Bv, Ev } },
2792     { "(bad)",  { XX } },
2793     { "(bad)",  { XX } },
2794     { "(bad)",  { XX } },
2795   },
2796
2797   /* PREGRP106 */
2798   {
2799     { "bextrS", { Gv, Ev, Bv } },
2800     { "sarxS",  { Gv, Ev, Bv } },
2801     { "shlxS",  { Gv, Ev, Bv } },
2802     { "shrxS",  { Gv, Ev, Bv } },
2803   },
2804
2805   /* PREGRP107 */
2806   {
2807     { "bsfS",   { Gv, Ev } },
2808     { "tzcntS", { Gv, Ev } },
2809     { "bsfS",   { Gv, Ev } },
2810     { "(bad)",  { XX } },
2811   },
2812
2813   /* PREGRP108 */
2814   {
2815     { "bzhi",   { Gv, Ev, Bv } },
2816     { "pext",   { Gv, Bv, Ev } },
2817     { "(bad)",  { XX } },
2818     { "pdep",   { Gv, Bv, Ev } },
2819   },
2820
2821   /* PREGRP109 */
2822   {
2823     { "(bad)",  { XX } },
2824     { "(bad)",  { XX } },
2825     { "(bad)",  { XX } },
2826     { "rorx",   { Gv, Ev, Ib } },
2827   },
2828 };
2829
2830 static const struct dis386 x86_64_table[][2] = {
2831   {
2832     { "pusha{P|}", { XX } },
2833     { "(bad)", { XX } },
2834   },
2835   {
2836     { "popa{P|}", { XX } },
2837     { "(bad)", { XX } },
2838   },
2839   {
2840     { "bound{S|}", { Gv, Ma } },
2841     { "(bad)", { XX } },
2842   },
2843   {
2844     { "arpl", { Ew, Gw } },
2845     { "movs{||lq|xd}", { Gv, Ed } },
2846   },
2847 };
2848
2849 static const struct dis386 three_byte_table[][256] = {
2850   /* THREE_BYTE_0 */
2851   {
2852     /* 00 */
2853     { "pshufb", { MX, EM } },
2854     { "phaddw", { MX, EM } },
2855     { "phaddd", { MX, EM } },
2856     { "phaddsw", { MX, EM } },
2857     { "pmaddubsw", { MX, EM } },
2858     { "phsubw", { MX, EM } },
2859     { "phsubd", { MX, EM } },
2860     { "phsubsw", { MX, EM } },
2861     /* 08 */
2862     { "psignb", { MX, EM } },
2863     { "psignw", { MX, EM } },
2864     { "psignd", { MX, EM } },
2865     { "pmulhrsw", { MX, EM } },
2866     { "(bad)", { XX } },
2867     { "(bad)", { XX } },
2868     { "(bad)", { XX } },
2869     { "(bad)", { XX } },
2870     /* 10 */
2871     { PREGRP39 },
2872     { "(bad)", { XX } },
2873     { "(bad)", { XX } },
2874     { "(bad)", { XX } },
2875     { PREGRP40 },
2876     { PREGRP41 },
2877     { "(bad)", { XX } },
2878     { PREGRP42 },
2879     /* 18 */
2880     { "(bad)", { XX } },
2881     { "(bad)", { XX } },
2882     { "(bad)", { XX } },
2883     { "(bad)", { XX } },
2884     { "pabsb", { MX, EM } },
2885     { "pabsw", { MX, EM } },
2886     { "pabsd", { MX, EM } },
2887     { "(bad)", { XX } },
2888     /* 20 */
2889     { PREGRP43 },
2890     { PREGRP44 },
2891     { PREGRP45 },
2892     { PREGRP46 },
2893     { PREGRP47 },
2894     { PREGRP48 },
2895     { "(bad)", { XX } },
2896     { "(bad)", { XX } },
2897     /* 28 */
2898     { PREGRP49 },
2899     { PREGRP50 },
2900     { PREGRP51 },
2901     { PREGRP52 },
2902     { "(bad)", { XX } },
2903     { "(bad)", { XX } },
2904     { "(bad)", { XX } },
2905     { "(bad)", { XX } },
2906     /* 30 */
2907     { PREGRP53 },
2908     { PREGRP54 },
2909     { PREGRP55 },
2910     { PREGRP56 },
2911     { PREGRP57 },
2912     { PREGRP58 },
2913     { "(bad)", { XX } },
2914     { PREGRP86 },
2915     /* 38 */
2916     { PREGRP59 },
2917     { PREGRP60 },
2918     { PREGRP61 },
2919     { PREGRP62 },
2920     { PREGRP63 },
2921     { PREGRP64 },
2922     { PREGRP65 },
2923     { PREGRP66 },
2924     /* 40 */
2925     { PREGRP67 },
2926     { PREGRP68 },
2927     { "(bad)", { XX } },
2928     { "(bad)", { XX } },
2929     { "(bad)", { XX } },
2930     { "(bad)", { XX } },
2931     { "(bad)", { XX } },
2932     { "(bad)", { XX } },
2933     /* 48 */
2934     { "(bad)", { XX } },
2935     { "(bad)", { XX } },
2936     { "(bad)", { XX } },
2937     { "(bad)", { XX } },
2938     { "(bad)", { XX } },
2939     { "(bad)", { XX } },
2940     { "(bad)", { XX } },
2941     { "(bad)", { XX } },
2942     /* 50 */
2943     { "(bad)", { XX } },
2944     { "(bad)", { XX } },
2945     { "(bad)", { XX } },
2946     { "(bad)", { XX } },
2947     { "(bad)", { XX } },
2948     { "(bad)", { XX } },
2949     { "(bad)", { XX } },
2950     { "(bad)", { XX } },
2951     /* 58 */
2952     { "(bad)", { XX } },
2953     { "(bad)", { XX } },
2954     { "(bad)", { XX } },
2955     { "(bad)", { XX } },
2956     { "(bad)", { XX } },
2957     { "(bad)", { XX } },
2958     { "(bad)", { XX } },
2959     { "(bad)", { XX } },
2960     /* 60 */
2961     { "(bad)", { XX } },
2962     { "(bad)", { XX } },
2963     { "(bad)", { XX } },
2964     { "(bad)", { XX } },
2965     { "(bad)", { XX } },
2966     { "(bad)", { XX } },
2967     { "(bad)", { XX } },
2968     { "(bad)", { XX } },
2969     /* 68 */
2970     { "(bad)", { XX } },
2971     { "(bad)", { XX } },
2972     { "(bad)", { XX } },
2973     { "(bad)", { XX } },
2974     { "(bad)", { XX } },
2975     { "(bad)", { XX } },
2976     { "(bad)", { XX } },
2977     { "(bad)", { XX } },
2978     /* 70 */
2979     { "(bad)", { XX } },
2980     { "(bad)", { XX } },
2981     { "(bad)", { XX } },
2982     { "(bad)", { XX } },
2983     { "(bad)", { XX } },
2984     { "(bad)", { XX } },
2985     { "(bad)", { XX } },
2986     { "(bad)", { XX } },
2987     /* 78 */
2988     { "(bad)", { XX } },
2989     { "(bad)", { XX } },
2990     { "(bad)", { XX } },
2991     { "(bad)", { XX } },
2992     { "(bad)", { XX } },
2993     { "(bad)", { XX } },
2994     { "(bad)", { XX } },
2995     { "(bad)", { XX } },
2996     /* 80 */
2997     { "(bad)", { XX } },
2998     { "(bad)", { XX } },
2999     { "(bad)", { XX } },
3000     { "(bad)", { XX } },
3001     { "(bad)", { XX } },
3002     { "(bad)", { XX } },
3003     { "(bad)", { XX } },
3004     { "(bad)", { XX } },
3005     /* 88 */
3006     { "(bad)", { XX } },
3007     { "(bad)", { XX } },
3008     { "(bad)", { XX } },
3009     { "(bad)", { XX } },
3010     { "(bad)", { XX } },
3011     { "(bad)", { XX } },
3012     { "(bad)", { XX } },
3013     { "(bad)", { XX } },
3014     /* 90 */
3015     { "(bad)", { XX } },
3016     { "(bad)", { XX } },
3017     { "(bad)", { XX } },
3018     { "(bad)", { XX } },
3019     { "(bad)", { XX } },
3020     { "(bad)", { XX } },
3021     { "(bad)", { XX } },
3022     { "(bad)", { XX } },
3023     /* 98 */
3024     { "(bad)", { XX } },
3025     { "(bad)", { XX } },
3026     { "(bad)", { XX } },
3027     { "(bad)", { XX } },
3028     { "(bad)", { XX } },
3029     { "(bad)", { XX } },
3030     { "(bad)", { XX } },
3031     { "(bad)", { XX } },
3032     /* a0 */
3033     { "(bad)", { XX } },
3034     { "(bad)", { XX } },
3035     { "(bad)", { XX } },
3036     { "(bad)", { XX } },
3037     { "(bad)", { XX } },
3038     { "(bad)", { XX } },
3039     { "(bad)", { XX } },
3040     { "(bad)", { XX } },
3041     /* a8 */
3042     { "(bad)", { XX } },
3043     { "(bad)", { XX } },
3044     { "(bad)", { XX } },
3045     { "(bad)", { XX } },
3046     { "(bad)", { XX } },
3047     { "(bad)", { XX } },
3048     { "(bad)", { XX } },
3049     { "(bad)", { XX } },
3050     /* b0 */
3051     { "(bad)", { XX } },
3052     { "(bad)", { XX } },
3053     { "(bad)", { XX } },
3054     { "(bad)", { XX } },
3055     { "(bad)", { XX } },
3056     { "(bad)", { XX } },
3057     { "(bad)", { XX } },
3058     { "(bad)", { XX } },
3059     /* b8 */
3060     { "(bad)", { XX } },
3061     { "(bad)", { XX } },
3062     { "(bad)", { XX } },
3063     { "(bad)", { XX } },
3064     { "(bad)", { XX } },
3065     { "(bad)", { XX } },
3066     { "(bad)", { XX } },
3067     { "(bad)", { XX } },
3068     /* c0 */
3069     { "(bad)", { XX } },
3070     { "(bad)", { XX } },
3071     { "(bad)", { XX } },
3072     { "(bad)", { XX } },
3073     { "(bad)", { XX } },
3074     { "(bad)", { XX } },
3075     { "(bad)", { XX } },
3076     { "(bad)", { XX } },
3077     /* c8 */
3078     { "(bad)", { XX } },
3079     { "(bad)", { XX } },
3080     { "(bad)", { XX } },
3081     { "(bad)", { XX } },
3082     { "(bad)", { XX } },
3083     { "(bad)", { XX } },
3084     { "(bad)", { XX } },
3085     { "(bad)", { XX } },
3086     /* d0 */
3087     { "(bad)", { XX } },
3088     { "(bad)", { XX } },
3089     { "(bad)", { XX } },
3090     { "(bad)", { XX } },
3091     { "(bad)", { XX } },
3092     { "(bad)", { XX } },
3093     { "(bad)", { XX } },
3094     { "(bad)", { XX } },
3095     /* d8 */
3096     { "(bad)", { XX } },
3097     { "(bad)", { XX } },
3098     { "(bad)", { XX } },
3099     { PREGRP99 },
3100     { PREGRP100 },
3101     { PREGRP101 },
3102     { PREGRP102 },
3103     { PREGRP103 },
3104     /* e0 */
3105     { "(bad)", { XX } },
3106     { "(bad)", { XX } },
3107     { "(bad)", { XX } },
3108     { "(bad)", { XX } },
3109     { "(bad)", { XX } },
3110     { "(bad)", { XX } },
3111     { "(bad)", { XX } },
3112     { "(bad)", { XX } },
3113     /* e8 */
3114     { "(bad)", { XX } },
3115     { "(bad)", { XX } },
3116     { "(bad)", { XX } },
3117     { "(bad)", { XX } },
3118     { "(bad)", { XX } },
3119     { "(bad)", { XX } },
3120     { "(bad)", { XX } },
3121     { "(bad)", { XX } },
3122     /* f0 */
3123     { PREGRP87 },
3124     { PREGRP88 },
3125     { PREGRP105 },
3126     { "(bad)", { XX } },
3127     { "(bad)", { XX } },
3128     { PREGRP108 },
3129     { "(bad)", { XX } },
3130     { PREGRP106 },
3131     /* f8 */
3132     { "(bad)", { XX } },
3133     { "(bad)", { XX } },
3134     { "(bad)", { XX } },
3135     { "(bad)", { XX } },
3136     { "(bad)", { XX } },
3137     { "(bad)", { XX } },
3138     { "(bad)", { XX } },
3139     { "(bad)", { XX } },
3140   },
3141   /* THREE_BYTE_1 */
3142   {
3143     /* 00 */
3144     { "(bad)", { XX } },
3145     { "(bad)", { XX } },
3146     { "(bad)", { XX } },
3147     { "(bad)", { XX } },
3148     { "(bad)", { XX } },
3149     { "(bad)", { XX } },
3150     { "(bad)", { XX } },
3151     { "(bad)", { XX } },
3152     /* 08 */
3153     { PREGRP69 },
3154     { PREGRP70 },
3155     { PREGRP71 },
3156     { PREGRP72 },
3157     { PREGRP73 },
3158     { PREGRP74 },
3159     { PREGRP75 },
3160     { "palignr", { MX, EM, Ib } },
3161     /* 10 */
3162     { "(bad)", { XX } },
3163     { "(bad)", { XX } },
3164     { "(bad)", { XX } },
3165     { "(bad)", { XX } },
3166     { PREGRP76 },
3167     { PREGRP77 },
3168     { PREGRP78 },
3169     { PREGRP79 },
3170     /* 18 */
3171     { "(bad)", { XX } },
3172     { "(bad)", { XX } },
3173     { "(bad)", { XX } },
3174     { "(bad)", { XX } },
3175     { "(bad)", { XX } },
3176     { "(bad)", { XX } },
3177     { "(bad)", { XX } },
3178     { "(bad)", { XX } },
3179     /* 20 */
3180     { PREGRP80 },
3181     { PREGRP81 },
3182     { PREGRP82 },
3183     { "(bad)", { XX } },
3184     { "(bad)", { XX } },
3185     { "(bad)", { XX } },
3186     { "(bad)", { XX } },
3187     { "(bad)", { XX } },
3188     /* 28 */
3189     { "(bad)", { XX } },
3190     { "(bad)", { XX } },
3191     { "(bad)", { XX } },
3192     { "(bad)", { XX } },
3193     { "(bad)", { XX } },
3194     { "(bad)", { XX } },
3195     { "(bad)", { XX } },
3196     { "(bad)", { XX } },
3197     /* 30 */
3198     { "(bad)", { XX } },
3199     { "(bad)", { XX } },
3200     { "(bad)", { XX } },
3201     { "(bad)", { XX } },
3202     { "(bad)", { XX } },
3203     { "(bad)", { XX } },
3204     { "(bad)", { XX } },
3205     { "(bad)", { XX } },
3206     /* 38 */
3207     { "(bad)", { XX } },
3208     { "(bad)", { XX } },
3209     { "(bad)", { XX } },
3210     { "(bad)", { XX } },
3211     { "(bad)", { XX } },
3212     { "(bad)", { XX } },
3213     { "(bad)", { XX } },
3214     { "(bad)", { XX } },
3215     /* 40 */
3216     { PREGRP83 },
3217     { PREGRP84 },
3218     { PREGRP85 },
3219     { "(bad)", { XX } },
3220     { PREGRP98 },
3221     { "(bad)", { XX } },
3222     { "(bad)", { XX } },
3223     { "(bad)", { XX } },
3224     /* 48 */
3225     { "(bad)", { XX } },
3226     { "(bad)", { XX } },
3227     { "(bad)", { XX } },
3228     { "(bad)", { XX } },
3229     { "(bad)", { XX } },
3230     { "(bad)", { XX } },
3231     { "(bad)", { XX } },
3232     { "(bad)", { XX } },
3233     /* 50 */
3234     { "(bad)", { XX } },
3235     { "(bad)", { XX } },
3236     { "(bad)", { XX } },
3237     { "(bad)", { XX } },
3238     { "(bad)", { XX } },
3239     { "(bad)", { XX } },
3240     { "(bad)", { XX } },
3241     { "(bad)", { XX } },
3242     /* 58 */
3243     { "(bad)", { XX } },
3244     { "(bad)", { XX } },
3245     { "(bad)", { XX } },
3246     { "(bad)", { XX } },
3247     { "(bad)", { XX } },
3248     { "(bad)", { XX } },
3249     { "(bad)", { XX } },
3250     { "(bad)", { XX } },
3251     /* 60 */
3252     { PREGRP89 },
3253     { PREGRP90 },
3254     { PREGRP91 },
3255     { PREGRP92 },
3256     { "(bad)", { XX } },
3257     { "(bad)", { XX } },
3258     { "(bad)", { XX } },
3259     { "(bad)", { XX } },
3260     /* 68 */
3261     { "(bad)", { XX } },
3262     { "(bad)", { XX } },
3263     { "(bad)", { XX } },
3264     { "(bad)", { XX } },
3265     { "(bad)", { XX } },
3266     { "(bad)", { XX } },
3267     { "(bad)", { XX } },
3268     { "(bad)", { XX } },
3269     /* 70 */
3270     { "(bad)", { XX } },
3271     { "(bad)", { XX } },
3272     { "(bad)", { XX } },
3273     { "(bad)", { XX } },
3274     { "(bad)", { XX } },
3275     { "(bad)", { XX } },
3276     { "(bad)", { XX } },
3277     { "(bad)", { XX } },
3278     /* 78 */
3279     { "(bad)", { XX } },
3280     { "(bad)", { XX } },
3281     { "(bad)", { XX } },
3282     { "(bad)", { XX } },
3283     { "(bad)", { XX } },
3284     { "(bad)", { XX } },
3285     { "(bad)", { XX } },
3286     { "(bad)", { XX } },
3287     /* 80 */
3288     { "(bad)", { XX } },
3289     { "(bad)", { XX } },
3290     { "(bad)", { XX } },
3291     { "(bad)", { XX } },
3292     { "(bad)", { XX } },
3293     { "(bad)", { XX } },
3294     { "(bad)", { XX } },
3295     { "(bad)", { XX } },
3296     /* 88 */
3297     { "(bad)", { XX } },
3298     { "(bad)", { XX } },
3299     { "(bad)", { XX } },
3300     { "(bad)", { XX } },
3301     { "(bad)", { XX } },
3302     { "(bad)", { XX } },
3303     { "(bad)", { XX } },
3304     { "(bad)", { XX } },
3305     /* 90 */
3306     { "(bad)", { XX } },
3307     { "(bad)", { XX } },
3308     { "(bad)", { XX } },
3309     { "(bad)", { XX } },
3310     { "(bad)", { XX } },
3311     { "(bad)", { XX } },
3312     { "(bad)", { XX } },
3313     { "(bad)", { XX } },
3314     /* 98 */
3315     { "(bad)", { XX } },
3316     { "(bad)", { XX } },
3317     { "(bad)", { XX } },
3318     { "(bad)", { XX } },
3319     { "(bad)", { XX } },
3320     { "(bad)", { XX } },
3321     { "(bad)", { XX } },
3322     { "(bad)", { XX } },
3323     /* a0 */
3324     { "(bad)", { XX } },
3325     { "(bad)", { XX } },
3326     { "(bad)", { XX } },
3327     { "(bad)", { XX } },
3328     { "(bad)", { XX } },
3329     { "(bad)", { XX } },
3330     { "(bad)", { XX } },
3331     { "(bad)", { XX } },
3332     /* a8 */
3333     { "(bad)", { XX } },
3334     { "(bad)", { XX } },
3335     { "(bad)", { XX } },
3336     { "(bad)", { XX } },
3337     { "(bad)", { XX } },
3338     { "(bad)", { XX } },
3339     { "(bad)", { XX } },
3340     { "(bad)", { XX } },
3341     /* b0 */
3342     { "(bad)", { XX } },
3343     { "(bad)", { XX } },
3344     { "(bad)", { XX } },
3345     { "(bad)", { XX } },
3346     { "(bad)", { XX } },
3347     { "(bad)", { XX } },
3348     { "(bad)", { XX } },
3349     { "(bad)", { XX } },
3350     /* b8 */
3351     { "(bad)", { XX } },
3352     { "(bad)", { XX } },
3353     { "(bad)", { XX } },
3354     { "(bad)", { XX } },
3355     { "(bad)", { XX } },
3356     { "(bad)", { XX } },
3357     { "(bad)", { XX } },
3358     { "(bad)", { XX } },
3359     /* c0 */
3360     { "(bad)", { XX } },
3361     { "(bad)", { XX } },
3362     { "(bad)", { XX } },
3363     { "(bad)", { XX } },
3364     { "(bad)", { XX } },
3365     { "(bad)", { XX } },
3366     { "(bad)", { XX } },
3367     { "(bad)", { XX } },
3368     /* c8 */
3369     { "(bad)", { XX } },
3370     { "(bad)", { XX } },
3371     { "(bad)", { XX } },
3372     { "(bad)", { XX } },
3373     { "(bad)", { XX } },
3374     { "(bad)", { XX } },
3375     { "(bad)", { XX } },
3376     { "(bad)", { XX } },
3377     /* d0 */
3378     { "(bad)", { XX } },
3379     { "(bad)", { XX } },
3380     { "(bad)", { XX } },
3381     { "(bad)", { XX } },
3382     { "(bad)", { XX } },
3383     { "(bad)", { XX } },
3384     { "(bad)", { XX } },
3385     { "(bad)", { XX } },
3386     /* d8 */
3387     { "(bad)", { XX } },
3388     { "(bad)", { XX } },
3389     { "(bad)", { XX } },
3390     { "(bad)", { XX } },
3391     { "(bad)", { XX } },
3392     { "(bad)", { XX } },
3393     { "(bad)", { XX } },
3394     { PREGRP104 },
3395     /* e0 */
3396     { "(bad)", { XX } },
3397     { "(bad)", { XX } },
3398     { "(bad)", { XX } },
3399     { "(bad)", { XX } },
3400     { "(bad)", { XX } },
3401     { "(bad)", { XX } },
3402     { "(bad)", { XX } },
3403     { "(bad)", { XX } },
3404     /* e8 */
3405     { "(bad)", { XX } },
3406     { "(bad)", { XX } },
3407     { "(bad)", { XX } },
3408     { "(bad)", { XX } },
3409     { "(bad)", { XX } },
3410     { "(bad)", { XX } },
3411     { "(bad)", { XX } },
3412     { "(bad)", { XX } },
3413     /* f0 */
3414     { PREGRP109 },
3415     { "(bad)", { XX } },
3416     { "(bad)", { XX } },
3417     { "(bad)", { XX } },
3418     { "(bad)", { XX } },
3419     { "(bad)", { XX } },
3420     { "(bad)", { XX } },
3421     { "(bad)", { XX } },
3422     /* f8 */
3423     { "(bad)", { XX } },
3424     { "(bad)", { XX } },
3425     { "(bad)", { XX } },
3426     { "(bad)", { XX } },
3427     { "(bad)", { XX } },
3428     { "(bad)", { XX } },
3429     { "(bad)", { XX } },
3430     { "(bad)", { XX } },
3431   }
3432 };
3433
3434 #define INTERNAL_DISASSEMBLER_ERROR "<internal disassembler error>"
3435
3436 static void
3437 ckprefix (void)
3438 {
3439   int newrex;
3440   rex = 0;
3441   prefixes = 0;
3442   used_prefixes = 0;
3443   rex_used = 0;
3444   while (1)
3445     {
3446       fetch_data(the_info, codep + 1);
3447       newrex = 0;
3448       switch (*codep)
3449         {
3450         /* REX prefixes family.  */
3451         case 0x40:
3452         case 0x41:
3453         case 0x42:
3454         case 0x43:
3455         case 0x44:
3456         case 0x45:
3457         case 0x46:
3458         case 0x47:
3459         case 0x48:
3460         case 0x49:
3461         case 0x4a:
3462         case 0x4b:
3463         case 0x4c:
3464         case 0x4d:
3465         case 0x4e:
3466         case 0x4f:
3467             if (address_mode == mode_64bit)
3468               newrex = *codep;
3469             else
3470               return;
3471           break;
3472         case 0xf3:
3473           prefixes |= PREFIX_REPZ;
3474           break;
3475         case 0xf2:
3476           prefixes |= PREFIX_REPNZ;
3477           break;
3478         case 0xf0:
3479           prefixes |= PREFIX_LOCK;
3480           break;
3481         case 0x2e:
3482           prefixes |= PREFIX_CS;
3483           break;
3484         case 0x36:
3485           prefixes |= PREFIX_SS;
3486           break;
3487         case 0x3e:
3488           prefixes |= PREFIX_DS;
3489           break;
3490         case 0x26:
3491           prefixes |= PREFIX_ES;
3492           break;
3493         case 0x64:
3494           prefixes |= PREFIX_FS;
3495           break;
3496         case 0x65:
3497           prefixes |= PREFIX_GS;
3498           break;
3499         case 0x66:
3500           prefixes |= PREFIX_DATA;
3501           break;
3502         case 0x67:
3503           prefixes |= PREFIX_ADDR;
3504           break;
3505         case FWAIT_OPCODE:
3506           /* fwait is really an instruction.  If there are prefixes
3507              before the fwait, they belong to the fwait, *not* to the
3508              following instruction.  */
3509           if (prefixes || rex)
3510             {
3511               prefixes |= PREFIX_FWAIT;
3512               codep++;
3513               return;
3514             }
3515           prefixes = PREFIX_FWAIT;
3516           break;
3517         default:
3518           return;
3519         }
3520       /* Rex is ignored when followed by another prefix.  */
3521       if (rex)
3522         {
3523           rex_used = rex;
3524           return;
3525         }
3526       rex = newrex;
3527       codep++;
3528     }
3529 }
3530
3531 static void
3532 ckvexprefix (void)
3533 {
3534     int op, vex2, vex3, newrex = 0, newpfx = prefixes;
3535
3536     if (address_mode == mode_16bit) {
3537         return;
3538     }
3539
3540     fetch_data(the_info, codep + 1);
3541     op = *codep;
3542
3543     if (op != 0xc4 && op != 0xc5) {
3544         return;
3545     }
3546
3547     fetch_data(the_info, codep + 2);
3548     vex2 = codep[1];
3549
3550     if (address_mode == mode_32bit && (vex2 & 0xc0) != 0xc0) {
3551         return;
3552     }
3553
3554     if (op == 0xc4) {
3555         /* Three byte VEX prefix.  */
3556         fetch_data(the_info, codep + 3);
3557         vex3 = codep[2];
3558
3559         newrex |= (vex2 & 0x80 ? 0 : REX_R);
3560         newrex |= (vex2 & 0x40 ? 0 : REX_X);
3561         newrex |= (vex2 & 0x20 ? 0 : REX_B);
3562         newrex |= (vex3 & 0x80 ? REX_W : 0);
3563         switch (vex2 & 0x1f) {      /* VEX.m-mmmm */
3564         case 1:
3565             newpfx |= PREFIX_VEX_0F;
3566             break;
3567         case 2:
3568             newpfx |= PREFIX_VEX_0F | PREFIX_VEX_0F38;
3569             break;
3570         case 3:
3571             newpfx |= PREFIX_VEX_0F | PREFIX_VEX_0F3A;
3572             break;
3573         }
3574         vex2 = vex3;
3575         codep += 3;
3576     } else {
3577         /* Two byte VEX prefix.  */
3578         newrex |= (vex2 & 0x80 ? 0 : REX_R);
3579         newpfx |= PREFIX_VEX_0F;
3580         codep += 2;
3581     }
3582
3583     vex_reg = (~vex2 >> 3) & 15;     /* VEX.vvvv */
3584     switch (vex2 & 3) {              /* VEX.pp */
3585     case 1:
3586         newpfx |= PREFIX_DATA;     /* 0x66 */
3587         break;
3588     case 2:
3589         newpfx |= PREFIX_REPZ;     /* 0xf3 */
3590         break;
3591     case 3:
3592         newpfx |= PREFIX_REPNZ;    /* 0xf2 */
3593         break;
3594     }
3595
3596     rex = newrex;
3597     prefixes = newpfx;
3598 }
3599
3600 /* Return the name of the prefix byte PREF, or NULL if PREF is not a
3601    prefix byte.  */
3602
3603 static const char *
3604 prefix_name (int pref, int sizeflag)
3605 {
3606   static const char * const rexes [16] =
3607     {
3608       "rex",            /* 0x40 */
3609       "rex.B",          /* 0x41 */
3610       "rex.X",          /* 0x42 */
3611       "rex.XB",         /* 0x43 */
3612       "rex.R",          /* 0x44 */
3613       "rex.RB",         /* 0x45 */
3614       "rex.RX",         /* 0x46 */
3615       "rex.RXB",        /* 0x47 */
3616       "rex.W",          /* 0x48 */
3617       "rex.WB",         /* 0x49 */
3618       "rex.WX",         /* 0x4a */
3619       "rex.WXB",        /* 0x4b */
3620       "rex.WR",         /* 0x4c */
3621       "rex.WRB",        /* 0x4d */
3622       "rex.WRX",        /* 0x4e */
3623       "rex.WRXB",       /* 0x4f */
3624     };
3625
3626   switch (pref)
3627     {
3628     /* REX prefixes family.  */
3629     case 0x40:
3630     case 0x41:
3631     case 0x42:
3632     case 0x43:
3633     case 0x44:
3634     case 0x45:
3635     case 0x46:
3636     case 0x47:
3637     case 0x48:
3638     case 0x49:
3639     case 0x4a:
3640     case 0x4b:
3641     case 0x4c:
3642     case 0x4d:
3643     case 0x4e:
3644     case 0x4f:
3645       return rexes [pref - 0x40];
3646     case 0xf3:
3647       return "repz";
3648     case 0xf2:
3649       return "repnz";
3650     case 0xf0:
3651       return "lock";
3652     case 0x2e:
3653       return "cs";
3654     case 0x36:
3655       return "ss";
3656     case 0x3e:
3657       return "ds";
3658     case 0x26:
3659       return "es";
3660     case 0x64:
3661       return "fs";
3662     case 0x65:
3663       return "gs";
3664     case 0x66:
3665       return (sizeflag & DFLAG) ? "data16" : "data32";
3666     case 0x67:
3667       if (address_mode == mode_64bit)
3668         return (sizeflag & AFLAG) ? "addr32" : "addr64";
3669       else
3670         return (sizeflag & AFLAG) ? "addr16" : "addr32";
3671     case FWAIT_OPCODE:
3672       return "fwait";
3673     default:
3674       return NULL;
3675     }
3676 }
3677
3678 static char op_out[MAX_OPERANDS][100];
3679 static int op_ad, op_index[MAX_OPERANDS];
3680 static int two_source_ops;
3681 static bfd_vma op_address[MAX_OPERANDS];
3682 static bfd_vma op_riprel[MAX_OPERANDS];
3683 static bfd_vma start_pc;
3684
3685 /*
3686  *   On the 386's of 1988, the maximum length of an instruction is 15 bytes.
3687  *   (see topic "Redundant prefixes" in the "Differences from 8086"
3688  *   section of the "Virtual 8086 Mode" chapter.)
3689  * 'pc' should be the address of this instruction, it will
3690  *   be used to print the target address if this is a relative jump or call
3691  * The function returns the length of this instruction in bytes.
3692  */
3693
3694 static char intel_syntax;
3695 static char open_char;
3696 static char close_char;
3697 static char separator_char;
3698 static char scale_char;
3699
3700 int
3701 print_insn_i386 (bfd_vma pc, disassemble_info *info)
3702 {
3703   intel_syntax = -1;
3704
3705   return print_insn (pc, info);
3706 }
3707
3708 static int
3709 print_insn (bfd_vma pc, disassemble_info *info)
3710 {
3711   const struct dis386 *dp;
3712   int i;
3713   char *op_txt[MAX_OPERANDS];
3714   int needcomma;
3715   unsigned char uses_DATA_prefix, uses_LOCK_prefix;
3716   unsigned char uses_REPNZ_prefix, uses_REPZ_prefix;
3717   int sizeflag;
3718   const char *p;
3719   struct dis_private priv;
3720   unsigned char op;
3721   unsigned char threebyte;
3722
3723   if (info->mach == bfd_mach_x86_64_intel_syntax
3724       || info->mach == bfd_mach_x86_64)
3725     address_mode = mode_64bit;
3726   else
3727     address_mode = mode_32bit;
3728
3729   if (intel_syntax == (char) -1)
3730     intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax
3731                     || info->mach == bfd_mach_x86_64_intel_syntax);
3732
3733   if (info->mach == bfd_mach_i386_i386
3734       || info->mach == bfd_mach_x86_64
3735       || info->mach == bfd_mach_i386_i386_intel_syntax
3736       || info->mach == bfd_mach_x86_64_intel_syntax)
3737     priv.orig_sizeflag = AFLAG | DFLAG;
3738   else if (info->mach == bfd_mach_i386_i8086)
3739     priv.orig_sizeflag = 0;
3740   else
3741     abort ();
3742
3743   for (p = info->disassembler_options; p != NULL; )
3744     {
3745       if (strncmp (p, "x86-64", 6) == 0)
3746         {
3747           address_mode = mode_64bit;
3748           priv.orig_sizeflag = AFLAG | DFLAG;
3749         }
3750       else if (strncmp (p, "i386", 4) == 0)
3751         {
3752           address_mode = mode_32bit;
3753           priv.orig_sizeflag = AFLAG | DFLAG;
3754         }
3755       else if (strncmp (p, "i8086", 5) == 0)
3756         {
3757           address_mode = mode_16bit;
3758           priv.orig_sizeflag = 0;
3759         }
3760       else if (strncmp (p, "intel", 5) == 0)
3761         {
3762           intel_syntax = 1;
3763         }
3764       else if (strncmp (p, "att", 3) == 0)
3765         {
3766           intel_syntax = 0;
3767         }
3768       else if (strncmp (p, "addr", 4) == 0)
3769         {
3770           if (address_mode == mode_64bit)
3771             {
3772               if (p[4] == '3' && p[5] == '2')
3773                 priv.orig_sizeflag &= ~AFLAG;
3774               else if (p[4] == '6' && p[5] == '4')
3775                 priv.orig_sizeflag |= AFLAG;
3776             }
3777           else
3778             {
3779               if (p[4] == '1' && p[5] == '6')
3780                 priv.orig_sizeflag &= ~AFLAG;
3781               else if (p[4] == '3' && p[5] == '2')
3782                 priv.orig_sizeflag |= AFLAG;
3783             }
3784         }
3785       else if (strncmp (p, "data", 4) == 0)
3786         {
3787           if (p[4] == '1' && p[5] == '6')
3788             priv.orig_sizeflag &= ~DFLAG;
3789           else if (p[4] == '3' && p[5] == '2')
3790             priv.orig_sizeflag |= DFLAG;
3791         }
3792       else if (strncmp (p, "suffix", 6) == 0)
3793         priv.orig_sizeflag |= SUFFIX_ALWAYS;
3794
3795       p = strchr (p, ',');
3796       if (p != NULL)
3797         p++;
3798     }
3799
3800   if (intel_syntax)
3801     {
3802       names64 = intel_names64;
3803       names32 = intel_names32;
3804       names16 = intel_names16;
3805       names8 = intel_names8;
3806       names8rex = intel_names8rex;
3807       names_seg = intel_names_seg;
3808       index16 = intel_index16;
3809       open_char = '[';
3810       close_char = ']';
3811       separator_char = '+';
3812       scale_char = '*';
3813     }
3814   else
3815     {
3816       names64 = att_names64;
3817       names32 = att_names32;
3818       names16 = att_names16;
3819       names8 = att_names8;
3820       names8rex = att_names8rex;
3821       names_seg = att_names_seg;
3822       index16 = att_index16;
3823       open_char = '(';
3824       close_char =  ')';
3825       separator_char = ',';
3826       scale_char = ',';
3827     }
3828
3829   /* The output looks better if we put 7 bytes on a line, since that
3830      puts most long word instructions on a single line.  */
3831   info->bytes_per_line = 7;
3832
3833   info->private_data = &priv;
3834   priv.max_fetched = priv.the_buffer;
3835   priv.insn_start = pc;
3836
3837   obuf[0] = 0;
3838   for (i = 0; i < MAX_OPERANDS; ++i)
3839     {
3840       op_out[i][0] = 0;
3841       op_index[i] = -1;
3842     }
3843
3844   the_info = info;
3845   start_pc = pc;
3846   start_codep = priv.the_buffer;
3847   codep = priv.the_buffer;
3848
3849   if (sigsetjmp(priv.bailout, 0) != 0)
3850     {
3851       const char *name;
3852
3853       /* Getting here means we tried for data but didn't get it.  That
3854          means we have an incomplete instruction of some sort.  Just
3855          print the first byte as a prefix or a .byte pseudo-op.  */
3856       if (codep > priv.the_buffer)
3857         {
3858           name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
3859           if (name != NULL)
3860             (*info->fprintf_func) (info->stream, "%s", name);
3861           else
3862             {
3863               /* Just print the first byte as a .byte instruction.  */
3864               (*info->fprintf_func) (info->stream, ".byte 0x%x",
3865                                      (unsigned int) priv.the_buffer[0]);
3866             }
3867
3868           return 1;
3869         }
3870
3871       return -1;
3872     }
3873
3874   obufp = obuf;
3875   ckprefix ();
3876   ckvexprefix ();
3877
3878   insn_codep = codep;
3879   sizeflag = priv.orig_sizeflag;
3880
3881   fetch_data(info, codep + 1);
3882   two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
3883
3884   if (((prefixes & PREFIX_FWAIT)
3885        && ((*codep < 0xd8) || (*codep > 0xdf)))
3886       || (rex && rex_used))
3887     {
3888       const char *name;
3889
3890       /* fwait not followed by floating point instruction, or rex followed
3891          by other prefixes.  Print the first prefix.  */
3892       name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
3893       if (name == NULL)
3894         name = INTERNAL_DISASSEMBLER_ERROR;
3895       (*info->fprintf_func) (info->stream, "%s", name);
3896       return 1;
3897     }
3898
3899   op = 0;
3900   if (prefixes & PREFIX_VEX_0F)
3901     {
3902       used_prefixes |= PREFIX_VEX_0F | PREFIX_VEX_0F38 | PREFIX_VEX_0F3A;
3903       if (prefixes & PREFIX_VEX_0F38)
3904         threebyte = 0x38;
3905       else if (prefixes & PREFIX_VEX_0F3A)
3906         threebyte = 0x3a;
3907       else
3908         threebyte = *codep++;
3909       goto vex_opcode;
3910     }
3911   if (*codep == 0x0f)
3912     {
3913       fetch_data(info, codep + 2);
3914       threebyte = codep[1];
3915       codep += 2;
3916     vex_opcode:
3917       dp = &dis386_twobyte[threebyte];
3918       need_modrm = twobyte_has_modrm[threebyte];
3919       uses_DATA_prefix = twobyte_uses_DATA_prefix[threebyte];
3920       uses_REPNZ_prefix = twobyte_uses_REPNZ_prefix[threebyte];
3921       uses_REPZ_prefix = twobyte_uses_REPZ_prefix[threebyte];
3922       uses_LOCK_prefix = (threebyte & ~0x02) == 0x20;
3923       if (dp->name == NULL && dp->op[0].bytemode == IS_3BYTE_OPCODE)
3924         {
3925           fetch_data(info, codep + 2);
3926           op = *codep++;
3927           switch (threebyte)
3928             {
3929             case 0x38:
3930               uses_DATA_prefix = threebyte_0x38_uses_DATA_prefix[op];
3931               uses_REPNZ_prefix = threebyte_0x38_uses_REPNZ_prefix[op];
3932               uses_REPZ_prefix = threebyte_0x38_uses_REPZ_prefix[op];
3933               break;
3934             case 0x3a:
3935               uses_DATA_prefix = threebyte_0x3a_uses_DATA_prefix[op];
3936               uses_REPNZ_prefix = threebyte_0x3a_uses_REPNZ_prefix[op];
3937               uses_REPZ_prefix = threebyte_0x3a_uses_REPZ_prefix[op];
3938               break;
3939             default:
3940               break;
3941             }
3942         }
3943     }
3944   else
3945     {
3946       dp = &dis386[*codep];
3947       need_modrm = onebyte_has_modrm[*codep];
3948       uses_DATA_prefix = 0;
3949       uses_REPNZ_prefix = 0;
3950       /* pause is 0xf3 0x90.  */
3951       uses_REPZ_prefix = *codep == 0x90;
3952       uses_LOCK_prefix = 0;
3953       codep++;
3954     }
3955
3956   if (!uses_REPZ_prefix && (prefixes & PREFIX_REPZ))
3957     {
3958       oappend ("repz ");
3959       used_prefixes |= PREFIX_REPZ;
3960     }
3961   if (!uses_REPNZ_prefix && (prefixes & PREFIX_REPNZ))
3962     {
3963       oappend ("repnz ");
3964       used_prefixes |= PREFIX_REPNZ;
3965     }
3966
3967   if (!uses_LOCK_prefix && (prefixes & PREFIX_LOCK))
3968     {
3969       oappend ("lock ");
3970       used_prefixes |= PREFIX_LOCK;
3971     }
3972
3973   if (prefixes & PREFIX_ADDR)
3974     {
3975       sizeflag ^= AFLAG;
3976       if (dp->op[2].bytemode != loop_jcxz_mode || intel_syntax)
3977         {
3978           if ((sizeflag & AFLAG) || address_mode == mode_64bit)
3979             oappend ("addr32 ");
3980           else
3981             oappend ("addr16 ");
3982           used_prefixes |= PREFIX_ADDR;
3983         }
3984     }
3985
3986   if (!uses_DATA_prefix && (prefixes & PREFIX_DATA))
3987     {
3988       sizeflag ^= DFLAG;
3989       if (dp->op[2].bytemode == cond_jump_mode
3990           && dp->op[0].bytemode == v_mode
3991           && !intel_syntax)
3992         {
3993           if (sizeflag & DFLAG)
3994             oappend ("data32 ");
3995           else
3996             oappend ("data16 ");
3997           used_prefixes |= PREFIX_DATA;
3998         }
3999     }
4000
4001   if (dp->name == NULL && dp->op[0].bytemode == IS_3BYTE_OPCODE)
4002     {
4003       dp = &three_byte_table[dp->op[1].bytemode][op];
4004       modrm.mod = (*codep >> 6) & 3;
4005       modrm.reg = (*codep >> 3) & 7;
4006       modrm.rm = *codep & 7;
4007     }
4008   else if (need_modrm)
4009     {
4010       fetch_data(info, codep + 1);
4011       modrm.mod = (*codep >> 6) & 3;
4012       modrm.reg = (*codep >> 3) & 7;
4013       modrm.rm = *codep & 7;
4014     }
4015
4016   if (dp->name == NULL && dp->op[0].bytemode == FLOATCODE)
4017     {
4018       dofloat (sizeflag);
4019     }
4020   else
4021     {
4022       int index;
4023       if (dp->name == NULL)
4024         {
4025           switch (dp->op[0].bytemode)
4026             {
4027             case USE_GROUPS:
4028               dp = &grps[dp->op[1].bytemode][modrm.reg];
4029               break;
4030
4031             case USE_PREFIX_USER_TABLE:
4032               index = 0;
4033               used_prefixes |= (prefixes & PREFIX_REPZ);
4034               if (prefixes & PREFIX_REPZ)
4035                 index = 1;
4036               else
4037                 {
4038                   /* We should check PREFIX_REPNZ and PREFIX_REPZ
4039                      before PREFIX_DATA.  */
4040                   used_prefixes |= (prefixes & PREFIX_REPNZ);
4041                   if (prefixes & PREFIX_REPNZ)
4042                     index = 3;
4043                   else
4044                     {
4045                       used_prefixes |= (prefixes & PREFIX_DATA);
4046                       if (prefixes & PREFIX_DATA)
4047                         index = 2;
4048                     }
4049                 }
4050               dp = &prefix_user_table[dp->op[1].bytemode][index];
4051               break;
4052
4053             case X86_64_SPECIAL:
4054               index = address_mode == mode_64bit ? 1 : 0;
4055               dp = &x86_64_table[dp->op[1].bytemode][index];
4056               break;
4057
4058             default:
4059               oappend (INTERNAL_DISASSEMBLER_ERROR);
4060               break;
4061             }
4062         }
4063
4064       if (dp->name != NULL && putop (dp->name, sizeflag) == 0)
4065         {
4066           for (i = 0; i < MAX_OPERANDS; ++i)
4067             {
4068               obufp = op_out[i];
4069               op_ad = MAX_OPERANDS - 1 - i;
4070               if (dp->op[i].rtn)
4071                 (*dp->op[i].rtn) (dp->op[i].bytemode, sizeflag);
4072             }
4073         }
4074     }
4075
4076   /* See if any prefixes were not used.  If so, print the first one
4077      separately.  If we don't do this, we'll wind up printing an
4078      instruction stream which does not precisely correspond to the
4079      bytes we are disassembling.  */
4080   if ((prefixes & ~used_prefixes) != 0)
4081     {
4082       const char *name;
4083
4084       name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
4085       if (name == NULL)
4086         name = INTERNAL_DISASSEMBLER_ERROR;
4087       (*info->fprintf_func) (info->stream, "%s", name);
4088       return 1;
4089     }
4090   if (rex & ~rex_used)
4091     {
4092       const char *name;
4093       name = prefix_name (rex | 0x40, priv.orig_sizeflag);
4094       if (name == NULL)
4095         name = INTERNAL_DISASSEMBLER_ERROR;
4096       (*info->fprintf_func) (info->stream, "%s ", name);
4097     }
4098
4099   obufp = obuf + strlen (obuf);
4100   for (i = strlen (obuf); i < 6; i++)
4101     oappend (" ");
4102   oappend (" ");
4103   (*info->fprintf_func) (info->stream, "%s", obuf);
4104
4105   /* The enter and bound instructions are printed with operands in the same
4106      order as the intel book; everything else is printed in reverse order.  */
4107   if (intel_syntax || two_source_ops)
4108     {
4109       bfd_vma riprel;
4110
4111       for (i = 0; i < MAX_OPERANDS; ++i)
4112         op_txt[i] = op_out[i];
4113
4114       for (i = 0; i < (MAX_OPERANDS >> 1); ++i)
4115         {
4116           op_ad = op_index[i];
4117           op_index[i] = op_index[MAX_OPERANDS - 1 - i];
4118           op_index[MAX_OPERANDS - 1 - i] = op_ad;
4119           riprel = op_riprel[i];
4120           op_riprel[i] = op_riprel [MAX_OPERANDS - 1 - i];
4121           op_riprel[MAX_OPERANDS - 1 - i] = riprel;
4122         }
4123     }
4124   else
4125     {
4126       for (i = 0; i < MAX_OPERANDS; ++i)
4127         op_txt[MAX_OPERANDS - 1 - i] = op_out[i];
4128     }
4129
4130   needcomma = 0;
4131   for (i = 0; i < MAX_OPERANDS; ++i)
4132     if (*op_txt[i])
4133       {
4134         if (needcomma)
4135           (*info->fprintf_func) (info->stream, ",");
4136         if (op_index[i] != -1 && !op_riprel[i])
4137           (*info->print_address_func) ((bfd_vma) op_address[op_index[i]], info);
4138         else
4139           (*info->fprintf_func) (info->stream, "%s", op_txt[i]);
4140         needcomma = 1;
4141       }
4142
4143   for (i = 0; i < MAX_OPERANDS; i++)
4144     if (op_index[i] != -1 && op_riprel[i])
4145       {
4146         (*info->fprintf_func) (info->stream, "        # ");
4147         (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
4148                                                 + op_address[op_index[i]]), info);
4149         break;
4150       }
4151   return codep - priv.the_buffer;
4152 }
4153
4154 static const char *float_mem[] = {
4155   /* d8 */
4156   "fadd{s||s|}",
4157   "fmul{s||s|}",
4158   "fcom{s||s|}",
4159   "fcomp{s||s|}",
4160   "fsub{s||s|}",
4161   "fsubr{s||s|}",
4162   "fdiv{s||s|}",
4163   "fdivr{s||s|}",
4164   /* d9 */
4165   "fld{s||s|}",
4166   "(bad)",
4167   "fst{s||s|}",
4168   "fstp{s||s|}",
4169   "fldenvIC",
4170   "fldcw",
4171   "fNstenvIC",
4172   "fNstcw",
4173   /* da */
4174   "fiadd{l||l|}",
4175   "fimul{l||l|}",
4176   "ficom{l||l|}",
4177   "ficomp{l||l|}",
4178   "fisub{l||l|}",
4179   "fisubr{l||l|}",
4180   "fidiv{l||l|}",
4181   "fidivr{l||l|}",
4182   /* db */
4183   "fild{l||l|}",
4184   "fisttp{l||l|}",
4185   "fist{l||l|}",
4186   "fistp{l||l|}",
4187   "(bad)",
4188   "fld{t||t|}",
4189   "(bad)",
4190   "fstp{t||t|}",
4191   /* dc */
4192   "fadd{l||l|}",
4193   "fmul{l||l|}",
4194   "fcom{l||l|}",
4195   "fcomp{l||l|}",
4196   "fsub{l||l|}",
4197   "fsubr{l||l|}",
4198   "fdiv{l||l|}",
4199   "fdivr{l||l|}",
4200   /* dd */
4201   "fld{l||l|}",
4202   "fisttp{ll||ll|}",
4203   "fst{l||l|}",
4204   "fstp{l||l|}",
4205   "frstorIC",
4206   "(bad)",
4207   "fNsaveIC",
4208   "fNstsw",
4209   /* de */
4210   "fiadd",
4211   "fimul",
4212   "ficom",
4213   "ficomp",
4214   "fisub",
4215   "fisubr",
4216   "fidiv",
4217   "fidivr",
4218   /* df */
4219   "fild",
4220   "fisttp",
4221   "fist",
4222   "fistp",
4223   "fbld",
4224   "fild{ll||ll|}",
4225   "fbstp",
4226   "fistp{ll||ll|}",
4227 };
4228
4229 static const unsigned char float_mem_mode[] = {
4230   /* d8 */
4231   d_mode,
4232   d_mode,
4233   d_mode,
4234   d_mode,
4235   d_mode,
4236   d_mode,
4237   d_mode,
4238   d_mode,
4239   /* d9 */
4240   d_mode,
4241   0,
4242   d_mode,
4243   d_mode,
4244   0,
4245   w_mode,
4246   0,
4247   w_mode,
4248   /* da */
4249   d_mode,
4250   d_mode,
4251   d_mode,
4252   d_mode,
4253   d_mode,
4254   d_mode,
4255   d_mode,
4256   d_mode,
4257   /* db */
4258   d_mode,
4259   d_mode,
4260   d_mode,
4261   d_mode,
4262   0,
4263   t_mode,
4264   0,
4265   t_mode,
4266   /* dc */
4267   q_mode,
4268   q_mode,
4269   q_mode,
4270   q_mode,
4271   q_mode,
4272   q_mode,
4273   q_mode,
4274   q_mode,
4275   /* dd */
4276   q_mode,
4277   q_mode,
4278   q_mode,
4279   q_mode,
4280   0,
4281   0,
4282   0,
4283   w_mode,
4284   /* de */
4285   w_mode,
4286   w_mode,
4287   w_mode,
4288   w_mode,
4289   w_mode,
4290   w_mode,
4291   w_mode,
4292   w_mode,
4293   /* df */
4294   w_mode,
4295   w_mode,
4296   w_mode,
4297   w_mode,
4298   t_mode,
4299   q_mode,
4300   t_mode,
4301   q_mode
4302 };
4303
4304 #define ST { OP_ST, 0 }
4305 #define STi { OP_STi, 0 }
4306
4307 #define FGRPd9_2 NULL, { { NULL, 0 } }
4308 #define FGRPd9_4 NULL, { { NULL, 1 } }
4309 #define FGRPd9_5 NULL, { { NULL, 2 } }
4310 #define FGRPd9_6 NULL, { { NULL, 3 } }
4311 #define FGRPd9_7 NULL, { { NULL, 4 } }
4312 #define FGRPda_5 NULL, { { NULL, 5 } }
4313 #define FGRPdb_4 NULL, { { NULL, 6 } }
4314 #define FGRPde_3 NULL, { { NULL, 7 } }
4315 #define FGRPdf_4 NULL, { { NULL, 8 } }
4316
4317 static const struct dis386 float_reg[][8] = {
4318   /* d8 */
4319   {
4320     { "fadd",   { ST, STi } },
4321     { "fmul",   { ST, STi } },
4322     { "fcom",   { STi } },
4323     { "fcomp",  { STi } },
4324     { "fsub",   { ST, STi } },
4325     { "fsubr",  { ST, STi } },
4326     { "fdiv",   { ST, STi } },
4327     { "fdivr",  { ST, STi } },
4328   },
4329   /* d9 */
4330   {
4331     { "fld",    { STi } },
4332     { "fxch",   { STi } },
4333     { FGRPd9_2 },
4334     { "(bad)",  { XX } },
4335     { FGRPd9_4 },
4336     { FGRPd9_5 },
4337     { FGRPd9_6 },
4338     { FGRPd9_7 },
4339   },
4340   /* da */
4341   {
4342     { "fcmovb", { ST, STi } },
4343     { "fcmove", { ST, STi } },
4344     { "fcmovbe",{ ST, STi } },
4345     { "fcmovu", { ST, STi } },
4346     { "(bad)",  { XX } },
4347     { FGRPda_5 },
4348     { "(bad)",  { XX } },
4349     { "(bad)",  { XX } },
4350   },
4351   /* db */
4352   {
4353     { "fcmovnb",{ ST, STi } },
4354     { "fcmovne",{ ST, STi } },
4355     { "fcmovnbe",{ ST, STi } },
4356     { "fcmovnu",{ ST, STi } },
4357     { FGRPdb_4 },
4358     { "fucomi", { ST, STi } },
4359     { "fcomi",  { ST, STi } },
4360     { "(bad)",  { XX } },
4361   },
4362   /* dc */
4363   {
4364     { "fadd",   { STi, ST } },
4365     { "fmul",   { STi, ST } },
4366     { "(bad)",  { XX } },
4367     { "(bad)",  { XX } },
4368 #if SYSV386_COMPAT
4369     { "fsub",   { STi, ST } },
4370     { "fsubr",  { STi, ST } },
4371     { "fdiv",   { STi, ST } },
4372     { "fdivr",  { STi, ST } },
4373 #else
4374     { "fsubr",  { STi, ST } },
4375     { "fsub",   { STi, ST } },
4376     { "fdivr",  { STi, ST } },
4377     { "fdiv",   { STi, ST } },
4378 #endif
4379   },
4380   /* dd */
4381   {
4382     { "ffree",  { STi } },
4383     { "(bad)",  { XX } },
4384     { "fst",    { STi } },
4385     { "fstp",   { STi } },
4386     { "fucom",  { STi } },
4387     { "fucomp", { STi } },
4388     { "(bad)",  { XX } },
4389     { "(bad)",  { XX } },
4390   },
4391   /* de */
4392   {
4393     { "faddp",  { STi, ST } },
4394     { "fmulp",  { STi, ST } },
4395     { "(bad)",  { XX } },
4396     { FGRPde_3 },
4397 #if SYSV386_COMPAT
4398     { "fsubp",  { STi, ST } },
4399     { "fsubrp", { STi, ST } },
4400     { "fdivp",  { STi, ST } },
4401     { "fdivrp", { STi, ST } },
4402 #else
4403     { "fsubrp", { STi, ST } },
4404     { "fsubp",  { STi, ST } },
4405     { "fdivrp", { STi, ST } },
4406     { "fdivp",  { STi, ST } },
4407 #endif
4408   },
4409   /* df */
4410   {
4411     { "ffreep", { STi } },
4412     { "(bad)",  { XX } },
4413     { "(bad)",  { XX } },
4414     { "(bad)",  { XX } },
4415     { FGRPdf_4 },
4416     { "fucomip", { ST, STi } },
4417     { "fcomip", { ST, STi } },
4418     { "(bad)",  { XX } },
4419   },
4420 };
4421
4422 static const char *fgrps[][8] = {
4423   /* d9_2  0 */
4424   {
4425     "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4426   },
4427
4428   /* d9_4  1 */
4429   {
4430     "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
4431   },
4432
4433   /* d9_5  2 */
4434   {
4435     "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
4436   },
4437
4438   /* d9_6  3 */
4439   {
4440     "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
4441   },
4442
4443   /* d9_7  4 */
4444   {
4445     "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
4446   },
4447
4448   /* da_5  5 */
4449   {
4450     "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4451   },
4452
4453   /* db_4  6 */
4454   {
4455     "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
4456     "fNsetpm(287 only)","(bad)","(bad)","(bad)",
4457   },
4458
4459   /* de_3  7 */
4460   {
4461     "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4462   },
4463
4464   /* df_4  8 */
4465   {
4466     "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4467   },
4468 };
4469
4470 static void
4471 dofloat (int sizeflag)
4472 {
4473   const struct dis386 *dp;
4474   unsigned char floatop;
4475
4476   floatop = codep[-1];
4477
4478   if (modrm.mod != 3)
4479     {
4480       int fp_indx = (floatop - 0xd8) * 8 + modrm.reg;
4481
4482       putop (float_mem[fp_indx], sizeflag);
4483       obufp = op_out[0];
4484       op_ad = 2;
4485       OP_E (float_mem_mode[fp_indx], sizeflag);
4486       return;
4487     }
4488   /* Skip mod/rm byte.  */
4489   MODRM_CHECK;
4490   codep++;
4491
4492   dp = &float_reg[floatop - 0xd8][modrm.reg];
4493   if (dp->name == NULL)
4494     {
4495       putop (fgrps[dp->op[0].bytemode][modrm.rm], sizeflag);
4496
4497       /* Instruction fnstsw is only one with strange arg.  */
4498       if (floatop == 0xdf && codep[-1] == 0xe0)
4499         pstrcpy (op_out[0], sizeof(op_out[0]), names16[0]);
4500     }
4501   else
4502     {
4503       putop (dp->name, sizeflag);
4504
4505       obufp = op_out[0];
4506       op_ad = 2;
4507       if (dp->op[0].rtn)
4508         (*dp->op[0].rtn) (dp->op[0].bytemode, sizeflag);
4509
4510       obufp = op_out[1];
4511       op_ad = 1;
4512       if (dp->op[1].rtn)
4513         (*dp->op[1].rtn) (dp->op[1].bytemode, sizeflag);
4514     }
4515 }
4516
4517 static void
4518 OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4519 {
4520   oappend ("%st" + intel_syntax);
4521 }
4522
4523 static void
4524 OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4525 {
4526   snprintf (scratchbuf, sizeof(scratchbuf), "%%st(%d)", modrm.rm);
4527   oappend (scratchbuf + intel_syntax);
4528 }
4529
4530 /* Capital letters in template are macros.  */
4531 static int
4532 putop (const char *template, int sizeflag)
4533 {
4534   const char *p;
4535   int alt = 0;
4536
4537   for (p = template; *p; p++)
4538     {
4539       switch (*p)
4540         {
4541         default:
4542           *obufp++ = *p;
4543           break;
4544         case '{':
4545           alt = 0;
4546           if (intel_syntax)
4547             alt += 1;
4548           if (address_mode == mode_64bit)
4549             alt += 2;
4550           while (alt != 0)
4551             {
4552               while (*++p != '|')
4553                 {
4554                   if (*p == '}')
4555                     {
4556                       /* Alternative not valid.  */
4557                       pstrcpy (obuf, sizeof(obuf), "(bad)");
4558                       obufp = obuf + 5;
4559                       return 1;
4560                     }
4561                   else if (*p == '\0')
4562                     abort ();
4563                 }
4564               alt--;
4565             }
4566           /* Fall through.  */
4567         case 'I':
4568           alt = 1;
4569           continue;
4570         case '|':
4571           while (*++p != '}')
4572             {
4573               if (*p == '\0')
4574                 abort ();
4575             }
4576           break;
4577         case '}':
4578           break;
4579         case 'A':
4580           if (intel_syntax)
4581             break;
4582           if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
4583             *obufp++ = 'b';
4584           break;
4585         case 'B':
4586           if (intel_syntax)
4587             break;
4588           if (sizeflag & SUFFIX_ALWAYS)
4589             *obufp++ = 'b';
4590           break;
4591         case 'C':
4592           if (intel_syntax && !alt)
4593             break;
4594           if ((prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS))
4595             {
4596               if (sizeflag & DFLAG)
4597                 *obufp++ = intel_syntax ? 'd' : 'l';
4598               else
4599                 *obufp++ = intel_syntax ? 'w' : 's';
4600               used_prefixes |= (prefixes & PREFIX_DATA);
4601             }
4602           break;
4603         case 'D':
4604           if (intel_syntax || !(sizeflag & SUFFIX_ALWAYS))
4605             break;
4606           USED_REX (REX_W);
4607           if (modrm.mod == 3)
4608             {
4609               if (rex & REX_W)
4610                 *obufp++ = 'q';
4611               else if (sizeflag & DFLAG)
4612                 *obufp++ = intel_syntax ? 'd' : 'l';
4613               else
4614                 *obufp++ = 'w';
4615               used_prefixes |= (prefixes & PREFIX_DATA);
4616             }
4617           else
4618             *obufp++ = 'w';
4619           break;
4620         case 'E':               /* For jcxz/jecxz */
4621           if (address_mode == mode_64bit)
4622             {
4623               if (sizeflag & AFLAG)
4624                 *obufp++ = 'r';
4625               else
4626                 *obufp++ = 'e';
4627             }
4628           else
4629             if (sizeflag & AFLAG)
4630               *obufp++ = 'e';
4631           used_prefixes |= (prefixes & PREFIX_ADDR);
4632           break;
4633         case 'F':
4634           if (intel_syntax)
4635             break;
4636           if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
4637             {
4638               if (sizeflag & AFLAG)
4639                 *obufp++ = address_mode == mode_64bit ? 'q' : 'l';
4640               else
4641                 *obufp++ = address_mode == mode_64bit ? 'l' : 'w';
4642               used_prefixes |= (prefixes & PREFIX_ADDR);
4643             }
4644           break;
4645         case 'G':
4646           if (intel_syntax || (obufp[-1] != 's' && !(sizeflag & SUFFIX_ALWAYS)))
4647             break;
4648           if ((rex & REX_W) || (sizeflag & DFLAG))
4649             *obufp++ = 'l';
4650           else
4651             *obufp++ = 'w';
4652           if (!(rex & REX_W))
4653             used_prefixes |= (prefixes & PREFIX_DATA);
4654           break;
4655         case 'H':
4656           if (intel_syntax)
4657             break;
4658           if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
4659               || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
4660             {
4661               used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
4662               *obufp++ = ',';
4663               *obufp++ = 'p';
4664               if (prefixes & PREFIX_DS)
4665                 *obufp++ = 't';
4666               else
4667                 *obufp++ = 'n';
4668             }
4669           break;
4670         case 'J':
4671           if (intel_syntax)
4672             break;
4673           *obufp++ = 'l';
4674           break;
4675         case 'K':
4676           USED_REX (REX_W);
4677           if (rex & REX_W)
4678             *obufp++ = 'q';
4679           else
4680             *obufp++ = 'd';
4681           break;
4682         case 'Z':
4683           if (intel_syntax)
4684             break;
4685           if (address_mode == mode_64bit && (sizeflag & SUFFIX_ALWAYS))
4686             {
4687               *obufp++ = 'q';
4688               break;
4689             }
4690           /* Fall through.  */
4691         case 'L':
4692           if (intel_syntax)
4693             break;
4694           if (sizeflag & SUFFIX_ALWAYS)
4695             *obufp++ = 'l';
4696           break;
4697         case 'N':
4698           if ((prefixes & PREFIX_FWAIT) == 0)
4699             *obufp++ = 'n';
4700           else
4701             used_prefixes |= PREFIX_FWAIT;
4702           break;
4703         case 'O':
4704           USED_REX (REX_W);
4705           if (rex & REX_W)
4706             *obufp++ = 'o';
4707           else if (intel_syntax && (sizeflag & DFLAG))
4708             *obufp++ = 'q';
4709           else
4710             *obufp++ = 'd';
4711           if (!(rex & REX_W))
4712             used_prefixes |= (prefixes & PREFIX_DATA);
4713           break;
4714         case 'T':
4715           if (intel_syntax)
4716             break;
4717           if (address_mode == mode_64bit && (sizeflag & DFLAG))
4718             {
4719               *obufp++ = 'q';
4720               break;
4721             }
4722           /* Fall through.  */
4723         case 'P':
4724           if (intel_syntax)
4725             break;
4726           if ((prefixes & PREFIX_DATA)
4727               || (rex & REX_W)
4728               || (sizeflag & SUFFIX_ALWAYS))
4729             {
4730               USED_REX (REX_W);
4731               if (rex & REX_W)
4732                 *obufp++ = 'q';
4733               else
4734                 {
4735                    if (sizeflag & DFLAG)
4736                       *obufp++ = 'l';
4737                    else
4738                      *obufp++ = 'w';
4739                 }
4740               used_prefixes |= (prefixes & PREFIX_DATA);
4741             }
4742           break;
4743         case 'U':
4744           if (intel_syntax)
4745             break;
4746           if (address_mode == mode_64bit && (sizeflag & DFLAG))
4747             {
4748               if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
4749                 *obufp++ = 'q';
4750               break;
4751             }
4752           /* Fall through.  */
4753         case 'Q':
4754           if (intel_syntax && !alt)
4755             break;
4756           USED_REX (REX_W);
4757           if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
4758             {
4759               if (rex & REX_W)
4760                 *obufp++ = 'q';
4761               else
4762                 {
4763                   if (sizeflag & DFLAG)
4764                     *obufp++ = intel_syntax ? 'd' : 'l';
4765                   else
4766                     *obufp++ = 'w';
4767                 }
4768               used_prefixes |= (prefixes & PREFIX_DATA);
4769             }
4770           break;
4771         case 'R':
4772           USED_REX (REX_W);
4773           if (rex & REX_W)
4774             *obufp++ = 'q';
4775           else if (sizeflag & DFLAG)
4776             {
4777               if (intel_syntax)
4778                   *obufp++ = 'd';
4779               else
4780                   *obufp++ = 'l';
4781             }
4782           else
4783             *obufp++ = 'w';
4784           if (intel_syntax && !p[1]
4785               && ((rex & REX_W) || (sizeflag & DFLAG)))
4786             *obufp++ = 'e';
4787           if (!(rex & REX_W))
4788             used_prefixes |= (prefixes & PREFIX_DATA);
4789           break;
4790         case 'V':
4791           if (intel_syntax)
4792             break;
4793           if (address_mode == mode_64bit && (sizeflag & DFLAG))
4794             {
4795               if (sizeflag & SUFFIX_ALWAYS)
4796                 *obufp++ = 'q';
4797               break;
4798             }
4799           /* Fall through.  */
4800         case 'S':
4801           if (intel_syntax)
4802             break;
4803           if (sizeflag & SUFFIX_ALWAYS)
4804             {
4805               if (rex & REX_W)
4806                 *obufp++ = 'q';
4807               else
4808                 {
4809                   if (sizeflag & DFLAG)
4810                     *obufp++ = 'l';
4811                   else
4812                     *obufp++ = 'w';
4813                   used_prefixes |= (prefixes & PREFIX_DATA);
4814                 }
4815             }
4816           break;
4817         case 'X':
4818           if (prefixes & PREFIX_DATA)
4819             *obufp++ = 'd';
4820           else
4821             *obufp++ = 's';
4822           used_prefixes |= (prefixes & PREFIX_DATA);
4823           break;
4824         case 'Y':
4825           if (intel_syntax)
4826             break;
4827           if (rex & REX_W)
4828             {
4829               USED_REX (REX_W);
4830               *obufp++ = 'q';
4831             }
4832           break;
4833           /* implicit operand size 'l' for i386 or 'q' for x86-64 */
4834         case 'W':
4835           /* operand size flag for cwtl, cbtw */
4836           USED_REX (REX_W);
4837           if (rex & REX_W)
4838             {
4839               if (intel_syntax)
4840                 *obufp++ = 'd';
4841               else
4842                 *obufp++ = 'l';
4843             }
4844           else if (sizeflag & DFLAG)
4845             *obufp++ = 'w';
4846           else
4847             *obufp++ = 'b';
4848           if (!(rex & REX_W))
4849             used_prefixes |= (prefixes & PREFIX_DATA);
4850           break;
4851         }
4852       alt = 0;
4853     }
4854   *obufp = 0;
4855   return 0;
4856 }
4857
4858 static void
4859 oappend (const char *s)
4860 {
4861   strcpy (obufp, s);
4862   obufp += strlen (s);
4863 }
4864
4865 static void
4866 append_seg (void)
4867 {
4868   if (prefixes & PREFIX_CS)
4869     {
4870       used_prefixes |= PREFIX_CS;
4871       oappend ("%cs:" + intel_syntax);
4872     }
4873   if (prefixes & PREFIX_DS)
4874     {
4875       used_prefixes |= PREFIX_DS;
4876       oappend ("%ds:" + intel_syntax);
4877     }
4878   if (prefixes & PREFIX_SS)
4879     {
4880       used_prefixes |= PREFIX_SS;
4881       oappend ("%ss:" + intel_syntax);
4882     }
4883   if (prefixes & PREFIX_ES)
4884     {
4885       used_prefixes |= PREFIX_ES;
4886       oappend ("%es:" + intel_syntax);
4887     }
4888   if (prefixes & PREFIX_FS)
4889     {
4890       used_prefixes |= PREFIX_FS;
4891       oappend ("%fs:" + intel_syntax);
4892     }
4893   if (prefixes & PREFIX_GS)
4894     {
4895       used_prefixes |= PREFIX_GS;
4896       oappend ("%gs:" + intel_syntax);
4897     }
4898 }
4899
4900 static void
4901 OP_indirE (int bytemode, int sizeflag)
4902 {
4903   if (!intel_syntax)
4904     oappend ("*");
4905   OP_E (bytemode, sizeflag);
4906 }
4907
4908 static void
4909 print_operand_value (char *buf, size_t bufsize, int hex, bfd_vma disp)
4910 {
4911   if (address_mode == mode_64bit)
4912     {
4913       if (hex)
4914         {
4915           char tmp[30];
4916           int i;
4917           buf[0] = '0';
4918           buf[1] = 'x';
4919           snprintf_vma (tmp, sizeof(tmp), disp);
4920           for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++) {
4921           }
4922           pstrcpy (buf + 2, bufsize - 2, tmp + i);
4923         }
4924       else
4925         {
4926           bfd_signed_vma v = disp;
4927           char tmp[30];
4928           int i;
4929           if (v < 0)
4930             {
4931               *(buf++) = '-';
4932               v = -disp;
4933               /* Check for possible overflow on 0x8000000000000000.  */
4934               if (v < 0)
4935                 {
4936                   pstrcpy (buf, bufsize, "9223372036854775808");
4937                   return;
4938                 }
4939             }
4940           if (!v)
4941             {
4942                 pstrcpy (buf, bufsize, "0");
4943               return;
4944             }
4945
4946           i = 0;
4947           tmp[29] = 0;
4948           while (v)
4949             {
4950               tmp[28 - i] = (v % 10) + '0';
4951               v /= 10;
4952               i++;
4953             }
4954           pstrcpy (buf, bufsize, tmp + 29 - i);
4955         }
4956     }
4957   else
4958     {
4959       if (hex)
4960         snprintf (buf, bufsize, "0x%x", (unsigned int) disp);
4961       else
4962         snprintf (buf, bufsize, "%d", (int) disp);
4963     }
4964 }
4965
4966 /* Put DISP in BUF as signed hex number.  */
4967
4968 static void
4969 print_displacement (char *buf, bfd_vma disp)
4970 {
4971   bfd_signed_vma val = disp;
4972   char tmp[30];
4973   int i, j = 0;
4974
4975   if (val < 0)
4976     {
4977       buf[j++] = '-';
4978       val = -disp;
4979
4980       /* Check for possible overflow.  */
4981       if (val < 0)
4982         {
4983           switch (address_mode)
4984             {
4985             case mode_64bit:
4986               strcpy (buf + j, "0x8000000000000000");
4987               break;
4988             case mode_32bit:
4989               strcpy (buf + j, "0x80000000");
4990               break;
4991             case mode_16bit:
4992               strcpy (buf + j, "0x8000");
4993               break;
4994             }
4995           return;
4996         }
4997     }
4998
4999   buf[j++] = '0';
5000   buf[j++] = 'x';
5001
5002   snprintf_vma (tmp, sizeof(tmp), val);
5003   for (i = 0; tmp[i] == '0'; i++)
5004     continue;
5005   if (tmp[i] == '\0')
5006     i--;
5007   strcpy (buf + j, tmp + i);
5008 }
5009
5010 static void
5011 intel_operand_size (int bytemode, int sizeflag)
5012 {
5013   switch (bytemode)
5014     {
5015     case b_mode:
5016     case dqb_mode:
5017       oappend ("BYTE PTR ");
5018       break;
5019     case w_mode:
5020     case dqw_mode:
5021       oappend ("WORD PTR ");
5022       break;
5023     case stack_v_mode:
5024       if (address_mode == mode_64bit && (sizeflag & DFLAG))
5025         {
5026           oappend ("QWORD PTR ");
5027           used_prefixes |= (prefixes & PREFIX_DATA);
5028           break;
5029         }
5030       /* FALLTHRU */
5031     case v_mode:
5032     case dq_mode:
5033       USED_REX (REX_W);
5034       if (rex & REX_W)
5035         oappend ("QWORD PTR ");
5036       else if ((sizeflag & DFLAG) || bytemode == dq_mode)
5037         oappend ("DWORD PTR ");
5038       else
5039         oappend ("WORD PTR ");
5040       used_prefixes |= (prefixes & PREFIX_DATA);
5041       break;
5042     case z_mode:
5043       if ((rex & REX_W) || (sizeflag & DFLAG))
5044         *obufp++ = 'D';
5045       oappend ("WORD PTR ");
5046       if (!(rex & REX_W))
5047         used_prefixes |= (prefixes & PREFIX_DATA);
5048       break;
5049     case d_mode:
5050     case dqd_mode:
5051       oappend ("DWORD PTR ");
5052       break;
5053     case q_mode:
5054       oappend ("QWORD PTR ");
5055       break;
5056     case m_mode:
5057       if (address_mode == mode_64bit)
5058         oappend ("QWORD PTR ");
5059       else
5060         oappend ("DWORD PTR ");
5061       break;
5062     case f_mode:
5063       if (sizeflag & DFLAG)
5064         oappend ("FWORD PTR ");
5065       else
5066         oappend ("DWORD PTR ");
5067       used_prefixes |= (prefixes & PREFIX_DATA);
5068       break;
5069     case t_mode:
5070       oappend ("TBYTE PTR ");
5071       break;
5072     case x_mode:
5073       oappend ("XMMWORD PTR ");
5074       break;
5075     case o_mode:
5076       oappend ("OWORD PTR ");
5077       break;
5078     default:
5079       break;
5080     }
5081 }
5082
5083 static void
5084 OP_E (int bytemode, int sizeflag)
5085 {
5086   bfd_vma disp;
5087   int add = 0;
5088   int riprel = 0;
5089   USED_REX (REX_B);
5090   if (rex & REX_B)
5091     add += 8;
5092
5093   /* Skip mod/rm byte.  */
5094   MODRM_CHECK;
5095   codep++;
5096
5097   if (modrm.mod == 3)
5098     {
5099       switch (bytemode)
5100         {
5101         case b_mode:
5102           USED_REX (0);
5103           if (rex)
5104             oappend (names8rex[modrm.rm + add]);
5105           else
5106             oappend (names8[modrm.rm + add]);
5107           break;
5108         case w_mode:
5109           oappend (names16[modrm.rm + add]);
5110           break;
5111         case d_mode:
5112           oappend (names32[modrm.rm + add]);
5113           break;
5114         case q_mode:
5115           oappend (names64[modrm.rm + add]);
5116           break;
5117         case m_mode:
5118           if (address_mode == mode_64bit)
5119             oappend (names64[modrm.rm + add]);
5120           else
5121             oappend (names32[modrm.rm + add]);
5122           break;
5123         case stack_v_mode:
5124           if (address_mode == mode_64bit && (sizeflag & DFLAG))
5125             {
5126               oappend (names64[modrm.rm + add]);
5127               used_prefixes |= (prefixes & PREFIX_DATA);
5128               break;
5129             }
5130           bytemode = v_mode;
5131           /* FALLTHRU */
5132         case v_mode:
5133         case dq_mode:
5134         case dqb_mode:
5135         case dqd_mode:
5136         case dqw_mode:
5137           USED_REX (REX_W);
5138           if (rex & REX_W)
5139             oappend (names64[modrm.rm + add]);
5140           else if ((sizeflag & DFLAG) || bytemode != v_mode)
5141             oappend (names32[modrm.rm + add]);
5142           else
5143             oappend (names16[modrm.rm + add]);
5144           used_prefixes |= (prefixes & PREFIX_DATA);
5145           break;
5146         case 0:
5147           break;
5148         default:
5149           oappend (INTERNAL_DISASSEMBLER_ERROR);
5150           break;
5151         }
5152       return;
5153     }
5154
5155   disp = 0;
5156   if (intel_syntax)
5157     intel_operand_size (bytemode, sizeflag);
5158   append_seg ();
5159
5160   if ((sizeflag & AFLAG) || address_mode == mode_64bit)
5161     {
5162       /* 32/64 bit address mode */
5163       int havedisp;
5164       int havesib;
5165       int havebase;
5166       int base;
5167       int index = 0;
5168       int scale = 0;
5169
5170       havesib = 0;
5171       havebase = 1;
5172       base = modrm.rm;
5173
5174       if (base == 4)
5175         {
5176           havesib = 1;
5177           fetch_data(the_info, codep + 1);
5178           index = (*codep >> 3) & 7;
5179           if (address_mode == mode_64bit || index != 0x4)
5180             /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored.  */
5181             scale = (*codep >> 6) & 3;
5182           base = *codep & 7;
5183           USED_REX (REX_X);
5184           if (rex & REX_X)
5185             index += 8;
5186           codep++;
5187         }
5188       base += add;
5189
5190       switch (modrm.mod)
5191         {
5192         case 0:
5193           if ((base & 7) == 5)
5194             {
5195               havebase = 0;
5196               if (address_mode == mode_64bit && !havesib)
5197                 riprel = 1;
5198               disp = get32s ();
5199             }
5200           break;
5201         case 1:
5202           fetch_data (the_info, codep + 1);
5203           disp = *codep++;
5204           if ((disp & 0x80) != 0)
5205             disp -= 0x100;
5206           break;
5207         case 2:
5208           disp = get32s ();
5209           break;
5210         }
5211
5212       havedisp = havebase || (havesib && (index != 4 || scale != 0));
5213
5214       if (!intel_syntax)
5215         if (modrm.mod != 0 || (base & 7) == 5)
5216           {
5217             if (havedisp || riprel)
5218               print_displacement (scratchbuf, disp);
5219             else
5220               print_operand_value (scratchbuf, sizeof(scratchbuf), 1, disp);
5221             oappend (scratchbuf);
5222             if (riprel)
5223               {
5224                 set_op (disp, 1);
5225                 oappend ("(%rip)");
5226               }
5227           }
5228
5229       if (havedisp || (intel_syntax && riprel))
5230         {
5231           *obufp++ = open_char;
5232           if (intel_syntax && riprel)
5233             {
5234               set_op (disp, 1);
5235               oappend ("rip");
5236             }
5237           *obufp = '\0';
5238           if (havebase)
5239             oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
5240                      ? names64[base] : names32[base]);
5241           if (havesib)
5242             {
5243               if (index != 4)
5244                 {
5245                   if (!intel_syntax || havebase)
5246                     {
5247                       *obufp++ = separator_char;
5248                       *obufp = '\0';
5249                     }
5250                   oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
5251                            ? names64[index] : names32[index]);
5252                 }
5253               if (scale != 0 || (!intel_syntax && index != 4))
5254                 {
5255                   *obufp++ = scale_char;
5256                   *obufp = '\0';
5257                   snprintf (scratchbuf, sizeof(scratchbuf), "%d", 1 << scale);
5258                   oappend (scratchbuf);
5259                 }
5260             }
5261           if (intel_syntax
5262               && (disp || modrm.mod != 0 || (base & 7) == 5))
5263             {
5264               if ((bfd_signed_vma) disp >= 0)
5265                 {
5266                   *obufp++ = '+';
5267                   *obufp = '\0';
5268                 }
5269               else if (modrm.mod != 1)
5270                 {
5271                   *obufp++ = '-';
5272                   *obufp = '\0';
5273                   disp = - (bfd_signed_vma) disp;
5274                 }
5275
5276               print_displacement (scratchbuf, disp);
5277               oappend (scratchbuf);
5278             }
5279
5280           *obufp++ = close_char;
5281           *obufp = '\0';
5282         }
5283       else if (intel_syntax)
5284         {
5285           if (modrm.mod != 0 || (base & 7) == 5)
5286             {
5287               if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
5288                               | PREFIX_ES | PREFIX_FS | PREFIX_GS))
5289                 ;
5290               else
5291                 {
5292                   oappend (names_seg[ds_reg - es_reg]);
5293                   oappend (":");
5294                 }
5295               print_operand_value (scratchbuf, sizeof(scratchbuf), 1, disp);
5296               oappend (scratchbuf);
5297             }
5298         }
5299     }
5300   else
5301     { /* 16 bit address mode */
5302       switch (modrm.mod)
5303         {
5304         case 0:
5305           if (modrm.rm == 6)
5306             {
5307               disp = get16 ();
5308               if ((disp & 0x8000) != 0)
5309                 disp -= 0x10000;
5310             }
5311           break;
5312         case 1:
5313           fetch_data(the_info, codep + 1);
5314           disp = *codep++;
5315           if ((disp & 0x80) != 0)
5316             disp -= 0x100;
5317           break;
5318         case 2:
5319           disp = get16 ();
5320           if ((disp & 0x8000) != 0)
5321             disp -= 0x10000;
5322           break;
5323         }
5324
5325       if (!intel_syntax)
5326         if (modrm.mod != 0 || modrm.rm == 6)
5327           {
5328             print_displacement (scratchbuf, disp);
5329             oappend (scratchbuf);
5330           }
5331
5332       if (modrm.mod != 0 || modrm.rm != 6)
5333         {
5334           *obufp++ = open_char;
5335           *obufp = '\0';
5336           oappend (index16[modrm.rm]);
5337           if (intel_syntax
5338               && (disp || modrm.mod != 0 || modrm.rm == 6))
5339             {
5340               if ((bfd_signed_vma) disp >= 0)
5341                 {
5342                   *obufp++ = '+';
5343                   *obufp = '\0';
5344                 }
5345               else if (modrm.mod != 1)
5346                 {
5347                   *obufp++ = '-';
5348                   *obufp = '\0';
5349                   disp = - (bfd_signed_vma) disp;
5350                 }
5351
5352               print_displacement (scratchbuf, disp);
5353               oappend (scratchbuf);
5354             }
5355
5356           *obufp++ = close_char;
5357           *obufp = '\0';
5358         }
5359       else if (intel_syntax)
5360         {
5361           if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
5362                           | PREFIX_ES | PREFIX_FS | PREFIX_GS))
5363             ;
5364           else
5365             {
5366               oappend (names_seg[ds_reg - es_reg]);
5367               oappend (":");
5368             }
5369           print_operand_value (scratchbuf, sizeof(scratchbuf), 1,
5370                                disp & 0xffff);
5371           oappend (scratchbuf);
5372         }
5373     }
5374 }
5375
5376 static void
5377 OP_G (int bytemode, int sizeflag)
5378 {
5379   int add = 0;
5380   USED_REX (REX_R);
5381   if (rex & REX_R)
5382     add += 8;
5383   switch (bytemode)
5384     {
5385     case b_mode:
5386       USED_REX (0);
5387       if (rex)
5388         oappend (names8rex[modrm.reg + add]);
5389       else
5390         oappend (names8[modrm.reg + add]);
5391       break;
5392     case w_mode:
5393       oappend (names16[modrm.reg + add]);
5394       break;
5395     case d_mode:
5396       oappend (names32[modrm.reg + add]);
5397       break;
5398     case q_mode:
5399       oappend (names64[modrm.reg + add]);
5400       break;
5401     case v_mode:
5402     case dq_mode:
5403     case dqb_mode:
5404     case dqd_mode:
5405     case dqw_mode:
5406       USED_REX (REX_W);
5407       if (rex & REX_W)
5408         oappend (names64[modrm.reg + add]);
5409       else if ((sizeflag & DFLAG) || bytemode != v_mode)
5410         oappend (names32[modrm.reg + add]);
5411       else
5412         oappend (names16[modrm.reg + add]);
5413       used_prefixes |= (prefixes & PREFIX_DATA);
5414       break;
5415     case m_mode:
5416       if (address_mode == mode_64bit)
5417         oappend (names64[modrm.reg + add]);
5418       else
5419         oappend (names32[modrm.reg + add]);
5420       break;
5421     default:
5422       oappend (INTERNAL_DISASSEMBLER_ERROR);
5423       break;
5424     }
5425 }
5426
5427 static void
5428 OP_vvvv (int bytemode, int sizeflags)
5429 {
5430     USED_REX (REX_W);
5431     if (rex & REX_W) {
5432         oappend(names64[vex_reg]);
5433     } else {
5434         oappend(names32[vex_reg]);
5435     }
5436 }
5437
5438 static bfd_vma
5439 get64 (void)
5440 {
5441   bfd_vma x;
5442 #ifdef BFD64
5443   unsigned int a;
5444   unsigned int b;
5445
5446   fetch_data(the_info, codep + 8);
5447   a = *codep++ & 0xff;
5448   a |= (*codep++ & 0xff) << 8;
5449   a |= (*codep++ & 0xff) << 16;
5450   a |= (*codep++ & 0xff) << 24;
5451   b = *codep++ & 0xff;
5452   b |= (*codep++ & 0xff) << 8;
5453   b |= (*codep++ & 0xff) << 16;
5454   b |= (*codep++ & 0xff) << 24;
5455   x = a + ((bfd_vma) b << 32);
5456 #else
5457   abort ();
5458   x = 0;
5459 #endif
5460   return x;
5461 }
5462
5463 static bfd_signed_vma
5464 get32 (void)
5465 {
5466   bfd_signed_vma x = 0;
5467
5468   fetch_data(the_info, codep + 4);
5469   x = *codep++ & (bfd_signed_vma) 0xff;
5470   x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
5471   x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
5472   x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
5473   return x;
5474 }
5475
5476 static bfd_signed_vma
5477 get32s (void)
5478 {
5479   bfd_signed_vma x = 0;
5480
5481   fetch_data(the_info, codep + 4);
5482   x = *codep++ & (bfd_signed_vma) 0xff;
5483   x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
5484   x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
5485   x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
5486
5487   x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
5488
5489   return x;
5490 }
5491
5492 static int
5493 get16 (void)
5494 {
5495   int x = 0;
5496
5497   fetch_data(the_info, codep + 2);
5498   x = *codep++ & 0xff;
5499   x |= (*codep++ & 0xff) << 8;
5500   return x;
5501 }
5502
5503 static void
5504 set_op (bfd_vma op, int riprel)
5505 {
5506   op_index[op_ad] = op_ad;
5507   if (address_mode == mode_64bit)
5508     {
5509       op_address[op_ad] = op;
5510       op_riprel[op_ad] = riprel;
5511     }
5512   else
5513     {
5514       /* Mask to get a 32-bit address.  */
5515       op_address[op_ad] = op & 0xffffffff;
5516       op_riprel[op_ad] = riprel & 0xffffffff;
5517     }
5518 }
5519
5520 static void
5521 OP_REG (int code, int sizeflag)
5522 {
5523   const char *s;
5524   int add = 0;
5525   USED_REX (REX_B);
5526   if (rex & REX_B)
5527     add = 8;
5528
5529   switch (code)
5530     {
5531     case ax_reg: case cx_reg: case dx_reg: case bx_reg:
5532     case sp_reg: case bp_reg: case si_reg: case di_reg:
5533       s = names16[code - ax_reg + add];
5534       break;
5535     case es_reg: case ss_reg: case cs_reg:
5536     case ds_reg: case fs_reg: case gs_reg:
5537       s = names_seg[code - es_reg + add];
5538       break;
5539     case al_reg: case ah_reg: case cl_reg: case ch_reg:
5540     case dl_reg: case dh_reg: case bl_reg: case bh_reg:
5541       USED_REX (0);
5542       if (rex)
5543         s = names8rex[code - al_reg + add];
5544       else
5545         s = names8[code - al_reg];
5546       break;
5547     case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
5548     case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
5549       if (address_mode == mode_64bit && (sizeflag & DFLAG))
5550         {
5551           s = names64[code - rAX_reg + add];
5552           break;
5553         }
5554       code += eAX_reg - rAX_reg;
5555       /* Fall through.  */
5556     case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
5557     case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
5558       USED_REX (REX_W);
5559       if (rex & REX_W)
5560         s = names64[code - eAX_reg + add];
5561       else if (sizeflag & DFLAG)
5562         s = names32[code - eAX_reg + add];
5563       else
5564         s = names16[code - eAX_reg + add];
5565       used_prefixes |= (prefixes & PREFIX_DATA);
5566       break;
5567     default:
5568       s = INTERNAL_DISASSEMBLER_ERROR;
5569       break;
5570     }
5571   oappend (s);
5572 }
5573
5574 static void
5575 OP_IMREG (int code, int sizeflag)
5576 {
5577   const char *s;
5578
5579   switch (code)
5580     {
5581     case indir_dx_reg:
5582       if (intel_syntax)
5583         s = "dx";
5584       else
5585         s = "(%dx)";
5586       break;
5587     case ax_reg: case cx_reg: case dx_reg: case bx_reg:
5588     case sp_reg: case bp_reg: case si_reg: case di_reg:
5589       s = names16[code - ax_reg];
5590       break;
5591     case es_reg: case ss_reg: case cs_reg:
5592     case ds_reg: case fs_reg: case gs_reg:
5593       s = names_seg[code - es_reg];
5594       break;
5595     case al_reg: case ah_reg: case cl_reg: case ch_reg:
5596     case dl_reg: case dh_reg: case bl_reg: case bh_reg:
5597       USED_REX (0);
5598       if (rex)
5599         s = names8rex[code - al_reg];
5600       else
5601         s = names8[code - al_reg];
5602       break;
5603     case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
5604     case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
5605       USED_REX (REX_W);
5606       if (rex & REX_W)
5607         s = names64[code - eAX_reg];
5608       else if (sizeflag & DFLAG)
5609         s = names32[code - eAX_reg];
5610       else
5611         s = names16[code - eAX_reg];
5612       used_prefixes |= (prefixes & PREFIX_DATA);
5613       break;
5614     case z_mode_ax_reg:
5615       if ((rex & REX_W) || (sizeflag & DFLAG))
5616         s = *names32;
5617       else
5618         s = *names16;
5619       if (!(rex & REX_W))
5620         used_prefixes |= (prefixes & PREFIX_DATA);
5621       break;
5622     default:
5623       s = INTERNAL_DISASSEMBLER_ERROR;
5624       break;
5625     }
5626   oappend (s);
5627 }
5628
5629 static void
5630 OP_I (int bytemode, int sizeflag)
5631 {
5632   bfd_signed_vma op;
5633   bfd_signed_vma mask = -1;
5634
5635   switch (bytemode)
5636     {
5637     case b_mode:
5638       fetch_data(the_info, codep + 1);
5639       op = *codep++;
5640       mask = 0xff;
5641       break;
5642     case q_mode:
5643       if (address_mode == mode_64bit)
5644         {
5645           op = get32s ();
5646           break;
5647         }
5648       /* Fall through.  */
5649     case v_mode:
5650       USED_REX (REX_W);
5651       if (rex & REX_W)
5652         op = get32s ();
5653       else if (sizeflag & DFLAG)
5654         {
5655           op = get32 ();
5656           mask = 0xffffffff;
5657         }
5658       else
5659         {
5660           op = get16 ();
5661           mask = 0xfffff;
5662         }
5663       used_prefixes |= (prefixes & PREFIX_DATA);
5664       break;
5665     case w_mode:
5666       mask = 0xfffff;
5667       op = get16 ();
5668       break;
5669     case const_1_mode:
5670       if (intel_syntax)
5671         oappend ("1");
5672       return;
5673     default:
5674       oappend (INTERNAL_DISASSEMBLER_ERROR);
5675       return;
5676     }
5677
5678   op &= mask;
5679   scratchbuf[0] = '$';
5680   print_operand_value (scratchbuf + 1, sizeof(scratchbuf) - 1, 1, op);
5681   oappend (scratchbuf + intel_syntax);
5682   scratchbuf[0] = '\0';
5683 }
5684
5685 static void
5686 OP_I64 (int bytemode, int sizeflag)
5687 {
5688   bfd_signed_vma op;
5689   bfd_signed_vma mask = -1;
5690
5691   if (address_mode != mode_64bit)
5692     {
5693       OP_I (bytemode, sizeflag);
5694       return;
5695     }
5696
5697   switch (bytemode)
5698     {
5699     case b_mode:
5700       fetch_data(the_info, codep + 1);
5701       op = *codep++;
5702       mask = 0xff;
5703       break;
5704     case v_mode:
5705       USED_REX (REX_W);
5706       if (rex & REX_W)
5707         op = get64 ();
5708       else if (sizeflag & DFLAG)
5709         {
5710           op = get32 ();
5711           mask = 0xffffffff;
5712         }
5713       else
5714         {
5715           op = get16 ();
5716           mask = 0xfffff;
5717         }
5718       used_prefixes |= (prefixes & PREFIX_DATA);
5719       break;
5720     case w_mode:
5721       mask = 0xfffff;
5722       op = get16 ();
5723       break;
5724     default:
5725       oappend (INTERNAL_DISASSEMBLER_ERROR);
5726       return;
5727     }
5728
5729   op &= mask;
5730   scratchbuf[0] = '$';
5731   print_operand_value (scratchbuf + 1, sizeof(scratchbuf) - 1, 1, op);
5732   oappend (scratchbuf + intel_syntax);
5733   scratchbuf[0] = '\0';
5734 }
5735
5736 static void
5737 OP_sI (int bytemode, int sizeflag)
5738 {
5739   bfd_signed_vma op;
5740
5741   switch (bytemode)
5742     {
5743     case b_mode:
5744       fetch_data(the_info, codep + 1);
5745       op = *codep++;
5746       if ((op & 0x80) != 0)
5747         op -= 0x100;
5748       break;
5749     case v_mode:
5750       USED_REX (REX_W);
5751       if (rex & REX_W)
5752         op = get32s ();
5753       else if (sizeflag & DFLAG)
5754         {
5755           op = get32s ();
5756         }
5757       else
5758         {
5759           op = get16 ();
5760           if ((op & 0x8000) != 0)
5761             op -= 0x10000;
5762         }
5763       used_prefixes |= (prefixes & PREFIX_DATA);
5764       break;
5765     case w_mode:
5766       op = get16 ();
5767       if ((op & 0x8000) != 0)
5768         op -= 0x10000;
5769       break;
5770     default:
5771       oappend (INTERNAL_DISASSEMBLER_ERROR);
5772       return;
5773     }
5774
5775   scratchbuf[0] = '$';
5776   print_operand_value (scratchbuf + 1, sizeof(scratchbuf) - 1, 1, op);
5777   oappend (scratchbuf + intel_syntax);
5778 }
5779
5780 static void
5781 OP_J (int bytemode, int sizeflag)
5782 {
5783   bfd_vma disp;
5784   bfd_vma mask = -1;
5785   bfd_vma segment = 0;
5786
5787   switch (bytemode)
5788     {
5789     case b_mode:
5790       fetch_data(the_info, codep + 1);
5791       disp = *codep++;
5792       if ((disp & 0x80) != 0)
5793         disp -= 0x100;
5794       break;
5795     case v_mode:
5796       if ((sizeflag & DFLAG) || (rex & REX_W))
5797         disp = get32s ();
5798       else
5799         {
5800           disp = get16 ();
5801           if ((disp & 0x8000) != 0)
5802             disp -= 0x10000;
5803           /* In 16bit mode, address is wrapped around at 64k within
5804              the same segment.  Otherwise, a data16 prefix on a jump
5805              instruction means that the pc is masked to 16 bits after
5806              the displacement is added!  */
5807           mask = 0xffff;
5808           if ((prefixes & PREFIX_DATA) == 0)
5809             segment = ((start_pc + codep - start_codep)
5810                        & ~((bfd_vma) 0xffff));
5811         }
5812       used_prefixes |= (prefixes & PREFIX_DATA);
5813       break;
5814     default:
5815       oappend (INTERNAL_DISASSEMBLER_ERROR);
5816       return;
5817     }
5818   disp = ((start_pc + codep - start_codep + disp) & mask) | segment;
5819   set_op (disp, 0);
5820   print_operand_value (scratchbuf, sizeof(scratchbuf), 1, disp);
5821   oappend (scratchbuf);
5822 }
5823
5824 static void
5825 OP_SEG (int bytemode, int sizeflag)
5826 {
5827   if (bytemode == w_mode)
5828     oappend (names_seg[modrm.reg]);
5829   else
5830     OP_E (modrm.mod == 3 ? bytemode : w_mode, sizeflag);
5831 }
5832
5833 static void
5834 OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag)
5835 {
5836   int seg, offset;
5837
5838   if (sizeflag & DFLAG)
5839     {
5840       offset = get32 ();
5841       seg = get16 ();
5842     }
5843   else
5844     {
5845       offset = get16 ();
5846       seg = get16 ();
5847     }
5848   used_prefixes |= (prefixes & PREFIX_DATA);
5849   if (intel_syntax)
5850     snprintf (scratchbuf, sizeof(scratchbuf), "0x%x:0x%x", seg, offset);
5851   else
5852     snprintf (scratchbuf, sizeof(scratchbuf), "$0x%x,$0x%x", seg, offset);
5853   oappend (scratchbuf);
5854 }
5855
5856 static void
5857 OP_OFF (int bytemode, int sizeflag)
5858 {
5859   bfd_vma off;
5860
5861   if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
5862     intel_operand_size (bytemode, sizeflag);
5863   append_seg ();
5864
5865   if ((sizeflag & AFLAG) || address_mode == mode_64bit)
5866     off = get32 ();
5867   else
5868     off = get16 ();
5869
5870   if (intel_syntax)
5871     {
5872       if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
5873                         | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
5874         {
5875           oappend (names_seg[ds_reg - es_reg]);
5876           oappend (":");
5877         }
5878     }
5879   print_operand_value (scratchbuf, sizeof(scratchbuf), 1, off);
5880   oappend (scratchbuf);
5881 }
5882
5883 static void
5884 OP_OFF64 (int bytemode, int sizeflag)
5885 {
5886   bfd_vma off;
5887
5888   if (address_mode != mode_64bit
5889       || (prefixes & PREFIX_ADDR))
5890     {
5891       OP_OFF (bytemode, sizeflag);
5892       return;
5893     }
5894
5895   if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
5896     intel_operand_size (bytemode, sizeflag);
5897   append_seg ();
5898
5899   off = get64 ();
5900
5901   if (intel_syntax)
5902     {
5903       if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
5904                         | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
5905         {
5906           oappend (names_seg[ds_reg - es_reg]);
5907           oappend (":");
5908         }
5909     }
5910   print_operand_value (scratchbuf, sizeof(scratchbuf), 1, off);
5911   oappend (scratchbuf);
5912 }
5913
5914 static void
5915 ptr_reg (int code, int sizeflag)
5916 {
5917   const char *s;
5918
5919   *obufp++ = open_char;
5920   used_prefixes |= (prefixes & PREFIX_ADDR);
5921   if (address_mode == mode_64bit)
5922     {
5923       if (!(sizeflag & AFLAG))
5924         s = names32[code - eAX_reg];
5925       else
5926         s = names64[code - eAX_reg];
5927     }
5928   else if (sizeflag & AFLAG)
5929     s = names32[code - eAX_reg];
5930   else
5931     s = names16[code - eAX_reg];
5932   oappend (s);
5933   *obufp++ = close_char;
5934   *obufp = 0;
5935 }
5936
5937 static void
5938 OP_ESreg (int code, int sizeflag)
5939 {
5940   if (intel_syntax)
5941     {
5942       switch (codep[-1])
5943         {
5944         case 0x6d:      /* insw/insl */
5945           intel_operand_size (z_mode, sizeflag);
5946           break;
5947         case 0xa5:      /* movsw/movsl/movsq */
5948         case 0xa7:      /* cmpsw/cmpsl/cmpsq */
5949         case 0xab:      /* stosw/stosl */
5950         case 0xaf:      /* scasw/scasl */
5951           intel_operand_size (v_mode, sizeflag);
5952           break;
5953         default:
5954           intel_operand_size (b_mode, sizeflag);
5955         }
5956     }
5957   oappend ("%es:" + intel_syntax);
5958   ptr_reg (code, sizeflag);
5959 }
5960
5961 static void
5962 OP_DSreg (int code, int sizeflag)
5963 {
5964   if (intel_syntax)
5965     {
5966       switch (codep[-1])
5967         {
5968         case 0x6f:      /* outsw/outsl */
5969           intel_operand_size (z_mode, sizeflag);
5970           break;
5971         case 0xa5:      /* movsw/movsl/movsq */
5972         case 0xa7:      /* cmpsw/cmpsl/cmpsq */
5973         case 0xad:      /* lodsw/lodsl/lodsq */
5974           intel_operand_size (v_mode, sizeflag);
5975           break;
5976         default:
5977           intel_operand_size (b_mode, sizeflag);
5978         }
5979     }
5980   if ((prefixes
5981        & (PREFIX_CS
5982           | PREFIX_DS
5983           | PREFIX_SS
5984           | PREFIX_ES
5985           | PREFIX_FS
5986           | PREFIX_GS)) == 0)
5987     prefixes |= PREFIX_DS;
5988   append_seg ();
5989   ptr_reg (code, sizeflag);
5990 }
5991
5992 static void
5993 OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5994 {
5995   int add = 0;
5996   if (rex & REX_R)
5997     {
5998       USED_REX (REX_R);
5999       add = 8;
6000     }
6001   else if (address_mode != mode_64bit && (prefixes & PREFIX_LOCK))
6002     {
6003       used_prefixes |= PREFIX_LOCK;
6004       add = 8;
6005     }
6006   snprintf (scratchbuf, sizeof(scratchbuf), "%%cr%d", modrm.reg + add);
6007   oappend (scratchbuf + intel_syntax);
6008 }
6009
6010 static void
6011 OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
6012 {
6013   int add = 0;
6014   USED_REX (REX_R);
6015   if (rex & REX_R)
6016     add = 8;
6017   if (intel_syntax)
6018     snprintf (scratchbuf, sizeof(scratchbuf), "db%d", modrm.reg + add);
6019   else
6020     snprintf (scratchbuf, sizeof(scratchbuf), "%%db%d", modrm.reg + add);
6021   oappend (scratchbuf);
6022 }
6023
6024 static void
6025 OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
6026 {
6027   snprintf (scratchbuf, sizeof(scratchbuf), "%%tr%d", modrm.reg);
6028   oappend (scratchbuf + intel_syntax);
6029 }
6030
6031 static void
6032 OP_R (int bytemode, int sizeflag)
6033 {
6034   if (modrm.mod == 3)
6035     OP_E (bytemode, sizeflag);
6036   else
6037     BadOp ();
6038 }
6039
6040 static void
6041 OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
6042 {
6043   used_prefixes |= (prefixes & PREFIX_DATA);
6044   if (prefixes & PREFIX_DATA)
6045     {
6046       int add = 0;
6047       USED_REX (REX_R);
6048       if (rex & REX_R)
6049         add = 8;
6050       snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", modrm.reg + add);
6051     }
6052   else
6053     snprintf (scratchbuf, sizeof(scratchbuf), "%%mm%d", modrm.reg);
6054   oappend (scratchbuf + intel_syntax);
6055 }
6056
6057 static void
6058 OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
6059 {
6060   int add = 0;
6061   USED_REX (REX_R);
6062   if (rex & REX_R)
6063     add = 8;
6064   snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", modrm.reg + add);
6065   oappend (scratchbuf + intel_syntax);
6066 }
6067
6068 static void
6069 OP_EM (int bytemode, int sizeflag)
6070 {
6071   if (modrm.mod != 3)
6072     {
6073       if (intel_syntax && bytemode == v_mode)
6074         {
6075           bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
6076           used_prefixes |= (prefixes & PREFIX_DATA);
6077         }
6078       OP_E (bytemode, sizeflag);
6079       return;
6080     }
6081
6082   /* Skip mod/rm byte.  */
6083   MODRM_CHECK;
6084   codep++;
6085   used_prefixes |= (prefixes & PREFIX_DATA);
6086   if (prefixes & PREFIX_DATA)
6087     {
6088       int add = 0;
6089
6090       USED_REX (REX_B);
6091       if (rex & REX_B)
6092         add = 8;
6093       snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", modrm.rm + add);
6094     }
6095   else
6096     snprintf (scratchbuf, sizeof(scratchbuf), "%%mm%d", modrm.rm);
6097   oappend (scratchbuf + intel_syntax);
6098 }
6099
6100 /* cvt* are the only instructions in sse2 which have
6101    both SSE and MMX operands and also have 0x66 prefix
6102    in their opcode. 0x66 was originally used to differentiate
6103    between SSE and MMX instruction(operands). So we have to handle the
6104    cvt* separately using OP_EMC and OP_MXC */
6105 static void
6106 OP_EMC (int bytemode, int sizeflag)
6107 {
6108   if (modrm.mod != 3)
6109     {
6110       if (intel_syntax && bytemode == v_mode)
6111         {
6112           bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
6113           used_prefixes |= (prefixes & PREFIX_DATA);
6114         }
6115       OP_E (bytemode, sizeflag);
6116       return;
6117     }
6118
6119   /* Skip mod/rm byte.  */
6120   MODRM_CHECK;
6121   codep++;
6122   used_prefixes |= (prefixes & PREFIX_DATA);
6123   snprintf (scratchbuf, sizeof(scratchbuf), "%%mm%d", modrm.rm);
6124   oappend (scratchbuf + intel_syntax);
6125 }
6126
6127 static void
6128 OP_MXC (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
6129 {
6130   used_prefixes |= (prefixes & PREFIX_DATA);
6131   snprintf (scratchbuf, sizeof(scratchbuf), "%%mm%d", modrm.reg);
6132   oappend (scratchbuf + intel_syntax);
6133 }
6134
6135 static void
6136 OP_EX (int bytemode, int sizeflag)
6137 {
6138   int add = 0;
6139   if (modrm.mod != 3)
6140     {
6141       OP_E (bytemode, sizeflag);
6142       return;
6143     }
6144   USED_REX (REX_B);
6145   if (rex & REX_B)
6146     add = 8;
6147
6148   /* Skip mod/rm byte.  */
6149   MODRM_CHECK;
6150   codep++;
6151   snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", modrm.rm + add);
6152   oappend (scratchbuf + intel_syntax);
6153 }
6154
6155 static void
6156 OP_MS (int bytemode, int sizeflag)
6157 {
6158   if (modrm.mod == 3)
6159     OP_EM (bytemode, sizeflag);
6160   else
6161     BadOp ();
6162 }
6163
6164 static void
6165 OP_XS (int bytemode, int sizeflag)
6166 {
6167   if (modrm.mod == 3)
6168     OP_EX (bytemode, sizeflag);
6169   else
6170     BadOp ();
6171 }
6172
6173 static void
6174 OP_M (int bytemode, int sizeflag)
6175 {
6176   if (modrm.mod == 3)
6177     /* bad bound,lea,lds,les,lfs,lgs,lss,cmpxchg8b,vmptrst modrm */
6178     BadOp ();
6179   else
6180     OP_E (bytemode, sizeflag);
6181 }
6182
6183 static void
6184 OP_0f07 (int bytemode, int sizeflag)
6185 {
6186   if (modrm.mod != 3 || modrm.rm != 0)
6187     BadOp ();
6188   else
6189     OP_E (bytemode, sizeflag);
6190 }
6191
6192 static void
6193 OP_0fae (int bytemode, int sizeflag)
6194 {
6195   if (modrm.mod == 3)
6196     {
6197       if (modrm.reg == 7)
6198         strcpy (obuf + strlen (obuf) - sizeof ("clflush") + 1, "sfence");
6199
6200       if (modrm.reg < 5 || modrm.rm != 0)
6201         {
6202           BadOp ();     /* bad sfence, mfence, or lfence */
6203           return;
6204         }
6205     }
6206   else if (modrm.reg != 7)
6207     {
6208       BadOp ();         /* bad clflush */
6209       return;
6210     }
6211
6212   OP_E (bytemode, sizeflag);
6213 }
6214
6215 /* NOP is an alias of "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
6216    32bit mode and "xchg %rax,%rax" in 64bit mode.  */
6217
6218 static void
6219 NOP_Fixup1 (int bytemode, int sizeflag)
6220 {
6221   if ((prefixes & PREFIX_DATA) != 0
6222       || (rex != 0
6223           && rex != 0x48
6224           && address_mode == mode_64bit))
6225     OP_REG (bytemode, sizeflag);
6226   else
6227     strcpy (obuf, "nop");
6228 }
6229
6230 static void
6231 NOP_Fixup2 (int bytemode, int sizeflag)
6232 {
6233   if ((prefixes & PREFIX_DATA) != 0
6234       || (rex != 0
6235           && rex != 0x48
6236           && address_mode == mode_64bit))
6237     OP_IMREG (bytemode, sizeflag);
6238 }
6239
6240 static const char *Suffix3DNow[] = {
6241 /* 00 */        NULL,           NULL,           NULL,           NULL,
6242 /* 04 */        NULL,           NULL,           NULL,           NULL,
6243 /* 08 */        NULL,           NULL,           NULL,           NULL,
6244 /* 0C */        "pi2fw",        "pi2fd",        NULL,           NULL,
6245 /* 10 */        NULL,           NULL,           NULL,           NULL,
6246 /* 14 */        NULL,           NULL,           NULL,           NULL,
6247 /* 18 */        NULL,           NULL,           NULL,           NULL,
6248 /* 1C */        "pf2iw",        "pf2id",        NULL,           NULL,
6249 /* 20 */        NULL,           NULL,           NULL,           NULL,
6250 /* 24 */        NULL,           NULL,           NULL,           NULL,
6251 /* 28 */        NULL,           NULL,           NULL,           NULL,
6252 /* 2C */        NULL,           NULL,           NULL,           NULL,
6253 /* 30 */        NULL,           NULL,           NULL,           NULL,
6254 /* 34 */        NULL,           NULL,           NULL,           NULL,
6255 /* 38 */        NULL,           NULL,           NULL,           NULL,
6256 /* 3C */        NULL,           NULL,           NULL,           NULL,
6257 /* 40 */        NULL,           NULL,           NULL,           NULL,
6258 /* 44 */        NULL,           NULL,           NULL,           NULL,
6259 /* 48 */        NULL,           NULL,           NULL,           NULL,
6260 /* 4C */        NULL,           NULL,           NULL,           NULL,
6261 /* 50 */        NULL,           NULL,           NULL,           NULL,
6262 /* 54 */        NULL,           NULL,           NULL,           NULL,
6263 /* 58 */        NULL,           NULL,           NULL,           NULL,
6264 /* 5C */        NULL,           NULL,           NULL,           NULL,
6265 /* 60 */        NULL,           NULL,           NULL,           NULL,
6266 /* 64 */        NULL,           NULL,           NULL,           NULL,
6267 /* 68 */        NULL,           NULL,           NULL,           NULL,
6268 /* 6C */        NULL,           NULL,           NULL,           NULL,
6269 /* 70 */        NULL,           NULL,           NULL,           NULL,
6270 /* 74 */        NULL,           NULL,           NULL,           NULL,
6271 /* 78 */        NULL,           NULL,           NULL,           NULL,
6272 /* 7C */        NULL,           NULL,           NULL,           NULL,
6273 /* 80 */        NULL,           NULL,           NULL,           NULL,
6274 /* 84 */        NULL,           NULL,           NULL,           NULL,
6275 /* 88 */        NULL,           NULL,           "pfnacc",       NULL,
6276 /* 8C */        NULL,           NULL,           "pfpnacc",      NULL,
6277 /* 90 */        "pfcmpge",      NULL,           NULL,           NULL,
6278 /* 94 */        "pfmin",        NULL,           "pfrcp",        "pfrsqrt",
6279 /* 98 */        NULL,           NULL,           "pfsub",        NULL,
6280 /* 9C */        NULL,           NULL,           "pfadd",        NULL,
6281 /* A0 */        "pfcmpgt",      NULL,           NULL,           NULL,
6282 /* A4 */        "pfmax",        NULL,           "pfrcpit1",     "pfrsqit1",
6283 /* A8 */        NULL,           NULL,           "pfsubr",       NULL,
6284 /* AC */        NULL,           NULL,           "pfacc",        NULL,
6285 /* B0 */        "pfcmpeq",      NULL,           NULL,           NULL,
6286 /* B4 */        "pfmul",        NULL,           "pfrcpit2",     "pmulhrw",
6287 /* B8 */        NULL,           NULL,           NULL,           "pswapd",
6288 /* BC */        NULL,           NULL,           NULL,           "pavgusb",
6289 /* C0 */        NULL,           NULL,           NULL,           NULL,
6290 /* C4 */        NULL,           NULL,           NULL,           NULL,
6291 /* C8 */        NULL,           NULL,           NULL,           NULL,
6292 /* CC */        NULL,           NULL,           NULL,           NULL,
6293 /* D0 */        NULL,           NULL,           NULL,           NULL,
6294 /* D4 */        NULL,           NULL,           NULL,           NULL,
6295 /* D8 */        NULL,           NULL,           NULL,           NULL,
6296 /* DC */        NULL,           NULL,           NULL,           NULL,
6297 /* E0 */        NULL,           NULL,           NULL,           NULL,
6298 /* E4 */        NULL,           NULL,           NULL,           NULL,
6299 /* E8 */        NULL,           NULL,           NULL,           NULL,
6300 /* EC */        NULL,           NULL,           NULL,           NULL,
6301 /* F0 */        NULL,           NULL,           NULL,           NULL,
6302 /* F4 */        NULL,           NULL,           NULL,           NULL,
6303 /* F8 */        NULL,           NULL,           NULL,           NULL,
6304 /* FC */        NULL,           NULL,           NULL,           NULL,
6305 };
6306
6307 static void
6308 OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
6309 {
6310   const char *mnemonic;
6311
6312   fetch_data(the_info, codep + 1);
6313   /* AMD 3DNow! instructions are specified by an opcode suffix in the
6314      place where an 8-bit immediate would normally go.  ie. the last
6315      byte of the instruction.  */
6316   obufp = obuf + strlen (obuf);
6317   mnemonic = Suffix3DNow[*codep++ & 0xff];
6318   if (mnemonic)
6319     oappend (mnemonic);
6320   else
6321     {
6322       /* Since a variable sized modrm/sib chunk is between the start
6323          of the opcode (0x0f0f) and the opcode suffix, we need to do
6324          all the modrm processing first, and don't know until now that
6325          we have a bad opcode.  This necessitates some cleaning up.  */
6326       op_out[0][0] = '\0';
6327       op_out[1][0] = '\0';
6328       BadOp ();
6329     }
6330 }
6331
6332 static const char *simd_cmp_op[] = {
6333   "eq",
6334   "lt",
6335   "le",
6336   "unord",
6337   "neq",
6338   "nlt",
6339   "nle",
6340   "ord"
6341 };
6342
6343 static void
6344 OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
6345 {
6346   unsigned int cmp_type;
6347
6348   fetch_data(the_info, codep + 1);
6349   obufp = obuf + strlen (obuf);
6350   cmp_type = *codep++ & 0xff;
6351   if (cmp_type < 8)
6352     {
6353       char suffix1 = 'p', suffix2 = 's';
6354       used_prefixes |= (prefixes & PREFIX_REPZ);
6355       if (prefixes & PREFIX_REPZ)
6356         suffix1 = 's';
6357       else
6358         {
6359           used_prefixes |= (prefixes & PREFIX_DATA);
6360           if (prefixes & PREFIX_DATA)
6361             suffix2 = 'd';
6362           else
6363             {
6364               used_prefixes |= (prefixes & PREFIX_REPNZ);
6365               if (prefixes & PREFIX_REPNZ)
6366                 suffix1 = 's', suffix2 = 'd';
6367             }
6368         }
6369       snprintf (scratchbuf, sizeof(scratchbuf), "cmp%s%c%c",
6370                 simd_cmp_op[cmp_type], suffix1, suffix2);
6371       used_prefixes |= (prefixes & PREFIX_REPZ);
6372       oappend (scratchbuf);
6373     }
6374   else
6375     {
6376       /* We have a bad extension byte.  Clean up.  */
6377       op_out[0][0] = '\0';
6378       op_out[1][0] = '\0';
6379       BadOp ();
6380     }
6381 }
6382
6383 static void
6384 SIMD_Fixup (int extrachar, int sizeflag ATTRIBUTE_UNUSED)
6385 {
6386   /* Change movlps/movhps to movhlps/movlhps for 2 register operand
6387      forms of these instructions.  */
6388   if (modrm.mod == 3)
6389     {
6390       char *p = obuf + strlen (obuf);
6391       *(p + 1) = '\0';
6392       *p       = *(p - 1);
6393       *(p - 1) = *(p - 2);
6394       *(p - 2) = *(p - 3);
6395       *(p - 3) = extrachar;
6396     }
6397 }
6398
6399 static void
6400 PNI_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
6401 {
6402   if (modrm.mod == 3 && modrm.reg == 1 && modrm.rm <= 1)
6403     {
6404       /* Override "sidt".  */
6405       size_t olen = strlen (obuf);
6406       char *p = obuf + olen - 4;
6407       const char * const *names = (address_mode == mode_64bit
6408                             ? names64 : names32);
6409
6410       /* We might have a suffix when disassembling with -Msuffix.  */
6411       if (*p == 'i')
6412         --p;
6413
6414       /* Remove "addr16/addr32" if we aren't in Intel mode.  */
6415       if (!intel_syntax
6416           && (prefixes & PREFIX_ADDR)
6417           && olen >= (4 + 7)
6418           && *(p - 1) == ' '
6419           && strncmp (p - 7, "addr", 4) == 0
6420           && (strncmp (p - 3, "16", 2) == 0
6421               || strncmp (p - 3, "32", 2) == 0))
6422         p -= 7;
6423
6424       if (modrm.rm)
6425         {
6426           /* mwait %eax,%ecx  */
6427           strcpy (p, "mwait");
6428           if (!intel_syntax)
6429             strcpy (op_out[0], names[0]);
6430         }
6431       else
6432         {
6433           /* monitor %eax,%ecx,%edx"  */
6434           strcpy (p, "monitor");
6435           if (!intel_syntax)
6436             {
6437               const char * const *op1_names;
6438               if (!(prefixes & PREFIX_ADDR))
6439                 op1_names = (address_mode == mode_16bit
6440                              ? names16 : names);
6441               else
6442                 {
6443                   op1_names = (address_mode != mode_32bit
6444                                ? names32 : names16);
6445                   used_prefixes |= PREFIX_ADDR;
6446                 }
6447               strcpy (op_out[0], op1_names[0]);
6448               strcpy (op_out[2], names[2]);
6449             }
6450         }
6451       if (!intel_syntax)
6452         {
6453           strcpy (op_out[1], names[1]);
6454           two_source_ops = 1;
6455         }
6456
6457       codep++;
6458     }
6459   else
6460     OP_M (0, sizeflag);
6461 }
6462
6463 static void
6464 SVME_Fixup (int bytemode, int sizeflag)
6465 {
6466   const char *alt;
6467   char *p;
6468
6469   switch (*codep)
6470     {
6471     case 0xd8:
6472       alt = "vmrun";
6473       break;
6474     case 0xd9:
6475       alt = "vmmcall";
6476       break;
6477     case 0xda:
6478       alt = "vmload";
6479       break;
6480     case 0xdb:
6481       alt = "vmsave";
6482       break;
6483     case 0xdc:
6484       alt = "stgi";
6485       break;
6486     case 0xdd:
6487       alt = "clgi";
6488       break;
6489     case 0xde:
6490       alt = "skinit";
6491       break;
6492     case 0xdf:
6493       alt = "invlpga";
6494       break;
6495     default:
6496       OP_M (bytemode, sizeflag);
6497       return;
6498     }
6499   /* Override "lidt".  */
6500   p = obuf + strlen (obuf) - 4;
6501   /* We might have a suffix.  */
6502   if (*p == 'i')
6503     --p;
6504   strcpy (p, alt);
6505   if (!(prefixes & PREFIX_ADDR))
6506     {
6507       ++codep;
6508       return;
6509     }
6510   used_prefixes |= PREFIX_ADDR;
6511   switch (*codep++)
6512     {
6513     case 0xdf:
6514       strcpy (op_out[1], names32[1]);
6515       two_source_ops = 1;
6516           /* Fall through.  */
6517     case 0xd8:
6518     case 0xda:
6519     case 0xdb:
6520       *obufp++ = open_char;
6521       if (address_mode == mode_64bit || (sizeflag & AFLAG))
6522         alt = names32[0];
6523       else
6524         alt = names16[0];
6525       strcpy (obufp, alt);
6526       obufp += strlen (alt);
6527       *obufp++ = close_char;
6528       *obufp = '\0';
6529       break;
6530     }
6531 }
6532
6533 static void
6534 INVLPG_Fixup (int bytemode, int sizeflag)
6535 {
6536   const char *alt;
6537
6538   switch (*codep)
6539     {
6540     case 0xf8:
6541       alt = "swapgs";
6542       break;
6543     case 0xf9:
6544       alt = "rdtscp";
6545       break;
6546     default:
6547       OP_M (bytemode, sizeflag);
6548       return;
6549     }
6550   /* Override "invlpg".  */
6551   strcpy (obuf + strlen (obuf) - 6, alt);
6552   codep++;
6553 }
6554
6555 static void
6556 BadOp (void)
6557 {
6558   /* Throw away prefixes and 1st. opcode byte.  */
6559   codep = insn_codep + 1;
6560   oappend ("(bad)");
6561 }
6562
6563 static void
6564 VMX_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
6565 {
6566   if (modrm.mod == 3
6567       && modrm.reg == 0
6568       && modrm.rm >=1
6569       && modrm.rm <= 4)
6570     {
6571       /* Override "sgdt".  */
6572       char *p = obuf + strlen (obuf) - 4;
6573
6574       /* We might have a suffix when disassembling with -Msuffix.  */
6575       if (*p == 'g')
6576         --p;
6577
6578       switch (modrm.rm)
6579         {
6580         case 1:
6581           strcpy (p, "vmcall");
6582           break;
6583         case 2:
6584           strcpy (p, "vmlaunch");
6585           break;
6586         case 3:
6587           strcpy (p, "vmresume");
6588           break;
6589         case 4:
6590           strcpy (p, "vmxoff");
6591           break;
6592         }
6593
6594       codep++;
6595     }
6596   else
6597     OP_E (0, sizeflag);
6598 }
6599
6600 static void
6601 OP_VMX (int bytemode, int sizeflag)
6602 {
6603   used_prefixes |= (prefixes & (PREFIX_DATA | PREFIX_REPZ));
6604   if (prefixes & PREFIX_DATA)
6605     strcpy (obuf, "vmclear");
6606   else if (prefixes & PREFIX_REPZ)
6607     strcpy (obuf, "vmxon");
6608   else
6609     strcpy (obuf, "vmptrld");
6610   OP_E (bytemode, sizeflag);
6611 }
6612
6613 static void
6614 REP_Fixup (int bytemode, int sizeflag)
6615 {
6616   /* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs,
6617      lods and stos.  */
6618   size_t ilen = 0;
6619
6620   if (prefixes & PREFIX_REPZ)
6621     switch (*insn_codep)
6622       {
6623       case 0x6e:        /* outsb */
6624       case 0x6f:        /* outsw/outsl */
6625       case 0xa4:        /* movsb */
6626       case 0xa5:        /* movsw/movsl/movsq */
6627         if (!intel_syntax)
6628           ilen = 5;
6629         else
6630           ilen = 4;
6631         break;
6632       case 0xaa:        /* stosb */
6633       case 0xab:        /* stosw/stosl/stosq */
6634       case 0xac:        /* lodsb */
6635       case 0xad:        /* lodsw/lodsl/lodsq */
6636         if (!intel_syntax && (sizeflag & SUFFIX_ALWAYS))
6637           ilen = 5;
6638         else
6639           ilen = 4;
6640         break;
6641       case 0x6c:        /* insb */
6642       case 0x6d:        /* insl/insw */
6643         if (!intel_syntax)
6644           ilen = 4;
6645         else
6646           ilen = 3;
6647         break;
6648       default:
6649         abort ();
6650         break;
6651       }
6652
6653   if (ilen != 0)
6654     {
6655       size_t olen;
6656       char *p;
6657
6658       olen = strlen (obuf);
6659       p = obuf + olen - ilen - 1 - 4;
6660       /* Handle "repz [addr16|addr32]".  */
6661       if ((prefixes & PREFIX_ADDR))
6662         p -= 1 + 6;
6663
6664       memmove (p + 3, p + 4, olen - (p + 3 - obuf));
6665     }
6666
6667   switch (bytemode)
6668     {
6669     case al_reg:
6670     case eAX_reg:
6671     case indir_dx_reg:
6672       OP_IMREG (bytemode, sizeflag);
6673       break;
6674     case eDI_reg:
6675       OP_ESreg (bytemode, sizeflag);
6676       break;
6677     case eSI_reg:
6678       OP_DSreg (bytemode, sizeflag);
6679       break;
6680     default:
6681       abort ();
6682       break;
6683     }
6684 }
6685
6686 static void
6687 CMPXCHG8B_Fixup (int bytemode, int sizeflag)
6688 {
6689   USED_REX (REX_W);
6690   if (rex & REX_W)
6691     {
6692       /* Change cmpxchg8b to cmpxchg16b.  */
6693       char *p = obuf + strlen (obuf) - 2;
6694       strcpy (p, "16b");
6695       bytemode = o_mode;
6696     }
6697   OP_M (bytemode, sizeflag);
6698 }
6699
6700 static void
6701 XMM_Fixup (int reg, int sizeflag ATTRIBUTE_UNUSED)
6702 {
6703   snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", reg);
6704   oappend (scratchbuf + intel_syntax);
6705 }
6706
6707 static void
6708 CRC32_Fixup (int bytemode, int sizeflag)
6709 {
6710   /* Add proper suffix to "crc32".  */
6711   char *p = obuf + strlen (obuf);
6712
6713   switch (bytemode)
6714     {
6715     case b_mode:
6716       if (intel_syntax)
6717         break;
6718
6719       *p++ = 'b';
6720       break;
6721     case v_mode:
6722       if (intel_syntax)
6723         break;
6724
6725       USED_REX (REX_W);
6726       if (rex & REX_W)
6727         *p++ = 'q';
6728       else if (sizeflag & DFLAG)
6729         *p++ = 'l';
6730       else
6731         *p++ = 'w';
6732       used_prefixes |= (prefixes & PREFIX_DATA);
6733       break;
6734     default:
6735       oappend (INTERNAL_DISASSEMBLER_ERROR);
6736       break;
6737     }
6738   *p = '\0';
6739
6740   if (modrm.mod == 3)
6741     {
6742       int add;
6743
6744       /* Skip mod/rm byte.  */
6745       MODRM_CHECK;
6746       codep++;
6747
6748       USED_REX (REX_B);
6749       add = (rex & REX_B) ? 8 : 0;
6750       if (bytemode == b_mode)
6751         {
6752           USED_REX (0);
6753           if (rex)
6754             oappend (names8rex[modrm.rm + add]);
6755           else
6756             oappend (names8[modrm.rm + add]);
6757         }
6758       else
6759         {
6760           USED_REX (REX_W);
6761           if (rex & REX_W)
6762             oappend (names64[modrm.rm + add]);
6763           else if ((prefixes & PREFIX_DATA))
6764             oappend (names16[modrm.rm + add]);
6765           else
6766             oappend (names32[modrm.rm + add]);
6767         }
6768     }
6769   else
6770     OP_E (bytemode, sizeflag);
6771 }