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HEAD
mipsnet: Flush queued packets when receiving is enabled
[qemu/ar7.git]
/
target-moxie
/
mmu.h
blob
abc79297cdafddd11a4546dd6c8b6f288949fe1b
1
#define MOXIE_MMU_ERR_EXEC 0
2
#define MOXIE_MMU_ERR_READ 1
3
#define MOXIE_MMU_ERR_WRITE 2
4
#define MOXIE_MMU_ERR_FLUSH 3
5
6
typedef
struct
{
7
uint32_t
phy
;
8
uint32_t
pfn
;
9
unsigned
g
:
1
;
10
unsigned
v
:
1
;
11
unsigned
k
:
1
;
12
unsigned
w
:
1
;
13
unsigned
e
:
1
;
14
int
cause_op
;
15
}
MoxieMMUResult
;
16
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int
moxie_mmu_translate
(
MoxieMMUResult
*
res
,
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CPUMoxieState
*
env
,
uint32_t
vaddr
,
19
int
rw
,
int
mmu_idx
);