hw/mips/gt64xxx: Fix typos in qemu_log_mask() formats
[qemu/ar7.git] / include / hw / net / xlnx-zynqmp-can.h
blobeb1558708bbdf580c88c75e0a8e31a5c9785dd83
1 /*
2 * QEMU model of the Xilinx ZynqMP CAN controller.
4 * Copyright (c) 2020 Xilinx Inc.
6 * Written-by: Vikram Garhwal<fnu.vikram@xilinx.com>
8 * Based on QEMU CAN Device emulation implemented by Jin Yang, Deniz Eren and
9 * Pavel Pisa.
11 * Permission is hereby granted, free of charge, to any person obtaining a copy
12 * of this software and associated documentation files (the "Software"), to deal
13 * in the Software without restriction, including without limitation the rights
14 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
15 * copies of the Software, and to permit persons to whom the Software is
16 * furnished to do so, subject to the following conditions:
18 * The above copyright notice and this permission notice shall be included in
19 * all copies or substantial portions of the Software.
21 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
22 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
23 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
24 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
25 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
26 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
27 * THE SOFTWARE.
30 #ifndef XLNX_ZYNQMP_CAN_H
31 #define XLNX_ZYNQMP_CAN_H
33 #include "hw/register.h"
34 #include "net/can_emu.h"
35 #include "net/can_host.h"
36 #include "qemu/fifo32.h"
37 #include "hw/ptimer.h"
38 #include "hw/qdev-clock.h"
40 #define TYPE_XLNX_ZYNQMP_CAN "xlnx.zynqmp-can"
42 #define XLNX_ZYNQMP_CAN(obj) \
43 OBJECT_CHECK(XlnxZynqMPCANState, (obj), TYPE_XLNX_ZYNQMP_CAN)
45 #define MAX_CAN_CTRLS 2
46 #define XLNX_ZYNQMP_CAN_R_MAX (0x84 / 4)
47 #define MAILBOX_CAPACITY 64
48 #define CAN_TIMER_MAX 0XFFFFUL
49 #define CAN_DEFAULT_CLOCK (24 * 1000 * 1000)
51 /* Each CAN_FRAME will have 4 * 32bit size. */
52 #define CAN_FRAME_SIZE 4
53 #define RXFIFO_SIZE (MAILBOX_CAPACITY * CAN_FRAME_SIZE)
55 typedef struct XlnxZynqMPCANState {
56 SysBusDevice parent_obj;
57 MemoryRegion iomem;
59 qemu_irq irq;
61 CanBusClientState bus_client;
62 CanBusState *canbus;
64 struct {
65 uint32_t ext_clk_freq;
66 } cfg;
68 RegisterInfo reg_info[XLNX_ZYNQMP_CAN_R_MAX];
69 uint32_t regs[XLNX_ZYNQMP_CAN_R_MAX];
71 Fifo32 rx_fifo;
72 Fifo32 tx_fifo;
73 Fifo32 txhpb_fifo;
75 ptimer_state *can_timer;
76 } XlnxZynqMPCANState;
78 #endif