2 * Copyright (c) 2003-2004 Fabrice Bellard
3 * Copyright (c) 2019 Red Hat, Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining a copy
6 * of this software and associated documentation files (the "Software"), to deal
7 * in the Software without restriction, including without limitation the rights
8 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
9 * copies of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 #include "qemu/osdep.h"
24 #include "qemu/error-report.h"
25 #include "qemu/option.h"
26 #include "qemu/cutils.h"
27 #include "qemu/units.h"
28 #include "qemu-common.h"
29 #include "qapi/error.h"
30 #include "qapi/qmp/qerror.h"
31 #include "qapi/qapi-visit-common.h"
32 #include "qapi/visitor.h"
33 #include "sysemu/qtest.h"
34 #include "sysemu/numa.h"
35 #include "sysemu/replay.h"
36 #include "sysemu/sysemu.h"
39 #include "hw/i386/x86.h"
40 #include "target/i386/cpu.h"
41 #include "hw/i386/topology.h"
42 #include "hw/i386/fw_cfg.h"
43 #include "hw/intc/i8259.h"
44 #include "hw/rtc/mc146818rtc.h"
46 #include "hw/acpi/cpu_hotplug.h"
49 #include "hw/loader.h"
50 #include "multiboot.h"
52 #include "standard-headers/asm-x86/bootparam.h"
53 #include CONFIG_DEVICES
56 #define BIOS_FILENAME "bios.bin"
58 /* Physical Address of PVH entry point read from kernel ELF NOTE */
59 static size_t pvh_start_addr
;
61 inline void init_topo_info(X86CPUTopoInfo
*topo_info
,
62 const X86MachineState
*x86ms
)
64 MachineState
*ms
= MACHINE(x86ms
);
66 topo_info
->dies_per_pkg
= x86ms
->smp_dies
;
67 topo_info
->cores_per_die
= ms
->smp
.cores
;
68 topo_info
->threads_per_core
= ms
->smp
.threads
;
72 * Calculates initial APIC ID for a specific CPU index
74 * Currently we need to be able to calculate the APIC ID from the CPU index
75 * alone (without requiring a CPU object), as the QEMU<->Seabios interfaces have
76 * no concept of "CPU index", and the NUMA tables on fw_cfg need the APIC ID of
77 * all CPUs up to max_cpus.
79 uint32_t x86_cpu_apic_id_from_index(X86MachineState
*x86ms
,
80 unsigned int cpu_index
)
82 X86MachineClass
*x86mc
= X86_MACHINE_GET_CLASS(x86ms
);
83 X86CPUTopoInfo topo_info
;
87 init_topo_info(&topo_info
, x86ms
);
89 correct_id
= x86_apicid_from_cpu_idx(&topo_info
, cpu_index
);
90 if (x86mc
->compat_apic_id_mode
) {
91 if (cpu_index
!= correct_id
&& !warned
&& !qtest_enabled()) {
92 error_report("APIC IDs set in compatibility mode, "
93 "CPU topology won't match the configuration");
103 void x86_cpu_new(X86MachineState
*x86ms
, int64_t apic_id
, Error
**errp
)
105 Object
*cpu
= object_new(MACHINE(x86ms
)->cpu_type
);
107 if (!object_property_set_uint(cpu
, "apic-id", apic_id
, errp
)) {
110 qdev_realize(DEVICE(cpu
), NULL
, errp
);
116 void x86_cpus_init(X86MachineState
*x86ms
, int default_cpu_version
)
119 const CPUArchIdList
*possible_cpus
;
120 MachineState
*ms
= MACHINE(x86ms
);
121 MachineClass
*mc
= MACHINE_GET_CLASS(x86ms
);
123 x86_cpu_set_default_version(default_cpu_version
);
126 * Calculates the limit to CPU APIC ID values
128 * Limit for the APIC ID value, so that all
129 * CPU APIC IDs are < x86ms->apic_id_limit.
131 * This is used for FW_CFG_MAX_CPUS. See comments on fw_cfg_arch_create().
133 x86ms
->apic_id_limit
= x86_cpu_apic_id_from_index(x86ms
,
134 ms
->smp
.max_cpus
- 1) + 1;
135 possible_cpus
= mc
->possible_cpu_arch_ids(ms
);
136 for (i
= 0; i
< ms
->smp
.cpus
; i
++) {
137 x86_cpu_new(x86ms
, possible_cpus
->cpus
[i
].arch_id
, &error_fatal
);
141 void x86_rtc_set_cpus_count(ISADevice
*rtc
, uint16_t cpus_count
)
143 if (cpus_count
> 0xff) {
145 * If the number of CPUs can't be represented in 8 bits, the
146 * BIOS must use "FW_CFG_NB_CPUS". Set RTC field to 0 just
147 * to make old BIOSes fail more predictably.
149 rtc_set_memory(rtc
, 0x5f, 0);
151 rtc_set_memory(rtc
, 0x5f, cpus_count
- 1);
155 static int x86_apic_cmp(const void *a
, const void *b
)
157 CPUArchId
*apic_a
= (CPUArchId
*)a
;
158 CPUArchId
*apic_b
= (CPUArchId
*)b
;
160 return apic_a
->arch_id
- apic_b
->arch_id
;
164 * returns pointer to CPUArchId descriptor that matches CPU's apic_id
165 * in ms->possible_cpus->cpus, if ms->possible_cpus->cpus has no
166 * entry corresponding to CPU's apic_id returns NULL.
168 CPUArchId
*x86_find_cpu_slot(MachineState
*ms
, uint32_t id
, int *idx
)
170 CPUArchId apic_id
, *found_cpu
;
172 apic_id
.arch_id
= id
;
173 found_cpu
= bsearch(&apic_id
, ms
->possible_cpus
->cpus
,
174 ms
->possible_cpus
->len
, sizeof(*ms
->possible_cpus
->cpus
),
176 if (found_cpu
&& idx
) {
177 *idx
= found_cpu
- ms
->possible_cpus
->cpus
;
182 void x86_cpu_plug(HotplugHandler
*hotplug_dev
,
183 DeviceState
*dev
, Error
**errp
)
185 CPUArchId
*found_cpu
;
186 Error
*local_err
= NULL
;
187 X86CPU
*cpu
= X86_CPU(dev
);
188 X86MachineState
*x86ms
= X86_MACHINE(hotplug_dev
);
190 if (x86ms
->acpi_dev
) {
191 hotplug_handler_plug(x86ms
->acpi_dev
, dev
, &local_err
);
197 /* increment the number of CPUs */
200 x86_rtc_set_cpus_count(x86ms
->rtc
, x86ms
->boot_cpus
);
203 fw_cfg_modify_i16(x86ms
->fw_cfg
, FW_CFG_NB_CPUS
, x86ms
->boot_cpus
);
206 found_cpu
= x86_find_cpu_slot(MACHINE(x86ms
), cpu
->apic_id
, NULL
);
207 found_cpu
->cpu
= OBJECT(dev
);
209 error_propagate(errp
, local_err
);
212 void x86_cpu_unplug_request_cb(HotplugHandler
*hotplug_dev
,
213 DeviceState
*dev
, Error
**errp
)
216 X86CPU
*cpu
= X86_CPU(dev
);
217 X86MachineState
*x86ms
= X86_MACHINE(hotplug_dev
);
219 if (!x86ms
->acpi_dev
) {
220 error_setg(errp
, "CPU hot unplug not supported without ACPI");
224 x86_find_cpu_slot(MACHINE(x86ms
), cpu
->apic_id
, &idx
);
227 error_setg(errp
, "Boot CPU is unpluggable");
231 hotplug_handler_unplug_request(x86ms
->acpi_dev
, dev
,
235 void x86_cpu_unplug_cb(HotplugHandler
*hotplug_dev
,
236 DeviceState
*dev
, Error
**errp
)
238 CPUArchId
*found_cpu
;
239 Error
*local_err
= NULL
;
240 X86CPU
*cpu
= X86_CPU(dev
);
241 X86MachineState
*x86ms
= X86_MACHINE(hotplug_dev
);
243 hotplug_handler_unplug(x86ms
->acpi_dev
, dev
, &local_err
);
248 found_cpu
= x86_find_cpu_slot(MACHINE(x86ms
), cpu
->apic_id
, NULL
);
249 found_cpu
->cpu
= NULL
;
252 /* decrement the number of CPUs */
254 /* Update the number of CPUs in CMOS */
255 x86_rtc_set_cpus_count(x86ms
->rtc
, x86ms
->boot_cpus
);
256 fw_cfg_modify_i16(x86ms
->fw_cfg
, FW_CFG_NB_CPUS
, x86ms
->boot_cpus
);
258 error_propagate(errp
, local_err
);
261 void x86_cpu_pre_plug(HotplugHandler
*hotplug_dev
,
262 DeviceState
*dev
, Error
**errp
)
267 X86CPUTopoIDs topo_ids
;
268 X86CPU
*cpu
= X86_CPU(dev
);
269 CPUX86State
*env
= &cpu
->env
;
270 MachineState
*ms
= MACHINE(hotplug_dev
);
271 X86MachineState
*x86ms
= X86_MACHINE(hotplug_dev
);
272 unsigned int smp_cores
= ms
->smp
.cores
;
273 unsigned int smp_threads
= ms
->smp
.threads
;
274 X86CPUTopoInfo topo_info
;
276 if (!object_dynamic_cast(OBJECT(cpu
), ms
->cpu_type
)) {
277 error_setg(errp
, "Invalid CPU type, expected cpu type: '%s'",
282 init_topo_info(&topo_info
, x86ms
);
284 env
->nr_dies
= x86ms
->smp_dies
;
287 * If APIC ID is not set,
288 * set it based on socket/die/core/thread properties.
290 if (cpu
->apic_id
== UNASSIGNED_APIC_ID
) {
291 int max_socket
= (ms
->smp
.max_cpus
- 1) /
292 smp_threads
/ smp_cores
/ x86ms
->smp_dies
;
295 * die-id was optional in QEMU 4.0 and older, so keep it optional
296 * if there's only one die per socket.
298 if (cpu
->die_id
< 0 && x86ms
->smp_dies
== 1) {
302 if (cpu
->socket_id
< 0) {
303 error_setg(errp
, "CPU socket-id is not set");
305 } else if (cpu
->socket_id
> max_socket
) {
306 error_setg(errp
, "Invalid CPU socket-id: %u must be in range 0:%u",
307 cpu
->socket_id
, max_socket
);
310 if (cpu
->die_id
< 0) {
311 error_setg(errp
, "CPU die-id is not set");
313 } else if (cpu
->die_id
> x86ms
->smp_dies
- 1) {
314 error_setg(errp
, "Invalid CPU die-id: %u must be in range 0:%u",
315 cpu
->die_id
, x86ms
->smp_dies
- 1);
318 if (cpu
->core_id
< 0) {
319 error_setg(errp
, "CPU core-id is not set");
321 } else if (cpu
->core_id
> (smp_cores
- 1)) {
322 error_setg(errp
, "Invalid CPU core-id: %u must be in range 0:%u",
323 cpu
->core_id
, smp_cores
- 1);
326 if (cpu
->thread_id
< 0) {
327 error_setg(errp
, "CPU thread-id is not set");
329 } else if (cpu
->thread_id
> (smp_threads
- 1)) {
330 error_setg(errp
, "Invalid CPU thread-id: %u must be in range 0:%u",
331 cpu
->thread_id
, smp_threads
- 1);
335 topo_ids
.pkg_id
= cpu
->socket_id
;
336 topo_ids
.die_id
= cpu
->die_id
;
337 topo_ids
.core_id
= cpu
->core_id
;
338 topo_ids
.smt_id
= cpu
->thread_id
;
339 cpu
->apic_id
= x86_apicid_from_topo_ids(&topo_info
, &topo_ids
);
342 cpu_slot
= x86_find_cpu_slot(MACHINE(x86ms
), cpu
->apic_id
, &idx
);
344 MachineState
*ms
= MACHINE(x86ms
);
346 x86_topo_ids_from_apicid(cpu
->apic_id
, &topo_info
, &topo_ids
);
348 "Invalid CPU [socket: %u, die: %u, core: %u, thread: %u] with"
349 " APIC ID %" PRIu32
", valid index range 0:%d",
350 topo_ids
.pkg_id
, topo_ids
.die_id
, topo_ids
.core_id
, topo_ids
.smt_id
,
351 cpu
->apic_id
, ms
->possible_cpus
->len
- 1);
356 error_setg(errp
, "CPU[%d] with APIC ID %" PRIu32
" exists",
361 /* if 'address' properties socket-id/core-id/thread-id are not set, set them
362 * so that machine_query_hotpluggable_cpus would show correct values
364 /* TODO: move socket_id/core_id/thread_id checks into x86_cpu_realizefn()
365 * once -smp refactoring is complete and there will be CPU private
366 * CPUState::nr_cores and CPUState::nr_threads fields instead of globals */
367 x86_topo_ids_from_apicid(cpu
->apic_id
, &topo_info
, &topo_ids
);
368 if (cpu
->socket_id
!= -1 && cpu
->socket_id
!= topo_ids
.pkg_id
) {
369 error_setg(errp
, "property socket-id: %u doesn't match set apic-id:"
370 " 0x%x (socket-id: %u)", cpu
->socket_id
, cpu
->apic_id
,
374 cpu
->socket_id
= topo_ids
.pkg_id
;
376 if (cpu
->die_id
!= -1 && cpu
->die_id
!= topo_ids
.die_id
) {
377 error_setg(errp
, "property die-id: %u doesn't match set apic-id:"
378 " 0x%x (die-id: %u)", cpu
->die_id
, cpu
->apic_id
, topo_ids
.die_id
);
381 cpu
->die_id
= topo_ids
.die_id
;
383 if (cpu
->core_id
!= -1 && cpu
->core_id
!= topo_ids
.core_id
) {
384 error_setg(errp
, "property core-id: %u doesn't match set apic-id:"
385 " 0x%x (core-id: %u)", cpu
->core_id
, cpu
->apic_id
,
389 cpu
->core_id
= topo_ids
.core_id
;
391 if (cpu
->thread_id
!= -1 && cpu
->thread_id
!= topo_ids
.smt_id
) {
392 error_setg(errp
, "property thread-id: %u doesn't match set apic-id:"
393 " 0x%x (thread-id: %u)", cpu
->thread_id
, cpu
->apic_id
,
397 cpu
->thread_id
= topo_ids
.smt_id
;
399 if (hyperv_feat_enabled(cpu
, HYPERV_FEAT_VPINDEX
) &&
400 !kvm_hv_vpindex_settable()) {
401 error_setg(errp
, "kernel doesn't allow setting HyperV VP_INDEX");
408 numa_cpu_pre_plug(cpu_slot
, dev
, errp
);
411 CpuInstanceProperties
412 x86_cpu_index_to_props(MachineState
*ms
, unsigned cpu_index
)
414 MachineClass
*mc
= MACHINE_GET_CLASS(ms
);
415 const CPUArchIdList
*possible_cpus
= mc
->possible_cpu_arch_ids(ms
);
417 assert(cpu_index
< possible_cpus
->len
);
418 return possible_cpus
->cpus
[cpu_index
].props
;
421 int64_t x86_get_default_cpu_node_id(const MachineState
*ms
, int idx
)
423 X86CPUTopoIDs topo_ids
;
424 X86MachineState
*x86ms
= X86_MACHINE(ms
);
425 X86CPUTopoInfo topo_info
;
427 init_topo_info(&topo_info
, x86ms
);
429 assert(idx
< ms
->possible_cpus
->len
);
430 x86_topo_ids_from_apicid(ms
->possible_cpus
->cpus
[idx
].arch_id
,
431 &topo_info
, &topo_ids
);
432 return topo_ids
.pkg_id
% ms
->numa_state
->num_nodes
;
435 const CPUArchIdList
*x86_possible_cpu_arch_ids(MachineState
*ms
)
437 X86MachineState
*x86ms
= X86_MACHINE(ms
);
438 unsigned int max_cpus
= ms
->smp
.max_cpus
;
439 X86CPUTopoInfo topo_info
;
442 if (ms
->possible_cpus
) {
444 * make sure that max_cpus hasn't changed since the first use, i.e.
445 * -smp hasn't been parsed after it
447 assert(ms
->possible_cpus
->len
== max_cpus
);
448 return ms
->possible_cpus
;
451 ms
->possible_cpus
= g_malloc0(sizeof(CPUArchIdList
) +
452 sizeof(CPUArchId
) * max_cpus
);
453 ms
->possible_cpus
->len
= max_cpus
;
455 init_topo_info(&topo_info
, x86ms
);
457 for (i
= 0; i
< ms
->possible_cpus
->len
; i
++) {
458 X86CPUTopoIDs topo_ids
;
460 ms
->possible_cpus
->cpus
[i
].type
= ms
->cpu_type
;
461 ms
->possible_cpus
->cpus
[i
].vcpus_count
= 1;
462 ms
->possible_cpus
->cpus
[i
].arch_id
=
463 x86_cpu_apic_id_from_index(x86ms
, i
);
464 x86_topo_ids_from_apicid(ms
->possible_cpus
->cpus
[i
].arch_id
,
465 &topo_info
, &topo_ids
);
466 ms
->possible_cpus
->cpus
[i
].props
.has_socket_id
= true;
467 ms
->possible_cpus
->cpus
[i
].props
.socket_id
= topo_ids
.pkg_id
;
468 if (x86ms
->smp_dies
> 1) {
469 ms
->possible_cpus
->cpus
[i
].props
.has_die_id
= true;
470 ms
->possible_cpus
->cpus
[i
].props
.die_id
= topo_ids
.die_id
;
472 ms
->possible_cpus
->cpus
[i
].props
.has_core_id
= true;
473 ms
->possible_cpus
->cpus
[i
].props
.core_id
= topo_ids
.core_id
;
474 ms
->possible_cpus
->cpus
[i
].props
.has_thread_id
= true;
475 ms
->possible_cpus
->cpus
[i
].props
.thread_id
= topo_ids
.smt_id
;
477 return ms
->possible_cpus
;
480 static void x86_nmi(NMIState
*n
, int cpu_index
, Error
**errp
)
482 /* cpu index isn't used */
486 X86CPU
*cpu
= X86_CPU(cs
);
488 if (!cpu
->apic_state
) {
489 cpu_interrupt(cs
, CPU_INTERRUPT_NMI
);
491 apic_deliver_nmi(cpu
->apic_state
);
496 static long get_file_size(FILE *f
)
500 /* XXX: on Unix systems, using fstat() probably makes more sense */
503 fseek(f
, 0, SEEK_END
);
505 fseek(f
, where
, SEEK_SET
);
511 uint64_t cpu_get_tsc(CPUX86State
*env
)
513 return cpu_get_ticks();
517 static void pic_irq_request(void *opaque
, int irq
, int level
)
519 CPUState
*cs
= first_cpu
;
520 X86CPU
*cpu
= X86_CPU(cs
);
522 trace_x86_pic_interrupt(irq
, level
);
523 if (cpu
->apic_state
&& !kvm_irqchip_in_kernel()) {
526 if (apic_accept_pic_intr(cpu
->apic_state
)) {
527 apic_deliver_pic_intr(cpu
->apic_state
, level
);
532 cpu_interrupt(cs
, CPU_INTERRUPT_HARD
);
534 cpu_reset_interrupt(cs
, CPU_INTERRUPT_HARD
);
539 qemu_irq
x86_allocate_cpu_irq(void)
541 return qemu_allocate_irq(pic_irq_request
, NULL
, 0);
544 int cpu_get_pic_interrupt(CPUX86State
*env
)
546 X86CPU
*cpu
= env_archcpu(env
);
549 if (!kvm_irqchip_in_kernel()) {
550 intno
= apic_get_interrupt(cpu
->apic_state
);
554 /* read the irq from the PIC */
555 if (!apic_accept_pic_intr(cpu
->apic_state
)) {
560 intno
= pic_read_irq(isa_pic
);
564 DeviceState
*cpu_get_current_apic(void)
567 X86CPU
*cpu
= X86_CPU(current_cpu
);
568 return cpu
->apic_state
;
574 void gsi_handler(void *opaque
, int n
, int level
)
576 GSIState
*s
= opaque
;
578 trace_x86_gsi_interrupt(n
, level
);
579 if (n
< ISA_NUM_IRQS
) {
580 /* Under KVM, Kernel will forward to both PIC and IOAPIC */
581 qemu_set_irq(s
->i8259_irq
[n
], level
);
583 qemu_set_irq(s
->ioapic_irq
[n
], level
);
586 void ioapic_init_gsi(GSIState
*gsi_state
, const char *parent_name
)
593 if (kvm_ioapic_in_kernel()) {
594 dev
= qdev_new(TYPE_KVM_IOAPIC
);
596 dev
= qdev_new(TYPE_IOAPIC
);
598 object_property_add_child(object_resolve_path(parent_name
, NULL
),
599 "ioapic", OBJECT(dev
));
600 d
= SYS_BUS_DEVICE(dev
);
601 sysbus_realize_and_unref(d
, &error_fatal
);
602 sysbus_mmio_map(d
, 0, IO_APIC_DEFAULT_ADDRESS
);
604 for (i
= 0; i
< IOAPIC_NUM_PINS
; i
++) {
605 gsi_state
->ioapic_irq
[i
] = qdev_get_gpio_in(dev
, i
);
614 } __attribute__((packed
));
618 * The entry point into the kernel for PVH boot is different from
619 * the native entry point. The PVH entry is defined by the x86/HVM
620 * direct boot ABI and is available in an ELFNOTE in the kernel binary.
622 * This function is passed to load_elf() when it is called from
623 * load_elfboot() which then additionally checks for an ELF Note of
624 * type XEN_ELFNOTE_PHYS32_ENTRY and passes it to this function to
625 * parse the PVH entry address from the ELF Note.
627 * Due to trickery in elf_opts.h, load_elf() is actually available as
628 * load_elf32() or load_elf64() and this routine needs to be able
629 * to deal with being called as 32 or 64 bit.
631 * The address of the PVH entry point is saved to the 'pvh_start_addr'
632 * global variable. (although the entry point is 32-bit, the kernel
633 * binary can be either 32-bit or 64-bit).
635 static uint64_t read_pvh_start_addr(void *arg1
, void *arg2
, bool is64
)
637 size_t *elf_note_data_addr
;
639 /* Check if ELF Note header passed in is valid */
645 struct elf64_note
*nhdr64
= (struct elf64_note
*)arg1
;
646 uint64_t nhdr_size64
= sizeof(struct elf64_note
);
647 uint64_t phdr_align
= *(uint64_t *)arg2
;
648 uint64_t nhdr_namesz
= nhdr64
->n_namesz
;
651 ((void *)nhdr64
) + nhdr_size64
+
652 QEMU_ALIGN_UP(nhdr_namesz
, phdr_align
);
654 struct elf32_note
*nhdr32
= (struct elf32_note
*)arg1
;
655 uint32_t nhdr_size32
= sizeof(struct elf32_note
);
656 uint32_t phdr_align
= *(uint32_t *)arg2
;
657 uint32_t nhdr_namesz
= nhdr32
->n_namesz
;
660 ((void *)nhdr32
) + nhdr_size32
+
661 QEMU_ALIGN_UP(nhdr_namesz
, phdr_align
);
664 pvh_start_addr
= *elf_note_data_addr
;
666 return pvh_start_addr
;
669 static bool load_elfboot(const char *kernel_filename
,
670 int kernel_file_size
,
672 size_t pvh_xen_start_addr
,
676 uint32_t mh_load_addr
= 0;
677 uint32_t elf_kernel_size
= 0;
679 uint64_t elf_low
, elf_high
;
682 if (ldl_p(header
) != 0x464c457f) {
683 return false; /* no elfboot */
686 bool elf_is64
= header
[EI_CLASS
] == ELFCLASS64
;
688 ((Elf64_Ehdr
*)header
)->e_flags
: ((Elf32_Ehdr
*)header
)->e_flags
;
690 if (flags
& 0x00010004) { /* LOAD_ELF_HEADER_HAS_ADDR */
691 error_report("elfboot unsupported flags = %x", flags
);
695 uint64_t elf_note_type
= XEN_ELFNOTE_PHYS32_ENTRY
;
696 kernel_size
= load_elf(kernel_filename
, read_pvh_start_addr
,
697 NULL
, &elf_note_type
, &elf_entry
,
698 &elf_low
, &elf_high
, NULL
, 0, I386_ELF_MACHINE
,
701 if (kernel_size
< 0) {
702 error_report("Error while loading elf kernel");
705 mh_load_addr
= elf_low
;
706 elf_kernel_size
= elf_high
- elf_low
;
708 if (pvh_start_addr
== 0) {
709 error_report("Error loading uncompressed kernel without PVH ELF Note");
712 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_ENTRY
, pvh_start_addr
);
713 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_ADDR
, mh_load_addr
);
714 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_SIZE
, elf_kernel_size
);
719 void x86_load_linux(X86MachineState
*x86ms
,
723 bool linuxboot_dma_enabled
)
726 int setup_size
, kernel_size
, cmdline_size
;
727 int dtb_size
, setup_data_offset
;
729 uint8_t header
[8192], *setup
, *kernel
;
730 hwaddr real_addr
, prot_addr
, cmdline_addr
, initrd_addr
= 0;
733 MachineState
*machine
= MACHINE(x86ms
);
734 struct setup_data
*setup_data
;
735 const char *kernel_filename
= machine
->kernel_filename
;
736 const char *initrd_filename
= machine
->initrd_filename
;
737 const char *dtb_filename
= machine
->dtb
;
738 const char *kernel_cmdline
= machine
->kernel_cmdline
;
740 /* Align to 16 bytes as a paranoia measure */
741 cmdline_size
= (strlen(kernel_cmdline
) + 16) & ~15;
743 /* load the kernel header */
744 f
= fopen(kernel_filename
, "rb");
746 fprintf(stderr
, "qemu: could not open kernel file '%s': %s\n",
747 kernel_filename
, strerror(errno
));
751 kernel_size
= get_file_size(f
);
753 fread(header
, 1, MIN(ARRAY_SIZE(header
), kernel_size
), f
) !=
754 MIN(ARRAY_SIZE(header
), kernel_size
)) {
755 fprintf(stderr
, "qemu: could not load kernel '%s': %s\n",
756 kernel_filename
, strerror(errno
));
760 /* kernel protocol version */
761 if (ldl_p(header
+ 0x202) == 0x53726448) {
762 protocol
= lduw_p(header
+ 0x206);
765 * This could be a multiboot kernel. If it is, let's stop treating it
766 * like a Linux kernel.
767 * Note: some multiboot images could be in the ELF format (the same of
768 * PVH), so we try multiboot first since we check the multiboot magic
769 * header before to load it.
771 if (load_multiboot(fw_cfg
, f
, kernel_filename
, initrd_filename
,
772 kernel_cmdline
, kernel_size
, header
)) {
776 * Check if the file is an uncompressed kernel file (ELF) and load it,
777 * saving the PVH entry point used by the x86/HVM direct boot ABI.
778 * If load_elfboot() is successful, populate the fw_cfg info.
781 load_elfboot(kernel_filename
, kernel_size
,
782 header
, pvh_start_addr
, fw_cfg
)) {
785 fw_cfg_add_i32(fw_cfg
, FW_CFG_CMDLINE_SIZE
,
786 strlen(kernel_cmdline
) + 1);
787 fw_cfg_add_string(fw_cfg
, FW_CFG_CMDLINE_DATA
, kernel_cmdline
);
789 fw_cfg_add_i32(fw_cfg
, FW_CFG_SETUP_SIZE
, sizeof(header
));
790 fw_cfg_add_bytes(fw_cfg
, FW_CFG_SETUP_DATA
,
791 header
, sizeof(header
));
794 if (initrd_filename
) {
795 GMappedFile
*mapped_file
;
800 mapped_file
= g_mapped_file_new(initrd_filename
, false, &gerr
);
802 fprintf(stderr
, "qemu: error reading initrd %s: %s\n",
803 initrd_filename
, gerr
->message
);
806 x86ms
->initrd_mapped_file
= mapped_file
;
808 initrd_data
= g_mapped_file_get_contents(mapped_file
);
809 initrd_size
= g_mapped_file_get_length(mapped_file
);
810 initrd_max
= x86ms
->below_4g_mem_size
- acpi_data_size
- 1;
811 if (initrd_size
>= initrd_max
) {
812 fprintf(stderr
, "qemu: initrd is too large, cannot support."
813 "(max: %"PRIu32
", need %"PRId64
")\n",
814 initrd_max
, (uint64_t)initrd_size
);
818 initrd_addr
= (initrd_max
- initrd_size
) & ~4095;
820 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_ADDR
, initrd_addr
);
821 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_SIZE
, initrd_size
);
822 fw_cfg_add_bytes(fw_cfg
, FW_CFG_INITRD_DATA
, initrd_data
,
826 option_rom
[nb_option_roms
].bootindex
= 0;
827 option_rom
[nb_option_roms
].name
= "pvh.bin";
835 if (protocol
< 0x200 || !(header
[0x211] & 0x01)) {
838 cmdline_addr
= 0x9a000 - cmdline_size
;
840 } else if (protocol
< 0x202) {
841 /* High but ancient kernel */
843 cmdline_addr
= 0x9a000 - cmdline_size
;
844 prot_addr
= 0x100000;
846 /* High and recent kernel */
848 cmdline_addr
= 0x20000;
849 prot_addr
= 0x100000;
852 /* highest address for loading the initrd */
853 if (protocol
>= 0x20c &&
854 lduw_p(header
+ 0x236) & XLF_CAN_BE_LOADED_ABOVE_4G
) {
856 * Linux has supported initrd up to 4 GB for a very long time (2007,
857 * long before XLF_CAN_BE_LOADED_ABOVE_4G which was added in 2013),
858 * though it only sets initrd_max to 2 GB to "work around bootloader
859 * bugs". Luckily, QEMU firmware(which does something like bootloader)
860 * has supported this.
862 * It's believed that if XLF_CAN_BE_LOADED_ABOVE_4G is set, initrd can
863 * be loaded into any address.
865 * In addition, initrd_max is uint32_t simply because QEMU doesn't
866 * support the 64-bit boot protocol (specifically the ext_ramdisk_image
869 * Therefore here just limit initrd_max to UINT32_MAX simply as well.
871 initrd_max
= UINT32_MAX
;
872 } else if (protocol
>= 0x203) {
873 initrd_max
= ldl_p(header
+ 0x22c);
875 initrd_max
= 0x37ffffff;
878 if (initrd_max
>= x86ms
->below_4g_mem_size
- acpi_data_size
) {
879 initrd_max
= x86ms
->below_4g_mem_size
- acpi_data_size
- 1;
882 fw_cfg_add_i32(fw_cfg
, FW_CFG_CMDLINE_ADDR
, cmdline_addr
);
883 fw_cfg_add_i32(fw_cfg
, FW_CFG_CMDLINE_SIZE
, strlen(kernel_cmdline
) + 1);
884 fw_cfg_add_string(fw_cfg
, FW_CFG_CMDLINE_DATA
, kernel_cmdline
);
886 if (protocol
>= 0x202) {
887 stl_p(header
+ 0x228, cmdline_addr
);
889 stw_p(header
+ 0x20, 0xA33F);
890 stw_p(header
+ 0x22, cmdline_addr
- real_addr
);
893 /* handle vga= parameter */
894 vmode
= strstr(kernel_cmdline
, "vga=");
896 unsigned int video_mode
;
901 if (!strncmp(vmode
, "normal", 6)) {
903 } else if (!strncmp(vmode
, "ext", 3)) {
905 } else if (!strncmp(vmode
, "ask", 3)) {
908 ret
= qemu_strtoui(vmode
, &end
, 0, &video_mode
);
909 if (ret
!= 0 || (*end
&& *end
!= ' ')) {
910 fprintf(stderr
, "qemu: invalid 'vga=' kernel parameter.\n");
914 stw_p(header
+ 0x1fa, video_mode
);
919 * High nybble = B reserved for QEMU; low nybble is revision number.
920 * If this code is substantially changed, you may want to consider
921 * incrementing the revision.
923 if (protocol
>= 0x200) {
924 header
[0x210] = 0xB0;
927 if (protocol
>= 0x201) {
928 header
[0x211] |= 0x80; /* CAN_USE_HEAP */
929 stw_p(header
+ 0x224, cmdline_addr
- real_addr
- 0x200);
933 if (initrd_filename
) {
934 GMappedFile
*mapped_file
;
939 if (protocol
< 0x200) {
940 fprintf(stderr
, "qemu: linux kernel too old to load a ram disk\n");
944 mapped_file
= g_mapped_file_new(initrd_filename
, false, &gerr
);
946 fprintf(stderr
, "qemu: error reading initrd %s: %s\n",
947 initrd_filename
, gerr
->message
);
950 x86ms
->initrd_mapped_file
= mapped_file
;
952 initrd_data
= g_mapped_file_get_contents(mapped_file
);
953 initrd_size
= g_mapped_file_get_length(mapped_file
);
954 if (initrd_size
>= initrd_max
) {
955 fprintf(stderr
, "qemu: initrd is too large, cannot support."
956 "(max: %"PRIu32
", need %"PRId64
")\n",
957 initrd_max
, (uint64_t)initrd_size
);
961 initrd_addr
= (initrd_max
- initrd_size
) & ~4095;
963 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_ADDR
, initrd_addr
);
964 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_SIZE
, initrd_size
);
965 fw_cfg_add_bytes(fw_cfg
, FW_CFG_INITRD_DATA
, initrd_data
, initrd_size
);
967 stl_p(header
+ 0x218, initrd_addr
);
968 stl_p(header
+ 0x21c, initrd_size
);
971 /* load kernel and setup */
972 setup_size
= header
[0x1f1];
973 if (setup_size
== 0) {
976 setup_size
= (setup_size
+ 1) * 512;
977 if (setup_size
> kernel_size
) {
978 fprintf(stderr
, "qemu: invalid kernel header\n");
981 kernel_size
-= setup_size
;
983 setup
= g_malloc(setup_size
);
984 kernel
= g_malloc(kernel_size
);
985 fseek(f
, 0, SEEK_SET
);
986 if (fread(setup
, 1, setup_size
, f
) != setup_size
) {
987 fprintf(stderr
, "fread() failed\n");
990 if (fread(kernel
, 1, kernel_size
, f
) != kernel_size
) {
991 fprintf(stderr
, "fread() failed\n");
996 /* append dtb to kernel */
998 if (protocol
< 0x209) {
999 fprintf(stderr
, "qemu: Linux kernel too old to load a dtb\n");
1003 dtb_size
= get_image_size(dtb_filename
);
1004 if (dtb_size
<= 0) {
1005 fprintf(stderr
, "qemu: error reading dtb %s: %s\n",
1006 dtb_filename
, strerror(errno
));
1010 setup_data_offset
= QEMU_ALIGN_UP(kernel_size
, 16);
1011 kernel_size
= setup_data_offset
+ sizeof(struct setup_data
) + dtb_size
;
1012 kernel
= g_realloc(kernel
, kernel_size
);
1014 stq_p(header
+ 0x250, prot_addr
+ setup_data_offset
);
1016 setup_data
= (struct setup_data
*)(kernel
+ setup_data_offset
);
1017 setup_data
->next
= 0;
1018 setup_data
->type
= cpu_to_le32(SETUP_DTB
);
1019 setup_data
->len
= cpu_to_le32(dtb_size
);
1021 load_image_size(dtb_filename
, setup_data
->data
, dtb_size
);
1024 memcpy(setup
, header
, MIN(sizeof(header
), setup_size
));
1026 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_ADDR
, prot_addr
);
1027 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_SIZE
, kernel_size
);
1028 fw_cfg_add_bytes(fw_cfg
, FW_CFG_KERNEL_DATA
, kernel
, kernel_size
);
1030 fw_cfg_add_i32(fw_cfg
, FW_CFG_SETUP_ADDR
, real_addr
);
1031 fw_cfg_add_i32(fw_cfg
, FW_CFG_SETUP_SIZE
, setup_size
);
1032 fw_cfg_add_bytes(fw_cfg
, FW_CFG_SETUP_DATA
, setup
, setup_size
);
1034 option_rom
[nb_option_roms
].bootindex
= 0;
1035 option_rom
[nb_option_roms
].name
= "linuxboot.bin";
1036 if (linuxboot_dma_enabled
&& fw_cfg_dma_enabled(fw_cfg
)) {
1037 option_rom
[nb_option_roms
].name
= "linuxboot_dma.bin";
1042 void x86_bios_rom_init(MemoryRegion
*rom_memory
, bool isapc_ram_fw
)
1045 MemoryRegion
*bios
, *isa_bios
;
1046 int bios_size
, isa_bios_size
;
1050 if (bios_name
== NULL
) {
1051 bios_name
= BIOS_FILENAME
;
1053 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
1055 bios_size
= get_image_size(filename
);
1059 if (bios_size
<= 0 ||
1060 (bios_size
% 65536) != 0) {
1063 bios
= g_malloc(sizeof(*bios
));
1064 memory_region_init_ram(bios
, NULL
, "pc.bios", bios_size
, &error_fatal
);
1065 if (!isapc_ram_fw
) {
1066 memory_region_set_readonly(bios
, true);
1068 ret
= rom_add_file_fixed(bios_name
, (uint32_t)(-bios_size
), -1);
1071 fprintf(stderr
, "qemu: could not load PC BIOS '%s'\n", bios_name
);
1076 /* map the last 128KB of the BIOS in ISA space */
1077 isa_bios_size
= MIN(bios_size
, 128 * KiB
);
1078 isa_bios
= g_malloc(sizeof(*isa_bios
));
1079 memory_region_init_alias(isa_bios
, NULL
, "isa-bios", bios
,
1080 bios_size
- isa_bios_size
, isa_bios_size
);
1081 memory_region_add_subregion_overlap(rom_memory
,
1082 0x100000 - isa_bios_size
,
1085 if (!isapc_ram_fw
) {
1086 memory_region_set_readonly(isa_bios
, true);
1089 /* map all the bios at the top of memory */
1090 memory_region_add_subregion(rom_memory
,
1091 (uint32_t)(-bios_size
),
1095 bool x86_machine_is_smm_enabled(const X86MachineState
*x86ms
)
1097 bool smm_available
= false;
1099 if (x86ms
->smm
== ON_OFF_AUTO_OFF
) {
1103 if (tcg_enabled() || qtest_enabled()) {
1104 smm_available
= true;
1105 } else if (kvm_enabled()) {
1106 smm_available
= kvm_has_smm();
1109 if (smm_available
) {
1113 if (x86ms
->smm
== ON_OFF_AUTO_ON
) {
1114 error_report("System Management Mode not supported by this hypervisor.");
1120 static void x86_machine_get_smm(Object
*obj
, Visitor
*v
, const char *name
,
1121 void *opaque
, Error
**errp
)
1123 X86MachineState
*x86ms
= X86_MACHINE(obj
);
1124 OnOffAuto smm
= x86ms
->smm
;
1126 visit_type_OnOffAuto(v
, name
, &smm
, errp
);
1129 static void x86_machine_set_smm(Object
*obj
, Visitor
*v
, const char *name
,
1130 void *opaque
, Error
**errp
)
1132 X86MachineState
*x86ms
= X86_MACHINE(obj
);
1134 visit_type_OnOffAuto(v
, name
, &x86ms
->smm
, errp
);
1137 bool x86_machine_is_acpi_enabled(const X86MachineState
*x86ms
)
1139 if (x86ms
->acpi
== ON_OFF_AUTO_OFF
) {
1145 static void x86_machine_get_acpi(Object
*obj
, Visitor
*v
, const char *name
,
1146 void *opaque
, Error
**errp
)
1148 X86MachineState
*x86ms
= X86_MACHINE(obj
);
1149 OnOffAuto acpi
= x86ms
->acpi
;
1151 visit_type_OnOffAuto(v
, name
, &acpi
, errp
);
1154 static void x86_machine_set_acpi(Object
*obj
, Visitor
*v
, const char *name
,
1155 void *opaque
, Error
**errp
)
1157 X86MachineState
*x86ms
= X86_MACHINE(obj
);
1159 visit_type_OnOffAuto(v
, name
, &x86ms
->acpi
, errp
);
1162 static void x86_machine_initfn(Object
*obj
)
1164 X86MachineState
*x86ms
= X86_MACHINE(obj
);
1166 x86ms
->smm
= ON_OFF_AUTO_AUTO
;
1167 x86ms
->acpi
= ON_OFF_AUTO_AUTO
;
1168 x86ms
->smp_dies
= 1;
1171 static void x86_machine_class_init(ObjectClass
*oc
, void *data
)
1173 MachineClass
*mc
= MACHINE_CLASS(oc
);
1174 X86MachineClass
*x86mc
= X86_MACHINE_CLASS(oc
);
1175 NMIClass
*nc
= NMI_CLASS(oc
);
1177 mc
->cpu_index_to_instance_props
= x86_cpu_index_to_props
;
1178 mc
->get_default_cpu_node_id
= x86_get_default_cpu_node_id
;
1179 mc
->possible_cpu_arch_ids
= x86_possible_cpu_arch_ids
;
1180 x86mc
->compat_apic_id_mode
= false;
1181 x86mc
->save_tsc_khz
= true;
1182 nc
->nmi_monitor_handler
= x86_nmi
;
1184 object_class_property_add(oc
, X86_MACHINE_SMM
, "OnOffAuto",
1185 x86_machine_get_smm
, x86_machine_set_smm
,
1187 object_class_property_set_description(oc
, X86_MACHINE_SMM
,
1190 object_class_property_add(oc
, X86_MACHINE_ACPI
, "OnOffAuto",
1191 x86_machine_get_acpi
, x86_machine_set_acpi
,
1193 object_class_property_set_description(oc
, X86_MACHINE_ACPI
,
1197 static const TypeInfo x86_machine_info
= {
1198 .name
= TYPE_X86_MACHINE
,
1199 .parent
= TYPE_MACHINE
,
1201 .instance_size
= sizeof(X86MachineState
),
1202 .instance_init
= x86_machine_initfn
,
1203 .class_size
= sizeof(X86MachineClass
),
1204 .class_init
= x86_machine_class_init
,
1205 .interfaces
= (InterfaceInfo
[]) {
1211 static void x86_machine_register_types(void)
1213 type_register_static(&x86_machine_info
);
1216 type_init(x86_machine_register_types
)