target-s390x/misc_helper.c

   1 /*
   2  *  S/390 misc helper routines
   3  *
   4  *  Copyright (c) 2009 Ulrich Hecht
   5  *  Copyright (c) 2009 Alexander Graf
   6  *
   7  * This library is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU Lesser General Public
   9  * License as published by the Free Software Foundation; either
  10  * version 2 of the License, or (at your option) any later version.
  11  *
  12  * This library is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15  * Lesser General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU Lesser General Public
  18  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 #include "cpu.h"
  22 #include "exec/memory.h"
  23 #include "qemu/host-utils.h"
  24 #include "helper.h"
  25 #include <string.h>
  26 #include "sysemu/kvm.h"
  27 #include "qemu/timer.h"
  28 #ifdef CONFIG_KVM
  29 #include <linux/kvm.h>
  30 #endif
  31
  32 #if !defined(CONFIG_USER_ONLY)
  33 #include "exec/softmmu_exec.h"
  34 #include "sysemu/cpus.h"
  35 #include "sysemu/sysemu.h"
  36 #include "hw/s390x/ebcdic.h"
  37 #endif
  38
  39 /* #define DEBUG_HELPER */
  40 #ifdef DEBUG_HELPER
  41 #define HELPER_LOG(x...) qemu_log(x)
  42 #else
  43 #define HELPER_LOG(x...)
  44 #endif
  45
  46 /* Raise an exception dynamically from a helper function.  */
  47 void QEMU_NORETURN runtime_exception(CPUS390XState *env, int excp,
  48                                      uintptr_t retaddr)
  49 {
  50     CPUState *cs = CPU(s390_env_get_cpu(env));
  51     int t;
  52
  53     cs->exception_index = EXCP_PGM;
  54     env->int_pgm_code = excp;
  55
  56     /* Use the (ultimate) callers address to find the insn that trapped.  */
  57     cpu_restore_state(cs, retaddr);
  58
  59     /* Advance past the insn.  */
  60     t = cpu_ldub_code(env, env->psw.addr);
  61     env->int_pgm_ilen = t = get_ilen(t);
  62     env->psw.addr += 2 * t;
  63
  64     cpu_loop_exit(cs);
  65 }
  66
  67 /* Raise an exception statically from a TB.  */
  68 void HELPER(exception)(CPUS390XState *env, uint32_t excp)
  69 {
  70     CPUState *cs = CPU(s390_env_get_cpu(env));
  71
  72     HELPER_LOG("%s: exception %d\n", __func__, excp);
  73     cs->exception_index = excp;
  74     cpu_loop_exit(cs);
  75 }
  76
  77 #ifndef CONFIG_USER_ONLY
  78
  79 void program_interrupt(CPUS390XState *env, uint32_t code, int ilen)
  80 {
  81     S390CPU *cpu = s390_env_get_cpu(env);
  82
  83     qemu_log_mask(CPU_LOG_INT, "program interrupt at %#" PRIx64 "\n",
  84                   env->psw.addr);
  85
  86     if (kvm_enabled()) {
  87 #ifdef CONFIG_KVM
  88         kvm_s390_interrupt(cpu, KVM_S390_PROGRAM_INT, code);
  89 #endif
  90     } else {
  91         CPUState *cs = CPU(cpu);
  92
  93         env->int_pgm_code = code;
  94         env->int_pgm_ilen = ilen;
  95         cs->exception_index = EXCP_PGM;
  96         cpu_loop_exit(cs);
  97     }
  98 }
  99
 100 /* SCLP service call */
 101 uint32_t HELPER(servc)(CPUS390XState *env, uint64_t r1, uint64_t r2)
 102 {
 103     int r = sclp_service_call(env, r1, r2);
 104     if (r < 0) {
 105         program_interrupt(env, -r, 4);
 106         return 0;
 107     }
 108     return r;
 109 }
 110
 111 #ifndef CONFIG_USER_ONLY
 112 static void cpu_reset_all(void)
 113 {
 114     CPUState *cs;
 115     S390CPUClass *scc;
 116
 117     CPU_FOREACH(cs) {
 118         scc = S390_CPU_GET_CLASS(cs);
 119         scc->cpu_reset(cs);
 120     }
 121 }
 122
 123 static void cpu_full_reset_all(void)
 124 {
 125     CPUState *cpu;
 126
 127     CPU_FOREACH(cpu) {
 128         cpu_reset(cpu);
 129     }
 130 }
 131
 132 static int modified_clear_reset(S390CPU *cpu)
 133 {
 134     S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
 135
 136     pause_all_vcpus();
 137     cpu_synchronize_all_states();
 138     cpu_full_reset_all();
 139     io_subsystem_reset();
 140     scc->load_normal(CPU(cpu));
 141     cpu_synchronize_all_post_reset();
 142     resume_all_vcpus();
 143     return 0;
 144 }
 145
 146 static int load_normal_reset(S390CPU *cpu)
 147 {
 148     S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
 149
 150     pause_all_vcpus();
 151     cpu_synchronize_all_states();
 152     cpu_reset_all();
 153     io_subsystem_reset();
 154     scc->initial_cpu_reset(CPU(cpu));
 155     scc->load_normal(CPU(cpu));
 156     cpu_synchronize_all_post_reset();
 157     resume_all_vcpus();
 158     return 0;
 159 }
 160
 161 #define DIAG_308_RC_NO_CONF         0x0102
 162 #define DIAG_308_RC_INVALID         0x0402
 163 void handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3)
 164 {
 165     uint64_t addr =  env->regs[r1];
 166     uint64_t subcode = env->regs[r3];
 167
 168     if (env->psw.mask & PSW_MASK_PSTATE) {
 169         program_interrupt(env, PGM_PRIVILEGED, ILEN_LATER_INC);
 170         return;
 171     }
 172
 173     if ((subcode & ~0x0ffffULL) || (subcode > 6)) {
 174         program_interrupt(env, PGM_SPECIFICATION, ILEN_LATER_INC);
 175         return;
 176     }
 177
 178     switch (subcode) {
 179     case 0:
 180         modified_clear_reset(s390_env_get_cpu(env));
 181         break;
 182     case 1:
 183         load_normal_reset(s390_env_get_cpu(env));
 184         break;
 185     case 5:
 186         if ((r1 & 1) || (addr & 0x0fffULL)) {
 187             program_interrupt(env, PGM_SPECIFICATION, ILEN_LATER_INC);
 188             return;
 189         }
 190         env->regs[r1+1] = DIAG_308_RC_INVALID;
 191         return;
 192     case 6:
 193         if ((r1 & 1) || (addr & 0x0fffULL)) {
 194             program_interrupt(env, PGM_SPECIFICATION, ILEN_LATER_INC);
 195             return;
 196         }
 197         env->regs[r1+1] = DIAG_308_RC_NO_CONF;
 198         return;
 199     default:
 200         hw_error("Unhandled diag308 subcode %" PRIx64, subcode);
 201         break;
 202     }
 203 }
 204 #endif
 205
 206 /* DIAG */
 207 uint64_t HELPER(diag)(CPUS390XState *env, uint32_t num, uint64_t mem,
 208                       uint64_t code)
 209 {
 210     uint64_t r;
 211
 212     switch (num) {
 213     case 0x500:
 214         /* KVM hypercall */
 215         r = s390_virtio_hypercall(env);
 216         break;
 217     case 0x44:
 218         /* yield */
 219         r = 0;
 220         break;
 221     case 0x308:
 222         /* ipl */
 223         r = 0;
 224         break;
 225     default:
 226         r = -1;
 227         break;
 228     }
 229
 230     if (r) {
 231         program_interrupt(env, PGM_OPERATION, ILEN_LATER_INC);
 232     }
 233
 234     return r;
 235 }
 236
 237 /* Set Prefix */
 238 void HELPER(spx)(CPUS390XState *env, uint64_t a1)
 239 {
 240     CPUState *cs = CPU(s390_env_get_cpu(env));
 241     uint32_t prefix = a1 & 0x7fffe000;
 242
 243     env->psa = prefix;
 244     qemu_log("prefix: %#x\n", prefix);
 245     tlb_flush_page(cs, 0);
 246     tlb_flush_page(cs, TARGET_PAGE_SIZE);
 247 }
 248
 249 static inline uint64_t clock_value(CPUS390XState *env)
 250 {
 251     uint64_t time;
 252
 253     time = env->tod_offset +
 254         time2tod(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - env->tod_basetime);
 255
 256     return time;
 257 }
 258
 259 /* Store Clock */
 260 uint64_t HELPER(stck)(CPUS390XState *env)
 261 {
 262     return clock_value(env);
 263 }
 264
 265 /* Set Clock Comparator */
 266 void HELPER(sckc)(CPUS390XState *env, uint64_t time)
 267 {
 268     if (time == -1ULL) {
 269         return;
 270     }
 271
 272     /* difference between now and then */
 273     time -= clock_value(env);
 274     /* nanoseconds */
 275     time = (time * 125) >> 9;
 276
 277     timer_mod(env->tod_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + time);
 278 }
 279
 280 /* Store Clock Comparator */
 281 uint64_t HELPER(stckc)(CPUS390XState *env)
 282 {
 283     /* XXX implement */
 284     return 0;
 285 }
 286
 287 /* Set CPU Timer */
 288 void HELPER(spt)(CPUS390XState *env, uint64_t time)
 289 {
 290     if (time == -1ULL) {
 291         return;
 292     }
 293
 294     /* nanoseconds */
 295     time = (time * 125) >> 9;
 296
 297     timer_mod(env->cpu_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + time);
 298 }
 299
 300 /* Store CPU Timer */
 301 uint64_t HELPER(stpt)(CPUS390XState *env)
 302 {
 303     /* XXX implement */
 304     return 0;
 305 }
 306
 307 /* Store System Information */
 308 uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0,
 309                       uint64_t r0, uint64_t r1)
 310 {
 311     int cc = 0;
 312     int sel1, sel2;
 313
 314     if ((r0 & STSI_LEVEL_MASK) <= STSI_LEVEL_3 &&
 315         ((r0 & STSI_R0_RESERVED_MASK) || (r1 & STSI_R1_RESERVED_MASK))) {
 316         /* valid function code, invalid reserved bits */
 317         program_interrupt(env, PGM_SPECIFICATION, 2);
 318     }
 319
 320     sel1 = r0 & STSI_R0_SEL1_MASK;
 321     sel2 = r1 & STSI_R1_SEL2_MASK;
 322
 323     /* XXX: spec exception if sysib is not 4k-aligned */
 324
 325     switch (r0 & STSI_LEVEL_MASK) {
 326     case STSI_LEVEL_1:
 327         if ((sel1 == 1) && (sel2 == 1)) {
 328             /* Basic Machine Configuration */
 329             struct sysib_111 sysib;
 330
 331             memset(&sysib, 0, sizeof(sysib));
 332             ebcdic_put(sysib.manuf, "QEMU            ", 16);
 333             /* same as machine type number in STORE CPU ID */
 334             ebcdic_put(sysib.type, "QEMU", 4);
 335             /* same as model number in STORE CPU ID */
 336             ebcdic_put(sysib.model, "QEMU            ", 16);
 337             ebcdic_put(sysib.sequence, "QEMU            ", 16);
 338             ebcdic_put(sysib.plant, "QEMU", 4);
 339             cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 340         } else if ((sel1 == 2) && (sel2 == 1)) {
 341             /* Basic Machine CPU */
 342             struct sysib_121 sysib;
 343
 344             memset(&sysib, 0, sizeof(sysib));
 345             /* XXX make different for different CPUs? */
 346             ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16);
 347             ebcdic_put(sysib.plant, "QEMU", 4);
 348             stw_p(&sysib.cpu_addr, env->cpu_num);
 349             cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 350         } else if ((sel1 == 2) && (sel2 == 2)) {
 351             /* Basic Machine CPUs */
 352             struct sysib_122 sysib;
 353
 354             memset(&sysib, 0, sizeof(sysib));
 355             stl_p(&sysib.capability, 0x443afc29);
 356             /* XXX change when SMP comes */
 357             stw_p(&sysib.total_cpus, 1);
 358             stw_p(&sysib.active_cpus, 1);
 359             stw_p(&sysib.standby_cpus, 0);
 360             stw_p(&sysib.reserved_cpus, 0);
 361             cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 362         } else {
 363             cc = 3;
 364         }
 365         break;
 366     case STSI_LEVEL_2:
 367         {
 368             if ((sel1 == 2) && (sel2 == 1)) {
 369                 /* LPAR CPU */
 370                 struct sysib_221 sysib;
 371
 372                 memset(&sysib, 0, sizeof(sysib));
 373                 /* XXX make different for different CPUs? */
 374                 ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16);
 375                 ebcdic_put(sysib.plant, "QEMU", 4);
 376                 stw_p(&sysib.cpu_addr, env->cpu_num);
 377                 stw_p(&sysib.cpu_id, 0);
 378                 cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 379             } else if ((sel1 == 2) && (sel2 == 2)) {
 380                 /* LPAR CPUs */
 381                 struct sysib_222 sysib;
 382
 383                 memset(&sysib, 0, sizeof(sysib));
 384                 stw_p(&sysib.lpar_num, 0);
 385                 sysib.lcpuc = 0;
 386                 /* XXX change when SMP comes */
 387                 stw_p(&sysib.total_cpus, 1);
 388                 stw_p(&sysib.conf_cpus, 1);
 389                 stw_p(&sysib.standby_cpus, 0);
 390                 stw_p(&sysib.reserved_cpus, 0);
 391                 ebcdic_put(sysib.name, "QEMU    ", 8);
 392                 stl_p(&sysib.caf, 1000);
 393                 stw_p(&sysib.dedicated_cpus, 0);
 394                 stw_p(&sysib.shared_cpus, 0);
 395                 cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 396             } else {
 397                 cc = 3;
 398             }
 399             break;
 400         }
 401     case STSI_LEVEL_3:
 402         {
 403             if ((sel1 == 2) && (sel2 == 2)) {
 404                 /* VM CPUs */
 405                 struct sysib_322 sysib;
 406
 407                 memset(&sysib, 0, sizeof(sysib));
 408                 sysib.count = 1;
 409                 /* XXX change when SMP comes */
 410                 stw_p(&sysib.vm[0].total_cpus, 1);
 411                 stw_p(&sysib.vm[0].conf_cpus, 1);
 412                 stw_p(&sysib.vm[0].standby_cpus, 0);
 413                 stw_p(&sysib.vm[0].reserved_cpus, 0);
 414                 ebcdic_put(sysib.vm[0].name, "KVMguest", 8);
 415                 stl_p(&sysib.vm[0].caf, 1000);
 416                 ebcdic_put(sysib.vm[0].cpi, "KVM/Linux       ", 16);
 417                 cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 418             } else {
 419                 cc = 3;
 420             }
 421             break;
 422         }
 423     case STSI_LEVEL_CURRENT:
 424         env->regs[0] = STSI_LEVEL_3;
 425         break;
 426     default:
 427         cc = 3;
 428         break;
 429     }
 430
 431     return cc;
 432 }
 433
 434 uint32_t HELPER(sigp)(CPUS390XState *env, uint64_t order_code, uint32_t r1,
 435                       uint64_t cpu_addr)
 436 {
 437     int cc = 0;
 438
 439     HELPER_LOG("%s: %016" PRIx64 " %08x %016" PRIx64 "\n",
 440                __func__, order_code, r1, cpu_addr);
 441
 442     /* Remember: Use "R1 or R1 + 1, whichever is the odd-numbered register"
 443        as parameter (input). Status (output) is always R1. */
 444
 445     switch (order_code) {
 446     case SIGP_SET_ARCH:
 447         /* switch arch */
 448         break;
 449     case SIGP_SENSE:
 450         /* enumerate CPU status */
 451         if (cpu_addr) {
 452             /* XXX implement when SMP comes */
 453             return 3;
 454         }
 455         env->regs[r1] &= 0xffffffff00000000ULL;
 456         cc = 1;
 457         break;
 458 #if !defined(CONFIG_USER_ONLY)
 459     case SIGP_RESTART:
 460         qemu_system_reset_request();
 461         cpu_loop_exit(CPU(s390_env_get_cpu(env)));
 462         break;
 463     case SIGP_STOP:
 464         qemu_system_shutdown_request();
 465         cpu_loop_exit(CPU(s390_env_get_cpu(env)));
 466         break;
 467 #endif
 468     default:
 469         /* unknown sigp */
 470         fprintf(stderr, "XXX unknown sigp: 0x%" PRIx64 "\n", order_code);
 471         cc = 3;
 472     }
 473
 474     return cc;
 475 }
 476 #endif