qom/cpu.c

   1 /*
   2  * QEMU CPU model
   3  *
   4  * Copyright (c) 2012-2014 SUSE LINUX Products GmbH
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, see
  18  * <http://www.gnu.org/licenses/gpl-2.0.html>
  19  */
  20
  21 #include "qemu/osdep.h"
  22 #include "qapi/error.h"
  23 #include "qemu-common.h"
  24 #include "qom/cpu.h"
  25 #include "sysemu/hw_accel.h"
  26 #include "qemu/notify.h"
  27 #include "qemu/log.h"
  28 #include "exec/log.h"
  29 #include "exec/cpu-common.h"
  30 #include "qemu/error-report.h"
  31 #include "sysemu/sysemu.h"
  32 #include "hw/boards.h"
  33 #include "hw/qdev-properties.h"
  34 #include "trace-root.h"
  35
  36 CPUInterruptHandler cpu_interrupt_handler;
  37
  38 CPUState *cpu_by_arch_id(int64_t id)
  39 {
  40     CPUState *cpu;
  41
  42     CPU_FOREACH(cpu) {
  43         CPUClass *cc = CPU_GET_CLASS(cpu);
  44
  45         if (cc->get_arch_id(cpu) == id) {
  46             return cpu;
  47         }
  48     }
  49     return NULL;
  50 }
  51
  52 bool cpu_exists(int64_t id)
  53 {
  54     return !!cpu_by_arch_id(id);
  55 }
  56
  57 CPUState *cpu_create(const char *typename)
  58 {
  59     Error *err = NULL;
  60     CPUState *cpu = CPU(object_new(typename));
  61     object_property_set_bool(OBJECT(cpu), true, "realized", &err);
  62     if (err != NULL) {
  63         error_report_err(err);
  64         object_unref(OBJECT(cpu));
  65         exit(EXIT_FAILURE);
  66     }
  67     return cpu;
  68 }
  69
  70 const char *cpu_parse_cpu_model(const char *typename, const char *cpu_model)
  71 {
  72     ObjectClass *oc;
  73     CPUClass *cc;
  74     gchar **model_pieces;
  75     const char *cpu_type;
  76
  77     model_pieces = g_strsplit(cpu_model, ",", 2);
  78
  79     oc = cpu_class_by_name(typename, model_pieces[0]);
  80     if (oc == NULL) {
  81         error_report("unable to find CPU model '%s'", model_pieces[0]);
  82         g_strfreev(model_pieces);
  83         exit(EXIT_FAILURE);
  84     }
  85
  86     cpu_type = object_class_get_name(oc);
  87     cc = CPU_CLASS(oc);
  88     cc->parse_features(cpu_type, model_pieces[1], &error_fatal);
  89     g_strfreev(model_pieces);
  90     return cpu_type;
  91 }
  92
  93 CPUState *cpu_generic_init(const char *typename, const char *cpu_model)
  94 {
  95     /* TODO: all callers of cpu_generic_init() need to be converted to
  96      * call cpu_parse_features() only once, before calling cpu_generic_init().
  97      */
  98     return cpu_create(cpu_parse_cpu_model(typename, cpu_model));
  99 }
 100
 101 bool cpu_paging_enabled(const CPUState *cpu)
 102 {
 103     CPUClass *cc = CPU_GET_CLASS(cpu);
 104
 105     return cc->get_paging_enabled(cpu);
 106 }
 107
 108 static bool cpu_common_get_paging_enabled(const CPUState *cpu)
 109 {
 110     return false;
 111 }
 112
 113 void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
 114                             Error **errp)
 115 {
 116     CPUClass *cc = CPU_GET_CLASS(cpu);
 117
 118     cc->get_memory_mapping(cpu, list, errp);
 119 }
 120
 121 static void cpu_common_get_memory_mapping(CPUState *cpu,
 122                                           MemoryMappingList *list,
 123                                           Error **errp)
 124 {
 125     error_setg(errp, "Obtaining memory mappings is unsupported on this CPU.");
 126 }
 127
 128 /* Resetting the IRQ comes from across the code base so we take the
 129  * BQL here if we need to.  cpu_interrupt assumes it is held.*/
 130 void cpu_reset_interrupt(CPUState *cpu, int mask)
 131 {
 132     bool need_lock = !qemu_mutex_iothread_locked();
 133
 134     if (need_lock) {
 135         qemu_mutex_lock_iothread();
 136     }
 137     cpu->interrupt_request &= ~mask;
 138     if (need_lock) {
 139         qemu_mutex_unlock_iothread();
 140     }
 141 }
 142
 143 void cpu_exit(CPUState *cpu)
 144 {
 145     atomic_set(&cpu->exit_request, 1);
 146     /* Ensure cpu_exec will see the exit request after TCG has exited.  */
 147     smp_wmb();
 148     atomic_set(&cpu->icount_decr.u16.high, -1);
 149 }
 150
 151 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
 152                              void *opaque)
 153 {
 154     CPUClass *cc = CPU_GET_CLASS(cpu);
 155
 156     return (*cc->write_elf32_qemunote)(f, cpu, opaque);
 157 }
 158
 159 static int cpu_common_write_elf32_qemunote(WriteCoreDumpFunction f,
 160                                            CPUState *cpu, void *opaque)
 161 {
 162     return 0;
 163 }
 164
 165 int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
 166                          int cpuid, void *opaque)
 167 {
 168     CPUClass *cc = CPU_GET_CLASS(cpu);
 169
 170     return (*cc->write_elf32_note)(f, cpu, cpuid, opaque);
 171 }
 172
 173 static int cpu_common_write_elf32_note(WriteCoreDumpFunction f,
 174                                        CPUState *cpu, int cpuid,
 175                                        void *opaque)
 176 {
 177     return -1;
 178 }
 179
 180 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
 181                              void *opaque)
 182 {
 183     CPUClass *cc = CPU_GET_CLASS(cpu);
 184
 185     return (*cc->write_elf64_qemunote)(f, cpu, opaque);
 186 }
 187
 188 static int cpu_common_write_elf64_qemunote(WriteCoreDumpFunction f,
 189                                            CPUState *cpu, void *opaque)
 190 {
 191     return 0;
 192 }
 193
 194 int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
 195                          int cpuid, void *opaque)
 196 {
 197     CPUClass *cc = CPU_GET_CLASS(cpu);
 198
 199     return (*cc->write_elf64_note)(f, cpu, cpuid, opaque);
 200 }
 201
 202 static int cpu_common_write_elf64_note(WriteCoreDumpFunction f,
 203                                        CPUState *cpu, int cpuid,
 204                                        void *opaque)
 205 {
 206     return -1;
 207 }
 208
 209
 210 static int cpu_common_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg)
 211 {
 212     return 0;
 213 }
 214
 215 static int cpu_common_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg)
 216 {
 217     return 0;
 218 }
 219
 220 static bool cpu_common_debug_check_watchpoint(CPUState *cpu, CPUWatchpoint *wp)
 221 {
 222     /* If no extra check is required, QEMU watchpoint match can be considered
 223      * as an architectural match.
 224      */
 225     return true;
 226 }
 227
 228 bool target_words_bigendian(void);
 229 static bool cpu_common_virtio_is_big_endian(CPUState *cpu)
 230 {
 231     return target_words_bigendian();
 232 }
 233
 234 static void cpu_common_noop(CPUState *cpu)
 235 {
 236 }
 237
 238 static bool cpu_common_exec_interrupt(CPUState *cpu, int int_req)
 239 {
 240     return false;
 241 }
 242
 243 GuestPanicInformation *cpu_get_crash_info(CPUState *cpu)
 244 {
 245     CPUClass *cc = CPU_GET_CLASS(cpu);
 246     GuestPanicInformation *res = NULL;
 247
 248     if (cc->get_crash_info) {
 249         res = cc->get_crash_info(cpu);
 250     }
 251     return res;
 252 }
 253
 254 void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
 255                     int flags)
 256 {
 257     CPUClass *cc = CPU_GET_CLASS(cpu);
 258
 259     if (cc->dump_state) {
 260         cpu_synchronize_state(cpu);
 261         cc->dump_state(cpu, f, cpu_fprintf, flags);
 262     }
 263 }
 264
 265 void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
 266                          int flags)
 267 {
 268     CPUClass *cc = CPU_GET_CLASS(cpu);
 269
 270     if (cc->dump_statistics) {
 271         cc->dump_statistics(cpu, f, cpu_fprintf, flags);
 272     }
 273 }
 274
 275 void cpu_reset(CPUState *cpu)
 276 {
 277     CPUClass *klass = CPU_GET_CLASS(cpu);
 278
 279     if (klass->reset != NULL) {
 280         (*klass->reset)(cpu);
 281     }
 282
 283     trace_guest_cpu_reset(cpu);
 284 }
 285
 286 static void cpu_common_reset(CPUState *cpu)
 287 {
 288     CPUClass *cc = CPU_GET_CLASS(cpu);
 289
 290     if (qemu_loglevel_mask(CPU_LOG_RESET)) {
 291         qemu_log("CPU Reset (CPU %d)\n", cpu->cpu_index);
 292         log_cpu_state(cpu, cc->reset_dump_flags);
 293     }
 294
 295     cpu->interrupt_request = 0;
 296     cpu->halted = 0;
 297     cpu->mem_io_pc = 0;
 298     cpu->mem_io_vaddr = 0;
 299     cpu->icount_extra = 0;
 300     cpu->icount_decr.u32 = 0;
 301     cpu->can_do_io = 1;
 302     cpu->exception_index = -1;
 303     cpu->crash_occurred = false;
 304
 305     if (tcg_enabled()) {
 306         cpu_tb_jmp_cache_clear(cpu);
 307
 308         tcg_flush_softmmu_tlb(cpu);
 309     }
 310 }
 311
 312 static bool cpu_common_has_work(CPUState *cs)
 313 {
 314     return false;
 315 }
 316
 317 ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model)
 318 {
 319     CPUClass *cc = CPU_CLASS(object_class_by_name(typename));
 320
 321     return cc->class_by_name(cpu_model);
 322 }
 323
 324 static ObjectClass *cpu_common_class_by_name(const char *cpu_model)
 325 {
 326     return NULL;
 327 }
 328
 329 static void cpu_common_parse_features(const char *typename, char *features,
 330                                       Error **errp)
 331 {
 332     char *featurestr; /* Single "key=value" string being parsed */
 333     char *val;
 334     static bool cpu_globals_initialized;
 335
 336     /* TODO: all callers of ->parse_features() need to be changed to
 337      * call it only once, so we can remove this check (or change it
 338      * to assert(!cpu_globals_initialized).
 339      * Current callers of ->parse_features() are:
 340      * - cpu_generic_init()
 341      */
 342     if (cpu_globals_initialized) {
 343         return;
 344     }
 345     cpu_globals_initialized = true;
 346
 347     featurestr = features ? strtok(features, ",") : NULL;
 348
 349     while (featurestr) {
 350         val = strchr(featurestr, '=');
 351         if (val) {
 352             GlobalProperty *prop = g_new0(typeof(*prop), 1);
 353             *val = 0;
 354             val++;
 355             prop->driver = typename;
 356             prop->property = g_strdup(featurestr);
 357             prop->value = g_strdup(val);
 358             prop->errp = &error_fatal;
 359             qdev_prop_register_global(prop);
 360         } else {
 361             error_setg(errp, "Expected key=value format, found %s.",
 362                        featurestr);
 363             return;
 364         }
 365         featurestr = strtok(NULL, ",");
 366     }
 367 }
 368
 369 static void cpu_common_realizefn(DeviceState *dev, Error **errp)
 370 {
 371     CPUState *cpu = CPU(dev);
 372     Object *machine = qdev_get_machine();
 373
 374     /* qdev_get_machine() can return something that's not TYPE_MACHINE
 375      * if this is one of the user-only emulators; in that case there's
 376      * no need to check the ignore_memory_transaction_failures board flag.
 377      */
 378     if (object_dynamic_cast(machine, TYPE_MACHINE)) {
 379         ObjectClass *oc = object_get_class(machine);
 380         MachineClass *mc = MACHINE_CLASS(oc);
 381
 382         if (mc) {
 383             cpu->ignore_memory_transaction_failures =
 384                 mc->ignore_memory_transaction_failures;
 385         }
 386     }
 387
 388     if (dev->hotplugged) {
 389         cpu_synchronize_post_init(cpu);
 390         cpu_resume(cpu);
 391     }
 392
 393     /* NOTE: latest generic point where the cpu is fully realized */
 394     trace_init_vcpu(cpu);
 395 }
 396
 397 static void cpu_common_unrealizefn(DeviceState *dev, Error **errp)
 398 {
 399     CPUState *cpu = CPU(dev);
 400     /* NOTE: latest generic point before the cpu is fully unrealized */
 401     trace_fini_vcpu(cpu);
 402     cpu_exec_unrealizefn(cpu);
 403 }
 404
 405 static void cpu_common_initfn(Object *obj)
 406 {
 407     CPUState *cpu = CPU(obj);
 408     CPUClass *cc = CPU_GET_CLASS(obj);
 409
 410     cpu->cpu_index = UNASSIGNED_CPU_INDEX;
 411     cpu->gdb_num_regs = cpu->gdb_num_g_regs = cc->gdb_num_core_regs;
 412     /* *-user doesn't have configurable SMP topology */
 413     /* the default value is changed by qemu_init_vcpu() for softmmu */
 414     cpu->nr_cores = 1;
 415     cpu->nr_threads = 1;
 416
 417     qemu_mutex_init(&cpu->work_mutex);
 418     QTAILQ_INIT(&cpu->breakpoints);
 419     QTAILQ_INIT(&cpu->watchpoints);
 420
 421     cpu_exec_initfn(cpu);
 422 }
 423
 424 static void cpu_common_finalize(Object *obj)
 425 {
 426 }
 427
 428 static int64_t cpu_common_get_arch_id(CPUState *cpu)
 429 {
 430     return cpu->cpu_index;
 431 }
 432
 433 static vaddr cpu_adjust_watchpoint_address(CPUState *cpu, vaddr addr, int len)
 434 {
 435     return addr;
 436 }
 437
 438 static void generic_handle_interrupt(CPUState *cpu, int mask)
 439 {
 440     cpu->interrupt_request |= mask;
 441
 442     if (!qemu_cpu_is_self(cpu)) {
 443         qemu_cpu_kick(cpu);
 444     }
 445 }
 446
 447 CPUInterruptHandler cpu_interrupt_handler = generic_handle_interrupt;
 448
 449 static void cpu_class_init(ObjectClass *klass, void *data)
 450 {
 451     DeviceClass *dc = DEVICE_CLASS(klass);
 452     CPUClass *k = CPU_CLASS(klass);
 453
 454     k->class_by_name = cpu_common_class_by_name;
 455     k->parse_features = cpu_common_parse_features;
 456     k->reset = cpu_common_reset;
 457     k->get_arch_id = cpu_common_get_arch_id;
 458     k->has_work = cpu_common_has_work;
 459     k->get_paging_enabled = cpu_common_get_paging_enabled;
 460     k->get_memory_mapping = cpu_common_get_memory_mapping;
 461     k->write_elf32_qemunote = cpu_common_write_elf32_qemunote;
 462     k->write_elf32_note = cpu_common_write_elf32_note;
 463     k->write_elf64_qemunote = cpu_common_write_elf64_qemunote;
 464     k->write_elf64_note = cpu_common_write_elf64_note;
 465     k->gdb_read_register = cpu_common_gdb_read_register;
 466     k->gdb_write_register = cpu_common_gdb_write_register;
 467     k->virtio_is_big_endian = cpu_common_virtio_is_big_endian;
 468     k->debug_excp_handler = cpu_common_noop;
 469     k->debug_check_watchpoint = cpu_common_debug_check_watchpoint;
 470     k->cpu_exec_enter = cpu_common_noop;
 471     k->cpu_exec_exit = cpu_common_noop;
 472     k->cpu_exec_interrupt = cpu_common_exec_interrupt;
 473     k->adjust_watchpoint_address = cpu_adjust_watchpoint_address;
 474     set_bit(DEVICE_CATEGORY_CPU, dc->categories);
 475     dc->realize = cpu_common_realizefn;
 476     dc->unrealize = cpu_common_unrealizefn;
 477     dc->props = cpu_common_props;
 478     /*
 479      * Reason: CPUs still need special care by board code: wiring up
 480      * IRQs, adding reset handlers, halting non-first CPUs, ...
 481      */
 482     dc->user_creatable = false;
 483 }
 484
 485 static const TypeInfo cpu_type_info = {
 486     .name = TYPE_CPU,
 487     .parent = TYPE_DEVICE,
 488     .instance_size = sizeof(CPUState),
 489     .instance_init = cpu_common_initfn,
 490     .instance_finalize = cpu_common_finalize,
 491     .abstract = true,
 492     .class_size = sizeof(CPUClass),
 493     .class_init = cpu_class_init,
 494 };
 495
 496 static void cpu_register_types(void)
 497 {
 498     type_register_static(&cpu_type_info);
 499 }
 500
 501 type_init(cpu_register_types)