include/exec/cpu-all.h

   1 /*
   2  * defines common to all virtual CPUs
   3  *
   4  *  Copyright (c) 2003 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19 #ifndef CPU_ALL_H
  20 #define CPU_ALL_H
  21
  22 #include "qemu-common.h"
  23 #include "exec/cpu-common.h"
  24 #include "exec/memory.h"
  25 #include "qemu/thread.h"
  26 #include "qom/cpu.h"
  27
  28 /* some important defines:
  29  *
  30  * WORDS_ALIGNED : if defined, the host cpu can only make word aligned
  31  * memory accesses.
  32  *
  33  * HOST_WORDS_BIGENDIAN : if defined, the host cpu is big endian and
  34  * otherwise little endian.
  35  *
  36  * (TARGET_WORDS_ALIGNED : same for target cpu (not supported yet))
  37  *
  38  * TARGET_WORDS_BIGENDIAN : same for target cpu
  39  */
  40
  41 #if defined(HOST_WORDS_BIGENDIAN) != defined(TARGET_WORDS_BIGENDIAN)
  42 #define BSWAP_NEEDED
  43 #endif
  44
  45 #ifdef BSWAP_NEEDED
  46
  47 static inline uint16_t tswap16(uint16_t s)
  48 {
  49     return bswap16(s);
  50 }
  51
  52 static inline uint32_t tswap32(uint32_t s)
  53 {
  54     return bswap32(s);
  55 }
  56
  57 static inline uint64_t tswap64(uint64_t s)
  58 {
  59     return bswap64(s);
  60 }
  61
  62 static inline void tswap16s(uint16_t *s)
  63 {
  64     *s = bswap16(*s);
  65 }
  66
  67 static inline void tswap32s(uint32_t *s)
  68 {
  69     *s = bswap32(*s);
  70 }
  71
  72 static inline void tswap64s(uint64_t *s)
  73 {
  74     *s = bswap64(*s);
  75 }
  76
  77 #else
  78
  79 static inline uint16_t tswap16(uint16_t s)
  80 {
  81     return s;
  82 }
  83
  84 static inline uint32_t tswap32(uint32_t s)
  85 {
  86     return s;
  87 }
  88
  89 static inline uint64_t tswap64(uint64_t s)
  90 {
  91     return s;
  92 }
  93
  94 static inline void tswap16s(uint16_t *s)
  95 {
  96 }
  97
  98 static inline void tswap32s(uint32_t *s)
  99 {
 100 }
 101
 102 static inline void tswap64s(uint64_t *s)
 103 {
 104 }
 105
 106 #endif
 107
 108 #if TARGET_LONG_SIZE == 4
 109 #define tswapl(s) tswap32(s)
 110 #define tswapls(s) tswap32s((uint32_t *)(s))
 111 #define bswaptls(s) bswap32s(s)
 112 #else
 113 #define tswapl(s) tswap64(s)
 114 #define tswapls(s) tswap64s((uint64_t *)(s))
 115 #define bswaptls(s) bswap64s(s)
 116 #endif
 117
 118 /* CPU memory access without any memory or io remapping */
 119
 120 /*
 121  * the generic syntax for the memory accesses is:
 122  *
 123  * load: ld{type}{sign}{size}{endian}_{access_type}(ptr)
 124  *
 125  * store: st{type}{size}{endian}_{access_type}(ptr, val)
 126  *
 127  * type is:
 128  * (empty): integer access
 129  *   f    : float access
 130  *
 131  * sign is:
 132  * (empty): for floats or 32 bit size
 133  *   u    : unsigned
 134  *   s    : signed
 135  *
 136  * size is:
 137  *   b: 8 bits
 138  *   w: 16 bits
 139  *   l: 32 bits
 140  *   q: 64 bits
 141  *
 142  * endian is:
 143  * (empty): target cpu endianness or 8 bit access
 144  *   r    : reversed target cpu endianness (not implemented yet)
 145  *   be   : big endian (not implemented yet)
 146  *   le   : little endian (not implemented yet)
 147  *
 148  * access_type is:
 149  *   raw    : host memory access
 150  *   user   : user mode access using soft MMU
 151  *   kernel : kernel mode access using soft MMU
 152  */
 153
 154 /* target-endianness CPU memory access functions */
 155 #if defined(TARGET_WORDS_BIGENDIAN)
 156 #define lduw_p(p) lduw_be_p(p)
 157 #define ldsw_p(p) ldsw_be_p(p)
 158 #define ldl_p(p) ldl_be_p(p)
 159 #define ldq_p(p) ldq_be_p(p)
 160 #define ldfl_p(p) ldfl_be_p(p)
 161 #define ldfq_p(p) ldfq_be_p(p)
 162 #define stw_p(p, v) stw_be_p(p, v)
 163 #define stl_p(p, v) stl_be_p(p, v)
 164 #define stq_p(p, v) stq_be_p(p, v)
 165 #define stfl_p(p, v) stfl_be_p(p, v)
 166 #define stfq_p(p, v) stfq_be_p(p, v)
 167 #else
 168 #define lduw_p(p) lduw_le_p(p)
 169 #define ldsw_p(p) ldsw_le_p(p)
 170 #define ldl_p(p) ldl_le_p(p)
 171 #define ldq_p(p) ldq_le_p(p)
 172 #define ldfl_p(p) ldfl_le_p(p)
 173 #define ldfq_p(p) ldfq_le_p(p)
 174 #define stw_p(p, v) stw_le_p(p, v)
 175 #define stl_p(p, v) stl_le_p(p, v)
 176 #define stq_p(p, v) stq_le_p(p, v)
 177 #define stfl_p(p, v) stfl_le_p(p, v)
 178 #define stfq_p(p, v) stfq_le_p(p, v)
 179 #endif
 180
 181 /* MMU memory access macros */
 182
 183 #if defined(CONFIG_USER_ONLY)
 184 #include <assert.h>
 185 #include "exec/user/abitypes.h"
 186
 187 /* On some host systems the guest address space is reserved on the host.
 188  * This allows the guest address space to be offset to a convenient location.
 189  */
 190 #if defined(CONFIG_USE_GUEST_BASE)
 191 extern unsigned long guest_base;
 192 extern int have_guest_base;
 193 extern unsigned long reserved_va;
 194 #define GUEST_BASE guest_base
 195 #define RESERVED_VA reserved_va
 196 #else
 197 #define GUEST_BASE 0ul
 198 #define RESERVED_VA 0ul
 199 #endif
 200
 201 /* All direct uses of g2h and h2g need to go away for usermode softmmu.  */
 202 #define g2h(x) ((void *)((unsigned long)(target_ulong)(x) + GUEST_BASE))
 203
 204 #if HOST_LONG_BITS <= TARGET_VIRT_ADDR_SPACE_BITS
 205 #define h2g_valid(x) 1
 206 #else
 207 #define h2g_valid(x) ({ \
 208     unsigned long __guest = (unsigned long)(x) - GUEST_BASE; \
 209     (__guest < (1ul << TARGET_VIRT_ADDR_SPACE_BITS)) && \
 210     (!RESERVED_VA || (__guest < RESERVED_VA)); \
 211 })
 212 #endif
 213
 214 #define h2g_nocheck(x) ({ \
 215     unsigned long __ret = (unsigned long)(x) - GUEST_BASE; \
 216     (abi_ulong)__ret; \
 217 })
 218
 219 #define h2g(x) ({ \
 220     /* Check if given address fits target address space */ \
 221     assert(h2g_valid(x)); \
 222     h2g_nocheck(x); \
 223 })
 224
 225 #define saddr(x) g2h(x)
 226 #define laddr(x) g2h(x)
 227
 228 #else /* !CONFIG_USER_ONLY */
 229 /* NOTE: we use double casts if pointers and target_ulong have
 230    different sizes */
 231 #define saddr(x) (uint8_t *)(intptr_t)(x)
 232 #define laddr(x) (uint8_t *)(intptr_t)(x)
 233 #endif
 234
 235 #define ldub_raw(p) ldub_p(laddr((p)))
 236 #define ldsb_raw(p) ldsb_p(laddr((p)))
 237 #define lduw_raw(p) lduw_p(laddr((p)))
 238 #define ldsw_raw(p) ldsw_p(laddr((p)))
 239 #define ldl_raw(p) ldl_p(laddr((p)))
 240 #define ldq_raw(p) ldq_p(laddr((p)))
 241 #define ldfl_raw(p) ldfl_p(laddr((p)))
 242 #define ldfq_raw(p) ldfq_p(laddr((p)))
 243 #define stb_raw(p, v) stb_p(saddr((p)), v)
 244 #define stw_raw(p, v) stw_p(saddr((p)), v)
 245 #define stl_raw(p, v) stl_p(saddr((p)), v)
 246 #define stq_raw(p, v) stq_p(saddr((p)), v)
 247 #define stfl_raw(p, v) stfl_p(saddr((p)), v)
 248 #define stfq_raw(p, v) stfq_p(saddr((p)), v)
 249
 250
 251 #if defined(CONFIG_USER_ONLY)
 252
 253 /* if user mode, no other memory access functions */
 254 #define ldub(p) ldub_raw(p)
 255 #define ldsb(p) ldsb_raw(p)
 256 #define lduw(p) lduw_raw(p)
 257 #define ldsw(p) ldsw_raw(p)
 258 #define ldl(p) ldl_raw(p)
 259 #define ldq(p) ldq_raw(p)
 260 #define ldfl(p) ldfl_raw(p)
 261 #define ldfq(p) ldfq_raw(p)
 262 #define stb(p, v) stb_raw(p, v)
 263 #define stw(p, v) stw_raw(p, v)
 264 #define stl(p, v) stl_raw(p, v)
 265 #define stq(p, v) stq_raw(p, v)
 266 #define stfl(p, v) stfl_raw(p, v)
 267 #define stfq(p, v) stfq_raw(p, v)
 268
 269 #define cpu_ldub_code(env1, p) ldub_raw(p)
 270 #define cpu_ldsb_code(env1, p) ldsb_raw(p)
 271 #define cpu_lduw_code(env1, p) lduw_raw(p)
 272 #define cpu_ldsw_code(env1, p) ldsw_raw(p)
 273 #define cpu_ldl_code(env1, p) ldl_raw(p)
 274 #define cpu_ldq_code(env1, p) ldq_raw(p)
 275
 276 #define cpu_ldub_data(env, addr) ldub_raw(addr)
 277 #define cpu_lduw_data(env, addr) lduw_raw(addr)
 278 #define cpu_ldsw_data(env, addr) ldsw_raw(addr)
 279 #define cpu_ldl_data(env, addr) ldl_raw(addr)
 280 #define cpu_ldq_data(env, addr) ldq_raw(addr)
 281
 282 #define cpu_stb_data(env, addr, data) stb_raw(addr, data)
 283 #define cpu_stw_data(env, addr, data) stw_raw(addr, data)
 284 #define cpu_stl_data(env, addr, data) stl_raw(addr, data)
 285 #define cpu_stq_data(env, addr, data) stq_raw(addr, data)
 286
 287 #define cpu_ldub_kernel(env, addr) ldub_raw(addr)
 288 #define cpu_lduw_kernel(env, addr) lduw_raw(addr)
 289 #define cpu_ldsw_kernel(env, addr) ldsw_raw(addr)
 290 #define cpu_ldl_kernel(env, addr) ldl_raw(addr)
 291 #define cpu_ldq_kernel(env, addr) ldq_raw(addr)
 292
 293 #define cpu_stb_kernel(env, addr, data) stb_raw(addr, data)
 294 #define cpu_stw_kernel(env, addr, data) stw_raw(addr, data)
 295 #define cpu_stl_kernel(env, addr, data) stl_raw(addr, data)
 296 #define cpu_stq_kernel(env, addr, data) stq_raw(addr, data)
 297
 298 #define ldub_kernel(p) ldub_raw(p)
 299 #define ldsb_kernel(p) ldsb_raw(p)
 300 #define lduw_kernel(p) lduw_raw(p)
 301 #define ldsw_kernel(p) ldsw_raw(p)
 302 #define ldl_kernel(p) ldl_raw(p)
 303 #define ldq_kernel(p) ldq_raw(p)
 304 #define ldfl_kernel(p) ldfl_raw(p)
 305 #define ldfq_kernel(p) ldfq_raw(p)
 306 #define stb_kernel(p, v) stb_raw(p, v)
 307 #define stw_kernel(p, v) stw_raw(p, v)
 308 #define stl_kernel(p, v) stl_raw(p, v)
 309 #define stq_kernel(p, v) stq_raw(p, v)
 310 #define stfl_kernel(p, v) stfl_raw(p, v)
 311 #define stfq_kernel(p, vt) stfq_raw(p, v)
 312
 313 #define cpu_ldub_data(env, addr) ldub_raw(addr)
 314 #define cpu_lduw_data(env, addr) lduw_raw(addr)
 315 #define cpu_ldl_data(env, addr) ldl_raw(addr)
 316
 317 #define cpu_stb_data(env, addr, data) stb_raw(addr, data)
 318 #define cpu_stw_data(env, addr, data) stw_raw(addr, data)
 319 #define cpu_stl_data(env, addr, data) stl_raw(addr, data)
 320 #endif /* defined(CONFIG_USER_ONLY) */
 321
 322 /* page related stuff */
 323
 324 #define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS)
 325 #define TARGET_PAGE_MASK ~(TARGET_PAGE_SIZE - 1)
 326 #define TARGET_PAGE_ALIGN(addr) (((addr) + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK)
 327
 328 /* ??? These should be the larger of uintptr_t and target_ulong.  */
 329 extern uintptr_t qemu_real_host_page_size;
 330 extern uintptr_t qemu_host_page_size;
 331 extern uintptr_t qemu_host_page_mask;
 332
 333 #define HOST_PAGE_ALIGN(addr) (((addr) + qemu_host_page_size - 1) & qemu_host_page_mask)
 334
 335 /* same as PROT_xxx */
 336 #define PAGE_READ      0x0001
 337 #define PAGE_WRITE     0x0002
 338 #define PAGE_EXEC      0x0004
 339 #define PAGE_BITS      (PAGE_READ | PAGE_WRITE | PAGE_EXEC)
 340 #define PAGE_VALID     0x0008
 341 /* original state of the write flag (used when tracking self-modifying
 342    code */
 343 #define PAGE_WRITE_ORG 0x0010
 344 #if defined(CONFIG_BSD) && defined(CONFIG_USER_ONLY)
 345 /* FIXME: Code that sets/uses this is broken and needs to go away.  */
 346 #define PAGE_RESERVED  0x0020
 347 #endif
 348
 349 #if defined(CONFIG_USER_ONLY)
 350 void page_dump(FILE *f);
 351
 352 typedef int (*walk_memory_regions_fn)(void *, abi_ulong,
 353                                       abi_ulong, unsigned long);
 354 int walk_memory_regions(void *, walk_memory_regions_fn);
 355
 356 int page_get_flags(target_ulong address);
 357 void page_set_flags(target_ulong start, target_ulong end, int flags);
 358 int page_check_range(target_ulong start, target_ulong len, int flags);
 359 #endif
 360
 361 CPUArchState *cpu_copy(CPUArchState *env);
 362
 363 void QEMU_NORETURN cpu_abort(CPUArchState *env, const char *fmt, ...)
 364     GCC_FMT_ATTR(2, 3);
 365
 366 /* Flags for use in ENV->INTERRUPT_PENDING.
 367
 368    The numbers assigned here are non-sequential in order to preserve
 369    binary compatibility with the vmstate dump.  Bit 0 (0x0001) was
 370    previously used for CPU_INTERRUPT_EXIT, and is cleared when loading
 371    the vmstate dump.  */
 372
 373 /* External hardware interrupt pending.  This is typically used for
 374    interrupts from devices.  */
 375 #define CPU_INTERRUPT_HARD        0x0002
 376
 377 /* Exit the current TB.  This is typically used when some system-level device
 378    makes some change to the memory mapping.  E.g. the a20 line change.  */
 379 #define CPU_INTERRUPT_EXITTB      0x0004
 380
 381 /* Halt the CPU.  */
 382 #define CPU_INTERRUPT_HALT        0x0020
 383
 384 /* Debug event pending.  */
 385 #define CPU_INTERRUPT_DEBUG       0x0080
 386
 387 /* Several target-specific external hardware interrupts.  Each target/cpu.h
 388    should define proper names based on these defines.  */
 389 #define CPU_INTERRUPT_TGT_EXT_0   0x0008
 390 #define CPU_INTERRUPT_TGT_EXT_1   0x0010
 391 #define CPU_INTERRUPT_TGT_EXT_2   0x0040
 392 #define CPU_INTERRUPT_TGT_EXT_3   0x0200
 393 #define CPU_INTERRUPT_TGT_EXT_4   0x1000
 394
 395 /* Several target-specific internal interrupts.  These differ from the
 396    preceding target-specific interrupts in that they are intended to
 397    originate from within the cpu itself, typically in response to some
 398    instruction being executed.  These, therefore, are not masked while
 399    single-stepping within the debugger.  */
 400 #define CPU_INTERRUPT_TGT_INT_0   0x0100
 401 #define CPU_INTERRUPT_TGT_INT_1   0x0400
 402 #define CPU_INTERRUPT_TGT_INT_2   0x0800
 403 #define CPU_INTERRUPT_TGT_INT_3   0x2000
 404
 405 /* First unused bit: 0x4000.  */
 406
 407 /* The set of all bits that should be masked when single-stepping.  */
 408 #define CPU_INTERRUPT_SSTEP_MASK \
 409     (CPU_INTERRUPT_HARD          \
 410      | CPU_INTERRUPT_TGT_EXT_0   \
 411      | CPU_INTERRUPT_TGT_EXT_1   \
 412      | CPU_INTERRUPT_TGT_EXT_2   \
 413      | CPU_INTERRUPT_TGT_EXT_3   \
 414      | CPU_INTERRUPT_TGT_EXT_4)
 415
 416 /* Breakpoint/watchpoint flags */
 417 #define BP_MEM_READ           0x01
 418 #define BP_MEM_WRITE          0x02
 419 #define BP_MEM_ACCESS         (BP_MEM_READ | BP_MEM_WRITE)
 420 #define BP_STOP_BEFORE_ACCESS 0x04
 421 #define BP_WATCHPOINT_HIT     0x08
 422 #define BP_GDB                0x10
 423 #define BP_CPU                0x20
 424
 425 int cpu_breakpoint_insert(CPUArchState *env, target_ulong pc, int flags,
 426                           CPUBreakpoint **breakpoint);
 427 int cpu_breakpoint_remove(CPUArchState *env, target_ulong pc, int flags);
 428 void cpu_breakpoint_remove_by_ref(CPUArchState *env, CPUBreakpoint *breakpoint);
 429 void cpu_breakpoint_remove_all(CPUArchState *env, int mask);
 430 int cpu_watchpoint_insert(CPUArchState *env, target_ulong addr, target_ulong len,
 431                           int flags, CPUWatchpoint **watchpoint);
 432 int cpu_watchpoint_remove(CPUArchState *env, target_ulong addr,
 433                           target_ulong len, int flags);
 434 void cpu_watchpoint_remove_by_ref(CPUArchState *env, CPUWatchpoint *watchpoint);
 435 void cpu_watchpoint_remove_all(CPUArchState *env, int mask);
 436
 437 #if !defined(CONFIG_USER_ONLY)
 438
 439 /* memory API */
 440
 441 extern ram_addr_t ram_size;
 442
 443 /* RAM is pre-allocated and passed into qemu_ram_alloc_from_ptr */
 444 #define RAM_PREALLOC_MASK   (1 << 0)
 445
 446 typedef struct RAMBlock {
 447     struct MemoryRegion *mr;
 448     uint8_t *host;
 449     ram_addr_t offset;
 450     ram_addr_t length;
 451     uint32_t flags;
 452     char idstr[256];
 453     /* Reads can take either the iothread or the ramlist lock.
 454      * Writes must take both locks.
 455      */
 456     QTAILQ_ENTRY(RAMBlock) next;
 457     int fd;
 458 } RAMBlock;
 459
 460 typedef struct RAMList {
 461     QemuMutex mutex;
 462     /* Protected by the iothread lock.  */
 463     unsigned long *dirty_memory[DIRTY_MEMORY_NUM];
 464     RAMBlock *mru_block;
 465     /* Protected by the ramlist lock.  */
 466     QTAILQ_HEAD(, RAMBlock) blocks;
 467     uint32_t version;
 468 } RAMList;
 469 extern RAMList ram_list;
 470
 471 extern const char *mem_path;
 472 extern int mem_prealloc;
 473
 474 /* Flags stored in the low bits of the TLB virtual address.  These are
 475    defined so that fast path ram access is all zeros.  */
 476 /* Zero if TLB entry is valid.  */
 477 #define TLB_INVALID_MASK   (1 << 3)
 478 /* Set if TLB entry references a clean RAM page.  The iotlb entry will
 479    contain the page physical address.  */
 480 #define TLB_NOTDIRTY    (1 << 4)
 481 /* Set if TLB entry is an IO callback.  */
 482 #define TLB_MMIO        (1 << 5)
 483
 484 void dump_exec_info(FILE *f, fprintf_function cpu_fprintf);
 485 ram_addr_t last_ram_offset(void);
 486 void qemu_mutex_lock_ramlist(void);
 487 void qemu_mutex_unlock_ramlist(void);
 488 #endif /* !CONFIG_USER_ONLY */
 489
 490 int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
 491                         uint8_t *buf, int len, int is_write);
 492
 493 #endif /* CPU_ALL_H */