cpu-exec: unify icount_decr and tcg_exit_req
[qemu/ar7.git] / cpu-exec.c
blob8f094c8e15ef08421be0f86b840a3dd68c720e4e
1 /*
2 * emulator main execution loop
4 * Copyright (c) 2003-2005 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 #include "qemu/osdep.h"
20 #include "cpu.h"
21 #include "trace-root.h"
22 #include "disas/disas.h"
23 #include "exec/exec-all.h"
24 #include "tcg.h"
25 #include "qemu/atomic.h"
26 #include "sysemu/qtest.h"
27 #include "qemu/timer.h"
28 #include "exec/address-spaces.h"
29 #include "qemu/rcu.h"
30 #include "exec/tb-hash.h"
31 #include "exec/log.h"
32 #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
33 #include "hw/i386/apic.h"
34 #endif
35 #include "sysemu/replay.h"
37 /* -icount align implementation. */
39 typedef struct SyncClocks {
40 int64_t diff_clk;
41 int64_t last_cpu_icount;
42 int64_t realtime_clock;
43 } SyncClocks;
45 #if !defined(CONFIG_USER_ONLY)
46 /* Allow the guest to have a max 3ms advance.
47 * The difference between the 2 clocks could therefore
48 * oscillate around 0.
50 #define VM_CLOCK_ADVANCE 3000000
51 #define THRESHOLD_REDUCE 1.5
52 #define MAX_DELAY_PRINT_RATE 2000000000LL
53 #define MAX_NB_PRINTS 100
55 static void align_clocks(SyncClocks *sc, const CPUState *cpu)
57 int64_t cpu_icount;
59 if (!icount_align_option) {
60 return;
63 cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
64 sc->diff_clk += cpu_icount_to_ns(sc->last_cpu_icount - cpu_icount);
65 sc->last_cpu_icount = cpu_icount;
67 if (sc->diff_clk > VM_CLOCK_ADVANCE) {
68 #ifndef _WIN32
69 struct timespec sleep_delay, rem_delay;
70 sleep_delay.tv_sec = sc->diff_clk / 1000000000LL;
71 sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL;
72 if (nanosleep(&sleep_delay, &rem_delay) < 0) {
73 sc->diff_clk = rem_delay.tv_sec * 1000000000LL + rem_delay.tv_nsec;
74 } else {
75 sc->diff_clk = 0;
77 #else
78 Sleep(sc->diff_clk / SCALE_MS);
79 sc->diff_clk = 0;
80 #endif
84 static void print_delay(const SyncClocks *sc)
86 static float threshold_delay;
87 static int64_t last_realtime_clock;
88 static int nb_prints;
90 if (icount_align_option &&
91 sc->realtime_clock - last_realtime_clock >= MAX_DELAY_PRINT_RATE &&
92 nb_prints < MAX_NB_PRINTS) {
93 if ((-sc->diff_clk / (float)1000000000LL > threshold_delay) ||
94 (-sc->diff_clk / (float)1000000000LL <
95 (threshold_delay - THRESHOLD_REDUCE))) {
96 threshold_delay = (-sc->diff_clk / 1000000000LL) + 1;
97 printf("Warning: The guest is now late by %.1f to %.1f seconds\n",
98 threshold_delay - 1,
99 threshold_delay);
100 nb_prints++;
101 last_realtime_clock = sc->realtime_clock;
106 static void init_delay_params(SyncClocks *sc,
107 const CPUState *cpu)
109 if (!icount_align_option) {
110 return;
112 sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT);
113 sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - sc->realtime_clock;
114 sc->last_cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
115 if (sc->diff_clk < max_delay) {
116 max_delay = sc->diff_clk;
118 if (sc->diff_clk > max_advance) {
119 max_advance = sc->diff_clk;
122 /* Print every 2s max if the guest is late. We limit the number
123 of printed messages to NB_PRINT_MAX(currently 100) */
124 print_delay(sc);
126 #else
127 static void align_clocks(SyncClocks *sc, const CPUState *cpu)
131 static void init_delay_params(SyncClocks *sc, const CPUState *cpu)
134 #endif /* CONFIG USER ONLY */
136 /* Execute a TB, and fix up the CPU state afterwards if necessary */
137 static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, TranslationBlock *itb)
139 CPUArchState *env = cpu->env_ptr;
140 uintptr_t ret;
141 TranslationBlock *last_tb;
142 int tb_exit;
143 uint8_t *tb_ptr = itb->tc_ptr;
145 qemu_log_mask_and_addr(CPU_LOG_EXEC, itb->pc,
146 "Trace %p [%d: " TARGET_FMT_lx "] %s\n",
147 itb->tc_ptr, cpu->cpu_index, itb->pc,
148 lookup_symbol(itb->pc));
150 #if defined(DEBUG_DISAS)
151 if (qemu_loglevel_mask(CPU_LOG_TB_CPU)
152 && qemu_log_in_addr_range(itb->pc)) {
153 qemu_log_lock();
154 #if defined(TARGET_I386)
155 log_cpu_state(cpu, CPU_DUMP_CCOP);
156 #else
157 log_cpu_state(cpu, 0);
158 #endif
159 qemu_log_unlock();
161 #endif /* DEBUG_DISAS */
163 cpu->can_do_io = !use_icount;
164 ret = tcg_qemu_tb_exec(env, tb_ptr);
165 cpu->can_do_io = 1;
166 last_tb = (TranslationBlock *)(ret & ~TB_EXIT_MASK);
167 tb_exit = ret & TB_EXIT_MASK;
168 trace_exec_tb_exit(last_tb, tb_exit);
170 if (tb_exit > TB_EXIT_IDX1) {
171 /* We didn't start executing this TB (eg because the instruction
172 * counter hit zero); we must restore the guest PC to the address
173 * of the start of the TB.
175 CPUClass *cc = CPU_GET_CLASS(cpu);
176 qemu_log_mask_and_addr(CPU_LOG_EXEC, last_tb->pc,
177 "Stopped execution of TB chain before %p ["
178 TARGET_FMT_lx "] %s\n",
179 last_tb->tc_ptr, last_tb->pc,
180 lookup_symbol(last_tb->pc));
181 if (cc->synchronize_from_tb) {
182 cc->synchronize_from_tb(cpu, last_tb);
183 } else {
184 assert(cc->set_pc);
185 cc->set_pc(cpu, last_tb->pc);
188 return ret;
191 #ifndef CONFIG_USER_ONLY
192 /* Execute the code without caching the generated code. An interpreter
193 could be used if available. */
194 static void cpu_exec_nocache(CPUState *cpu, int max_cycles,
195 TranslationBlock *orig_tb, bool ignore_icount)
197 TranslationBlock *tb;
199 /* Should never happen.
200 We only end up here when an existing TB is too long. */
201 if (max_cycles > CF_COUNT_MASK)
202 max_cycles = CF_COUNT_MASK;
204 tb_lock();
205 tb = tb_gen_code(cpu, orig_tb->pc, orig_tb->cs_base, orig_tb->flags,
206 max_cycles | CF_NOCACHE
207 | (ignore_icount ? CF_IGNORE_ICOUNT : 0));
208 tb->orig_tb = orig_tb;
209 tb_unlock();
211 /* execute the generated code */
212 trace_exec_tb_nocache(tb, tb->pc);
213 cpu_tb_exec(cpu, tb);
215 tb_lock();
216 tb_phys_invalidate(tb, -1);
217 tb_free(tb);
218 tb_unlock();
220 #endif
222 static void cpu_exec_step(CPUState *cpu)
224 CPUArchState *env = (CPUArchState *)cpu->env_ptr;
225 TranslationBlock *tb;
226 target_ulong cs_base, pc;
227 uint32_t flags;
229 cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
230 tb = tb_gen_code(cpu, pc, cs_base, flags,
231 1 | CF_NOCACHE | CF_IGNORE_ICOUNT);
232 tb->orig_tb = NULL;
233 /* execute the generated code */
234 trace_exec_tb_nocache(tb, pc);
235 cpu_tb_exec(cpu, tb);
236 tb_phys_invalidate(tb, -1);
237 tb_free(tb);
240 void cpu_exec_step_atomic(CPUState *cpu)
242 start_exclusive();
244 /* Since we got here, we know that parallel_cpus must be true. */
245 parallel_cpus = false;
246 cpu_exec_step(cpu);
247 parallel_cpus = true;
249 end_exclusive();
252 struct tb_desc {
253 target_ulong pc;
254 target_ulong cs_base;
255 CPUArchState *env;
256 tb_page_addr_t phys_page1;
257 uint32_t flags;
260 static bool tb_cmp(const void *p, const void *d)
262 const TranslationBlock *tb = p;
263 const struct tb_desc *desc = d;
265 if (tb->pc == desc->pc &&
266 tb->page_addr[0] == desc->phys_page1 &&
267 tb->cs_base == desc->cs_base &&
268 tb->flags == desc->flags &&
269 !atomic_read(&tb->invalid)) {
270 /* check next page if needed */
271 if (tb->page_addr[1] == -1) {
272 return true;
273 } else {
274 tb_page_addr_t phys_page2;
275 target_ulong virt_page2;
277 virt_page2 = (desc->pc & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE;
278 phys_page2 = get_page_addr_code(desc->env, virt_page2);
279 if (tb->page_addr[1] == phys_page2) {
280 return true;
284 return false;
287 static TranslationBlock *tb_htable_lookup(CPUState *cpu,
288 target_ulong pc,
289 target_ulong cs_base,
290 uint32_t flags)
292 tb_page_addr_t phys_pc;
293 struct tb_desc desc;
294 uint32_t h;
296 desc.env = (CPUArchState *)cpu->env_ptr;
297 desc.cs_base = cs_base;
298 desc.flags = flags;
299 desc.pc = pc;
300 phys_pc = get_page_addr_code(desc.env, pc);
301 desc.phys_page1 = phys_pc & TARGET_PAGE_MASK;
302 h = tb_hash_func(phys_pc, pc, flags);
303 return qht_lookup(&tcg_ctx.tb_ctx.htable, tb_cmp, &desc, h);
306 static inline TranslationBlock *tb_find(CPUState *cpu,
307 TranslationBlock *last_tb,
308 int tb_exit)
310 CPUArchState *env = (CPUArchState *)cpu->env_ptr;
311 TranslationBlock *tb;
312 target_ulong cs_base, pc;
313 uint32_t flags;
314 bool have_tb_lock = false;
316 /* we record a subset of the CPU state. It will
317 always be the same before a given translated block
318 is executed. */
319 cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
320 tb = atomic_rcu_read(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)]);
321 if (unlikely(!tb || tb->pc != pc || tb->cs_base != cs_base ||
322 tb->flags != flags)) {
323 tb = tb_htable_lookup(cpu, pc, cs_base, flags);
324 if (!tb) {
326 /* mmap_lock is needed by tb_gen_code, and mmap_lock must be
327 * taken outside tb_lock. As system emulation is currently
328 * single threaded the locks are NOPs.
330 mmap_lock();
331 tb_lock();
332 have_tb_lock = true;
334 /* There's a chance that our desired tb has been translated while
335 * taking the locks so we check again inside the lock.
337 tb = tb_htable_lookup(cpu, pc, cs_base, flags);
338 if (!tb) {
339 /* if no translated code available, then translate it now */
340 tb = tb_gen_code(cpu, pc, cs_base, flags, 0);
343 mmap_unlock();
346 /* We add the TB in the virtual pc hash table for the fast lookup */
347 atomic_set(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)], tb);
349 #ifndef CONFIG_USER_ONLY
350 /* We don't take care of direct jumps when address mapping changes in
351 * system emulation. So it's not safe to make a direct jump to a TB
352 * spanning two pages because the mapping for the second page can change.
354 if (tb->page_addr[1] != -1) {
355 last_tb = NULL;
357 #endif
358 /* See if we can patch the calling TB. */
359 if (last_tb && !qemu_loglevel_mask(CPU_LOG_TB_NOCHAIN)) {
360 if (!have_tb_lock) {
361 tb_lock();
362 have_tb_lock = true;
364 if (!tb->invalid) {
365 tb_add_jump(last_tb, tb_exit, tb);
368 if (have_tb_lock) {
369 tb_unlock();
371 return tb;
374 static inline bool cpu_handle_halt(CPUState *cpu)
376 if (cpu->halted) {
377 #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
378 if ((cpu->interrupt_request & CPU_INTERRUPT_POLL)
379 && replay_interrupt()) {
380 X86CPU *x86_cpu = X86_CPU(cpu);
381 apic_poll_irq(x86_cpu->apic_state);
382 cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL);
384 #endif
385 if (!cpu_has_work(cpu)) {
386 current_cpu = NULL;
387 return true;
390 cpu->halted = 0;
393 return false;
396 static inline void cpu_handle_debug_exception(CPUState *cpu)
398 CPUClass *cc = CPU_GET_CLASS(cpu);
399 CPUWatchpoint *wp;
401 if (!cpu->watchpoint_hit) {
402 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
403 wp->flags &= ~BP_WATCHPOINT_HIT;
407 cc->debug_excp_handler(cpu);
410 static inline bool cpu_handle_exception(CPUState *cpu, int *ret)
412 if (cpu->exception_index >= 0) {
413 if (cpu->exception_index >= EXCP_INTERRUPT) {
414 /* exit request from the cpu execution loop */
415 *ret = cpu->exception_index;
416 if (*ret == EXCP_DEBUG) {
417 cpu_handle_debug_exception(cpu);
419 cpu->exception_index = -1;
420 return true;
421 } else {
422 #if defined(CONFIG_USER_ONLY)
423 /* if user mode only, we simulate a fake exception
424 which will be handled outside the cpu execution
425 loop */
426 #if defined(TARGET_I386)
427 CPUClass *cc = CPU_GET_CLASS(cpu);
428 cc->do_interrupt(cpu);
429 #endif
430 *ret = cpu->exception_index;
431 cpu->exception_index = -1;
432 return true;
433 #else
434 if (replay_exception()) {
435 CPUClass *cc = CPU_GET_CLASS(cpu);
436 cc->do_interrupt(cpu);
437 cpu->exception_index = -1;
438 } else if (!replay_has_interrupt()) {
439 /* give a chance to iothread in replay mode */
440 *ret = EXCP_INTERRUPT;
441 return true;
443 #endif
445 #ifndef CONFIG_USER_ONLY
446 } else if (replay_has_exception()
447 && cpu->icount_decr.u16.low + cpu->icount_extra == 0) {
448 /* try to cause an exception pending in the log */
449 cpu_exec_nocache(cpu, 1, tb_find(cpu, NULL, 0), true);
450 *ret = -1;
451 return true;
452 #endif
455 return false;
458 static inline bool cpu_handle_interrupt(CPUState *cpu,
459 TranslationBlock **last_tb)
461 CPUClass *cc = CPU_GET_CLASS(cpu);
462 int interrupt_request = cpu->interrupt_request;
464 if (unlikely(interrupt_request)) {
465 if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) {
466 /* Mask out external interrupts for this step. */
467 interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK;
469 if (interrupt_request & CPU_INTERRUPT_DEBUG) {
470 cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG;
471 cpu->exception_index = EXCP_DEBUG;
472 return true;
474 if (replay_mode == REPLAY_MODE_PLAY && !replay_has_interrupt()) {
475 /* Do nothing */
476 } else if (interrupt_request & CPU_INTERRUPT_HALT) {
477 replay_interrupt();
478 cpu->interrupt_request &= ~CPU_INTERRUPT_HALT;
479 cpu->halted = 1;
480 cpu->exception_index = EXCP_HLT;
481 return true;
483 #if defined(TARGET_I386)
484 else if (interrupt_request & CPU_INTERRUPT_INIT) {
485 X86CPU *x86_cpu = X86_CPU(cpu);
486 CPUArchState *env = &x86_cpu->env;
487 replay_interrupt();
488 cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0, 0);
489 do_cpu_init(x86_cpu);
490 cpu->exception_index = EXCP_HALTED;
491 return true;
493 #else
494 else if (interrupt_request & CPU_INTERRUPT_RESET) {
495 replay_interrupt();
496 cpu_reset(cpu);
497 return true;
499 #endif
500 /* The target hook has 3 exit conditions:
501 False when the interrupt isn't processed,
502 True when it is, and we should restart on a new TB,
503 and via longjmp via cpu_loop_exit. */
504 else {
505 if (cc->cpu_exec_interrupt(cpu, interrupt_request)) {
506 replay_interrupt();
507 *last_tb = NULL;
509 /* The target hook may have updated the 'cpu->interrupt_request';
510 * reload the 'interrupt_request' value */
511 interrupt_request = cpu->interrupt_request;
513 if (interrupt_request & CPU_INTERRUPT_EXITTB) {
514 cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
515 /* ensure that no TB jump will be modified as
516 the program flow was changed */
517 *last_tb = NULL;
520 if (unlikely(atomic_read(&cpu->exit_request) || replay_has_interrupt())) {
521 atomic_set(&cpu->exit_request, 0);
522 cpu->exception_index = EXCP_INTERRUPT;
523 return true;
526 return false;
529 static inline void cpu_loop_exec_tb(CPUState *cpu, TranslationBlock *tb,
530 TranslationBlock **last_tb, int *tb_exit,
531 SyncClocks *sc)
533 uintptr_t ret;
534 int32_t insns_left;
536 if (unlikely(atomic_read(&cpu->exit_request))) {
537 return;
540 trace_exec_tb(tb, tb->pc);
541 ret = cpu_tb_exec(cpu, tb);
542 tb = (TranslationBlock *)(ret & ~TB_EXIT_MASK);
543 *tb_exit = ret & TB_EXIT_MASK;
544 if (*tb_exit != TB_EXIT_REQUESTED) {
545 *last_tb = tb;
546 return;
549 *last_tb = NULL;
550 insns_left = atomic_read(&cpu->icount_decr.u32);
551 atomic_set(&cpu->icount_decr.u16.high, 0);
552 if (insns_left < 0) {
553 /* Something asked us to stop executing
554 * chained TBs; just continue round the main
555 * loop. Whatever requested the exit will also
556 * have set something else (eg exit_request or
557 * interrupt_request) which we will handle
558 * next time around the loop. But we need to
559 * ensure the zeroing of tcg_exit_req (see cpu_tb_exec)
560 * comes before the next read of cpu->exit_request
561 * or cpu->interrupt_request.
563 smp_mb();
564 return;
567 /* Instruction counter expired. */
568 assert(use_icount);
569 #ifndef CONFIG_USER_ONLY
570 if (cpu->icount_extra) {
571 /* Refill decrementer and continue execution. */
572 cpu->icount_extra += insns_left;
573 insns_left = MIN(0xffff, cpu->icount_extra);
574 cpu->icount_extra -= insns_left;
575 cpu->icount_decr.u16.low = insns_left;
576 } else {
577 /* Execute any remaining instructions, then let the main loop
578 * handle the next event.
580 if (insns_left > 0) {
581 cpu_exec_nocache(cpu, insns_left, tb, false);
582 align_clocks(sc, cpu);
584 cpu->exception_index = EXCP_INTERRUPT;
585 cpu_loop_exit(cpu);
587 #endif
590 /* main execution loop */
592 int cpu_exec(CPUState *cpu)
594 CPUClass *cc = CPU_GET_CLASS(cpu);
595 int ret;
596 SyncClocks sc;
598 /* replay_interrupt may need current_cpu */
599 current_cpu = cpu;
601 if (cpu_handle_halt(cpu)) {
602 return EXCP_HALTED;
605 atomic_mb_set(&tcg_current_cpu, cpu);
606 rcu_read_lock();
608 if (unlikely(atomic_mb_read(&exit_request))) {
609 cpu->exit_request = 1;
612 cc->cpu_exec_enter(cpu);
614 /* Calculate difference between guest clock and host clock.
615 * This delay includes the delay of the last cycle, so
616 * what we have to do is sleep until it is 0. As for the
617 * advance/delay we gain here, we try to fix it next time.
619 init_delay_params(&sc, cpu);
621 /* prepare setjmp context for exception handling */
622 if (sigsetjmp(cpu->jmp_env, 0) != 0) {
623 #if defined(__clang__) || !QEMU_GNUC_PREREQ(4, 6)
624 /* Some compilers wrongly smash all local variables after
625 * siglongjmp. There were bug reports for gcc 4.5.0 and clang.
626 * Reload essential local variables here for those compilers.
627 * Newer versions of gcc would complain about this code (-Wclobbered). */
628 cpu = current_cpu;
629 cc = CPU_GET_CLASS(cpu);
630 #else /* buggy compiler */
631 /* Assert that the compiler does not smash local variables. */
632 g_assert(cpu == current_cpu);
633 g_assert(cc == CPU_GET_CLASS(cpu));
634 #endif /* buggy compiler */
635 cpu->can_do_io = 1;
636 tb_lock_reset();
639 /* if an exception is pending, we execute it here */
640 while (!cpu_handle_exception(cpu, &ret)) {
641 TranslationBlock *last_tb = NULL;
642 int tb_exit = 0;
644 while (!cpu_handle_interrupt(cpu, &last_tb)) {
645 TranslationBlock *tb = tb_find(cpu, last_tb, tb_exit);
646 cpu_loop_exec_tb(cpu, tb, &last_tb, &tb_exit, &sc);
647 /* Try to align the host and virtual clocks
648 if the guest is in advance */
649 align_clocks(&sc, cpu);
653 cc->cpu_exec_exit(cpu);
654 rcu_read_unlock();
656 /* fail safe : never use current_cpu outside cpu_exec() */
657 current_cpu = NULL;
659 /* Does not need atomic_mb_set because a spurious wakeup is okay. */
660 atomic_set(&tcg_current_cpu, NULL);
661 return ret;