4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 #include "qemu/osdep.h"
21 #include "qemu-common.h"
22 #include "qapi/error.h"
24 #include "qemu/cutils.h"
26 #include "exec/exec-all.h"
27 #include "exec/target_page.h"
29 #include "hw/qdev-core.h"
30 #include "hw/qdev-properties.h"
31 #if !defined(CONFIG_USER_ONLY)
32 #include "hw/boards.h"
33 #include "hw/xen/xen.h"
35 #include "sysemu/kvm.h"
36 #include "sysemu/sysemu.h"
37 #include "sysemu/tcg.h"
38 #include "qemu/timer.h"
39 #include "qemu/config-file.h"
40 #include "qemu/error-report.h"
41 #include "qemu/qemu-print.h"
42 #if defined(CONFIG_USER_ONLY)
44 #else /* !CONFIG_USER_ONLY */
45 #include "exec/memory.h"
46 #include "exec/ioport.h"
47 #include "sysemu/dma.h"
48 #include "sysemu/hostmem.h"
49 #include "sysemu/hw_accel.h"
50 #include "exec/address-spaces.h"
51 #include "sysemu/xen-mapcache.h"
52 #include "trace-root.h"
54 #ifdef CONFIG_FALLOCATE_PUNCH_HOLE
55 #include <linux/falloc.h>
59 #include "qemu/rcu_queue.h"
60 #include "qemu/main-loop.h"
61 #include "translate-all.h"
62 #include "sysemu/replay.h"
64 #include "exec/memory-internal.h"
65 #include "exec/ram_addr.h"
68 #include "qemu/pmem.h"
70 #include "migration/vmstate.h"
72 #include "qemu/range.h"
74 #include "qemu/mmap-alloc.h"
77 #include "monitor/monitor.h"
79 //#define DEBUG_SUBPAGE
81 #if !defined(CONFIG_USER_ONLY)
82 /* ram_list is read under rcu_read_lock()/rcu_read_unlock(). Writes
83 * are protected by the ramlist lock.
85 RAMList ram_list
= { .blocks
= QLIST_HEAD_INITIALIZER(ram_list
.blocks
) };
87 static MemoryRegion
*system_memory
;
88 static MemoryRegion
*system_io
;
90 AddressSpace address_space_io
;
91 AddressSpace address_space_memory
;
93 static MemoryRegion io_mem_unassigned
;
96 CPUTailQ cpus
= QTAILQ_HEAD_INITIALIZER(cpus
);
98 /* current CPU in the current thread. It is only valid inside
100 __thread CPUState
*current_cpu
;
102 uintptr_t qemu_host_page_size
;
103 intptr_t qemu_host_page_mask
;
105 #if !defined(CONFIG_USER_ONLY)
106 /* 0 = Do not count executed instructions.
107 1 = Precise instruction counting.
108 2 = Adaptive rate instruction counting. */
111 typedef struct PhysPageEntry PhysPageEntry
;
113 struct PhysPageEntry
{
114 /* How many bits skip to next level (in units of L2_SIZE). 0 for a leaf. */
116 /* index into phys_sections (!skip) or phys_map_nodes (skip) */
120 #define PHYS_MAP_NODE_NIL (((uint32_t)~0) >> 6)
122 /* Size of the L2 (and L3, etc) page tables. */
123 #define ADDR_SPACE_BITS 64
126 #define P_L2_SIZE (1 << P_L2_BITS)
128 #define P_L2_LEVELS (((ADDR_SPACE_BITS - TARGET_PAGE_BITS - 1) / P_L2_BITS) + 1)
130 typedef PhysPageEntry Node
[P_L2_SIZE
];
132 typedef struct PhysPageMap
{
135 unsigned sections_nb
;
136 unsigned sections_nb_alloc
;
138 unsigned nodes_nb_alloc
;
140 MemoryRegionSection
*sections
;
143 struct AddressSpaceDispatch
{
144 MemoryRegionSection
*mru_section
;
145 /* This is a multi-level map on the physical address space.
146 * The bottom level has pointers to MemoryRegionSections.
148 PhysPageEntry phys_map
;
152 #define SUBPAGE_IDX(addr) ((addr) & ~TARGET_PAGE_MASK)
153 typedef struct subpage_t
{
157 uint16_t sub_section
[];
160 #define PHYS_SECTION_UNASSIGNED 0
162 static void io_mem_init(void);
163 static void memory_map_init(void);
164 static void tcg_log_global_after_sync(MemoryListener
*listener
);
165 static void tcg_commit(MemoryListener
*listener
);
168 * CPUAddressSpace: all the information a CPU needs about an AddressSpace
169 * @cpu: the CPU whose AddressSpace this is
170 * @as: the AddressSpace itself
171 * @memory_dispatch: its dispatch pointer (cached, RCU protected)
172 * @tcg_as_listener: listener for tracking changes to the AddressSpace
174 struct CPUAddressSpace
{
177 struct AddressSpaceDispatch
*memory_dispatch
;
178 MemoryListener tcg_as_listener
;
181 struct DirtyBitmapSnapshot
{
184 unsigned long dirty
[];
189 #if !defined(CONFIG_USER_ONLY)
191 static void phys_map_node_reserve(PhysPageMap
*map
, unsigned nodes
)
193 static unsigned alloc_hint
= 16;
194 if (map
->nodes_nb
+ nodes
> map
->nodes_nb_alloc
) {
195 map
->nodes_nb_alloc
= MAX(alloc_hint
, map
->nodes_nb
+ nodes
);
196 map
->nodes
= g_renew(Node
, map
->nodes
, map
->nodes_nb_alloc
);
197 alloc_hint
= map
->nodes_nb_alloc
;
201 static uint32_t phys_map_node_alloc(PhysPageMap
*map
, bool leaf
)
208 ret
= map
->nodes_nb
++;
210 assert(ret
!= PHYS_MAP_NODE_NIL
);
211 assert(ret
!= map
->nodes_nb_alloc
);
213 e
.skip
= leaf
? 0 : 1;
214 e
.ptr
= leaf
? PHYS_SECTION_UNASSIGNED
: PHYS_MAP_NODE_NIL
;
215 for (i
= 0; i
< P_L2_SIZE
; ++i
) {
216 memcpy(&p
[i
], &e
, sizeof(e
));
221 static void phys_page_set_level(PhysPageMap
*map
, PhysPageEntry
*lp
,
222 hwaddr
*index
, uint64_t *nb
, uint16_t leaf
,
226 hwaddr step
= (hwaddr
)1 << (level
* P_L2_BITS
);
228 if (lp
->skip
&& lp
->ptr
== PHYS_MAP_NODE_NIL
) {
229 lp
->ptr
= phys_map_node_alloc(map
, level
== 0);
231 p
= map
->nodes
[lp
->ptr
];
232 lp
= &p
[(*index
>> (level
* P_L2_BITS
)) & (P_L2_SIZE
- 1)];
234 while (*nb
&& lp
< &p
[P_L2_SIZE
]) {
235 if ((*index
& (step
- 1)) == 0 && *nb
>= step
) {
241 phys_page_set_level(map
, lp
, index
, nb
, leaf
, level
- 1);
247 static void phys_page_set(AddressSpaceDispatch
*d
,
248 hwaddr index
, uint64_t nb
,
251 /* Wildly overreserve - it doesn't matter much. */
252 phys_map_node_reserve(&d
->map
, 3 * P_L2_LEVELS
);
254 phys_page_set_level(&d
->map
, &d
->phys_map
, &index
, &nb
, leaf
, P_L2_LEVELS
- 1);
257 /* Compact a non leaf page entry. Simply detect that the entry has a single child,
258 * and update our entry so we can skip it and go directly to the destination.
260 static void phys_page_compact(PhysPageEntry
*lp
, Node
*nodes
)
262 unsigned valid_ptr
= P_L2_SIZE
;
267 if (lp
->ptr
== PHYS_MAP_NODE_NIL
) {
272 for (i
= 0; i
< P_L2_SIZE
; i
++) {
273 if (p
[i
].ptr
== PHYS_MAP_NODE_NIL
) {
280 phys_page_compact(&p
[i
], nodes
);
284 /* We can only compress if there's only one child. */
289 assert(valid_ptr
< P_L2_SIZE
);
291 /* Don't compress if it won't fit in the # of bits we have. */
292 if (P_L2_LEVELS
>= (1 << 6) &&
293 lp
->skip
+ p
[valid_ptr
].skip
>= (1 << 6)) {
297 lp
->ptr
= p
[valid_ptr
].ptr
;
298 if (!p
[valid_ptr
].skip
) {
299 /* If our only child is a leaf, make this a leaf. */
300 /* By design, we should have made this node a leaf to begin with so we
301 * should never reach here.
302 * But since it's so simple to handle this, let's do it just in case we
307 lp
->skip
+= p
[valid_ptr
].skip
;
311 void address_space_dispatch_compact(AddressSpaceDispatch
*d
)
313 if (d
->phys_map
.skip
) {
314 phys_page_compact(&d
->phys_map
, d
->map
.nodes
);
318 static inline bool section_covers_addr(const MemoryRegionSection
*section
,
321 /* Memory topology clips a memory region to [0, 2^64); size.hi > 0 means
322 * the section must cover the entire address space.
324 return int128_gethi(section
->size
) ||
325 range_covers_byte(section
->offset_within_address_space
,
326 int128_getlo(section
->size
), addr
);
329 static MemoryRegionSection
*phys_page_find(AddressSpaceDispatch
*d
, hwaddr addr
)
331 PhysPageEntry lp
= d
->phys_map
, *p
;
332 Node
*nodes
= d
->map
.nodes
;
333 MemoryRegionSection
*sections
= d
->map
.sections
;
334 hwaddr index
= addr
>> TARGET_PAGE_BITS
;
337 for (i
= P_L2_LEVELS
; lp
.skip
&& (i
-= lp
.skip
) >= 0;) {
338 if (lp
.ptr
== PHYS_MAP_NODE_NIL
) {
339 return §ions
[PHYS_SECTION_UNASSIGNED
];
342 lp
= p
[(index
>> (i
* P_L2_BITS
)) & (P_L2_SIZE
- 1)];
345 if (section_covers_addr(§ions
[lp
.ptr
], addr
)) {
346 return §ions
[lp
.ptr
];
348 return §ions
[PHYS_SECTION_UNASSIGNED
];
352 /* Called from RCU critical section */
353 static MemoryRegionSection
*address_space_lookup_region(AddressSpaceDispatch
*d
,
355 bool resolve_subpage
)
357 MemoryRegionSection
*section
= atomic_read(&d
->mru_section
);
360 if (!section
|| section
== &d
->map
.sections
[PHYS_SECTION_UNASSIGNED
] ||
361 !section_covers_addr(section
, addr
)) {
362 section
= phys_page_find(d
, addr
);
363 atomic_set(&d
->mru_section
, section
);
365 if (resolve_subpage
&& section
->mr
->subpage
) {
366 subpage
= container_of(section
->mr
, subpage_t
, iomem
);
367 section
= &d
->map
.sections
[subpage
->sub_section
[SUBPAGE_IDX(addr
)]];
372 /* Called from RCU critical section */
373 static MemoryRegionSection
*
374 address_space_translate_internal(AddressSpaceDispatch
*d
, hwaddr addr
, hwaddr
*xlat
,
375 hwaddr
*plen
, bool resolve_subpage
)
377 MemoryRegionSection
*section
;
381 section
= address_space_lookup_region(d
, addr
, resolve_subpage
);
382 /* Compute offset within MemoryRegionSection */
383 addr
-= section
->offset_within_address_space
;
385 /* Compute offset within MemoryRegion */
386 *xlat
= addr
+ section
->offset_within_region
;
390 /* MMIO registers can be expected to perform full-width accesses based only
391 * on their address, without considering adjacent registers that could
392 * decode to completely different MemoryRegions. When such registers
393 * exist (e.g. I/O ports 0xcf8 and 0xcf9 on most PC chipsets), MMIO
394 * regions overlap wildly. For this reason we cannot clamp the accesses
397 * If the length is small (as is the case for address_space_ldl/stl),
398 * everything works fine. If the incoming length is large, however,
399 * the caller really has to do the clamping through memory_access_size.
401 if (memory_region_is_ram(mr
)) {
402 diff
= int128_sub(section
->size
, int128_make64(addr
));
403 *plen
= int128_get64(int128_min(diff
, int128_make64(*plen
)));
409 * address_space_translate_iommu - translate an address through an IOMMU
410 * memory region and then through the target address space.
412 * @iommu_mr: the IOMMU memory region that we start the translation from
413 * @addr: the address to be translated through the MMU
414 * @xlat: the translated address offset within the destination memory region.
415 * It cannot be %NULL.
416 * @plen_out: valid read/write length of the translated address. It
418 * @page_mask_out: page mask for the translated address. This
419 * should only be meaningful for IOMMU translated
420 * addresses, since there may be huge pages that this bit
421 * would tell. It can be %NULL if we don't care about it.
422 * @is_write: whether the translation operation is for write
423 * @is_mmio: whether this can be MMIO, set true if it can
424 * @target_as: the address space targeted by the IOMMU
425 * @attrs: transaction attributes
427 * This function is called from RCU critical section. It is the common
428 * part of flatview_do_translate and address_space_translate_cached.
430 static MemoryRegionSection
address_space_translate_iommu(IOMMUMemoryRegion
*iommu_mr
,
433 hwaddr
*page_mask_out
,
436 AddressSpace
**target_as
,
439 MemoryRegionSection
*section
;
440 hwaddr page_mask
= (hwaddr
)-1;
444 IOMMUMemoryRegionClass
*imrc
= memory_region_get_iommu_class_nocheck(iommu_mr
);
448 if (imrc
->attrs_to_index
) {
449 iommu_idx
= imrc
->attrs_to_index(iommu_mr
, attrs
);
452 iotlb
= imrc
->translate(iommu_mr
, addr
, is_write
?
453 IOMMU_WO
: IOMMU_RO
, iommu_idx
);
455 if (!(iotlb
.perm
& (1 << is_write
))) {
459 addr
= ((iotlb
.translated_addr
& ~iotlb
.addr_mask
)
460 | (addr
& iotlb
.addr_mask
));
461 page_mask
&= iotlb
.addr_mask
;
462 *plen_out
= MIN(*plen_out
, (addr
| iotlb
.addr_mask
) - addr
+ 1);
463 *target_as
= iotlb
.target_as
;
465 section
= address_space_translate_internal(
466 address_space_to_dispatch(iotlb
.target_as
), addr
, xlat
,
469 iommu_mr
= memory_region_get_iommu(section
->mr
);
470 } while (unlikely(iommu_mr
));
473 *page_mask_out
= page_mask
;
478 return (MemoryRegionSection
) { .mr
= &io_mem_unassigned
};
482 * flatview_do_translate - translate an address in FlatView
484 * @fv: the flat view that we want to translate on
485 * @addr: the address to be translated in above address space
486 * @xlat: the translated address offset within memory region. It
488 * @plen_out: valid read/write length of the translated address. It
489 * can be @NULL when we don't care about it.
490 * @page_mask_out: page mask for the translated address. This
491 * should only be meaningful for IOMMU translated
492 * addresses, since there may be huge pages that this bit
493 * would tell. It can be @NULL if we don't care about it.
494 * @is_write: whether the translation operation is for write
495 * @is_mmio: whether this can be MMIO, set true if it can
496 * @target_as: the address space targeted by the IOMMU
497 * @attrs: memory transaction attributes
499 * This function is called from RCU critical section
501 static MemoryRegionSection
flatview_do_translate(FlatView
*fv
,
505 hwaddr
*page_mask_out
,
508 AddressSpace
**target_as
,
511 MemoryRegionSection
*section
;
512 IOMMUMemoryRegion
*iommu_mr
;
513 hwaddr plen
= (hwaddr
)(-1);
519 section
= address_space_translate_internal(
520 flatview_to_dispatch(fv
), addr
, xlat
,
523 iommu_mr
= memory_region_get_iommu(section
->mr
);
524 if (unlikely(iommu_mr
)) {
525 return address_space_translate_iommu(iommu_mr
, xlat
,
526 plen_out
, page_mask_out
,
531 /* Not behind an IOMMU, use default page size. */
532 *page_mask_out
= ~TARGET_PAGE_MASK
;
538 /* Called from RCU critical section */
539 IOMMUTLBEntry
address_space_get_iotlb_entry(AddressSpace
*as
, hwaddr addr
,
540 bool is_write
, MemTxAttrs attrs
)
542 MemoryRegionSection section
;
543 hwaddr xlat
, page_mask
;
546 * This can never be MMIO, and we don't really care about plen,
549 section
= flatview_do_translate(address_space_to_flatview(as
), addr
, &xlat
,
550 NULL
, &page_mask
, is_write
, false, &as
,
553 /* Illegal translation */
554 if (section
.mr
== &io_mem_unassigned
) {
558 /* Convert memory region offset into address space offset */
559 xlat
+= section
.offset_within_address_space
-
560 section
.offset_within_region
;
562 return (IOMMUTLBEntry
) {
564 .iova
= addr
& ~page_mask
,
565 .translated_addr
= xlat
& ~page_mask
,
566 .addr_mask
= page_mask
,
567 /* IOTLBs are for DMAs, and DMA only allows on RAMs. */
572 return (IOMMUTLBEntry
) {0};
575 /* Called from RCU critical section */
576 MemoryRegion
*flatview_translate(FlatView
*fv
, hwaddr addr
, hwaddr
*xlat
,
577 hwaddr
*plen
, bool is_write
,
581 MemoryRegionSection section
;
582 AddressSpace
*as
= NULL
;
584 /* This can be MMIO, so setup MMIO bit. */
585 section
= flatview_do_translate(fv
, addr
, xlat
, plen
, NULL
,
586 is_write
, true, &as
, attrs
);
589 if (xen_enabled() && memory_access_is_direct(mr
, is_write
)) {
590 hwaddr page
= ((addr
& TARGET_PAGE_MASK
) + TARGET_PAGE_SIZE
) - addr
;
591 *plen
= MIN(page
, *plen
);
597 typedef struct TCGIOMMUNotifier
{
605 static void tcg_iommu_unmap_notify(IOMMUNotifier
*n
, IOMMUTLBEntry
*iotlb
)
607 TCGIOMMUNotifier
*notifier
= container_of(n
, TCGIOMMUNotifier
, n
);
609 if (!notifier
->active
) {
612 tlb_flush(notifier
->cpu
);
613 notifier
->active
= false;
614 /* We leave the notifier struct on the list to avoid reallocating it later.
615 * Generally the number of IOMMUs a CPU deals with will be small.
616 * In any case we can't unregister the iommu notifier from a notify
621 static void tcg_register_iommu_notifier(CPUState
*cpu
,
622 IOMMUMemoryRegion
*iommu_mr
,
625 /* Make sure this CPU has an IOMMU notifier registered for this
626 * IOMMU/IOMMU index combination, so that we can flush its TLB
627 * when the IOMMU tells us the mappings we've cached have changed.
629 MemoryRegion
*mr
= MEMORY_REGION(iommu_mr
);
630 TCGIOMMUNotifier
*notifier
;
634 for (i
= 0; i
< cpu
->iommu_notifiers
->len
; i
++) {
635 notifier
= g_array_index(cpu
->iommu_notifiers
, TCGIOMMUNotifier
*, i
);
636 if (notifier
->mr
== mr
&& notifier
->iommu_idx
== iommu_idx
) {
640 if (i
== cpu
->iommu_notifiers
->len
) {
641 /* Not found, add a new entry at the end of the array */
642 cpu
->iommu_notifiers
= g_array_set_size(cpu
->iommu_notifiers
, i
+ 1);
643 notifier
= g_new0(TCGIOMMUNotifier
, 1);
644 g_array_index(cpu
->iommu_notifiers
, TCGIOMMUNotifier
*, i
) = notifier
;
647 notifier
->iommu_idx
= iommu_idx
;
649 /* Rather than trying to register interest in the specific part
650 * of the iommu's address space that we've accessed and then
651 * expand it later as subsequent accesses touch more of it, we
652 * just register interest in the whole thing, on the assumption
653 * that iommu reconfiguration will be rare.
655 iommu_notifier_init(¬ifier
->n
,
656 tcg_iommu_unmap_notify
,
657 IOMMU_NOTIFIER_UNMAP
,
661 ret
= memory_region_register_iommu_notifier(notifier
->mr
, ¬ifier
->n
,
664 error_report_err(err
);
669 if (!notifier
->active
) {
670 notifier
->active
= true;
674 static void tcg_iommu_free_notifier_list(CPUState
*cpu
)
676 /* Destroy the CPU's notifier list */
678 TCGIOMMUNotifier
*notifier
;
680 for (i
= 0; i
< cpu
->iommu_notifiers
->len
; i
++) {
681 notifier
= g_array_index(cpu
->iommu_notifiers
, TCGIOMMUNotifier
*, i
);
682 memory_region_unregister_iommu_notifier(notifier
->mr
, ¬ifier
->n
);
685 g_array_free(cpu
->iommu_notifiers
, true);
688 /* Called from RCU critical section */
689 MemoryRegionSection
*
690 address_space_translate_for_iotlb(CPUState
*cpu
, int asidx
, hwaddr addr
,
691 hwaddr
*xlat
, hwaddr
*plen
,
692 MemTxAttrs attrs
, int *prot
)
694 MemoryRegionSection
*section
;
695 IOMMUMemoryRegion
*iommu_mr
;
696 IOMMUMemoryRegionClass
*imrc
;
699 AddressSpaceDispatch
*d
= atomic_rcu_read(&cpu
->cpu_ases
[asidx
].memory_dispatch
);
702 section
= address_space_translate_internal(d
, addr
, &addr
, plen
, false);
704 iommu_mr
= memory_region_get_iommu(section
->mr
);
709 imrc
= memory_region_get_iommu_class_nocheck(iommu_mr
);
711 iommu_idx
= imrc
->attrs_to_index(iommu_mr
, attrs
);
712 tcg_register_iommu_notifier(cpu
, iommu_mr
, iommu_idx
);
713 /* We need all the permissions, so pass IOMMU_NONE so the IOMMU
714 * doesn't short-cut its translation table walk.
716 iotlb
= imrc
->translate(iommu_mr
, addr
, IOMMU_NONE
, iommu_idx
);
717 addr
= ((iotlb
.translated_addr
& ~iotlb
.addr_mask
)
718 | (addr
& iotlb
.addr_mask
));
719 /* Update the caller's prot bits to remove permissions the IOMMU
720 * is giving us a failure response for. If we get down to no
721 * permissions left at all we can give up now.
723 if (!(iotlb
.perm
& IOMMU_RO
)) {
724 *prot
&= ~(PAGE_READ
| PAGE_EXEC
);
726 if (!(iotlb
.perm
& IOMMU_WO
)) {
727 *prot
&= ~PAGE_WRITE
;
734 d
= flatview_to_dispatch(address_space_to_flatview(iotlb
.target_as
));
737 assert(!memory_region_is_iommu(section
->mr
));
742 return &d
->map
.sections
[PHYS_SECTION_UNASSIGNED
];
746 #if !defined(CONFIG_USER_ONLY)
748 static int cpu_common_post_load(void *opaque
, int version_id
)
750 CPUState
*cpu
= opaque
;
752 /* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the
753 version_id is increased. */
754 cpu
->interrupt_request
&= ~0x01;
757 /* loadvm has just updated the content of RAM, bypassing the
758 * usual mechanisms that ensure we flush TBs for writes to
759 * memory we've translated code from. So we must flush all TBs,
760 * which will now be stale.
767 static int cpu_common_pre_load(void *opaque
)
769 CPUState
*cpu
= opaque
;
771 cpu
->exception_index
= -1;
776 static bool cpu_common_exception_index_needed(void *opaque
)
778 CPUState
*cpu
= opaque
;
780 return tcg_enabled() && cpu
->exception_index
!= -1;
783 static const VMStateDescription vmstate_cpu_common_exception_index
= {
784 .name
= "cpu_common/exception_index",
786 .minimum_version_id
= 1,
787 .needed
= cpu_common_exception_index_needed
,
788 .fields
= (VMStateField
[]) {
789 VMSTATE_INT32(exception_index
, CPUState
),
790 VMSTATE_END_OF_LIST()
794 static bool cpu_common_crash_occurred_needed(void *opaque
)
796 CPUState
*cpu
= opaque
;
798 return cpu
->crash_occurred
;
801 static const VMStateDescription vmstate_cpu_common_crash_occurred
= {
802 .name
= "cpu_common/crash_occurred",
804 .minimum_version_id
= 1,
805 .needed
= cpu_common_crash_occurred_needed
,
806 .fields
= (VMStateField
[]) {
807 VMSTATE_BOOL(crash_occurred
, CPUState
),
808 VMSTATE_END_OF_LIST()
812 const VMStateDescription vmstate_cpu_common
= {
813 .name
= "cpu_common",
815 .minimum_version_id
= 1,
816 .pre_load
= cpu_common_pre_load
,
817 .post_load
= cpu_common_post_load
,
818 .fields
= (VMStateField
[]) {
819 VMSTATE_UINT32(halted
, CPUState
),
820 VMSTATE_UINT32(interrupt_request
, CPUState
),
821 VMSTATE_END_OF_LIST()
823 .subsections
= (const VMStateDescription
*[]) {
824 &vmstate_cpu_common_exception_index
,
825 &vmstate_cpu_common_crash_occurred
,
832 CPUState
*qemu_get_cpu(int index
)
837 if (cpu
->cpu_index
== index
) {
845 #if !defined(CONFIG_USER_ONLY)
846 void cpu_address_space_init(CPUState
*cpu
, int asidx
,
847 const char *prefix
, MemoryRegion
*mr
)
849 CPUAddressSpace
*newas
;
850 AddressSpace
*as
= g_new0(AddressSpace
, 1);
854 as_name
= g_strdup_printf("%s-%d", prefix
, cpu
->cpu_index
);
855 address_space_init(as
, mr
, as_name
);
858 /* Target code should have set num_ases before calling us */
859 assert(asidx
< cpu
->num_ases
);
862 /* address space 0 gets the convenience alias */
866 /* KVM cannot currently support multiple address spaces. */
867 assert(asidx
== 0 || !kvm_enabled());
869 if (!cpu
->cpu_ases
) {
870 cpu
->cpu_ases
= g_new0(CPUAddressSpace
, cpu
->num_ases
);
873 newas
= &cpu
->cpu_ases
[asidx
];
877 newas
->tcg_as_listener
.log_global_after_sync
= tcg_log_global_after_sync
;
878 newas
->tcg_as_listener
.commit
= tcg_commit
;
879 memory_listener_register(&newas
->tcg_as_listener
, as
);
883 AddressSpace
*cpu_get_address_space(CPUState
*cpu
, int asidx
)
885 /* Return the AddressSpace corresponding to the specified index */
886 return cpu
->cpu_ases
[asidx
].as
;
890 void cpu_exec_unrealizefn(CPUState
*cpu
)
892 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
894 cpu_list_remove(cpu
);
896 if (cc
->vmsd
!= NULL
) {
897 vmstate_unregister(NULL
, cc
->vmsd
, cpu
);
899 if (qdev_get_vmsd(DEVICE(cpu
)) == NULL
) {
900 vmstate_unregister(NULL
, &vmstate_cpu_common
, cpu
);
902 #ifndef CONFIG_USER_ONLY
903 tcg_iommu_free_notifier_list(cpu
);
907 Property cpu_common_props
[] = {
908 #ifndef CONFIG_USER_ONLY
909 /* Create a memory property for softmmu CPU object,
910 * so users can wire up its memory. (This can't go in hw/core/cpu.c
911 * because that file is compiled only once for both user-mode
912 * and system builds.) The default if no link is set up is to use
913 * the system address space.
915 DEFINE_PROP_LINK("memory", CPUState
, memory
, TYPE_MEMORY_REGION
,
918 DEFINE_PROP_END_OF_LIST(),
921 void cpu_exec_initfn(CPUState
*cpu
)
926 #ifndef CONFIG_USER_ONLY
927 cpu
->thread_id
= qemu_get_thread_id();
928 cpu
->memory
= system_memory
;
929 object_ref(OBJECT(cpu
->memory
));
933 void cpu_exec_realizefn(CPUState
*cpu
, Error
**errp
)
935 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
936 static bool tcg_target_initialized
;
940 if (tcg_enabled() && !tcg_target_initialized
) {
941 tcg_target_initialized
= true;
942 cc
->tcg_initialize();
946 qemu_plugin_vcpu_init_hook(cpu
);
948 #ifndef CONFIG_USER_ONLY
949 if (qdev_get_vmsd(DEVICE(cpu
)) == NULL
) {
950 vmstate_register(NULL
, cpu
->cpu_index
, &vmstate_cpu_common
, cpu
);
952 if (cc
->vmsd
!= NULL
) {
953 vmstate_register(NULL
, cpu
->cpu_index
, cc
->vmsd
, cpu
);
956 cpu
->iommu_notifiers
= g_array_new(false, true, sizeof(TCGIOMMUNotifier
*));
960 const char *parse_cpu_option(const char *cpu_option
)
964 gchar
**model_pieces
;
965 const char *cpu_type
;
967 model_pieces
= g_strsplit(cpu_option
, ",", 2);
968 if (!model_pieces
[0]) {
969 error_report("-cpu option cannot be empty");
973 oc
= cpu_class_by_name(CPU_RESOLVING_TYPE
, model_pieces
[0]);
975 error_report("unable to find CPU model '%s'", model_pieces
[0]);
976 g_strfreev(model_pieces
);
980 cpu_type
= object_class_get_name(oc
);
982 cc
->parse_features(cpu_type
, model_pieces
[1], &error_fatal
);
983 g_strfreev(model_pieces
);
987 #if defined(CONFIG_USER_ONLY)
988 void tb_invalidate_phys_addr(target_ulong addr
)
991 tb_invalidate_phys_page_range(addr
, addr
+ 1);
995 static void breakpoint_invalidate(CPUState
*cpu
, target_ulong pc
)
997 tb_invalidate_phys_addr(pc
);
1000 void tb_invalidate_phys_addr(AddressSpace
*as
, hwaddr addr
, MemTxAttrs attrs
)
1002 ram_addr_t ram_addr
;
1006 if (!tcg_enabled()) {
1010 RCU_READ_LOCK_GUARD();
1011 mr
= address_space_translate(as
, addr
, &addr
, &l
, false, attrs
);
1012 if (!(memory_region_is_ram(mr
)
1013 || memory_region_is_romd(mr
))) {
1016 ram_addr
= memory_region_get_ram_addr(mr
) + addr
;
1017 tb_invalidate_phys_page_range(ram_addr
, ram_addr
+ 1);
1020 static void breakpoint_invalidate(CPUState
*cpu
, target_ulong pc
)
1023 * There may not be a virtual to physical translation for the pc
1024 * right now, but there may exist cached TB for this pc.
1025 * Flush the whole TB cache to force re-translation of such TBs.
1026 * This is heavyweight, but we're debugging anyway.
1032 #ifndef CONFIG_USER_ONLY
1033 /* Add a watchpoint. */
1034 int cpu_watchpoint_insert(CPUState
*cpu
, vaddr addr
, vaddr len
,
1035 int flags
, CPUWatchpoint
**watchpoint
)
1039 /* forbid ranges which are empty or run off the end of the address space */
1040 if (len
== 0 || (addr
+ len
- 1) < addr
) {
1041 error_report("tried to set invalid watchpoint at %"
1042 VADDR_PRIx
", len=%" VADDR_PRIu
, addr
, len
);
1045 wp
= g_malloc(sizeof(*wp
));
1051 /* keep all GDB-injected watchpoints in front */
1052 if (flags
& BP_GDB
) {
1053 QTAILQ_INSERT_HEAD(&cpu
->watchpoints
, wp
, entry
);
1055 QTAILQ_INSERT_TAIL(&cpu
->watchpoints
, wp
, entry
);
1058 tlb_flush_page(cpu
, addr
);
1065 /* Remove a specific watchpoint. */
1066 int cpu_watchpoint_remove(CPUState
*cpu
, vaddr addr
, vaddr len
,
1071 QTAILQ_FOREACH(wp
, &cpu
->watchpoints
, entry
) {
1072 if (addr
== wp
->vaddr
&& len
== wp
->len
1073 && flags
== (wp
->flags
& ~BP_WATCHPOINT_HIT
)) {
1074 cpu_watchpoint_remove_by_ref(cpu
, wp
);
1081 /* Remove a specific watchpoint by reference. */
1082 void cpu_watchpoint_remove_by_ref(CPUState
*cpu
, CPUWatchpoint
*watchpoint
)
1084 QTAILQ_REMOVE(&cpu
->watchpoints
, watchpoint
, entry
);
1086 tlb_flush_page(cpu
, watchpoint
->vaddr
);
1091 /* Remove all matching watchpoints. */
1092 void cpu_watchpoint_remove_all(CPUState
*cpu
, int mask
)
1094 CPUWatchpoint
*wp
, *next
;
1096 QTAILQ_FOREACH_SAFE(wp
, &cpu
->watchpoints
, entry
, next
) {
1097 if (wp
->flags
& mask
) {
1098 cpu_watchpoint_remove_by_ref(cpu
, wp
);
1103 /* Return true if this watchpoint address matches the specified
1104 * access (ie the address range covered by the watchpoint overlaps
1105 * partially or completely with the address range covered by the
1108 static inline bool watchpoint_address_matches(CPUWatchpoint
*wp
,
1109 vaddr addr
, vaddr len
)
1111 /* We know the lengths are non-zero, but a little caution is
1112 * required to avoid errors in the case where the range ends
1113 * exactly at the top of the address space and so addr + len
1114 * wraps round to zero.
1116 vaddr wpend
= wp
->vaddr
+ wp
->len
- 1;
1117 vaddr addrend
= addr
+ len
- 1;
1119 return !(addr
> wpend
|| wp
->vaddr
> addrend
);
1122 /* Return flags for watchpoints that match addr + prot. */
1123 int cpu_watchpoint_address_matches(CPUState
*cpu
, vaddr addr
, vaddr len
)
1128 QTAILQ_FOREACH(wp
, &cpu
->watchpoints
, entry
) {
1129 if (watchpoint_address_matches(wp
, addr
, TARGET_PAGE_SIZE
)) {
1135 #endif /* !CONFIG_USER_ONLY */
1137 /* Add a breakpoint. */
1138 int cpu_breakpoint_insert(CPUState
*cpu
, vaddr pc
, int flags
,
1139 CPUBreakpoint
**breakpoint
)
1143 bp
= g_malloc(sizeof(*bp
));
1148 /* keep all GDB-injected breakpoints in front */
1149 if (flags
& BP_GDB
) {
1150 QTAILQ_INSERT_HEAD(&cpu
->breakpoints
, bp
, entry
);
1152 QTAILQ_INSERT_TAIL(&cpu
->breakpoints
, bp
, entry
);
1155 breakpoint_invalidate(cpu
, pc
);
1163 /* Remove a specific breakpoint. */
1164 int cpu_breakpoint_remove(CPUState
*cpu
, vaddr pc
, int flags
)
1168 QTAILQ_FOREACH(bp
, &cpu
->breakpoints
, entry
) {
1169 if (bp
->pc
== pc
&& bp
->flags
== flags
) {
1170 cpu_breakpoint_remove_by_ref(cpu
, bp
);
1177 /* Remove a specific breakpoint by reference. */
1178 void cpu_breakpoint_remove_by_ref(CPUState
*cpu
, CPUBreakpoint
*breakpoint
)
1180 QTAILQ_REMOVE(&cpu
->breakpoints
, breakpoint
, entry
);
1182 breakpoint_invalidate(cpu
, breakpoint
->pc
);
1187 /* Remove all matching breakpoints. */
1188 void cpu_breakpoint_remove_all(CPUState
*cpu
, int mask
)
1190 CPUBreakpoint
*bp
, *next
;
1192 QTAILQ_FOREACH_SAFE(bp
, &cpu
->breakpoints
, entry
, next
) {
1193 if (bp
->flags
& mask
) {
1194 cpu_breakpoint_remove_by_ref(cpu
, bp
);
1199 /* enable or disable single step mode. EXCP_DEBUG is returned by the
1200 CPU loop after each instruction */
1201 void cpu_single_step(CPUState
*cpu
, int enabled
)
1203 if (cpu
->singlestep_enabled
!= enabled
) {
1204 cpu
->singlestep_enabled
= enabled
;
1205 if (kvm_enabled()) {
1206 kvm_update_guest_debug(cpu
, 0);
1208 /* must flush all the translated code to avoid inconsistencies */
1209 /* XXX: only flush what is necessary */
1215 void cpu_abort(CPUState
*cpu
, const char *fmt
, ...)
1222 fprintf(stderr
, "qemu: fatal: ");
1223 vfprintf(stderr
, fmt
, ap
);
1224 fprintf(stderr
, "\n");
1225 cpu_dump_state(cpu
, stderr
, CPU_DUMP_FPU
| CPU_DUMP_CCOP
);
1226 if (qemu_log_separate()) {
1227 FILE *logfile
= qemu_log_lock();
1228 qemu_log("qemu: fatal: ");
1229 qemu_log_vprintf(fmt
, ap2
);
1231 log_cpu_state(cpu
, CPU_DUMP_FPU
| CPU_DUMP_CCOP
);
1233 qemu_log_unlock(logfile
);
1239 #if defined(CONFIG_USER_ONLY)
1241 struct sigaction act
;
1242 sigfillset(&act
.sa_mask
);
1243 act
.sa_handler
= SIG_DFL
;
1245 sigaction(SIGABRT
, &act
, NULL
);
1251 #if !defined(CONFIG_USER_ONLY)
1252 /* Called from RCU critical section */
1253 static RAMBlock
*qemu_get_ram_block(ram_addr_t addr
)
1257 block
= atomic_rcu_read(&ram_list
.mru_block
);
1258 if (block
&& addr
- block
->offset
< block
->max_length
) {
1261 RAMBLOCK_FOREACH(block
) {
1262 if (addr
- block
->offset
< block
->max_length
) {
1267 fprintf(stderr
, "Bad ram offset %" PRIx64
"\n", (uint64_t)addr
);
1271 /* It is safe to write mru_block outside the iothread lock. This
1276 * xxx removed from list
1280 * call_rcu(reclaim_ramblock, xxx);
1283 * atomic_rcu_set is not needed here. The block was already published
1284 * when it was placed into the list. Here we're just making an extra
1285 * copy of the pointer.
1287 ram_list
.mru_block
= block
;
1291 static void tlb_reset_dirty_range_all(ram_addr_t start
, ram_addr_t length
)
1298 assert(tcg_enabled());
1299 end
= TARGET_PAGE_ALIGN(start
+ length
);
1300 start
&= TARGET_PAGE_MASK
;
1302 RCU_READ_LOCK_GUARD();
1303 block
= qemu_get_ram_block(start
);
1304 assert(block
== qemu_get_ram_block(end
- 1));
1305 start1
= (uintptr_t)ramblock_ptr(block
, start
- block
->offset
);
1307 tlb_reset_dirty(cpu
, start1
, length
);
1311 /* Note: start and end must be within the same ram block. */
1312 bool cpu_physical_memory_test_and_clear_dirty(ram_addr_t start
,
1316 DirtyMemoryBlocks
*blocks
;
1317 unsigned long end
, page
;
1320 uint64_t mr_offset
, mr_size
;
1326 end
= TARGET_PAGE_ALIGN(start
+ length
) >> TARGET_PAGE_BITS
;
1327 page
= start
>> TARGET_PAGE_BITS
;
1329 WITH_RCU_READ_LOCK_GUARD() {
1330 blocks
= atomic_rcu_read(&ram_list
.dirty_memory
[client
]);
1331 ramblock
= qemu_get_ram_block(start
);
1332 /* Range sanity check on the ramblock */
1333 assert(start
>= ramblock
->offset
&&
1334 start
+ length
<= ramblock
->offset
+ ramblock
->used_length
);
1336 while (page
< end
) {
1337 unsigned long idx
= page
/ DIRTY_MEMORY_BLOCK_SIZE
;
1338 unsigned long offset
= page
% DIRTY_MEMORY_BLOCK_SIZE
;
1339 unsigned long num
= MIN(end
- page
,
1340 DIRTY_MEMORY_BLOCK_SIZE
- offset
);
1342 dirty
|= bitmap_test_and_clear_atomic(blocks
->blocks
[idx
],
1347 mr_offset
= (ram_addr_t
)(page
<< TARGET_PAGE_BITS
) - ramblock
->offset
;
1348 mr_size
= (end
- page
) << TARGET_PAGE_BITS
;
1349 memory_region_clear_dirty_bitmap(ramblock
->mr
, mr_offset
, mr_size
);
1352 if (dirty
&& tcg_enabled()) {
1353 tlb_reset_dirty_range_all(start
, length
);
1359 DirtyBitmapSnapshot
*cpu_physical_memory_snapshot_and_clear_dirty
1360 (MemoryRegion
*mr
, hwaddr offset
, hwaddr length
, unsigned client
)
1362 DirtyMemoryBlocks
*blocks
;
1363 ram_addr_t start
= memory_region_get_ram_addr(mr
) + offset
;
1364 unsigned long align
= 1UL << (TARGET_PAGE_BITS
+ BITS_PER_LEVEL
);
1365 ram_addr_t first
= QEMU_ALIGN_DOWN(start
, align
);
1366 ram_addr_t last
= QEMU_ALIGN_UP(start
+ length
, align
);
1367 DirtyBitmapSnapshot
*snap
;
1368 unsigned long page
, end
, dest
;
1370 snap
= g_malloc0(sizeof(*snap
) +
1371 ((last
- first
) >> (TARGET_PAGE_BITS
+ 3)));
1372 snap
->start
= first
;
1375 page
= first
>> TARGET_PAGE_BITS
;
1376 end
= last
>> TARGET_PAGE_BITS
;
1379 WITH_RCU_READ_LOCK_GUARD() {
1380 blocks
= atomic_rcu_read(&ram_list
.dirty_memory
[client
]);
1382 while (page
< end
) {
1383 unsigned long idx
= page
/ DIRTY_MEMORY_BLOCK_SIZE
;
1384 unsigned long offset
= page
% DIRTY_MEMORY_BLOCK_SIZE
;
1385 unsigned long num
= MIN(end
- page
,
1386 DIRTY_MEMORY_BLOCK_SIZE
- offset
);
1388 assert(QEMU_IS_ALIGNED(offset
, (1 << BITS_PER_LEVEL
)));
1389 assert(QEMU_IS_ALIGNED(num
, (1 << BITS_PER_LEVEL
)));
1390 offset
>>= BITS_PER_LEVEL
;
1392 bitmap_copy_and_clear_atomic(snap
->dirty
+ dest
,
1393 blocks
->blocks
[idx
] + offset
,
1396 dest
+= num
>> BITS_PER_LEVEL
;
1400 if (tcg_enabled()) {
1401 tlb_reset_dirty_range_all(start
, length
);
1404 memory_region_clear_dirty_bitmap(mr
, offset
, length
);
1409 bool cpu_physical_memory_snapshot_get_dirty(DirtyBitmapSnapshot
*snap
,
1413 unsigned long page
, end
;
1415 assert(start
>= snap
->start
);
1416 assert(start
+ length
<= snap
->end
);
1418 end
= TARGET_PAGE_ALIGN(start
+ length
- snap
->start
) >> TARGET_PAGE_BITS
;
1419 page
= (start
- snap
->start
) >> TARGET_PAGE_BITS
;
1421 while (page
< end
) {
1422 if (test_bit(page
, snap
->dirty
)) {
1430 /* Called from RCU critical section */
1431 hwaddr
memory_region_section_get_iotlb(CPUState
*cpu
,
1432 MemoryRegionSection
*section
)
1434 AddressSpaceDispatch
*d
= flatview_to_dispatch(section
->fv
);
1435 return section
- d
->map
.sections
;
1437 #endif /* defined(CONFIG_USER_ONLY) */
1439 #if !defined(CONFIG_USER_ONLY)
1441 static int subpage_register(subpage_t
*mmio
, uint32_t start
, uint32_t end
,
1443 static subpage_t
*subpage_init(FlatView
*fv
, hwaddr base
);
1445 static void *(*phys_mem_alloc
)(size_t size
, uint64_t *align
, bool shared
) =
1446 qemu_anon_ram_alloc
;
1449 * Set a custom physical guest memory alloator.
1450 * Accelerators with unusual needs may need this. Hopefully, we can
1451 * get rid of it eventually.
1453 void phys_mem_set_alloc(void *(*alloc
)(size_t, uint64_t *align
, bool shared
))
1455 phys_mem_alloc
= alloc
;
1458 static uint16_t phys_section_add(PhysPageMap
*map
,
1459 MemoryRegionSection
*section
)
1461 /* The physical section number is ORed with a page-aligned
1462 * pointer to produce the iotlb entries. Thus it should
1463 * never overflow into the page-aligned value.
1465 assert(map
->sections_nb
< TARGET_PAGE_SIZE
);
1467 if (map
->sections_nb
== map
->sections_nb_alloc
) {
1468 map
->sections_nb_alloc
= MAX(map
->sections_nb_alloc
* 2, 16);
1469 map
->sections
= g_renew(MemoryRegionSection
, map
->sections
,
1470 map
->sections_nb_alloc
);
1472 map
->sections
[map
->sections_nb
] = *section
;
1473 memory_region_ref(section
->mr
);
1474 return map
->sections_nb
++;
1477 static void phys_section_destroy(MemoryRegion
*mr
)
1479 bool have_sub_page
= mr
->subpage
;
1481 memory_region_unref(mr
);
1483 if (have_sub_page
) {
1484 subpage_t
*subpage
= container_of(mr
, subpage_t
, iomem
);
1485 object_unref(OBJECT(&subpage
->iomem
));
1490 static void phys_sections_free(PhysPageMap
*map
)
1492 while (map
->sections_nb
> 0) {
1493 MemoryRegionSection
*section
= &map
->sections
[--map
->sections_nb
];
1494 phys_section_destroy(section
->mr
);
1496 g_free(map
->sections
);
1500 static void register_subpage(FlatView
*fv
, MemoryRegionSection
*section
)
1502 AddressSpaceDispatch
*d
= flatview_to_dispatch(fv
);
1504 hwaddr base
= section
->offset_within_address_space
1506 MemoryRegionSection
*existing
= phys_page_find(d
, base
);
1507 MemoryRegionSection subsection
= {
1508 .offset_within_address_space
= base
,
1509 .size
= int128_make64(TARGET_PAGE_SIZE
),
1513 assert(existing
->mr
->subpage
|| existing
->mr
== &io_mem_unassigned
);
1515 if (!(existing
->mr
->subpage
)) {
1516 subpage
= subpage_init(fv
, base
);
1518 subsection
.mr
= &subpage
->iomem
;
1519 phys_page_set(d
, base
>> TARGET_PAGE_BITS
, 1,
1520 phys_section_add(&d
->map
, &subsection
));
1522 subpage
= container_of(existing
->mr
, subpage_t
, iomem
);
1524 start
= section
->offset_within_address_space
& ~TARGET_PAGE_MASK
;
1525 end
= start
+ int128_get64(section
->size
) - 1;
1526 subpage_register(subpage
, start
, end
,
1527 phys_section_add(&d
->map
, section
));
1531 static void register_multipage(FlatView
*fv
,
1532 MemoryRegionSection
*section
)
1534 AddressSpaceDispatch
*d
= flatview_to_dispatch(fv
);
1535 hwaddr start_addr
= section
->offset_within_address_space
;
1536 uint16_t section_index
= phys_section_add(&d
->map
, section
);
1537 uint64_t num_pages
= int128_get64(int128_rshift(section
->size
,
1541 phys_page_set(d
, start_addr
>> TARGET_PAGE_BITS
, num_pages
, section_index
);
1545 * The range in *section* may look like this:
1549 * where s stands for subpage and P for page.
1551 void flatview_add_to_dispatch(FlatView
*fv
, MemoryRegionSection
*section
)
1553 MemoryRegionSection remain
= *section
;
1554 Int128 page_size
= int128_make64(TARGET_PAGE_SIZE
);
1556 /* register first subpage */
1557 if (remain
.offset_within_address_space
& ~TARGET_PAGE_MASK
) {
1558 uint64_t left
= TARGET_PAGE_ALIGN(remain
.offset_within_address_space
)
1559 - remain
.offset_within_address_space
;
1561 MemoryRegionSection now
= remain
;
1562 now
.size
= int128_min(int128_make64(left
), now
.size
);
1563 register_subpage(fv
, &now
);
1564 if (int128_eq(remain
.size
, now
.size
)) {
1567 remain
.size
= int128_sub(remain
.size
, now
.size
);
1568 remain
.offset_within_address_space
+= int128_get64(now
.size
);
1569 remain
.offset_within_region
+= int128_get64(now
.size
);
1572 /* register whole pages */
1573 if (int128_ge(remain
.size
, page_size
)) {
1574 MemoryRegionSection now
= remain
;
1575 now
.size
= int128_and(now
.size
, int128_neg(page_size
));
1576 register_multipage(fv
, &now
);
1577 if (int128_eq(remain
.size
, now
.size
)) {
1580 remain
.size
= int128_sub(remain
.size
, now
.size
);
1581 remain
.offset_within_address_space
+= int128_get64(now
.size
);
1582 remain
.offset_within_region
+= int128_get64(now
.size
);
1585 /* register last subpage */
1586 register_subpage(fv
, &remain
);
1589 void qemu_flush_coalesced_mmio_buffer(void)
1592 kvm_flush_coalesced_mmio_buffer();
1595 void qemu_mutex_lock_ramlist(void)
1597 qemu_mutex_lock(&ram_list
.mutex
);
1600 void qemu_mutex_unlock_ramlist(void)
1602 qemu_mutex_unlock(&ram_list
.mutex
);
1605 void ram_block_dump(Monitor
*mon
)
1610 RCU_READ_LOCK_GUARD();
1611 monitor_printf(mon
, "%24s %8s %18s %18s %18s\n",
1612 "Block Name", "PSize", "Offset", "Used", "Total");
1613 RAMBLOCK_FOREACH(block
) {
1614 psize
= size_to_str(block
->page_size
);
1615 monitor_printf(mon
, "%24s %8s 0x%016" PRIx64
" 0x%016" PRIx64
1616 " 0x%016" PRIx64
"\n", block
->idstr
, psize
,
1617 (uint64_t)block
->offset
,
1618 (uint64_t)block
->used_length
,
1619 (uint64_t)block
->max_length
);
1626 * FIXME TOCTTOU: this iterates over memory backends' mem-path, which
1627 * may or may not name the same files / on the same filesystem now as
1628 * when we actually open and map them. Iterate over the file
1629 * descriptors instead, and use qemu_fd_getpagesize().
1631 static int find_min_backend_pagesize(Object
*obj
, void *opaque
)
1633 long *hpsize_min
= opaque
;
1635 if (object_dynamic_cast(obj
, TYPE_MEMORY_BACKEND
)) {
1636 HostMemoryBackend
*backend
= MEMORY_BACKEND(obj
);
1637 long hpsize
= host_memory_backend_pagesize(backend
);
1639 if (host_memory_backend_is_mapped(backend
) && (hpsize
< *hpsize_min
)) {
1640 *hpsize_min
= hpsize
;
1647 static int find_max_backend_pagesize(Object
*obj
, void *opaque
)
1649 long *hpsize_max
= opaque
;
1651 if (object_dynamic_cast(obj
, TYPE_MEMORY_BACKEND
)) {
1652 HostMemoryBackend
*backend
= MEMORY_BACKEND(obj
);
1653 long hpsize
= host_memory_backend_pagesize(backend
);
1655 if (host_memory_backend_is_mapped(backend
) && (hpsize
> *hpsize_max
)) {
1656 *hpsize_max
= hpsize
;
1664 * TODO: We assume right now that all mapped host memory backends are
1665 * used as RAM, however some might be used for different purposes.
1667 long qemu_minrampagesize(void)
1669 long hpsize
= LONG_MAX
;
1670 long mainrampagesize
;
1671 Object
*memdev_root
;
1672 MachineState
*ms
= MACHINE(qdev_get_machine());
1674 mainrampagesize
= qemu_mempath_getpagesize(mem_path
);
1676 /* it's possible we have memory-backend objects with
1677 * hugepage-backed RAM. these may get mapped into system
1678 * address space via -numa parameters or memory hotplug
1679 * hooks. we want to take these into account, but we
1680 * also want to make sure these supported hugepage
1681 * sizes are applicable across the entire range of memory
1682 * we may boot from, so we take the min across all
1683 * backends, and assume normal pages in cases where a
1684 * backend isn't backed by hugepages.
1686 memdev_root
= object_resolve_path("/objects", NULL
);
1688 object_child_foreach(memdev_root
, find_min_backend_pagesize
, &hpsize
);
1690 if (hpsize
== LONG_MAX
) {
1691 /* No additional memory regions found ==> Report main RAM page size */
1692 return mainrampagesize
;
1695 /* If NUMA is disabled or the NUMA nodes are not backed with a
1696 * memory-backend, then there is at least one node using "normal" RAM,
1697 * so if its page size is smaller we have got to report that size instead.
1699 if (hpsize
> mainrampagesize
&&
1700 (ms
->numa_state
== NULL
||
1701 ms
->numa_state
->num_nodes
== 0 ||
1702 ms
->numa_state
->nodes
[0].node_memdev
== NULL
)) {
1705 error_report("Huge page support disabled (n/a for main memory).");
1708 return mainrampagesize
;
1714 long qemu_maxrampagesize(void)
1716 long pagesize
= qemu_mempath_getpagesize(mem_path
);
1717 Object
*memdev_root
= object_resolve_path("/objects", NULL
);
1720 object_child_foreach(memdev_root
, find_max_backend_pagesize
,
1726 long qemu_minrampagesize(void)
1728 return qemu_real_host_page_size
;
1730 long qemu_maxrampagesize(void)
1732 return qemu_real_host_page_size
;
1737 static int64_t get_file_size(int fd
)
1740 #if defined(__linux__)
1743 if (fstat(fd
, &st
) < 0) {
1747 /* Special handling for devdax character devices */
1748 if (S_ISCHR(st
.st_mode
)) {
1749 g_autofree
char *subsystem_path
= NULL
;
1750 g_autofree
char *subsystem
= NULL
;
1752 subsystem_path
= g_strdup_printf("/sys/dev/char/%d:%d/subsystem",
1753 major(st
.st_rdev
), minor(st
.st_rdev
));
1754 subsystem
= g_file_read_link(subsystem_path
, NULL
);
1756 if (subsystem
&& g_str_has_suffix(subsystem
, "/dax")) {
1757 g_autofree
char *size_path
= NULL
;
1758 g_autofree
char *size_str
= NULL
;
1760 size_path
= g_strdup_printf("/sys/dev/char/%d:%d/size",
1761 major(st
.st_rdev
), minor(st
.st_rdev
));
1763 if (g_file_get_contents(size_path
, &size_str
, NULL
, NULL
)) {
1764 return g_ascii_strtoll(size_str
, NULL
, 0);
1768 #endif /* defined(__linux__) */
1770 /* st.st_size may be zero for special files yet lseek(2) works */
1771 size
= lseek(fd
, 0, SEEK_END
);
1778 static int file_ram_open(const char *path
,
1779 const char *region_name
,
1784 char *sanitized_name
;
1790 fd
= open(path
, O_RDWR
);
1792 /* @path names an existing file, use it */
1795 if (errno
== ENOENT
) {
1796 /* @path names a file that doesn't exist, create it */
1797 fd
= open(path
, O_RDWR
| O_CREAT
| O_EXCL
, 0644);
1802 } else if (errno
== EISDIR
) {
1803 /* @path names a directory, create a file there */
1804 /* Make name safe to use with mkstemp by replacing '/' with '_'. */
1805 sanitized_name
= g_strdup(region_name
);
1806 for (c
= sanitized_name
; *c
!= '\0'; c
++) {
1812 filename
= g_strdup_printf("%s/qemu_back_mem.%s.XXXXXX", path
,
1814 g_free(sanitized_name
);
1816 fd
= mkstemp(filename
);
1824 if (errno
!= EEXIST
&& errno
!= EINTR
) {
1825 error_setg_errno(errp
, errno
,
1826 "can't open backing store %s for guest RAM",
1831 * Try again on EINTR and EEXIST. The latter happens when
1832 * something else creates the file between our two open().
1839 static void *file_ram_alloc(RAMBlock
*block
,
1846 MachineState
*ms
= MACHINE(qdev_get_machine());
1849 block
->page_size
= qemu_fd_getpagesize(fd
);
1850 if (block
->mr
->align
% block
->page_size
) {
1851 error_setg(errp
, "alignment 0x%" PRIx64
1852 " must be multiples of page size 0x%zx",
1853 block
->mr
->align
, block
->page_size
);
1855 } else if (block
->mr
->align
&& !is_power_of_2(block
->mr
->align
)) {
1856 error_setg(errp
, "alignment 0x%" PRIx64
1857 " must be a power of two", block
->mr
->align
);
1860 block
->mr
->align
= MAX(block
->page_size
, block
->mr
->align
);
1861 #if defined(__s390x__)
1862 if (kvm_enabled()) {
1863 block
->mr
->align
= MAX(block
->mr
->align
, QEMU_VMALLOC_ALIGN
);
1867 if (memory
< block
->page_size
) {
1868 error_setg(errp
, "memory size 0x" RAM_ADDR_FMT
" must be equal to "
1869 "or larger than page size 0x%zx",
1870 memory
, block
->page_size
);
1874 memory
= ROUND_UP(memory
, block
->page_size
);
1877 * ftruncate is not supported by hugetlbfs in older
1878 * hosts, so don't bother bailing out on errors.
1879 * If anything goes wrong with it under other filesystems,
1882 * Do not truncate the non-empty backend file to avoid corrupting
1883 * the existing data in the file. Disabling shrinking is not
1884 * enough. For example, the current vNVDIMM implementation stores
1885 * the guest NVDIMM labels at the end of the backend file. If the
1886 * backend file is later extended, QEMU will not be able to find
1887 * those labels. Therefore, extending the non-empty backend file
1888 * is disabled as well.
1890 if (truncate
&& ftruncate(fd
, memory
)) {
1891 perror("ftruncate");
1894 area
= qemu_ram_mmap(fd
, memory
, block
->mr
->align
,
1895 block
->flags
& RAM_SHARED
, block
->flags
& RAM_PMEM
);
1896 if (area
== MAP_FAILED
) {
1897 error_setg_errno(errp
, errno
,
1898 "unable to map backing store for guest RAM");
1903 os_mem_prealloc(fd
, area
, memory
, ms
->smp
.cpus
, &err
);
1905 error_propagate(errp
, err
);
1906 qemu_ram_munmap(fd
, area
, memory
);
1916 /* Allocate space within the ram_addr_t space that governs the
1918 * Called with the ramlist lock held.
1920 static ram_addr_t
find_ram_offset(ram_addr_t size
)
1922 RAMBlock
*block
, *next_block
;
1923 ram_addr_t offset
= RAM_ADDR_MAX
, mingap
= RAM_ADDR_MAX
;
1925 assert(size
!= 0); /* it would hand out same offset multiple times */
1927 if (QLIST_EMPTY_RCU(&ram_list
.blocks
)) {
1931 RAMBLOCK_FOREACH(block
) {
1932 ram_addr_t candidate
, next
= RAM_ADDR_MAX
;
1934 /* Align blocks to start on a 'long' in the bitmap
1935 * which makes the bitmap sync'ing take the fast path.
1937 candidate
= block
->offset
+ block
->max_length
;
1938 candidate
= ROUND_UP(candidate
, BITS_PER_LONG
<< TARGET_PAGE_BITS
);
1940 /* Search for the closest following block
1943 RAMBLOCK_FOREACH(next_block
) {
1944 if (next_block
->offset
>= candidate
) {
1945 next
= MIN(next
, next_block
->offset
);
1949 /* If it fits remember our place and remember the size
1950 * of gap, but keep going so that we might find a smaller
1951 * gap to fill so avoiding fragmentation.
1953 if (next
- candidate
>= size
&& next
- candidate
< mingap
) {
1955 mingap
= next
- candidate
;
1958 trace_find_ram_offset_loop(size
, candidate
, offset
, next
, mingap
);
1961 if (offset
== RAM_ADDR_MAX
) {
1962 fprintf(stderr
, "Failed to find gap of requested size: %" PRIu64
"\n",
1967 trace_find_ram_offset(size
, offset
);
1972 static unsigned long last_ram_page(void)
1975 ram_addr_t last
= 0;
1977 RCU_READ_LOCK_GUARD();
1978 RAMBLOCK_FOREACH(block
) {
1979 last
= MAX(last
, block
->offset
+ block
->max_length
);
1981 return last
>> TARGET_PAGE_BITS
;
1984 static void qemu_ram_setup_dump(void *addr
, ram_addr_t size
)
1988 /* Use MADV_DONTDUMP, if user doesn't want the guest memory in the core */
1989 if (!machine_dump_guest_core(current_machine
)) {
1990 ret
= qemu_madvise(addr
, size
, QEMU_MADV_DONTDUMP
);
1992 perror("qemu_madvise");
1993 fprintf(stderr
, "madvise doesn't support MADV_DONTDUMP, "
1994 "but dump_guest_core=off specified\n");
1999 const char *qemu_ram_get_idstr(RAMBlock
*rb
)
2004 void *qemu_ram_get_host_addr(RAMBlock
*rb
)
2009 ram_addr_t
qemu_ram_get_offset(RAMBlock
*rb
)
2014 ram_addr_t
qemu_ram_get_used_length(RAMBlock
*rb
)
2016 return rb
->used_length
;
2019 bool qemu_ram_is_shared(RAMBlock
*rb
)
2021 return rb
->flags
& RAM_SHARED
;
2024 /* Note: Only set at the start of postcopy */
2025 bool qemu_ram_is_uf_zeroable(RAMBlock
*rb
)
2027 return rb
->flags
& RAM_UF_ZEROPAGE
;
2030 void qemu_ram_set_uf_zeroable(RAMBlock
*rb
)
2032 rb
->flags
|= RAM_UF_ZEROPAGE
;
2035 bool qemu_ram_is_migratable(RAMBlock
*rb
)
2037 return rb
->flags
& RAM_MIGRATABLE
;
2040 void qemu_ram_set_migratable(RAMBlock
*rb
)
2042 rb
->flags
|= RAM_MIGRATABLE
;
2045 void qemu_ram_unset_migratable(RAMBlock
*rb
)
2047 rb
->flags
&= ~RAM_MIGRATABLE
;
2050 /* Called with iothread lock held. */
2051 void qemu_ram_set_idstr(RAMBlock
*new_block
, const char *name
, DeviceState
*dev
)
2056 assert(!new_block
->idstr
[0]);
2059 char *id
= qdev_get_dev_path(dev
);
2061 snprintf(new_block
->idstr
, sizeof(new_block
->idstr
), "%s/", id
);
2065 pstrcat(new_block
->idstr
, sizeof(new_block
->idstr
), name
);
2067 RCU_READ_LOCK_GUARD();
2068 RAMBLOCK_FOREACH(block
) {
2069 if (block
!= new_block
&&
2070 !strcmp(block
->idstr
, new_block
->idstr
)) {
2071 fprintf(stderr
, "RAMBlock \"%s\" already registered, abort!\n",
2078 /* Called with iothread lock held. */
2079 void qemu_ram_unset_idstr(RAMBlock
*block
)
2081 /* FIXME: arch_init.c assumes that this is not called throughout
2082 * migration. Ignore the problem since hot-unplug during migration
2083 * does not work anyway.
2086 memset(block
->idstr
, 0, sizeof(block
->idstr
));
2090 size_t qemu_ram_pagesize(RAMBlock
*rb
)
2092 return rb
->page_size
;
2095 /* Returns the largest size of page in use */
2096 size_t qemu_ram_pagesize_largest(void)
2101 RAMBLOCK_FOREACH(block
) {
2102 largest
= MAX(largest
, qemu_ram_pagesize(block
));
2108 static int memory_try_enable_merging(void *addr
, size_t len
)
2110 if (!machine_mem_merge(current_machine
)) {
2111 /* disabled by the user */
2115 return qemu_madvise(addr
, len
, QEMU_MADV_MERGEABLE
);
2118 /* Only legal before guest might have detected the memory size: e.g. on
2119 * incoming migration, or right after reset.
2121 * As memory core doesn't know how is memory accessed, it is up to
2122 * resize callback to update device state and/or add assertions to detect
2123 * misuse, if necessary.
2125 int qemu_ram_resize(RAMBlock
*block
, ram_addr_t newsize
, Error
**errp
)
2129 newsize
= HOST_PAGE_ALIGN(newsize
);
2131 if (block
->used_length
== newsize
) {
2135 if (!(block
->flags
& RAM_RESIZEABLE
)) {
2136 error_setg_errno(errp
, EINVAL
,
2137 "Length mismatch: %s: 0x" RAM_ADDR_FMT
2138 " in != 0x" RAM_ADDR_FMT
, block
->idstr
,
2139 newsize
, block
->used_length
);
2143 if (block
->max_length
< newsize
) {
2144 error_setg_errno(errp
, EINVAL
,
2145 "Length too large: %s: 0x" RAM_ADDR_FMT
2146 " > 0x" RAM_ADDR_FMT
, block
->idstr
,
2147 newsize
, block
->max_length
);
2151 cpu_physical_memory_clear_dirty_range(block
->offset
, block
->used_length
);
2152 block
->used_length
= newsize
;
2153 cpu_physical_memory_set_dirty_range(block
->offset
, block
->used_length
,
2155 memory_region_set_size(block
->mr
, newsize
);
2156 if (block
->resized
) {
2157 block
->resized(block
->idstr
, newsize
, block
->host
);
2163 * Trigger sync on the given ram block for range [start, start + length]
2164 * with the backing store if one is available.
2166 * @Note: this is supposed to be a synchronous op.
2168 void qemu_ram_writeback(RAMBlock
*block
, ram_addr_t start
, ram_addr_t length
)
2170 void *addr
= ramblock_ptr(block
, start
);
2172 /* The requested range should fit in within the block range */
2173 g_assert((start
+ length
) <= block
->used_length
);
2175 #ifdef CONFIG_LIBPMEM
2176 /* The lack of support for pmem should not block the sync */
2177 if (ramblock_is_pmem(block
)) {
2178 pmem_persist(addr
, length
);
2182 if (block
->fd
>= 0) {
2184 * Case there is no support for PMEM or the memory has not been
2185 * specified as persistent (or is not one) - use the msync.
2186 * Less optimal but still achieves the same goal
2188 if (qemu_msync(addr
, length
, block
->fd
)) {
2189 warn_report("%s: failed to sync memory range: start: "
2190 RAM_ADDR_FMT
" length: " RAM_ADDR_FMT
,
2191 __func__
, start
, length
);
2196 /* Called with ram_list.mutex held */
2197 static void dirty_memory_extend(ram_addr_t old_ram_size
,
2198 ram_addr_t new_ram_size
)
2200 ram_addr_t old_num_blocks
= DIV_ROUND_UP(old_ram_size
,
2201 DIRTY_MEMORY_BLOCK_SIZE
);
2202 ram_addr_t new_num_blocks
= DIV_ROUND_UP(new_ram_size
,
2203 DIRTY_MEMORY_BLOCK_SIZE
);
2206 /* Only need to extend if block count increased */
2207 if (new_num_blocks
<= old_num_blocks
) {
2211 for (i
= 0; i
< DIRTY_MEMORY_NUM
; i
++) {
2212 DirtyMemoryBlocks
*old_blocks
;
2213 DirtyMemoryBlocks
*new_blocks
;
2216 old_blocks
= atomic_rcu_read(&ram_list
.dirty_memory
[i
]);
2217 new_blocks
= g_malloc(sizeof(*new_blocks
) +
2218 sizeof(new_blocks
->blocks
[0]) * new_num_blocks
);
2220 if (old_num_blocks
) {
2221 memcpy(new_blocks
->blocks
, old_blocks
->blocks
,
2222 old_num_blocks
* sizeof(old_blocks
->blocks
[0]));
2225 for (j
= old_num_blocks
; j
< new_num_blocks
; j
++) {
2226 new_blocks
->blocks
[j
] = bitmap_new(DIRTY_MEMORY_BLOCK_SIZE
);
2229 atomic_rcu_set(&ram_list
.dirty_memory
[i
], new_blocks
);
2232 g_free_rcu(old_blocks
, rcu
);
2237 static void ram_block_add(RAMBlock
*new_block
, Error
**errp
, bool shared
)
2240 RAMBlock
*last_block
= NULL
;
2241 ram_addr_t old_ram_size
, new_ram_size
;
2244 old_ram_size
= last_ram_page();
2246 qemu_mutex_lock_ramlist();
2247 new_block
->offset
= find_ram_offset(new_block
->max_length
);
2249 if (!new_block
->host
) {
2250 if (xen_enabled()) {
2251 xen_ram_alloc(new_block
->offset
, new_block
->max_length
,
2252 new_block
->mr
, &err
);
2254 error_propagate(errp
, err
);
2255 qemu_mutex_unlock_ramlist();
2259 new_block
->host
= phys_mem_alloc(new_block
->max_length
,
2260 &new_block
->mr
->align
, shared
);
2261 if (!new_block
->host
) {
2262 error_setg_errno(errp
, errno
,
2263 "cannot set up guest memory '%s'",
2264 memory_region_name(new_block
->mr
));
2265 qemu_mutex_unlock_ramlist();
2268 memory_try_enable_merging(new_block
->host
, new_block
->max_length
);
2272 new_ram_size
= MAX(old_ram_size
,
2273 (new_block
->offset
+ new_block
->max_length
) >> TARGET_PAGE_BITS
);
2274 if (new_ram_size
> old_ram_size
) {
2275 dirty_memory_extend(old_ram_size
, new_ram_size
);
2277 /* Keep the list sorted from biggest to smallest block. Unlike QTAILQ,
2278 * QLIST (which has an RCU-friendly variant) does not have insertion at
2279 * tail, so save the last element in last_block.
2281 RAMBLOCK_FOREACH(block
) {
2283 if (block
->max_length
< new_block
->max_length
) {
2288 QLIST_INSERT_BEFORE_RCU(block
, new_block
, next
);
2289 } else if (last_block
) {
2290 QLIST_INSERT_AFTER_RCU(last_block
, new_block
, next
);
2291 } else { /* list is empty */
2292 QLIST_INSERT_HEAD_RCU(&ram_list
.blocks
, new_block
, next
);
2294 ram_list
.mru_block
= NULL
;
2296 /* Write list before version */
2299 qemu_mutex_unlock_ramlist();
2301 cpu_physical_memory_set_dirty_range(new_block
->offset
,
2302 new_block
->used_length
,
2305 if (new_block
->host
) {
2306 qemu_ram_setup_dump(new_block
->host
, new_block
->max_length
);
2307 qemu_madvise(new_block
->host
, new_block
->max_length
, QEMU_MADV_HUGEPAGE
);
2308 /* MADV_DONTFORK is also needed by KVM in absence of synchronous MMU */
2309 qemu_madvise(new_block
->host
, new_block
->max_length
, QEMU_MADV_DONTFORK
);
2310 ram_block_notify_add(new_block
->host
, new_block
->max_length
);
2315 RAMBlock
*qemu_ram_alloc_from_fd(ram_addr_t size
, MemoryRegion
*mr
,
2316 uint32_t ram_flags
, int fd
,
2319 RAMBlock
*new_block
;
2320 Error
*local_err
= NULL
;
2323 /* Just support these ram flags by now. */
2324 assert((ram_flags
& ~(RAM_SHARED
| RAM_PMEM
)) == 0);
2326 if (xen_enabled()) {
2327 error_setg(errp
, "-mem-path not supported with Xen");
2331 if (kvm_enabled() && !kvm_has_sync_mmu()) {
2333 "host lacks kvm mmu notifiers, -mem-path unsupported");
2337 if (phys_mem_alloc
!= qemu_anon_ram_alloc
) {
2339 * file_ram_alloc() needs to allocate just like
2340 * phys_mem_alloc, but we haven't bothered to provide
2344 "-mem-path not supported with this accelerator");
2348 size
= HOST_PAGE_ALIGN(size
);
2349 file_size
= get_file_size(fd
);
2350 if (file_size
> 0 && file_size
< size
) {
2351 error_setg(errp
, "backing store %s size 0x%" PRIx64
2352 " does not match 'size' option 0x" RAM_ADDR_FMT
,
2353 mem_path
, file_size
, size
);
2357 new_block
= g_malloc0(sizeof(*new_block
));
2359 new_block
->used_length
= size
;
2360 new_block
->max_length
= size
;
2361 new_block
->flags
= ram_flags
;
2362 new_block
->host
= file_ram_alloc(new_block
, size
, fd
, !file_size
, errp
);
2363 if (!new_block
->host
) {
2368 ram_block_add(new_block
, &local_err
, ram_flags
& RAM_SHARED
);
2371 error_propagate(errp
, local_err
);
2379 RAMBlock
*qemu_ram_alloc_from_file(ram_addr_t size
, MemoryRegion
*mr
,
2380 uint32_t ram_flags
, const char *mem_path
,
2387 fd
= file_ram_open(mem_path
, memory_region_name(mr
), &created
, errp
);
2392 block
= qemu_ram_alloc_from_fd(size
, mr
, ram_flags
, fd
, errp
);
2406 RAMBlock
*qemu_ram_alloc_internal(ram_addr_t size
, ram_addr_t max_size
,
2407 void (*resized
)(const char*,
2410 void *host
, bool resizeable
, bool share
,
2411 MemoryRegion
*mr
, Error
**errp
)
2413 RAMBlock
*new_block
;
2414 Error
*local_err
= NULL
;
2416 size
= HOST_PAGE_ALIGN(size
);
2417 max_size
= HOST_PAGE_ALIGN(max_size
);
2418 new_block
= g_malloc0(sizeof(*new_block
));
2420 new_block
->resized
= resized
;
2421 new_block
->used_length
= size
;
2422 new_block
->max_length
= max_size
;
2423 assert(max_size
>= size
);
2425 new_block
->page_size
= qemu_real_host_page_size
;
2426 new_block
->host
= host
;
2428 new_block
->flags
|= RAM_PREALLOC
;
2431 new_block
->flags
|= RAM_RESIZEABLE
;
2433 ram_block_add(new_block
, &local_err
, share
);
2436 error_propagate(errp
, local_err
);
2442 RAMBlock
*qemu_ram_alloc_from_ptr(ram_addr_t size
, void *host
,
2443 MemoryRegion
*mr
, Error
**errp
)
2445 return qemu_ram_alloc_internal(size
, size
, NULL
, host
, false,
2449 RAMBlock
*qemu_ram_alloc(ram_addr_t size
, bool share
,
2450 MemoryRegion
*mr
, Error
**errp
)
2452 return qemu_ram_alloc_internal(size
, size
, NULL
, NULL
, false,
2456 RAMBlock
*qemu_ram_alloc_resizeable(ram_addr_t size
, ram_addr_t maxsz
,
2457 void (*resized
)(const char*,
2460 MemoryRegion
*mr
, Error
**errp
)
2462 return qemu_ram_alloc_internal(size
, maxsz
, resized
, NULL
, true,
2466 static void reclaim_ramblock(RAMBlock
*block
)
2468 if (block
->flags
& RAM_PREALLOC
) {
2470 } else if (xen_enabled()) {
2471 xen_invalidate_map_cache_entry(block
->host
);
2473 } else if (block
->fd
>= 0) {
2474 qemu_ram_munmap(block
->fd
, block
->host
, block
->max_length
);
2478 qemu_anon_ram_free(block
->host
, block
->max_length
);
2483 void qemu_ram_free(RAMBlock
*block
)
2490 ram_block_notify_remove(block
->host
, block
->max_length
);
2493 qemu_mutex_lock_ramlist();
2494 QLIST_REMOVE_RCU(block
, next
);
2495 ram_list
.mru_block
= NULL
;
2496 /* Write list before version */
2499 call_rcu(block
, reclaim_ramblock
, rcu
);
2500 qemu_mutex_unlock_ramlist();
2504 void qemu_ram_remap(ram_addr_t addr
, ram_addr_t length
)
2511 RAMBLOCK_FOREACH(block
) {
2512 offset
= addr
- block
->offset
;
2513 if (offset
< block
->max_length
) {
2514 vaddr
= ramblock_ptr(block
, offset
);
2515 if (block
->flags
& RAM_PREALLOC
) {
2517 } else if (xen_enabled()) {
2521 if (block
->fd
>= 0) {
2522 flags
|= (block
->flags
& RAM_SHARED
?
2523 MAP_SHARED
: MAP_PRIVATE
);
2524 area
= mmap(vaddr
, length
, PROT_READ
| PROT_WRITE
,
2525 flags
, block
->fd
, offset
);
2528 * Remap needs to match alloc. Accelerators that
2529 * set phys_mem_alloc never remap. If they did,
2530 * we'd need a remap hook here.
2532 assert(phys_mem_alloc
== qemu_anon_ram_alloc
);
2534 flags
|= MAP_PRIVATE
| MAP_ANONYMOUS
;
2535 area
= mmap(vaddr
, length
, PROT_READ
| PROT_WRITE
,
2538 if (area
!= vaddr
) {
2539 error_report("Could not remap addr: "
2540 RAM_ADDR_FMT
"@" RAM_ADDR_FMT
"",
2544 memory_try_enable_merging(vaddr
, length
);
2545 qemu_ram_setup_dump(vaddr
, length
);
2550 #endif /* !_WIN32 */
2552 /* Return a host pointer to ram allocated with qemu_ram_alloc.
2553 * This should not be used for general purpose DMA. Use address_space_map
2554 * or address_space_rw instead. For local memory (e.g. video ram) that the
2555 * device owns, use memory_region_get_ram_ptr.
2557 * Called within RCU critical section.
2559 void *qemu_map_ram_ptr(RAMBlock
*ram_block
, ram_addr_t addr
)
2561 RAMBlock
*block
= ram_block
;
2563 if (block
== NULL
) {
2564 block
= qemu_get_ram_block(addr
);
2565 addr
-= block
->offset
;
2568 if (xen_enabled() && block
->host
== NULL
) {
2569 /* We need to check if the requested address is in the RAM
2570 * because we don't want to map the entire memory in QEMU.
2571 * In that case just map until the end of the page.
2573 if (block
->offset
== 0) {
2574 return xen_map_cache(addr
, 0, 0, false);
2577 block
->host
= xen_map_cache(block
->offset
, block
->max_length
, 1, false);
2579 return ramblock_ptr(block
, addr
);
2582 /* Return a host pointer to guest's ram. Similar to qemu_map_ram_ptr
2583 * but takes a size argument.
2585 * Called within RCU critical section.
2587 static void *qemu_ram_ptr_length(RAMBlock
*ram_block
, ram_addr_t addr
,
2588 hwaddr
*size
, bool lock
)
2590 RAMBlock
*block
= ram_block
;
2595 if (block
== NULL
) {
2596 block
= qemu_get_ram_block(addr
);
2597 addr
-= block
->offset
;
2599 *size
= MIN(*size
, block
->max_length
- addr
);
2601 if (xen_enabled() && block
->host
== NULL
) {
2602 /* We need to check if the requested address is in the RAM
2603 * because we don't want to map the entire memory in QEMU.
2604 * In that case just map the requested area.
2606 if (block
->offset
== 0) {
2607 return xen_map_cache(addr
, *size
, lock
, lock
);
2610 block
->host
= xen_map_cache(block
->offset
, block
->max_length
, 1, lock
);
2613 return ramblock_ptr(block
, addr
);
2616 /* Return the offset of a hostpointer within a ramblock */
2617 ram_addr_t
qemu_ram_block_host_offset(RAMBlock
*rb
, void *host
)
2619 ram_addr_t res
= (uint8_t *)host
- (uint8_t *)rb
->host
;
2620 assert((uintptr_t)host
>= (uintptr_t)rb
->host
);
2621 assert(res
< rb
->max_length
);
2627 * Translates a host ptr back to a RAMBlock, a ram_addr and an offset
2630 * ptr: Host pointer to look up
2631 * round_offset: If true round the result offset down to a page boundary
2632 * *ram_addr: set to result ram_addr
2633 * *offset: set to result offset within the RAMBlock
2635 * Returns: RAMBlock (or NULL if not found)
2637 * By the time this function returns, the returned pointer is not protected
2638 * by RCU anymore. If the caller is not within an RCU critical section and
2639 * does not hold the iothread lock, it must have other means of protecting the
2640 * pointer, such as a reference to the region that includes the incoming
2643 RAMBlock
*qemu_ram_block_from_host(void *ptr
, bool round_offset
,
2647 uint8_t *host
= ptr
;
2649 if (xen_enabled()) {
2650 ram_addr_t ram_addr
;
2651 RCU_READ_LOCK_GUARD();
2652 ram_addr
= xen_ram_addr_from_mapcache(ptr
);
2653 block
= qemu_get_ram_block(ram_addr
);
2655 *offset
= ram_addr
- block
->offset
;
2660 RCU_READ_LOCK_GUARD();
2661 block
= atomic_rcu_read(&ram_list
.mru_block
);
2662 if (block
&& block
->host
&& host
- block
->host
< block
->max_length
) {
2666 RAMBLOCK_FOREACH(block
) {
2667 /* This case append when the block is not mapped. */
2668 if (block
->host
== NULL
) {
2671 if (host
- block
->host
< block
->max_length
) {
2679 *offset
= (host
- block
->host
);
2681 *offset
&= TARGET_PAGE_MASK
;
2687 * Finds the named RAMBlock
2689 * name: The name of RAMBlock to find
2691 * Returns: RAMBlock (or NULL if not found)
2693 RAMBlock
*qemu_ram_block_by_name(const char *name
)
2697 RAMBLOCK_FOREACH(block
) {
2698 if (!strcmp(name
, block
->idstr
)) {
2706 /* Some of the softmmu routines need to translate from a host pointer
2707 (typically a TLB entry) back to a ram offset. */
2708 ram_addr_t
qemu_ram_addr_from_host(void *ptr
)
2713 block
= qemu_ram_block_from_host(ptr
, false, &offset
);
2715 return RAM_ADDR_INVALID
;
2718 return block
->offset
+ offset
;
2721 /* Generate a debug exception if a watchpoint has been hit. */
2722 void cpu_check_watchpoint(CPUState
*cpu
, vaddr addr
, vaddr len
,
2723 MemTxAttrs attrs
, int flags
, uintptr_t ra
)
2725 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
2728 assert(tcg_enabled());
2729 if (cpu
->watchpoint_hit
) {
2731 * We re-entered the check after replacing the TB.
2732 * Now raise the debug interrupt so that it will
2733 * trigger after the current instruction.
2735 qemu_mutex_lock_iothread();
2736 cpu_interrupt(cpu
, CPU_INTERRUPT_DEBUG
);
2737 qemu_mutex_unlock_iothread();
2741 addr
= cc
->adjust_watchpoint_address(cpu
, addr
, len
);
2742 QTAILQ_FOREACH(wp
, &cpu
->watchpoints
, entry
) {
2743 if (watchpoint_address_matches(wp
, addr
, len
)
2744 && (wp
->flags
& flags
)) {
2745 if (flags
== BP_MEM_READ
) {
2746 wp
->flags
|= BP_WATCHPOINT_HIT_READ
;
2748 wp
->flags
|= BP_WATCHPOINT_HIT_WRITE
;
2750 wp
->hitaddr
= MAX(addr
, wp
->vaddr
);
2751 wp
->hitattrs
= attrs
;
2752 if (!cpu
->watchpoint_hit
) {
2753 if (wp
->flags
& BP_CPU
&&
2754 !cc
->debug_check_watchpoint(cpu
, wp
)) {
2755 wp
->flags
&= ~BP_WATCHPOINT_HIT
;
2758 cpu
->watchpoint_hit
= wp
;
2761 tb_check_watchpoint(cpu
, ra
);
2762 if (wp
->flags
& BP_STOP_BEFORE_ACCESS
) {
2763 cpu
->exception_index
= EXCP_DEBUG
;
2765 cpu_loop_exit_restore(cpu
, ra
);
2767 /* Force execution of one insn next time. */
2768 cpu
->cflags_next_tb
= 1 | curr_cflags();
2771 cpu_restore_state(cpu
, ra
, true);
2773 cpu_loop_exit_noexc(cpu
);
2777 wp
->flags
&= ~BP_WATCHPOINT_HIT
;
2782 static MemTxResult
flatview_read(FlatView
*fv
, hwaddr addr
,
2783 MemTxAttrs attrs
, void *buf
, hwaddr len
);
2784 static MemTxResult
flatview_write(FlatView
*fv
, hwaddr addr
, MemTxAttrs attrs
,
2785 const void *buf
, hwaddr len
);
2786 static bool flatview_access_valid(FlatView
*fv
, hwaddr addr
, hwaddr len
,
2787 bool is_write
, MemTxAttrs attrs
);
2789 static MemTxResult
subpage_read(void *opaque
, hwaddr addr
, uint64_t *data
,
2790 unsigned len
, MemTxAttrs attrs
)
2792 subpage_t
*subpage
= opaque
;
2796 #if defined(DEBUG_SUBPAGE)
2797 printf("%s: subpage %p len %u addr " TARGET_FMT_plx
"\n", __func__
,
2798 subpage
, len
, addr
);
2800 res
= flatview_read(subpage
->fv
, addr
+ subpage
->base
, attrs
, buf
, len
);
2804 *data
= ldn_p(buf
, len
);
2808 static MemTxResult
subpage_write(void *opaque
, hwaddr addr
,
2809 uint64_t value
, unsigned len
, MemTxAttrs attrs
)
2811 subpage_t
*subpage
= opaque
;
2814 #if defined(DEBUG_SUBPAGE)
2815 printf("%s: subpage %p len %u addr " TARGET_FMT_plx
2816 " value %"PRIx64
"\n",
2817 __func__
, subpage
, len
, addr
, value
);
2819 stn_p(buf
, len
, value
);
2820 return flatview_write(subpage
->fv
, addr
+ subpage
->base
, attrs
, buf
, len
);
2823 static bool subpage_accepts(void *opaque
, hwaddr addr
,
2824 unsigned len
, bool is_write
,
2827 subpage_t
*subpage
= opaque
;
2828 #if defined(DEBUG_SUBPAGE)
2829 printf("%s: subpage %p %c len %u addr " TARGET_FMT_plx
"\n",
2830 __func__
, subpage
, is_write
? 'w' : 'r', len
, addr
);
2833 return flatview_access_valid(subpage
->fv
, addr
+ subpage
->base
,
2834 len
, is_write
, attrs
);
2837 static const MemoryRegionOps subpage_ops
= {
2838 .read_with_attrs
= subpage_read
,
2839 .write_with_attrs
= subpage_write
,
2840 .impl
.min_access_size
= 1,
2841 .impl
.max_access_size
= 8,
2842 .valid
.min_access_size
= 1,
2843 .valid
.max_access_size
= 8,
2844 .valid
.accepts
= subpage_accepts
,
2845 .endianness
= DEVICE_NATIVE_ENDIAN
,
2848 static int subpage_register(subpage_t
*mmio
, uint32_t start
, uint32_t end
,
2853 if (start
>= TARGET_PAGE_SIZE
|| end
>= TARGET_PAGE_SIZE
)
2855 idx
= SUBPAGE_IDX(start
);
2856 eidx
= SUBPAGE_IDX(end
);
2857 #if defined(DEBUG_SUBPAGE)
2858 printf("%s: %p start %08x end %08x idx %08x eidx %08x section %d\n",
2859 __func__
, mmio
, start
, end
, idx
, eidx
, section
);
2861 for (; idx
<= eidx
; idx
++) {
2862 mmio
->sub_section
[idx
] = section
;
2868 static subpage_t
*subpage_init(FlatView
*fv
, hwaddr base
)
2872 /* mmio->sub_section is set to PHYS_SECTION_UNASSIGNED with g_malloc0 */
2873 mmio
= g_malloc0(sizeof(subpage_t
) + TARGET_PAGE_SIZE
* sizeof(uint16_t));
2876 memory_region_init_io(&mmio
->iomem
, NULL
, &subpage_ops
, mmio
,
2877 NULL
, TARGET_PAGE_SIZE
);
2878 mmio
->iomem
.subpage
= true;
2879 #if defined(DEBUG_SUBPAGE)
2880 printf("%s: %p base " TARGET_FMT_plx
" len %08x\n", __func__
,
2881 mmio
, base
, TARGET_PAGE_SIZE
);
2887 static uint16_t dummy_section(PhysPageMap
*map
, FlatView
*fv
, MemoryRegion
*mr
)
2890 MemoryRegionSection section
= {
2893 .offset_within_address_space
= 0,
2894 .offset_within_region
= 0,
2895 .size
= int128_2_64(),
2898 return phys_section_add(map
, §ion
);
2901 MemoryRegionSection
*iotlb_to_section(CPUState
*cpu
,
2902 hwaddr index
, MemTxAttrs attrs
)
2904 int asidx
= cpu_asidx_from_attrs(cpu
, attrs
);
2905 CPUAddressSpace
*cpuas
= &cpu
->cpu_ases
[asidx
];
2906 AddressSpaceDispatch
*d
= atomic_rcu_read(&cpuas
->memory_dispatch
);
2907 MemoryRegionSection
*sections
= d
->map
.sections
;
2909 return §ions
[index
& ~TARGET_PAGE_MASK
];
2912 static void io_mem_init(void)
2914 memory_region_init_io(&io_mem_unassigned
, NULL
, &unassigned_mem_ops
, NULL
,
2918 AddressSpaceDispatch
*address_space_dispatch_new(FlatView
*fv
)
2920 AddressSpaceDispatch
*d
= g_new0(AddressSpaceDispatch
, 1);
2923 n
= dummy_section(&d
->map
, fv
, &io_mem_unassigned
);
2924 assert(n
== PHYS_SECTION_UNASSIGNED
);
2926 d
->phys_map
= (PhysPageEntry
) { .ptr
= PHYS_MAP_NODE_NIL
, .skip
= 1 };
2931 void address_space_dispatch_free(AddressSpaceDispatch
*d
)
2933 phys_sections_free(&d
->map
);
2937 static void do_nothing(CPUState
*cpu
, run_on_cpu_data d
)
2941 static void tcg_log_global_after_sync(MemoryListener
*listener
)
2943 CPUAddressSpace
*cpuas
;
2945 /* Wait for the CPU to end the current TB. This avoids the following
2949 * ---------------------- -------------------------
2950 * TLB check -> slow path
2951 * notdirty_mem_write
2955 * TLB check -> fast path
2959 * by pushing the migration thread's memory read after the vCPU thread has
2960 * written the memory.
2962 if (replay_mode
== REPLAY_MODE_NONE
) {
2964 * VGA can make calls to this function while updating the screen.
2965 * In record/replay mode this causes a deadlock, because
2966 * run_on_cpu waits for rr mutex. Therefore no races are possible
2967 * in this case and no need for making run_on_cpu when
2968 * record/replay is not enabled.
2970 cpuas
= container_of(listener
, CPUAddressSpace
, tcg_as_listener
);
2971 run_on_cpu(cpuas
->cpu
, do_nothing
, RUN_ON_CPU_NULL
);
2975 static void tcg_commit(MemoryListener
*listener
)
2977 CPUAddressSpace
*cpuas
;
2978 AddressSpaceDispatch
*d
;
2980 assert(tcg_enabled());
2981 /* since each CPU stores ram addresses in its TLB cache, we must
2982 reset the modified entries */
2983 cpuas
= container_of(listener
, CPUAddressSpace
, tcg_as_listener
);
2984 cpu_reloading_memory_map();
2985 /* The CPU and TLB are protected by the iothread lock.
2986 * We reload the dispatch pointer now because cpu_reloading_memory_map()
2987 * may have split the RCU critical section.
2989 d
= address_space_to_dispatch(cpuas
->as
);
2990 atomic_rcu_set(&cpuas
->memory_dispatch
, d
);
2991 tlb_flush(cpuas
->cpu
);
2994 static void memory_map_init(void)
2996 system_memory
= g_malloc(sizeof(*system_memory
));
2998 memory_region_init(system_memory
, NULL
, "system", UINT64_MAX
);
2999 address_space_init(&address_space_memory
, system_memory
, "memory");
3001 system_io
= g_malloc(sizeof(*system_io
));
3002 memory_region_init_io(system_io
, NULL
, &unassigned_io_ops
, NULL
, "io",
3004 address_space_init(&address_space_io
, system_io
, "I/O");
3007 MemoryRegion
*get_system_memory(void)
3009 return system_memory
;
3012 MemoryRegion
*get_system_io(void)
3017 #endif /* !defined(CONFIG_USER_ONLY) */
3019 /* physical memory access (slow version, mainly for debug) */
3020 #if defined(CONFIG_USER_ONLY)
3021 int cpu_memory_rw_debug(CPUState
*cpu
, target_ulong addr
,
3022 void *ptr
, target_ulong len
, int is_write
)
3025 target_ulong l
, page
;
3030 page
= addr
& TARGET_PAGE_MASK
;
3031 l
= (page
+ TARGET_PAGE_SIZE
) - addr
;
3034 flags
= page_get_flags(page
);
3035 if (!(flags
& PAGE_VALID
))
3038 if (!(flags
& PAGE_WRITE
))
3040 /* XXX: this code should not depend on lock_user */
3041 if (!(p
= lock_user(VERIFY_WRITE
, addr
, l
, 0)))
3044 unlock_user(p
, addr
, l
);
3046 if (!(flags
& PAGE_READ
))
3048 /* XXX: this code should not depend on lock_user */
3049 if (!(p
= lock_user(VERIFY_READ
, addr
, l
, 1)))
3052 unlock_user(p
, addr
, 0);
3063 static void invalidate_and_set_dirty(MemoryRegion
*mr
, hwaddr addr
,
3066 uint8_t dirty_log_mask
= memory_region_get_dirty_log_mask(mr
);
3067 addr
+= memory_region_get_ram_addr(mr
);
3069 /* No early return if dirty_log_mask is or becomes 0, because
3070 * cpu_physical_memory_set_dirty_range will still call
3071 * xen_modified_memory.
3073 if (dirty_log_mask
) {
3075 cpu_physical_memory_range_includes_clean(addr
, length
, dirty_log_mask
);
3077 if (dirty_log_mask
& (1 << DIRTY_MEMORY_CODE
)) {
3078 assert(tcg_enabled());
3079 tb_invalidate_phys_range(addr
, addr
+ length
);
3080 dirty_log_mask
&= ~(1 << DIRTY_MEMORY_CODE
);
3082 cpu_physical_memory_set_dirty_range(addr
, length
, dirty_log_mask
);
3085 void memory_region_flush_rom_device(MemoryRegion
*mr
, hwaddr addr
, hwaddr size
)
3088 * In principle this function would work on other memory region types too,
3089 * but the ROM device use case is the only one where this operation is
3090 * necessary. Other memory regions should use the
3091 * address_space_read/write() APIs.
3093 assert(memory_region_is_romd(mr
));
3095 invalidate_and_set_dirty(mr
, addr
, size
);
3098 static int memory_access_size(MemoryRegion
*mr
, unsigned l
, hwaddr addr
)
3100 unsigned access_size_max
= mr
->ops
->valid
.max_access_size
;
3102 /* Regions are assumed to support 1-4 byte accesses unless
3103 otherwise specified. */
3104 if (access_size_max
== 0) {
3105 access_size_max
= 4;
3108 /* Bound the maximum access by the alignment of the address. */
3109 if (!mr
->ops
->impl
.unaligned
) {
3110 unsigned align_size_max
= addr
& -addr
;
3111 if (align_size_max
!= 0 && align_size_max
< access_size_max
) {
3112 access_size_max
= align_size_max
;
3116 /* Don't attempt accesses larger than the maximum. */
3117 if (l
> access_size_max
) {
3118 l
= access_size_max
;
3125 static bool prepare_mmio_access(MemoryRegion
*mr
)
3127 bool unlocked
= !qemu_mutex_iothread_locked();
3128 bool release_lock
= false;
3130 if (unlocked
&& mr
->global_locking
) {
3131 qemu_mutex_lock_iothread();
3133 release_lock
= true;
3135 if (mr
->flush_coalesced_mmio
) {
3137 qemu_mutex_lock_iothread();
3139 qemu_flush_coalesced_mmio_buffer();
3141 qemu_mutex_unlock_iothread();
3145 return release_lock
;
3148 /* Called within RCU critical section. */
3149 static MemTxResult
flatview_write_continue(FlatView
*fv
, hwaddr addr
,
3152 hwaddr len
, hwaddr addr1
,
3153 hwaddr l
, MemoryRegion
*mr
)
3157 MemTxResult result
= MEMTX_OK
;
3158 bool release_lock
= false;
3159 const uint8_t *buf
= ptr
;
3162 if (!memory_access_is_direct(mr
, true)) {
3163 release_lock
|= prepare_mmio_access(mr
);
3164 l
= memory_access_size(mr
, l
, addr1
);
3165 /* XXX: could force current_cpu to NULL to avoid
3167 val
= ldn_he_p(buf
, l
);
3168 result
|= memory_region_dispatch_write(mr
, addr1
, val
,
3169 size_memop(l
), attrs
);
3172 ram_ptr
= qemu_ram_ptr_length(mr
->ram_block
, addr1
, &l
, false);
3173 memcpy(ram_ptr
, buf
, l
);
3174 invalidate_and_set_dirty(mr
, addr1
, l
);
3178 qemu_mutex_unlock_iothread();
3179 release_lock
= false;
3191 mr
= flatview_translate(fv
, addr
, &addr1
, &l
, true, attrs
);
3197 /* Called from RCU critical section. */
3198 static MemTxResult
flatview_write(FlatView
*fv
, hwaddr addr
, MemTxAttrs attrs
,
3199 const void *buf
, hwaddr len
)
3204 MemTxResult result
= MEMTX_OK
;
3207 mr
= flatview_translate(fv
, addr
, &addr1
, &l
, true, attrs
);
3208 result
= flatview_write_continue(fv
, addr
, attrs
, buf
, len
,
3214 /* Called within RCU critical section. */
3215 MemTxResult
flatview_read_continue(FlatView
*fv
, hwaddr addr
,
3216 MemTxAttrs attrs
, void *ptr
,
3217 hwaddr len
, hwaddr addr1
, hwaddr l
,
3222 MemTxResult result
= MEMTX_OK
;
3223 bool release_lock
= false;
3227 if (!memory_access_is_direct(mr
, false)) {
3229 release_lock
|= prepare_mmio_access(mr
);
3230 l
= memory_access_size(mr
, l
, addr1
);
3231 result
|= memory_region_dispatch_read(mr
, addr1
, &val
,
3232 size_memop(l
), attrs
);
3233 stn_he_p(buf
, l
, val
);
3236 ram_ptr
= qemu_ram_ptr_length(mr
->ram_block
, addr1
, &l
, false);
3237 memcpy(buf
, ram_ptr
, l
);
3241 qemu_mutex_unlock_iothread();
3242 release_lock
= false;
3254 mr
= flatview_translate(fv
, addr
, &addr1
, &l
, false, attrs
);
3260 /* Called from RCU critical section. */
3261 static MemTxResult
flatview_read(FlatView
*fv
, hwaddr addr
,
3262 MemTxAttrs attrs
, void *buf
, hwaddr len
)
3269 mr
= flatview_translate(fv
, addr
, &addr1
, &l
, false, attrs
);
3270 return flatview_read_continue(fv
, addr
, attrs
, buf
, len
,
3274 MemTxResult
address_space_read_full(AddressSpace
*as
, hwaddr addr
,
3275 MemTxAttrs attrs
, void *buf
, hwaddr len
)
3277 MemTxResult result
= MEMTX_OK
;
3281 RCU_READ_LOCK_GUARD();
3282 fv
= address_space_to_flatview(as
);
3283 result
= flatview_read(fv
, addr
, attrs
, buf
, len
);
3289 MemTxResult
address_space_write(AddressSpace
*as
, hwaddr addr
,
3291 const void *buf
, hwaddr len
)
3293 MemTxResult result
= MEMTX_OK
;
3297 RCU_READ_LOCK_GUARD();
3298 fv
= address_space_to_flatview(as
);
3299 result
= flatview_write(fv
, addr
, attrs
, buf
, len
);
3305 MemTxResult
address_space_rw(AddressSpace
*as
, hwaddr addr
, MemTxAttrs attrs
,
3306 void *buf
, hwaddr len
, bool is_write
)
3309 return address_space_write(as
, addr
, attrs
, buf
, len
);
3311 return address_space_read_full(as
, addr
, attrs
, buf
, len
);
3315 void cpu_physical_memory_rw(hwaddr addr
, void *buf
,
3316 hwaddr len
, int is_write
)
3318 address_space_rw(&address_space_memory
, addr
, MEMTXATTRS_UNSPECIFIED
,
3319 buf
, len
, is_write
);
3322 enum write_rom_type
{
3327 static inline MemTxResult
address_space_write_rom_internal(AddressSpace
*as
,
3332 enum write_rom_type type
)
3338 const uint8_t *buf
= ptr
;
3340 RCU_READ_LOCK_GUARD();
3343 mr
= address_space_translate(as
, addr
, &addr1
, &l
, true, attrs
);
3345 if (!(memory_region_is_ram(mr
) ||
3346 memory_region_is_romd(mr
))) {
3347 l
= memory_access_size(mr
, l
, addr1
);
3350 ram_ptr
= qemu_map_ram_ptr(mr
->ram_block
, addr1
);
3353 memcpy(ram_ptr
, buf
, l
);
3354 invalidate_and_set_dirty(mr
, addr1
, l
);
3357 flush_icache_range((uintptr_t)ram_ptr
, (uintptr_t)ram_ptr
+ l
);
3368 /* used for ROM loading : can write in RAM and ROM */
3369 MemTxResult
address_space_write_rom(AddressSpace
*as
, hwaddr addr
,
3371 const void *buf
, hwaddr len
)
3373 return address_space_write_rom_internal(as
, addr
, attrs
,
3374 buf
, len
, WRITE_DATA
);
3377 void cpu_flush_icache_range(hwaddr start
, hwaddr len
)
3380 * This function should do the same thing as an icache flush that was
3381 * triggered from within the guest. For TCG we are always cache coherent,
3382 * so there is no need to flush anything. For KVM / Xen we need to flush
3383 * the host's instruction cache at least.
3385 if (tcg_enabled()) {
3389 address_space_write_rom_internal(&address_space_memory
,
3390 start
, MEMTXATTRS_UNSPECIFIED
,
3391 NULL
, len
, FLUSH_CACHE
);
3402 static BounceBuffer bounce
;
3404 typedef struct MapClient
{
3406 QLIST_ENTRY(MapClient
) link
;
3409 QemuMutex map_client_list_lock
;
3410 static QLIST_HEAD(, MapClient
) map_client_list
3411 = QLIST_HEAD_INITIALIZER(map_client_list
);
3413 static void cpu_unregister_map_client_do(MapClient
*client
)
3415 QLIST_REMOVE(client
, link
);
3419 static void cpu_notify_map_clients_locked(void)
3423 while (!QLIST_EMPTY(&map_client_list
)) {
3424 client
= QLIST_FIRST(&map_client_list
);
3425 qemu_bh_schedule(client
->bh
);
3426 cpu_unregister_map_client_do(client
);
3430 void cpu_register_map_client(QEMUBH
*bh
)
3432 MapClient
*client
= g_malloc(sizeof(*client
));
3434 qemu_mutex_lock(&map_client_list_lock
);
3436 QLIST_INSERT_HEAD(&map_client_list
, client
, link
);
3437 if (!atomic_read(&bounce
.in_use
)) {
3438 cpu_notify_map_clients_locked();
3440 qemu_mutex_unlock(&map_client_list_lock
);
3443 void cpu_exec_init_all(void)
3445 qemu_mutex_init(&ram_list
.mutex
);
3446 /* The data structures we set up here depend on knowing the page size,
3447 * so no more changes can be made after this point.
3448 * In an ideal world, nothing we did before we had finished the
3449 * machine setup would care about the target page size, and we could
3450 * do this much later, rather than requiring board models to state
3451 * up front what their requirements are.
3453 finalize_target_page_bits();
3456 qemu_mutex_init(&map_client_list_lock
);
3459 void cpu_unregister_map_client(QEMUBH
*bh
)
3463 qemu_mutex_lock(&map_client_list_lock
);
3464 QLIST_FOREACH(client
, &map_client_list
, link
) {
3465 if (client
->bh
== bh
) {
3466 cpu_unregister_map_client_do(client
);
3470 qemu_mutex_unlock(&map_client_list_lock
);
3473 static void cpu_notify_map_clients(void)
3475 qemu_mutex_lock(&map_client_list_lock
);
3476 cpu_notify_map_clients_locked();
3477 qemu_mutex_unlock(&map_client_list_lock
);
3480 static bool flatview_access_valid(FlatView
*fv
, hwaddr addr
, hwaddr len
,
3481 bool is_write
, MemTxAttrs attrs
)
3488 mr
= flatview_translate(fv
, addr
, &xlat
, &l
, is_write
, attrs
);
3489 if (!memory_access_is_direct(mr
, is_write
)) {
3490 l
= memory_access_size(mr
, l
, addr
);
3491 if (!memory_region_access_valid(mr
, xlat
, l
, is_write
, attrs
)) {
3502 bool address_space_access_valid(AddressSpace
*as
, hwaddr addr
,
3503 hwaddr len
, bool is_write
,
3509 RCU_READ_LOCK_GUARD();
3510 fv
= address_space_to_flatview(as
);
3511 result
= flatview_access_valid(fv
, addr
, len
, is_write
, attrs
);
3516 flatview_extend_translation(FlatView
*fv
, hwaddr addr
,
3518 MemoryRegion
*mr
, hwaddr base
, hwaddr len
,
3519 bool is_write
, MemTxAttrs attrs
)
3523 MemoryRegion
*this_mr
;
3529 if (target_len
== 0) {
3534 this_mr
= flatview_translate(fv
, addr
, &xlat
,
3535 &len
, is_write
, attrs
);
3536 if (this_mr
!= mr
|| xlat
!= base
+ done
) {
3542 /* Map a physical memory region into a host virtual address.
3543 * May map a subset of the requested range, given by and returned in *plen.
3544 * May return NULL if resources needed to perform the mapping are exhausted.
3545 * Use only for reads OR writes - not for read-modify-write operations.
3546 * Use cpu_register_map_client() to know when retrying the map operation is
3547 * likely to succeed.
3549 void *address_space_map(AddressSpace
*as
,
3566 RCU_READ_LOCK_GUARD();
3567 fv
= address_space_to_flatview(as
);
3568 mr
= flatview_translate(fv
, addr
, &xlat
, &l
, is_write
, attrs
);
3570 if (!memory_access_is_direct(mr
, is_write
)) {
3571 if (atomic_xchg(&bounce
.in_use
, true)) {
3574 /* Avoid unbounded allocations */
3575 l
= MIN(l
, TARGET_PAGE_SIZE
);
3576 bounce
.buffer
= qemu_memalign(TARGET_PAGE_SIZE
, l
);
3580 memory_region_ref(mr
);
3583 flatview_read(fv
, addr
, MEMTXATTRS_UNSPECIFIED
,
3588 return bounce
.buffer
;
3592 memory_region_ref(mr
);
3593 *plen
= flatview_extend_translation(fv
, addr
, len
, mr
, xlat
,
3594 l
, is_write
, attrs
);
3595 ptr
= qemu_ram_ptr_length(mr
->ram_block
, xlat
, plen
, true);
3600 /* Unmaps a memory region previously mapped by address_space_map().
3601 * Will also mark the memory as dirty if is_write is true. access_len gives
3602 * the amount of memory that was actually read or written by the caller.
3604 void address_space_unmap(AddressSpace
*as
, void *buffer
, hwaddr len
,
3605 bool is_write
, hwaddr access_len
)
3607 if (buffer
!= bounce
.buffer
) {
3611 mr
= memory_region_from_host(buffer
, &addr1
);
3614 invalidate_and_set_dirty(mr
, addr1
, access_len
);
3616 if (xen_enabled()) {
3617 xen_invalidate_map_cache_entry(buffer
);
3619 memory_region_unref(mr
);
3623 address_space_write(as
, bounce
.addr
, MEMTXATTRS_UNSPECIFIED
,
3624 bounce
.buffer
, access_len
);
3626 qemu_vfree(bounce
.buffer
);
3627 bounce
.buffer
= NULL
;
3628 memory_region_unref(bounce
.mr
);
3629 atomic_mb_set(&bounce
.in_use
, false);
3630 cpu_notify_map_clients();
3633 void *cpu_physical_memory_map(hwaddr addr
,
3637 return address_space_map(&address_space_memory
, addr
, plen
, is_write
,
3638 MEMTXATTRS_UNSPECIFIED
);
3641 void cpu_physical_memory_unmap(void *buffer
, hwaddr len
,
3642 int is_write
, hwaddr access_len
)
3644 return address_space_unmap(&address_space_memory
, buffer
, len
, is_write
, access_len
);
3647 #define ARG1_DECL AddressSpace *as
3650 #define TRANSLATE(...) address_space_translate(as, __VA_ARGS__)
3651 #define RCU_READ_LOCK(...) rcu_read_lock()
3652 #define RCU_READ_UNLOCK(...) rcu_read_unlock()
3653 #include "memory_ldst.inc.c"
3655 int64_t address_space_cache_init(MemoryRegionCache
*cache
,
3661 AddressSpaceDispatch
*d
;
3668 cache
->fv
= address_space_get_flatview(as
);
3669 d
= flatview_to_dispatch(cache
->fv
);
3670 cache
->mrs
= *address_space_translate_internal(d
, addr
, &cache
->xlat
, &l
, true);
3673 memory_region_ref(mr
);
3674 if (memory_access_is_direct(mr
, is_write
)) {
3675 /* We don't care about the memory attributes here as we're only
3676 * doing this if we found actual RAM, which behaves the same
3677 * regardless of attributes; so UNSPECIFIED is fine.
3679 l
= flatview_extend_translation(cache
->fv
, addr
, len
, mr
,
3680 cache
->xlat
, l
, is_write
,
3681 MEMTXATTRS_UNSPECIFIED
);
3682 cache
->ptr
= qemu_ram_ptr_length(mr
->ram_block
, cache
->xlat
, &l
, true);
3688 cache
->is_write
= is_write
;
3692 void address_space_cache_invalidate(MemoryRegionCache
*cache
,
3696 assert(cache
->is_write
);
3697 if (likely(cache
->ptr
)) {
3698 invalidate_and_set_dirty(cache
->mrs
.mr
, addr
+ cache
->xlat
, access_len
);
3702 void address_space_cache_destroy(MemoryRegionCache
*cache
)
3704 if (!cache
->mrs
.mr
) {
3708 if (xen_enabled()) {
3709 xen_invalidate_map_cache_entry(cache
->ptr
);
3711 memory_region_unref(cache
->mrs
.mr
);
3712 flatview_unref(cache
->fv
);
3713 cache
->mrs
.mr
= NULL
;
3717 /* Called from RCU critical section. This function has the same
3718 * semantics as address_space_translate, but it only works on a
3719 * predefined range of a MemoryRegion that was mapped with
3720 * address_space_cache_init.
3722 static inline MemoryRegion
*address_space_translate_cached(
3723 MemoryRegionCache
*cache
, hwaddr addr
, hwaddr
*xlat
,
3724 hwaddr
*plen
, bool is_write
, MemTxAttrs attrs
)
3726 MemoryRegionSection section
;
3728 IOMMUMemoryRegion
*iommu_mr
;
3729 AddressSpace
*target_as
;
3731 assert(!cache
->ptr
);
3732 *xlat
= addr
+ cache
->xlat
;
3735 iommu_mr
= memory_region_get_iommu(mr
);
3741 section
= address_space_translate_iommu(iommu_mr
, xlat
, plen
,
3742 NULL
, is_write
, true,
3747 /* Called from RCU critical section. address_space_read_cached uses this
3748 * out of line function when the target is an MMIO or IOMMU region.
3751 address_space_read_cached_slow(MemoryRegionCache
*cache
, hwaddr addr
,
3752 void *buf
, hwaddr len
)
3758 mr
= address_space_translate_cached(cache
, addr
, &addr1
, &l
, false,
3759 MEMTXATTRS_UNSPECIFIED
);
3760 flatview_read_continue(cache
->fv
,
3761 addr
, MEMTXATTRS_UNSPECIFIED
, buf
, len
,
3765 /* Called from RCU critical section. address_space_write_cached uses this
3766 * out of line function when the target is an MMIO or IOMMU region.
3769 address_space_write_cached_slow(MemoryRegionCache
*cache
, hwaddr addr
,
3770 const void *buf
, hwaddr len
)
3776 mr
= address_space_translate_cached(cache
, addr
, &addr1
, &l
, true,
3777 MEMTXATTRS_UNSPECIFIED
);
3778 flatview_write_continue(cache
->fv
,
3779 addr
, MEMTXATTRS_UNSPECIFIED
, buf
, len
,
3783 #define ARG1_DECL MemoryRegionCache *cache
3785 #define SUFFIX _cached_slow
3786 #define TRANSLATE(...) address_space_translate_cached(cache, __VA_ARGS__)
3787 #define RCU_READ_LOCK() ((void)0)
3788 #define RCU_READ_UNLOCK() ((void)0)
3789 #include "memory_ldst.inc.c"
3791 /* virtual memory access for debug (includes writing to ROM) */
3792 int cpu_memory_rw_debug(CPUState
*cpu
, target_ulong addr
,
3793 void *ptr
, target_ulong len
, int is_write
)
3796 target_ulong l
, page
;
3799 cpu_synchronize_state(cpu
);
3804 page
= addr
& TARGET_PAGE_MASK
;
3805 phys_addr
= cpu_get_phys_page_attrs_debug(cpu
, page
, &attrs
);
3806 asidx
= cpu_asidx_from_attrs(cpu
, attrs
);
3807 /* if no physical page mapped, return an error */
3808 if (phys_addr
== -1)
3810 l
= (page
+ TARGET_PAGE_SIZE
) - addr
;
3813 phys_addr
+= (addr
& ~TARGET_PAGE_MASK
);
3815 address_space_write_rom(cpu
->cpu_ases
[asidx
].as
, phys_addr
,
3818 address_space_read(cpu
->cpu_ases
[asidx
].as
, phys_addr
, attrs
, buf
,
3829 * Allows code that needs to deal with migration bitmaps etc to still be built
3830 * target independent.
3832 size_t qemu_target_page_size(void)
3834 return TARGET_PAGE_SIZE
;
3837 int qemu_target_page_bits(void)
3839 return TARGET_PAGE_BITS
;
3842 int qemu_target_page_bits_min(void)
3844 return TARGET_PAGE_BITS_MIN
;
3848 bool target_words_bigendian(void)
3850 #if defined(TARGET_WORDS_BIGENDIAN)
3857 #ifndef CONFIG_USER_ONLY
3858 bool cpu_physical_memory_is_io(hwaddr phys_addr
)
3864 RCU_READ_LOCK_GUARD();
3865 mr
= address_space_translate(&address_space_memory
,
3866 phys_addr
, &phys_addr
, &l
, false,
3867 MEMTXATTRS_UNSPECIFIED
);
3869 res
= !(memory_region_is_ram(mr
) || memory_region_is_romd(mr
));
3873 int qemu_ram_foreach_block(RAMBlockIterFunc func
, void *opaque
)
3878 RCU_READ_LOCK_GUARD();
3879 RAMBLOCK_FOREACH(block
) {
3880 ret
= func(block
, opaque
);
3889 * Unmap pages of memory from start to start+length such that
3890 * they a) read as 0, b) Trigger whatever fault mechanism
3891 * the OS provides for postcopy.
3892 * The pages must be unmapped by the end of the function.
3893 * Returns: 0 on success, none-0 on failure
3896 int ram_block_discard_range(RAMBlock
*rb
, uint64_t start
, size_t length
)
3900 uint8_t *host_startaddr
= rb
->host
+ start
;
3902 if (!QEMU_PTR_IS_ALIGNED(host_startaddr
, rb
->page_size
)) {
3903 error_report("ram_block_discard_range: Unaligned start address: %p",
3908 if ((start
+ length
) <= rb
->used_length
) {
3909 bool need_madvise
, need_fallocate
;
3910 if (!QEMU_IS_ALIGNED(length
, rb
->page_size
)) {
3911 error_report("ram_block_discard_range: Unaligned length: %zx",
3916 errno
= ENOTSUP
; /* If we are missing MADVISE etc */
3918 /* The logic here is messy;
3919 * madvise DONTNEED fails for hugepages
3920 * fallocate works on hugepages and shmem
3922 need_madvise
= (rb
->page_size
== qemu_host_page_size
);
3923 need_fallocate
= rb
->fd
!= -1;
3924 if (need_fallocate
) {
3925 /* For a file, this causes the area of the file to be zero'd
3926 * if read, and for hugetlbfs also causes it to be unmapped
3927 * so a userfault will trigger.
3929 #ifdef CONFIG_FALLOCATE_PUNCH_HOLE
3930 ret
= fallocate(rb
->fd
, FALLOC_FL_PUNCH_HOLE
| FALLOC_FL_KEEP_SIZE
,
3934 error_report("ram_block_discard_range: Failed to fallocate "
3935 "%s:%" PRIx64
" +%zx (%d)",
3936 rb
->idstr
, start
, length
, ret
);
3941 error_report("ram_block_discard_range: fallocate not available/file"
3942 "%s:%" PRIx64
" +%zx (%d)",
3943 rb
->idstr
, start
, length
, ret
);
3948 /* For normal RAM this causes it to be unmapped,
3949 * for shared memory it causes the local mapping to disappear
3950 * and to fall back on the file contents (which we just
3951 * fallocate'd away).
3953 #if defined(CONFIG_MADVISE)
3954 ret
= madvise(host_startaddr
, length
, MADV_DONTNEED
);
3957 error_report("ram_block_discard_range: Failed to discard range "
3958 "%s:%" PRIx64
" +%zx (%d)",
3959 rb
->idstr
, start
, length
, ret
);
3964 error_report("ram_block_discard_range: MADVISE not available"
3965 "%s:%" PRIx64
" +%zx (%d)",
3966 rb
->idstr
, start
, length
, ret
);
3970 trace_ram_block_discard_range(rb
->idstr
, host_startaddr
, length
,
3971 need_madvise
, need_fallocate
, ret
);
3973 error_report("ram_block_discard_range: Overrun block '%s' (%" PRIu64
3974 "/%zx/" RAM_ADDR_FMT
")",
3975 rb
->idstr
, start
, length
, rb
->used_length
);
3982 bool ramblock_is_pmem(RAMBlock
*rb
)
3984 return rb
->flags
& RAM_PMEM
;
3989 void page_size_init(void)
3991 /* NOTE: we can always suppose that qemu_host_page_size >=
3993 if (qemu_host_page_size
== 0) {
3994 qemu_host_page_size
= qemu_real_host_page_size
;
3996 if (qemu_host_page_size
< TARGET_PAGE_SIZE
) {
3997 qemu_host_page_size
= TARGET_PAGE_SIZE
;
3999 qemu_host_page_mask
= -(intptr_t)qemu_host_page_size
;
4002 #if !defined(CONFIG_USER_ONLY)
4004 static void mtree_print_phys_entries(int start
, int end
, int skip
, int ptr
)
4006 if (start
== end
- 1) {
4007 qemu_printf("\t%3d ", start
);
4009 qemu_printf("\t%3d..%-3d ", start
, end
- 1);
4011 qemu_printf(" skip=%d ", skip
);
4012 if (ptr
== PHYS_MAP_NODE_NIL
) {
4013 qemu_printf(" ptr=NIL");
4015 qemu_printf(" ptr=#%d", ptr
);
4017 qemu_printf(" ptr=[%d]", ptr
);
4022 #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
4023 int128_sub((size), int128_one())) : 0)
4025 void mtree_print_dispatch(AddressSpaceDispatch
*d
, MemoryRegion
*root
)
4029 qemu_printf(" Dispatch\n");
4030 qemu_printf(" Physical sections\n");
4032 for (i
= 0; i
< d
->map
.sections_nb
; ++i
) {
4033 MemoryRegionSection
*s
= d
->map
.sections
+ i
;
4034 const char *names
[] = { " [unassigned]", " [not dirty]",
4035 " [ROM]", " [watch]" };
4037 qemu_printf(" #%d @" TARGET_FMT_plx
".." TARGET_FMT_plx
4040 s
->offset_within_address_space
,
4041 s
->offset_within_address_space
+ MR_SIZE(s
->mr
->size
),
4042 s
->mr
->name
? s
->mr
->name
: "(noname)",
4043 i
< ARRAY_SIZE(names
) ? names
[i
] : "",
4044 s
->mr
== root
? " [ROOT]" : "",
4045 s
== d
->mru_section
? " [MRU]" : "",
4046 s
->mr
->is_iommu
? " [iommu]" : "");
4049 qemu_printf(" alias=%s", s
->mr
->alias
->name
?
4050 s
->mr
->alias
->name
: "noname");
4055 qemu_printf(" Nodes (%d bits per level, %d levels) ptr=[%d] skip=%d\n",
4056 P_L2_BITS
, P_L2_LEVELS
, d
->phys_map
.ptr
, d
->phys_map
.skip
);
4057 for (i
= 0; i
< d
->map
.nodes_nb
; ++i
) {
4060 Node
*n
= d
->map
.nodes
+ i
;
4062 qemu_printf(" [%d]\n", i
);
4064 for (j
= 0, jprev
= 0, prev
= *n
[0]; j
< ARRAY_SIZE(*n
); ++j
) {
4065 PhysPageEntry
*pe
= *n
+ j
;
4067 if (pe
->ptr
== prev
.ptr
&& pe
->skip
== prev
.skip
) {
4071 mtree_print_phys_entries(jprev
, j
, prev
.skip
, prev
.ptr
);
4077 if (jprev
!= ARRAY_SIZE(*n
)) {
4078 mtree_print_phys_entries(jprev
, j
, prev
.skip
, prev
.ptr
);