kvmvapic: Catch invalid ROM size
[qemu/ar7.git] / hw / mips / mips_jazz.c
blob49bdd024ed00e575f985b28c33d0d0b57428e031
1 /*
2 * QEMU MIPS Jazz support
4 * Copyright (c) 2007-2008 Hervé Poussineau
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
25 #include "hw/hw.h"
26 #include "hw/mips/mips.h"
27 #include "hw/mips/cpudevs.h"
28 #include "hw/i386/pc.h"
29 #include "hw/char/serial.h"
30 #include "hw/isa/isa.h"
31 #include "hw/block/fdc.h"
32 #include "sysemu/sysemu.h"
33 #include "sysemu/arch_init.h"
34 #include "hw/boards.h"
35 #include "net/net.h"
36 #include "hw/scsi/esp.h"
37 #include "hw/mips/bios.h"
38 #include "hw/loader.h"
39 #include "hw/timer/mc146818rtc.h"
40 #include "hw/timer/i8254.h"
41 #include "hw/audio/pcspk.h"
42 #include "sysemu/blockdev.h"
43 #include "hw/sysbus.h"
44 #include "exec/address-spaces.h"
45 #include "sysemu/qtest.h"
46 #include "qemu/error-report.h"
48 enum jazz_model_e
50 JAZZ_MAGNUM,
51 JAZZ_PICA61,
54 static void main_cpu_reset(void *opaque)
56 MIPSCPU *cpu = opaque;
58 cpu_reset(CPU(cpu));
61 static uint64_t rtc_read(void *opaque, hwaddr addr, unsigned size)
63 return cpu_inw(0x71);
66 static void rtc_write(void *opaque, hwaddr addr,
67 uint64_t val, unsigned size)
69 cpu_outw(0x71, val & 0xff);
72 static const MemoryRegionOps rtc_ops = {
73 .read = rtc_read,
74 .write = rtc_write,
75 .endianness = DEVICE_NATIVE_ENDIAN,
78 static uint64_t dma_dummy_read(void *opaque, hwaddr addr,
79 unsigned size)
81 /* Nothing to do. That is only to ensure that
82 * the current DMA acknowledge cycle is completed. */
83 return 0xff;
86 static void dma_dummy_write(void *opaque, hwaddr addr,
87 uint64_t val, unsigned size)
89 /* Nothing to do. That is only to ensure that
90 * the current DMA acknowledge cycle is completed. */
93 static const MemoryRegionOps dma_dummy_ops = {
94 .read = dma_dummy_read,
95 .write = dma_dummy_write,
96 .endianness = DEVICE_NATIVE_ENDIAN,
99 #define MAGNUM_BIOS_SIZE_MAX 0x7e000
100 #define MAGNUM_BIOS_SIZE (BIOS_SIZE < MAGNUM_BIOS_SIZE_MAX ? BIOS_SIZE : MAGNUM_BIOS_SIZE_MAX)
102 static void cpu_request_exit(void *opaque, int irq, int level)
104 CPUState *cpu = current_cpu;
106 if (cpu && level) {
107 cpu_exit(cpu);
111 static void mips_jazz_init(MemoryRegion *address_space,
112 MemoryRegion *address_space_io,
113 ram_addr_t ram_size,
114 const char *cpu_model,
115 enum jazz_model_e jazz_model)
117 char *filename;
118 int bios_size, n;
119 MIPSCPU *cpu;
120 CPUMIPSState *env;
121 qemu_irq *rc4030, *i8259;
122 rc4030_dma *dmas;
123 void* rc4030_opaque;
124 MemoryRegion *isa = g_new(MemoryRegion, 1);
125 MemoryRegion *rtc = g_new(MemoryRegion, 1);
126 MemoryRegion *i8042 = g_new(MemoryRegion, 1);
127 MemoryRegion *dma_dummy = g_new(MemoryRegion, 1);
128 NICInfo *nd;
129 DeviceState *dev;
130 SysBusDevice *sysbus;
131 ISABus *isa_bus;
132 ISADevice *pit;
133 DriveInfo *fds[MAX_FD];
134 qemu_irq esp_reset, dma_enable;
135 qemu_irq *cpu_exit_irq;
136 MemoryRegion *ram = g_new(MemoryRegion, 1);
137 MemoryRegion *bios = g_new(MemoryRegion, 1);
138 MemoryRegion *bios2 = g_new(MemoryRegion, 1);
140 /* init CPUs */
141 if (cpu_model == NULL) {
142 #ifdef TARGET_MIPS64
143 cpu_model = "R4000";
144 #else
145 /* FIXME: All wrong, this maybe should be R3000 for the older JAZZs. */
146 cpu_model = "24Kf";
147 #endif
149 cpu = cpu_mips_init(cpu_model);
150 if (cpu == NULL) {
151 fprintf(stderr, "Unable to find CPU definition\n");
152 exit(1);
154 env = &cpu->env;
155 qemu_register_reset(main_cpu_reset, cpu);
157 /* allocate RAM */
158 memory_region_init_ram(ram, NULL, "mips_jazz.ram", ram_size);
159 vmstate_register_ram_global(ram);
160 memory_region_add_subregion(address_space, 0, ram);
162 memory_region_init_ram(bios, NULL, "mips_jazz.bios", MAGNUM_BIOS_SIZE);
163 vmstate_register_ram_global(bios);
164 memory_region_set_readonly(bios, true);
165 memory_region_init_alias(bios2, NULL, "mips_jazz.bios", bios,
166 0, MAGNUM_BIOS_SIZE);
167 memory_region_add_subregion(address_space, 0x1fc00000LL, bios);
168 memory_region_add_subregion(address_space, 0xfff00000LL, bios2);
170 /* load the BIOS image. */
171 if (bios_name == NULL)
172 bios_name = BIOS_FILENAME;
173 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
174 if (filename) {
175 bios_size = load_image_targphys(filename, 0xfff00000LL,
176 MAGNUM_BIOS_SIZE);
177 g_free(filename);
178 } else {
179 bios_size = -1;
181 if ((bios_size < 0 || bios_size > MAGNUM_BIOS_SIZE) && !qtest_enabled()) {
182 error_report("Could not load MIPS bios '%s'", bios_name);
183 exit(1);
186 /* Init CPU internal devices */
187 cpu_mips_irq_init_cpu(env);
188 cpu_mips_clock_init(env);
190 /* Chipset */
191 rc4030_opaque = rc4030_init(env->irq[6], env->irq[3], &rc4030, &dmas,
192 address_space);
193 memory_region_init_io(dma_dummy, NULL, &dma_dummy_ops, NULL, "dummy_dma", 0x1000);
194 memory_region_add_subregion(address_space, 0x8000d000, dma_dummy);
196 /* ISA devices */
197 isa_bus = isa_bus_new(NULL, address_space_io);
198 i8259 = i8259_init(isa_bus, env->irq[4]);
199 isa_bus_irqs(isa_bus, i8259);
200 cpu_exit_irq = qemu_allocate_irqs(cpu_request_exit, NULL, 1);
201 DMA_init(0, cpu_exit_irq);
202 pit = pit_init(isa_bus, 0x40, 0, NULL);
203 pcspk_init(isa_bus, pit);
205 /* ISA IO space at 0x90000000 */
206 memory_region_init_alias(isa, NULL, "isa_mmio",
207 get_system_io(), 0, 0x01000000);
208 memory_region_add_subregion(address_space, 0x90000000, isa);
209 isa_mem_base = 0x11000000;
211 /* Video card */
212 switch (jazz_model) {
213 case JAZZ_MAGNUM:
214 dev = qdev_create(NULL, "sysbus-g364");
215 qdev_init_nofail(dev);
216 sysbus = SYS_BUS_DEVICE(dev);
217 sysbus_mmio_map(sysbus, 0, 0x60080000);
218 sysbus_mmio_map(sysbus, 1, 0x40000000);
219 sysbus_connect_irq(sysbus, 0, rc4030[3]);
221 /* Simple ROM, so user doesn't have to provide one */
222 MemoryRegion *rom_mr = g_new(MemoryRegion, 1);
223 memory_region_init_ram(rom_mr, NULL, "g364fb.rom", 0x80000);
224 vmstate_register_ram_global(rom_mr);
225 memory_region_set_readonly(rom_mr, true);
226 uint8_t *rom = memory_region_get_ram_ptr(rom_mr);
227 memory_region_add_subregion(address_space, 0x60000000, rom_mr);
228 rom[0] = 0x10; /* Mips G364 */
230 break;
231 case JAZZ_PICA61:
232 isa_vga_mm_init(0x40000000, 0x60000000, 0, get_system_memory());
233 break;
234 default:
235 break;
238 /* Network controller */
239 for (n = 0; n < nb_nics; n++) {
240 nd = &nd_table[n];
241 if (!nd->model)
242 nd->model = g_strdup("dp83932");
243 if (strcmp(nd->model, "dp83932") == 0) {
244 dp83932_init(nd, 0x80001000, 2, get_system_memory(), rc4030[4],
245 rc4030_opaque, rc4030_dma_memory_rw);
246 break;
247 } else if (is_help_option(nd->model)) {
248 fprintf(stderr, "qemu: Supported NICs: dp83932\n");
249 exit(1);
250 } else {
251 fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model);
252 exit(1);
256 /* SCSI adapter */
257 esp_init(0x80002000, 0,
258 rc4030_dma_read, rc4030_dma_write, dmas[0],
259 rc4030[5], &esp_reset, &dma_enable);
261 /* Floppy */
262 if (drive_get_max_bus(IF_FLOPPY) >= MAX_FD) {
263 fprintf(stderr, "qemu: too many floppy drives\n");
264 exit(1);
266 for (n = 0; n < MAX_FD; n++) {
267 fds[n] = drive_get(IF_FLOPPY, 0, n);
269 fdctrl_init_sysbus(rc4030[1], 0, 0x80003000, fds);
271 /* Real time clock */
272 rtc_init(isa_bus, 1980, NULL);
273 memory_region_init_io(rtc, NULL, &rtc_ops, NULL, "rtc", 0x1000);
274 memory_region_add_subregion(address_space, 0x80004000, rtc);
276 /* Keyboard (i8042) */
277 i8042_mm_init(rc4030[6], rc4030[7], i8042, 0x1000, 0x1);
278 memory_region_add_subregion(address_space, 0x80005000, i8042);
280 /* Serial ports */
281 if (serial_hds[0]) {
282 serial_mm_init(address_space, 0x80006000, 0, rc4030[8], 8000000/16,
283 serial_hds[0], DEVICE_NATIVE_ENDIAN);
285 if (serial_hds[1]) {
286 serial_mm_init(address_space, 0x80007000, 0, rc4030[9], 8000000/16,
287 serial_hds[1], DEVICE_NATIVE_ENDIAN);
290 /* Parallel port */
291 if (parallel_hds[0])
292 parallel_mm_init(address_space, 0x80008000, 0, rc4030[0],
293 parallel_hds[0]);
295 /* FIXME: missing Jazz sound at 0x8000c000, rc4030[2] */
297 /* NVRAM */
298 dev = qdev_create(NULL, "ds1225y");
299 qdev_init_nofail(dev);
300 sysbus = SYS_BUS_DEVICE(dev);
301 sysbus_mmio_map(sysbus, 0, 0x80009000);
303 /* LED indicator */
304 sysbus_create_simple("jazz-led", 0x8000f000, NULL);
307 static
308 void mips_magnum_init(QEMUMachineInitArgs *args)
310 ram_addr_t ram_size = args->ram_size;
311 const char *cpu_model = args->cpu_model;
312 mips_jazz_init(get_system_memory(), get_system_io(),
313 ram_size, cpu_model, JAZZ_MAGNUM);
316 static
317 void mips_pica61_init(QEMUMachineInitArgs *args)
319 ram_addr_t ram_size = args->ram_size;
320 const char *cpu_model = args->cpu_model;
321 mips_jazz_init(get_system_memory(), get_system_io(),
322 ram_size, cpu_model, JAZZ_PICA61);
325 static QEMUMachine mips_magnum_machine = {
326 .name = "magnum",
327 .desc = "MIPS Magnum",
328 .init = mips_magnum_init,
329 .block_default_type = IF_SCSI,
332 static QEMUMachine mips_pica61_machine = {
333 .name = "pica61",
334 .desc = "Acer Pica 61",
335 .init = mips_pica61_init,
336 .block_default_type = IF_SCSI,
339 static void mips_jazz_machine_init(void)
341 qemu_register_machine(&mips_magnum_machine);
342 qemu_register_machine(&mips_pica61_machine);
345 machine_init(mips_jazz_machine_init);