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ui/sdl2: disable SDL_HINT_GRAB_KEYBOARD on Windows
[qemu/ar7.git] / softmmu / memory.c
blob28fec44fcf86eb97f1c2a0db98ca792efcb4880c
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "qemu/osdep.h"
17 #include "qemu/log.h"
18 #include "qapi/error.h"
19 #include "exec/exec-all.h" /* qemu_sprint_backtrace */
20 #include "exec/memory.h"
21 #include "qapi/visitor.h"
22 #include "qemu/bitops.h"
23 #include "qemu/error-report.h"
24 #include "qemu/main-loop.h"
25 #include "qemu/qemu-print.h"
26 #include "qom/object.h"
27 #include "sysemu/sysemu.h" /* trace_unassigned */
28 #include "trace.h"
29
30 #include "exec/memory-internal.h"
31 #include "exec/ram_addr.h"
32 #include "sysemu/kvm.h"
33 #include "sysemu/runstate.h"
34 #include "sysemu/tcg.h"
35 #include "qemu/accel.h"
36 #include "hw/boards.h"
37 #include "migration/vmstate.h"
38 #include "exec/address-spaces.h"
39
40 //#define DEBUG_UNASSIGNED
41
42 static unsigned memory_region_transaction_depth;
43 static bool memory_region_update_pending;
44 static bool ioeventfd_update_pending;
45 unsigned int global_dirty_tracking;
46
47 static QTAILQ_HEAD(, MemoryListener) memory_listeners
48 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
49
50 static QTAILQ_HEAD(, AddressSpace) address_spaces
51 = QTAILQ_HEAD_INITIALIZER(address_spaces);
52
53 static GHashTable *flat_views;
54
55 typedef struct AddrRange AddrRange;
56
57 /*
58 * Note that signed integers are needed for negative offsetting in aliases
59 * (large MemoryRegion::alias_offset).
60 */
61 struct AddrRange {
62 Int128 start;
63 Int128 size;
64 };
65
66 static AddrRange addrrange_make(Int128 start, Int128 size)
67 {
68 return (AddrRange) { start, size };
69 }
70
71 static bool addrrange_equal(AddrRange r1, AddrRange r2)
72 {
73 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
74 }
75
76 static Int128 addrrange_end(AddrRange r)
77 {
78 return int128_add(r.start, r.size);
79 }
80
81 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
82 {
83 int128_addto(&range.start, delta);
84 return range;
85 }
86
87 static bool addrrange_contains(AddrRange range, Int128 addr)
88 {
89 return int128_ge(addr, range.start)
90 && int128_lt(addr, addrrange_end(range));
91 }
92
93 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
94 {
95 return addrrange_contains(r1, r2.start)
96 || addrrange_contains(r2, r1.start);
97 }
98
99 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
100 {
101 Int128 start = int128_max(r1.start, r2.start);
102 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
103 return addrrange_make(start, int128_sub(end, start));
104 }
105
106 enum ListenerDirection { Forward, Reverse };
107
108 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
109 do { \
110 MemoryListener *_listener; \
111 \
112 switch (_direction) { \
113 case Forward: \
114 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
115 if (_listener->_callback) { \
116 _listener->_callback(_listener, ##_args); \
117 } \
118 } \
119 break; \
120 case Reverse: \
121 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, link) { \
122 if (_listener->_callback) { \
123 _listener->_callback(_listener, ##_args); \
124 } \
125 } \
126 break; \
127 default: \
128 abort(); \
129 } \
130 } while (0)
131
132 #define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \
133 do { \
134 MemoryListener *_listener; \
135 \
136 switch (_direction) { \
137 case Forward: \
138 QTAILQ_FOREACH(_listener, &(_as)->listeners, link_as) { \
139 if (_listener->_callback) { \
140 _listener->_callback(_listener, _section, ##_args); \
141 } \
142 } \
143 break; \
144 case Reverse: \
145 QTAILQ_FOREACH_REVERSE(_listener, &(_as)->listeners, link_as) { \
146 if (_listener->_callback) { \
147 _listener->_callback(_listener, _section, ##_args); \
148 } \
149 } \
150 break; \
151 default: \
152 abort(); \
153 } \
154 } while (0)
155
156 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
157 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
158 do { \
159 MemoryRegionSection mrs = section_from_flat_range(fr, \
160 address_space_to_flatview(as)); \
161 MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args); \
162 } while(0)
163
164 struct CoalescedMemoryRange {
165 AddrRange addr;
166 QTAILQ_ENTRY(CoalescedMemoryRange) link;
167 };
168
169 struct MemoryRegionIoeventfd {
170 AddrRange addr;
171 bool match_data;
172 uint64_t data;
173 EventNotifier *e;
174 };
175
176 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd *a,
177 MemoryRegionIoeventfd *b)
178 {
179 if (int128_lt(a->addr.start, b->addr.start)) {
180 return true;
181 } else if (int128_gt(a->addr.start, b->addr.start)) {
182 return false;
183 } else if (int128_lt(a->addr.size, b->addr.size)) {
184 return true;
185 } else if (int128_gt(a->addr.size, b->addr.size)) {
186 return false;
187 } else if (a->match_data < b->match_data) {
188 return true;
189 } else if (a->match_data > b->match_data) {
190 return false;
191 } else if (a->match_data) {
192 if (a->data < b->data) {
193 return true;
194 } else if (a->data > b->data) {
195 return false;
196 }
197 }
198 if (a->e < b->e) {
199 return true;
200 } else if (a->e > b->e) {
201 return false;
202 }
203 return false;
204 }
205
206 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd *a,
207 MemoryRegionIoeventfd *b)
208 {
209 if (int128_eq(a->addr.start, b->addr.start) &&
210 (!int128_nz(a->addr.size) || !int128_nz(b->addr.size) ||
211 (int128_eq(a->addr.size, b->addr.size) &&
212 (a->match_data == b->match_data) &&
213 ((a->match_data && (a->data == b->data)) || !a->match_data) &&
214 (a->e == b->e))))
215 return true;
216
217 return false;
218 }
219
220 /* Range of memory in the global map. Addresses are absolute. */
221 struct FlatRange {
222 MemoryRegion *mr;
223 hwaddr offset_in_region;
224 AddrRange addr;
225 uint8_t dirty_log_mask;
226 bool romd_mode;
227 bool readonly;
228 bool nonvolatile;
229 };
230
231 #define FOR_EACH_FLAT_RANGE(var, view) \
232 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
233
234 static inline MemoryRegionSection
235 section_from_flat_range(FlatRange *fr, FlatView *fv)
236 {
237 return (MemoryRegionSection) {
238 .mr = fr->mr,
239 .fv = fv,
240 .offset_within_region = fr->offset_in_region,
241 .size = fr->addr.size,
242 .offset_within_address_space = int128_get64(fr->addr.start),
243 .readonly = fr->readonly,
244 .nonvolatile = fr->nonvolatile,
245 };
246 }
247
248 static bool flatrange_equal(FlatRange *a, FlatRange *b)
249 {
250 return a->mr == b->mr
251 && addrrange_equal(a->addr, b->addr)
252 && a->offset_in_region == b->offset_in_region
253 && a->romd_mode == b->romd_mode
254 && a->readonly == b->readonly
255 && a->nonvolatile == b->nonvolatile;
256 }
257
258 static FlatView *flatview_new(MemoryRegion *mr_root)
259 {
260 FlatView *view;
261
262 view = g_new0(FlatView, 1);
263 view->ref = 1;
264 view->root = mr_root;
265 memory_region_ref(mr_root);
266 trace_flatview_new(view, mr_root);
267
268 return view;
269 }
270
271 /* Insert a range into a given position. Caller is responsible for maintaining
272 * sorting order.
273 */
274 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
275 {
276 if (view->nr == view->nr_allocated) {
277 view->nr_allocated = MAX(2 * view->nr, 10);
278 view->ranges = g_realloc(view->ranges,
279 view->nr_allocated * sizeof(*view->ranges));
280 }
281 memmove(view->ranges + pos + 1, view->ranges + pos,
282 (view->nr - pos) * sizeof(FlatRange));
283 view->ranges[pos] = *range;
284 memory_region_ref(range->mr);
285 ++view->nr;
286 }
287
288 static void flatview_destroy(FlatView *view)
289 {
290 int i;
291
292 trace_flatview_destroy(view, view->root);
293 if (view->dispatch) {
294 address_space_dispatch_free(view->dispatch);
295 }
296 for (i = 0; i < view->nr; i++) {
297 memory_region_unref(view->ranges[i].mr);
298 }
299 g_free(view->ranges);
300 memory_region_unref(view->root);
301 g_free(view);
302 }
303
304 static bool flatview_ref(FlatView *view)
305 {
306 return qatomic_fetch_inc_nonzero(&view->ref) > 0;
307 }
308
309 void flatview_unref(FlatView *view)
310 {
311 if (qatomic_fetch_dec(&view->ref) == 1) {
312 trace_flatview_destroy_rcu(view, view->root);
313 assert(view->root);
314 call_rcu(view, flatview_destroy, rcu);
315 }
316 }
317
318 static bool can_merge(FlatRange *r1, FlatRange *r2)
319 {
320 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
321 && r1->mr == r2->mr
322 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
323 r1->addr.size),
324 int128_make64(r2->offset_in_region))
325 && r1->dirty_log_mask == r2->dirty_log_mask
326 && r1->romd_mode == r2->romd_mode
327 && r1->readonly == r2->readonly
328 && r1->nonvolatile == r2->nonvolatile;
329 }
330
331 /* Attempt to simplify a view by merging adjacent ranges */
332 static void flatview_simplify(FlatView *view)
333 {
334 unsigned i, j, k;
335
336 i = 0;
337 while (i < view->nr) {
338 j = i + 1;
339 while (j < view->nr
340 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
341 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
342 ++j;
343 }
344 ++i;
345 for (k = i; k < j; k++) {
346 memory_region_unref(view->ranges[k].mr);
347 }
348 memmove(&view->ranges[i], &view->ranges[j],
349 (view->nr - j) * sizeof(view->ranges[j]));
350 view->nr -= j - i;
351 }
352 }
353
354 static bool memory_region_big_endian(MemoryRegion *mr)
355 {
356 #if TARGET_BIG_ENDIAN
357 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
358 #else
359 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
360 #endif
361 }
362
363 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, MemOp op)
364 {
365 if ((op & MO_BSWAP) != devend_memop(mr->ops->endianness)) {
366 switch (op & MO_SIZE) {
367 case MO_8:
368 break;
369 case MO_16:
370 *data = bswap16(*data);
371 break;
372 case MO_32:
373 *data = bswap32(*data);
374 break;
375 case MO_64:
376 *data = bswap64(*data);
377 break;
378 default:
379 g_assert_not_reached();
380 }
381 }
382 }
383
384 static inline void memory_region_shift_read_access(uint64_t *value,
385 signed shift,
386 uint64_t mask,
387 uint64_t tmp)
388 {
389 if (shift >= 0) {
390 *value |= (tmp & mask) << shift;
391 } else {
392 *value |= (tmp & mask) >> -shift;
393 }
394 }
395
396 static inline uint64_t memory_region_shift_write_access(uint64_t *value,
397 signed shift,
398 uint64_t mask)
399 {
400 uint64_t tmp;
401
402 if (shift >= 0) {
403 tmp = (*value >> shift) & mask;
404 } else {
405 tmp = (*value << -shift) & mask;
406 }
407
408 return tmp;
409 }
410
411 static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
412 {
413 MemoryRegion *root;
414 hwaddr abs_addr = offset;
415
416 abs_addr += mr->addr;
417 for (root = mr; root->container; ) {
418 root = root->container;
419 abs_addr += root->addr;
420 }
421
422 return abs_addr;
423 }
424
425 static int get_cpu_index(void)
426 {
427 if (current_cpu) {
428 return current_cpu->cpu_index;
429 }
430 return -1;
431 }
432
433 static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
434 hwaddr addr,
435 uint64_t *value,
436 unsigned size,
437 signed shift,
438 uint64_t mask,
439 MemTxAttrs attrs)
440 {
441 uint64_t tmp;
442
443 tmp = mr->ops->read(mr->opaque, addr, size);
444 if (mr->subpage) {
445 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
446 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_READ)) {
447 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
448 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size,
449 memory_region_name(mr));
450 }
451 memory_region_shift_read_access(value, shift, mask, tmp);
452 return MEMTX_OK;
453 }
454
455 static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
456 hwaddr addr,
457 uint64_t *value,
458 unsigned size,
459 signed shift,
460 uint64_t mask,
461 MemTxAttrs attrs)
462 {
463 uint64_t tmp = 0;
464 MemTxResult r;
465
466 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
467 if (mr->subpage) {
468 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
469 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_READ)) {
470 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
471 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size,
472 memory_region_name(mr));
473 }
474 memory_region_shift_read_access(value, shift, mask, tmp);
475 return r;
476 }
477
478 static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
479 hwaddr addr,
480 uint64_t *value,
481 unsigned size,
482 signed shift,
483 uint64_t mask,
484 MemTxAttrs attrs)
485 {
486 uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
487
488 if (mr->subpage) {
489 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
490 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_WRITE)) {
491 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
492 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size,
493 memory_region_name(mr));
494 }
495 mr->ops->write(mr->opaque, addr, tmp, size);
496 return MEMTX_OK;
497 }
498
499 static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
500 hwaddr addr,
501 uint64_t *value,
502 unsigned size,
503 signed shift,
504 uint64_t mask,
505 MemTxAttrs attrs)
506 {
507 uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
508
509 if (mr->subpage) {
510 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
511 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_WRITE)) {
512 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
513 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size,
514 memory_region_name(mr));
515 }
516 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
517 }
518
519 static MemTxResult access_with_adjusted_size(hwaddr addr,
520 uint64_t *value,
521 unsigned size,
522 unsigned access_size_min,
523 unsigned access_size_max,
524 MemTxResult (*access_fn)
525 (MemoryRegion *mr,
526 hwaddr addr,
527 uint64_t *value,
528 unsigned size,
529 signed shift,
530 uint64_t mask,
531 MemTxAttrs attrs),
532 MemoryRegion *mr,
533 MemTxAttrs attrs)
534 {
535 uint64_t access_mask;
536 unsigned access_size;
537 unsigned i;
538 MemTxResult r = MEMTX_OK;
539
540 if (!access_size_min) {
541 access_size_min = 1;
542 }
543 if (!access_size_max) {
544 access_size_max = 4;
545 }
546
547 /* FIXME: support unaligned access? */
548 access_size = MAX(MIN(size, access_size_max), access_size_min);
549 access_mask = MAKE_64BIT_MASK(0, access_size * 8);
550 if (memory_region_big_endian(mr)) {
551 for (i = 0; i < size; i += access_size) {
552 r |= access_fn(mr, addr + i, value, access_size,
553 (size - access_size - i) * 8, access_mask, attrs);
554 }
555 } else {
556 for (i = 0; i < size; i += access_size) {
557 r |= access_fn(mr, addr + i, value, access_size, i * 8,
558 access_mask, attrs);
559 }
560 }
561 return r;
562 }
563
564 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
565 {
566 AddressSpace *as;
567
568 while (mr->container) {
569 mr = mr->container;
570 }
571 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
572 if (mr == as->root) {
573 return as;
574 }
575 }
576 return NULL;
577 }
578
579 /* Render a memory region into the global view. Ranges in @view obscure
580 * ranges in @mr.
581 */
582 static void render_memory_region(FlatView *view,
583 MemoryRegion *mr,
584 Int128 base,
585 AddrRange clip,
586 bool readonly,
587 bool nonvolatile)
588 {
589 MemoryRegion *subregion;
590 unsigned i;
591 hwaddr offset_in_region;
592 Int128 remain;
593 Int128 now;
594 FlatRange fr;
595 AddrRange tmp;
596
597 if (!mr->enabled) {
598 return;
599 }
600
601 int128_addto(&base, int128_make64(mr->addr));
602 readonly |= mr->readonly;
603 nonvolatile |= mr->nonvolatile;
604
605 tmp = addrrange_make(base, mr->size);
606
607 if (!addrrange_intersects(tmp, clip)) {
608 return;
609 }
610
611 clip = addrrange_intersection(tmp, clip);
612
613 if (mr->alias) {
614 int128_subfrom(&base, int128_make64(mr->alias->addr));
615 int128_subfrom(&base, int128_make64(mr->alias_offset));
616 render_memory_region(view, mr->alias, base, clip,
617 readonly, nonvolatile);
618 return;
619 }
620
621 /* Render subregions in priority order. */
622 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
623 render_memory_region(view, subregion, base, clip,
624 readonly, nonvolatile);
625 }
626
627 if (!mr->terminates) {
628 return;
629 }
630
631 offset_in_region = int128_get64(int128_sub(clip.start, base));
632 base = clip.start;
633 remain = clip.size;
634
635 fr.mr = mr;
636 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
637 fr.romd_mode = mr->romd_mode;
638 fr.readonly = readonly;
639 fr.nonvolatile = nonvolatile;
640
641 /* Render the region itself into any gaps left by the current view. */
642 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
643 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
644 continue;
645 }
646 if (int128_lt(base, view->ranges[i].addr.start)) {
647 now = int128_min(remain,
648 int128_sub(view->ranges[i].addr.start, base));
649 fr.offset_in_region = offset_in_region;
650 fr.addr = addrrange_make(base, now);
651 flatview_insert(view, i, &fr);
652 ++i;
653 int128_addto(&base, now);
654 offset_in_region += int128_get64(now);
655 int128_subfrom(&remain, now);
656 }
657 now = int128_sub(int128_min(int128_add(base, remain),
658 addrrange_end(view->ranges[i].addr)),
659 base);
660 int128_addto(&base, now);
661 offset_in_region += int128_get64(now);
662 int128_subfrom(&remain, now);
663 }
664 if (int128_nz(remain)) {
665 fr.offset_in_region = offset_in_region;
666 fr.addr = addrrange_make(base, remain);
667 flatview_insert(view, i, &fr);
668 }
669 }
670
671 void flatview_for_each_range(FlatView *fv, flatview_cb cb , void *opaque)
672 {
673 FlatRange *fr;
674
675 assert(fv);
676 assert(cb);
677
678 FOR_EACH_FLAT_RANGE(fr, fv) {
679 if (cb(fr->addr.start, fr->addr.size, fr->mr,
680 fr->offset_in_region, opaque)) {
681 break;
682 }
683 }
684 }
685
686 static MemoryRegion *memory_region_get_flatview_root(MemoryRegion *mr)
687 {
688 while (mr->enabled) {
689 if (mr->alias) {
690 if (!mr->alias_offset && int128_ge(mr->size, mr->alias->size)) {
691 /* The alias is included in its entirety. Use it as
692 * the "real" root, so that we can share more FlatViews.
693 */
694 mr = mr->alias;
695 continue;
696 }
697 } else if (!mr->terminates) {
698 unsigned int found = 0;
699 MemoryRegion *child, *next = NULL;
700 QTAILQ_FOREACH(child, &mr->subregions, subregions_link) {
701 if (child->enabled) {
702 if (++found > 1) {
703 next = NULL;
704 break;
705 }
706 if (!child->addr && int128_ge(mr->size, child->size)) {
707 /* A child is included in its entirety. If it's the only
708 * enabled one, use it in the hope of finding an alias down the
709 * way. This will also let us share FlatViews.
710 */
711 next = child;
712 }
713 }
714 }
715 if (found == 0) {
716 return NULL;
717 }
718 if (next) {
719 mr = next;
720 continue;
721 }
722 }
723
724 return mr;
725 }
726
727 return NULL;
728 }
729
730 /* Render a memory topology into a list of disjoint absolute ranges. */
731 static FlatView *generate_memory_topology(MemoryRegion *mr)
732 {
733 int i;
734 FlatView *view;
735
736 view = flatview_new(mr);
737
738 if (mr) {
739 render_memory_region(view, mr, int128_zero(),
740 addrrange_make(int128_zero(), int128_2_64()),
741 false, false);
742 }
743 flatview_simplify(view);
744
745 view->dispatch = address_space_dispatch_new(view);
746 for (i = 0; i < view->nr; i++) {
747 MemoryRegionSection mrs =
748 section_from_flat_range(&view->ranges[i], view);
749 flatview_add_to_dispatch(view, &mrs);
750 }
751 address_space_dispatch_compact(view->dispatch);
752 g_hash_table_replace(flat_views, mr, view);
753
754 return view;
755 }
756
757 static void address_space_add_del_ioeventfds(AddressSpace *as,
758 MemoryRegionIoeventfd *fds_new,
759 unsigned fds_new_nb,
760 MemoryRegionIoeventfd *fds_old,
761 unsigned fds_old_nb)
762 {
763 unsigned iold, inew;
764 MemoryRegionIoeventfd *fd;
765 MemoryRegionSection section;
766
767 /* Generate a symmetric difference of the old and new fd sets, adding
768 * and deleting as necessary.
769 */
770
771 iold = inew = 0;
772 while (iold < fds_old_nb || inew < fds_new_nb) {
773 if (iold < fds_old_nb
774 && (inew == fds_new_nb
775 || memory_region_ioeventfd_before(&fds_old[iold],
776 &fds_new[inew]))) {
777 fd = &fds_old[iold];
778 section = (MemoryRegionSection) {
779 .fv = address_space_to_flatview(as),
780 .offset_within_address_space = int128_get64(fd->addr.start),
781 .size = fd->addr.size,
782 };
783 MEMORY_LISTENER_CALL(as, eventfd_del, Forward, &section,
784 fd->match_data, fd->data, fd->e);
785 ++iold;
786 } else if (inew < fds_new_nb
787 && (iold == fds_old_nb
788 || memory_region_ioeventfd_before(&fds_new[inew],
789 &fds_old[iold]))) {
790 fd = &fds_new[inew];
791 section = (MemoryRegionSection) {
792 .fv = address_space_to_flatview(as),
793 .offset_within_address_space = int128_get64(fd->addr.start),
794 .size = fd->addr.size,
795 };
796 MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, &section,
797 fd->match_data, fd->data, fd->e);
798 ++inew;
799 } else {
800 ++iold;
801 ++inew;
802 }
803 }
804 }
805
806 FlatView *address_space_get_flatview(AddressSpace *as)
807 {
808 FlatView *view;
809
810 RCU_READ_LOCK_GUARD();
811 do {
812 view = address_space_to_flatview(as);
813 /* If somebody has replaced as->current_map concurrently,
814 * flatview_ref returns false.
815 */
816 } while (!flatview_ref(view));
817 return view;
818 }
819
820 static void address_space_update_ioeventfds(AddressSpace *as)
821 {
822 FlatView *view;
823 FlatRange *fr;
824 unsigned ioeventfd_nb = 0;
825 unsigned ioeventfd_max;
826 MemoryRegionIoeventfd *ioeventfds;
827 AddrRange tmp;
828 unsigned i;
829
830 /*
831 * It is likely that the number of ioeventfds hasn't changed much, so use
832 * the previous size as the starting value, with some headroom to avoid
833 * gratuitous reallocations.
834 */
835 ioeventfd_max = QEMU_ALIGN_UP(as->ioeventfd_nb, 4);
836 ioeventfds = g_new(MemoryRegionIoeventfd, ioeventfd_max);
837
838 view = address_space_get_flatview(as);
839 FOR_EACH_FLAT_RANGE(fr, view) {
840 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
841 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
842 int128_sub(fr->addr.start,
843 int128_make64(fr->offset_in_region)));
844 if (addrrange_intersects(fr->addr, tmp)) {
845 ++ioeventfd_nb;
846 if (ioeventfd_nb > ioeventfd_max) {
847 ioeventfd_max = MAX(ioeventfd_max * 2, 4);
848 ioeventfds = g_realloc(ioeventfds,
849 ioeventfd_max * sizeof(*ioeventfds));
850 }
851 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
852 ioeventfds[ioeventfd_nb-1].addr = tmp;
853 }
854 }
855 }
856
857 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
858 as->ioeventfds, as->ioeventfd_nb);
859
860 g_free(as->ioeventfds);
861 as->ioeventfds = ioeventfds;
862 as->ioeventfd_nb = ioeventfd_nb;
863 flatview_unref(view);
864 }
865
866 /*
867 * Notify the memory listeners about the coalesced IO change events of
868 * range `cmr'. Only the part that has intersection of the specified
869 * FlatRange will be sent.
870 */
871 static void flat_range_coalesced_io_notify(FlatRange *fr, AddressSpace *as,
872 CoalescedMemoryRange *cmr, bool add)
873 {
874 AddrRange tmp;
875
876 tmp = addrrange_shift(cmr->addr,
877 int128_sub(fr->addr.start,
878 int128_make64(fr->offset_in_region)));
879 if (!addrrange_intersects(tmp, fr->addr)) {
880 return;
881 }
882 tmp = addrrange_intersection(tmp, fr->addr);
883
884 if (add) {
885 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, coalesced_io_add,
886 int128_get64(tmp.start),
887 int128_get64(tmp.size));
888 } else {
889 MEMORY_LISTENER_UPDATE_REGION(fr, as, Reverse, coalesced_io_del,
890 int128_get64(tmp.start),
891 int128_get64(tmp.size));
892 }
893 }
894
895 static void flat_range_coalesced_io_del(FlatRange *fr, AddressSpace *as)
896 {
897 CoalescedMemoryRange *cmr;
898
899 QTAILQ_FOREACH(cmr, &fr->mr->coalesced, link) {
900 flat_range_coalesced_io_notify(fr, as, cmr, false);
901 }
902 }
903
904 static void flat_range_coalesced_io_add(FlatRange *fr, AddressSpace *as)
905 {
906 MemoryRegion *mr = fr->mr;
907 CoalescedMemoryRange *cmr;
908
909 if (QTAILQ_EMPTY(&mr->coalesced)) {
910 return;
911 }
912
913 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
914 flat_range_coalesced_io_notify(fr, as, cmr, true);
915 }
916 }
917
918 static void address_space_update_topology_pass(AddressSpace *as,
919 const FlatView *old_view,
920 const FlatView *new_view,
921 bool adding)
922 {
923 unsigned iold, inew;
924 FlatRange *frold, *frnew;
925
926 /* Generate a symmetric difference of the old and new memory maps.
927 * Kill ranges in the old map, and instantiate ranges in the new map.
928 */
929 iold = inew = 0;
930 while (iold < old_view->nr || inew < new_view->nr) {
931 if (iold < old_view->nr) {
932 frold = &old_view->ranges[iold];
933 } else {
934 frold = NULL;
935 }
936 if (inew < new_view->nr) {
937 frnew = &new_view->ranges[inew];
938 } else {
939 frnew = NULL;
940 }
941
942 if (frold
943 && (!frnew
944 || int128_lt(frold->addr.start, frnew->addr.start)
945 || (int128_eq(frold->addr.start, frnew->addr.start)
946 && !flatrange_equal(frold, frnew)))) {
947 /* In old but not in new, or in both but attributes changed. */
948
949 if (!adding) {
950 flat_range_coalesced_io_del(frold, as);
951 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
952 }
953
954 ++iold;
955 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
956 /* In both and unchanged (except logging may have changed) */
957
958 if (adding) {
959 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
960 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
961 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
962 frold->dirty_log_mask,
963 frnew->dirty_log_mask);
964 }
965 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
966 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
967 frold->dirty_log_mask,
968 frnew->dirty_log_mask);
969 }
970 }
971
972 ++iold;
973 ++inew;
974 } else {
975 /* In new */
976
977 if (adding) {
978 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
979 flat_range_coalesced_io_add(frnew, as);
980 }
981
982 ++inew;
983 }
984 }
985 }
986
987 static void flatviews_init(void)
988 {
989 static FlatView *empty_view;
990
991 if (flat_views) {
992 return;
993 }
994
995 flat_views = g_hash_table_new_full(g_direct_hash, g_direct_equal, NULL,
996 (GDestroyNotify) flatview_unref);
997 if (!empty_view) {
998 empty_view = generate_memory_topology(NULL);
999 /* We keep it alive forever in the global variable. */
1000 flatview_ref(empty_view);
1001 } else {
1002 g_hash_table_replace(flat_views, NULL, empty_view);
1003 flatview_ref(empty_view);
1004 }
1005 }
1006
1007 static void flatviews_reset(void)
1008 {
1009 AddressSpace *as;
1010
1011 if (flat_views) {
1012 g_hash_table_unref(flat_views);
1013 flat_views = NULL;
1014 }
1015 flatviews_init();
1016
1017 /* Render unique FVs */
1018 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1019 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1020
1021 if (g_hash_table_lookup(flat_views, physmr)) {
1022 continue;
1023 }
1024
1025 generate_memory_topology(physmr);
1026 }
1027 }
1028
1029 static void address_space_set_flatview(AddressSpace *as)
1030 {
1031 FlatView *old_view = address_space_to_flatview(as);
1032 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1033 FlatView *new_view = g_hash_table_lookup(flat_views, physmr);
1034
1035 assert(new_view);
1036
1037 if (old_view == new_view) {
1038 return;
1039 }
1040
1041 if (old_view) {
1042 flatview_ref(old_view);
1043 }
1044
1045 flatview_ref(new_view);
1046
1047 if (!QTAILQ_EMPTY(&as->listeners)) {
1048 FlatView tmpview = { .nr = 0 }, *old_view2 = old_view;
1049
1050 if (!old_view2) {
1051 old_view2 = &tmpview;
1052 }
1053 address_space_update_topology_pass(as, old_view2, new_view, false);
1054 address_space_update_topology_pass(as, old_view2, new_view, true);
1055 }
1056
1057 /* Writes are protected by the BQL. */
1058 qatomic_rcu_set(&as->current_map, new_view);
1059 if (old_view) {
1060 flatview_unref(old_view);
1061 }
1062
1063 /* Note that all the old MemoryRegions are still alive up to this
1064 * point. This relieves most MemoryListeners from the need to
1065 * ref/unref the MemoryRegions they get---unless they use them
1066 * outside the iothread mutex, in which case precise reference
1067 * counting is necessary.
1068 */
1069 if (old_view) {
1070 flatview_unref(old_view);
1071 }
1072 }
1073
1074 static void address_space_update_topology(AddressSpace *as)
1075 {
1076 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1077
1078 flatviews_init();
1079 if (!g_hash_table_lookup(flat_views, physmr)) {
1080 generate_memory_topology(physmr);
1081 }
1082 address_space_set_flatview(as);
1083 }
1084
1085 void memory_region_transaction_begin(void)
1086 {
1087 qemu_flush_coalesced_mmio_buffer();
1088 ++memory_region_transaction_depth;
1089 }
1090
1091 void memory_region_transaction_commit(void)
1092 {
1093 AddressSpace *as;
1094
1095 assert(memory_region_transaction_depth);
1096 assert(qemu_mutex_iothread_locked());
1097
1098 --memory_region_transaction_depth;
1099 if (!memory_region_transaction_depth) {
1100 if (memory_region_update_pending) {
1101 flatviews_reset();
1102
1103 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
1104
1105 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1106 address_space_set_flatview(as);
1107 address_space_update_ioeventfds(as);
1108 }
1109 memory_region_update_pending = false;
1110 ioeventfd_update_pending = false;
1111 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
1112 } else if (ioeventfd_update_pending) {
1113 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1114 address_space_update_ioeventfds(as);
1115 }
1116 ioeventfd_update_pending = false;
1117 }
1118 }
1119 }
1120
1121 static void memory_region_destructor_none(MemoryRegion *mr)
1122 {
1123 }
1124
1125 static void memory_region_destructor_ram(MemoryRegion *mr)
1126 {
1127 qemu_ram_free(mr->ram_block);
1128 }
1129
1130 static bool memory_region_need_escape(char c)
1131 {
1132 return c == '/' || c == '[' || c == '\\' || c == ']';
1133 }
1134
1135 static char *memory_region_escape_name(const char *name)
1136 {
1137 const char *p;
1138 char *escaped, *q;
1139 uint8_t c;
1140 size_t bytes = 0;
1141
1142 for (p = name; *p; p++) {
1143 bytes += memory_region_need_escape(*p) ? 4 : 1;
1144 }
1145 if (bytes == p - name) {
1146 return g_memdup(name, bytes + 1);
1147 }
1148
1149 escaped = g_malloc(bytes + 1);
1150 for (p = name, q = escaped; *p; p++) {
1151 c = *p;
1152 if (unlikely(memory_region_need_escape(c))) {
1153 *q++ = '\\';
1154 *q++ = 'x';
1155 *q++ = "0123456789abcdef"[c >> 4];
1156 c = "0123456789abcdef"[c & 15];
1157 }
1158 *q++ = c;
1159 }
1160 *q = 0;
1161 return escaped;
1162 }
1163
1164 static void memory_region_do_init(MemoryRegion *mr,
1165 Object *owner,
1166 const char *name,
1167 uint64_t size)
1168 {
1169 mr->size = int128_make64(size);
1170 if (size == UINT64_MAX) {
1171 mr->size = int128_2_64();
1172 }
1173 mr->name = g_strdup(name);
1174 mr->owner = owner;
1175 mr->ram_block = NULL;
1176
1177 if (name) {
1178 char *escaped_name = memory_region_escape_name(name);
1179 char *name_array = g_strdup_printf("%s[*]", escaped_name);
1180
1181 if (!owner) {
1182 owner = container_get(qdev_get_machine(), "/unattached");
1183 }
1184
1185 object_property_add_child(owner, name_array, OBJECT(mr));
1186 object_unref(OBJECT(mr));
1187 g_free(name_array);
1188 g_free(escaped_name);
1189 }
1190 }
1191
1192 void memory_region_init(MemoryRegion *mr,
1193 Object *owner,
1194 const char *name,
1195 uint64_t size)
1196 {
1197 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
1198 memory_region_do_init(mr, owner, name, size);
1199 }
1200
1201 static void memory_region_get_container(Object *obj, Visitor *v,
1202 const char *name, void *opaque,
1203 Error **errp)
1204 {
1205 MemoryRegion *mr = MEMORY_REGION(obj);
1206 char *path = (char *)"";
1207
1208 if (mr->container) {
1209 path = object_get_canonical_path(OBJECT(mr->container));
1210 }
1211 visit_type_str(v, name, &path, errp);
1212 if (mr->container) {
1213 g_free(path);
1214 }
1215 }
1216
1217 static Object *memory_region_resolve_container(Object *obj, void *opaque,
1218 const char *part)
1219 {
1220 MemoryRegion *mr = MEMORY_REGION(obj);
1221
1222 return OBJECT(mr->container);
1223 }
1224
1225 static void memory_region_get_priority(Object *obj, Visitor *v,
1226 const char *name, void *opaque,
1227 Error **errp)
1228 {
1229 MemoryRegion *mr = MEMORY_REGION(obj);
1230 int32_t value = mr->priority;
1231
1232 visit_type_int32(v, name, &value, errp);
1233 }
1234
1235 static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1236 void *opaque, Error **errp)
1237 {
1238 MemoryRegion *mr = MEMORY_REGION(obj);
1239 uint64_t value = memory_region_size(mr);
1240
1241 visit_type_uint64(v, name, &value, errp);
1242 }
1243
1244 static void memory_region_initfn(Object *obj)
1245 {
1246 MemoryRegion *mr = MEMORY_REGION(obj);
1247 ObjectProperty *op;
1248
1249 mr->ops = &unassigned_mem_ops;
1250 mr->enabled = true;
1251 mr->romd_mode = true;
1252 mr->destructor = memory_region_destructor_none;
1253 QTAILQ_INIT(&mr->subregions);
1254 QTAILQ_INIT(&mr->coalesced);
1255
1256 op = object_property_add(OBJECT(mr), "container",
1257 "link<" TYPE_MEMORY_REGION ">",
1258 memory_region_get_container,
1259 NULL, /* memory_region_set_container */
1260 NULL, NULL);
1261 op->resolve = memory_region_resolve_container;
1262
1263 object_property_add_uint64_ptr(OBJECT(mr), "addr",
1264 &mr->addr, OBJ_PROP_FLAG_READ);
1265 object_property_add(OBJECT(mr), "priority", "uint32",
1266 memory_region_get_priority,
1267 NULL, /* memory_region_set_priority */
1268 NULL, NULL);
1269 object_property_add(OBJECT(mr), "size", "uint64",
1270 memory_region_get_size,
1271 NULL, /* memory_region_set_size, */
1272 NULL, NULL);
1273 }
1274
1275 static int qemu_target_backtrace(target_ulong *array, size_t size)
1276 {
1277 int n = 0;
1278 if (size >= 2) {
1279 #if defined(TARGET_ARM)
1280 CPUArchState *env = current_cpu->env_ptr;
1281 array[0] = env->regs[15];
1282 array[1] = env->regs[14];
1283 #elif defined(TARGET_MIPS)
1284 CPUArchState *env = current_cpu->env_ptr;
1285 array[0] = env->active_tc.PC;
1286 array[1] = env->active_tc.gpr[31];
1287 #else
1288 array[0] = 0;
1289 array[1] = 0;
1290 #endif
1291 n = 2;
1292 }
1293 return n;
1294 }
1295
1296 #include "disas/disas.h"
1297 const char *qemu_sprint_backtrace(char *buffer, size_t length)
1298 {
1299 char *p = buffer;
1300 if (current_cpu) {
1301 target_ulong caller[2];
1302 const char *symbol;
1303 qemu_target_backtrace(caller, 2);
1304 symbol = lookup_symbol(caller[0]);
1305 p += sprintf(p, "[%s]", symbol);
1306 symbol = lookup_symbol(caller[1]);
1307 p += sprintf(p, "[%s]", symbol);
1308 } else {
1309 p += sprintf(p, "[cpu not running]");
1310 }
1311 assert((p - buffer) < length);
1312 return buffer;
1313 }
1314
1315 static void iommu_memory_region_initfn(Object *obj)
1316 {
1317 MemoryRegion *mr = MEMORY_REGION(obj);
1318
1319 mr->is_iommu = true;
1320 }
1321
1322 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1323 unsigned size)
1324 {
1325 if (trace_unassigned) {
1326 char buffer[256];
1327 printf("Unassigned mem read " HWADDR_FMT_plx " %s\n",
1328 addr, qemu_sprint_backtrace(buffer, sizeof(buffer)));
1329 }
1330 //~ vm_stop(0);
1331 return 0;
1332 }
1333
1334 static void unassigned_mem_write(void *opaque, hwaddr addr,
1335 uint64_t val, unsigned size)
1336 {
1337 if (trace_unassigned) {
1338 char buffer[256];
1339 printf("Unassigned mem write " HWADDR_FMT_plx
1340 " = 0x%" PRIx64 " %s\n",
1341 addr, val, qemu_sprint_backtrace(buffer, sizeof(buffer)));
1342 }
1343 }
1344
1345 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1346 unsigned size, bool is_write,
1347 MemTxAttrs attrs)
1348 {
1349 return false;
1350 }
1351
1352 const MemoryRegionOps unassigned_mem_ops = {
1353 .valid.accepts = unassigned_mem_accepts,
1354 .endianness = DEVICE_NATIVE_ENDIAN,
1355 };
1356
1357 static uint64_t memory_region_ram_device_read(void *opaque,
1358 hwaddr addr, unsigned size)
1359 {
1360 MemoryRegion *mr = opaque;
1361 uint64_t data = (uint64_t)~0;
1362
1363 switch (size) {
1364 case 1:
1365 data = *(uint8_t *)(mr->ram_block->host + addr);
1366 break;
1367 case 2:
1368 data = *(uint16_t *)(mr->ram_block->host + addr);
1369 break;
1370 case 4:
1371 data = *(uint32_t *)(mr->ram_block->host + addr);
1372 break;
1373 case 8:
1374 data = *(uint64_t *)(mr->ram_block->host + addr);
1375 break;
1376 }
1377
1378 trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
1379
1380 return data;
1381 }
1382
1383 static void memory_region_ram_device_write(void *opaque, hwaddr addr,
1384 uint64_t data, unsigned size)
1385 {
1386 MemoryRegion *mr = opaque;
1387
1388 trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
1389
1390 switch (size) {
1391 case 1:
1392 *(uint8_t *)(mr->ram_block->host + addr) = (uint8_t)data;
1393 break;
1394 case 2:
1395 *(uint16_t *)(mr->ram_block->host + addr) = (uint16_t)data;
1396 break;
1397 case 4:
1398 *(uint32_t *)(mr->ram_block->host + addr) = (uint32_t)data;
1399 break;
1400 case 8:
1401 *(uint64_t *)(mr->ram_block->host + addr) = data;
1402 break;
1403 }
1404 }
1405
1406 static const MemoryRegionOps ram_device_mem_ops = {
1407 .read = memory_region_ram_device_read,
1408 .write = memory_region_ram_device_write,
1409 .endianness = DEVICE_HOST_ENDIAN,
1410 .valid = {
1411 .min_access_size = 1,
1412 .max_access_size = 8,
1413 .unaligned = true,
1414 },
1415 .impl = {
1416 .min_access_size = 1,
1417 .max_access_size = 8,
1418 .unaligned = true,
1419 },
1420 };
1421
1422 bool memory_region_access_valid(MemoryRegion *mr,
1423 hwaddr addr,
1424 unsigned size,
1425 bool is_write,
1426 MemTxAttrs attrs)
1427 {
1428 if (mr->ops->valid.accepts
1429 && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write, attrs)) {
1430 qemu_log_mask(LOG_GUEST_ERROR, "Invalid %s at addr 0x%" HWADDR_PRIX
1431 ", size %u, region '%s', reason: rejected\n",
1432 is_write ? "write" : "read",
1433 addr, size, memory_region_name(mr));
1434 return false;
1435 }
1436
1437 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1438 qemu_log_mask(LOG_GUEST_ERROR, "Invalid %s at addr 0x%" HWADDR_PRIX
1439 ", size %u, region '%s', reason: unaligned\n",
1440 is_write ? "write" : "read",
1441 addr, size, memory_region_name(mr));
1442 return false;
1443 }
1444
1445 /* Treat zero as compatibility all valid */
1446 if (!mr->ops->valid.max_access_size) {
1447 return true;
1448 }
1449
1450 if (size > mr->ops->valid.max_access_size
1451 || size < mr->ops->valid.min_access_size) {
1452 qemu_log_mask(LOG_GUEST_ERROR, "Invalid %s at addr 0x%" HWADDR_PRIX
1453 ", size %u, region '%s', reason: invalid size "
1454 "(min:%u max:%u)\n",
1455 is_write ? "write" : "read",
1456 addr, size, memory_region_name(mr),
1457 mr->ops->valid.min_access_size,
1458 mr->ops->valid.max_access_size);
1459 return false;
1460 }
1461 return true;
1462 }
1463
1464 static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1465 hwaddr addr,
1466 uint64_t *pval,
1467 unsigned size,
1468 MemTxAttrs attrs)
1469 {
1470 *pval = 0;
1471
1472 if (mr->ops->read) {
1473 return access_with_adjusted_size(addr, pval, size,
1474 mr->ops->impl.min_access_size,
1475 mr->ops->impl.max_access_size,
1476 memory_region_read_accessor,
1477 mr, attrs);
1478 } else {
1479 return access_with_adjusted_size(addr, pval, size,
1480 mr->ops->impl.min_access_size,
1481 mr->ops->impl.max_access_size,
1482 memory_region_read_with_attrs_accessor,
1483 mr, attrs);
1484 }
1485 }
1486
1487 MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1488 hwaddr addr,
1489 uint64_t *pval,
1490 MemOp op,
1491 MemTxAttrs attrs)
1492 {
1493 unsigned size = memop_size(op);
1494 MemTxResult r;
1495
1496 if (mr->alias) {
1497 return memory_region_dispatch_read(mr->alias,
1498 mr->alias_offset + addr,
1499 pval, op, attrs);
1500 }
1501 if (!memory_region_access_valid(mr, addr, size, false, attrs)) {
1502 *pval = unassigned_mem_read(mr, addr, size);
1503 return MEMTX_DECODE_ERROR;
1504 }
1505
1506 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1507 adjust_endianness(mr, pval, op);
1508 return r;
1509 }
1510
1511 /* Return true if an eventfd was signalled */
1512 static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1513 hwaddr addr,
1514 uint64_t data,
1515 unsigned size,
1516 MemTxAttrs attrs)
1517 {
1518 MemoryRegionIoeventfd ioeventfd = {
1519 .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1520 .data = data,
1521 };
1522 unsigned i;
1523
1524 for (i = 0; i < mr->ioeventfd_nb; i++) {
1525 ioeventfd.match_data = mr->ioeventfds[i].match_data;
1526 ioeventfd.e = mr->ioeventfds[i].e;
1527
1528 if (memory_region_ioeventfd_equal(&ioeventfd, &mr->ioeventfds[i])) {
1529 event_notifier_set(ioeventfd.e);
1530 return true;
1531 }
1532 }
1533
1534 return false;
1535 }
1536
1537 MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1538 hwaddr addr,
1539 uint64_t data,
1540 MemOp op,
1541 MemTxAttrs attrs)
1542 {
1543 unsigned size = memop_size(op);
1544
1545 if (mr->alias) {
1546 return memory_region_dispatch_write(mr->alias,
1547 mr->alias_offset + addr,
1548 data, op, attrs);
1549 }
1550 if (!memory_region_access_valid(mr, addr, size, true, attrs)) {
1551 unassigned_mem_write(mr, addr, data, size);
1552 return MEMTX_DECODE_ERROR;
1553 }
1554
1555 adjust_endianness(mr, &data, op);
1556
1557 if ((!kvm_eventfds_enabled()) &&
1558 memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1559 return MEMTX_OK;
1560 }
1561
1562 if (mr->ops->write) {
1563 return access_with_adjusted_size(addr, &data, size,
1564 mr->ops->impl.min_access_size,
1565 mr->ops->impl.max_access_size,
1566 memory_region_write_accessor, mr,
1567 attrs);
1568 } else {
1569 return
1570 access_with_adjusted_size(addr, &data, size,
1571 mr->ops->impl.min_access_size,
1572 mr->ops->impl.max_access_size,
1573 memory_region_write_with_attrs_accessor,
1574 mr, attrs);
1575 }
1576 }
1577
1578 void memory_region_init_io(MemoryRegion *mr,
1579 Object *owner,
1580 const MemoryRegionOps *ops,
1581 void *opaque,
1582 const char *name,
1583 uint64_t size)
1584 {
1585 memory_region_init(mr, owner, name, size);
1586 mr->ops = ops ? ops : &unassigned_mem_ops;
1587 mr->opaque = opaque;
1588 mr->terminates = true;
1589 }
1590
1591 void memory_region_init_ram_nomigrate(MemoryRegion *mr,
1592 Object *owner,
1593 const char *name,
1594 uint64_t size,
1595 Error **errp)
1596 {
1597 memory_region_init_ram_flags_nomigrate(mr, owner, name, size, 0, errp);
1598 }
1599
1600 void memory_region_init_ram_flags_nomigrate(MemoryRegion *mr,
1601 Object *owner,
1602 const char *name,
1603 uint64_t size,
1604 uint32_t ram_flags,
1605 Error **errp)
1606 {
1607 Error *err = NULL;
1608 memory_region_init(mr, owner, name, size);
1609 mr->ram = true;
1610 mr->terminates = true;
1611 mr->destructor = memory_region_destructor_ram;
1612 mr->ram_block = qemu_ram_alloc(size, ram_flags, mr, &err);
1613 if (err) {
1614 mr->size = int128_zero();
1615 object_unparent(OBJECT(mr));
1616 error_propagate(errp, err);
1617 }
1618 }
1619
1620 void memory_region_init_resizeable_ram(MemoryRegion *mr,
1621 Object *owner,
1622 const char *name,
1623 uint64_t size,
1624 uint64_t max_size,
1625 void (*resized)(const char*,
1626 uint64_t length,
1627 void *host),
1628 Error **errp)
1629 {
1630 Error *err = NULL;
1631 memory_region_init(mr, owner, name, size);
1632 mr->ram = true;
1633 mr->terminates = true;
1634 mr->destructor = memory_region_destructor_ram;
1635 mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1636 mr, &err);
1637 if (err) {
1638 mr->size = int128_zero();
1639 object_unparent(OBJECT(mr));
1640 error_propagate(errp, err);
1641 }
1642 }
1643
1644 #ifdef CONFIG_POSIX
1645 void memory_region_init_ram_from_file(MemoryRegion *mr,
1646 Object *owner,
1647 const char *name,
1648 uint64_t size,
1649 uint64_t align,
1650 uint32_t ram_flags,
1651 const char *path,
1652 bool readonly,
1653 Error **errp)
1654 {
1655 Error *err = NULL;
1656 memory_region_init(mr, owner, name, size);
1657 mr->ram = true;
1658 mr->readonly = readonly;
1659 mr->terminates = true;
1660 mr->destructor = memory_region_destructor_ram;
1661 mr->align = align;
1662 mr->ram_block = qemu_ram_alloc_from_file(size, mr, ram_flags, path,
1663 readonly, &err);
1664 if (err) {
1665 mr->size = int128_zero();
1666 object_unparent(OBJECT(mr));
1667 error_propagate(errp, err);
1668 }
1669 }
1670
1671 void memory_region_init_ram_from_fd(MemoryRegion *mr,
1672 Object *owner,
1673 const char *name,
1674 uint64_t size,
1675 uint32_t ram_flags,
1676 int fd,
1677 ram_addr_t offset,
1678 Error **errp)
1679 {
1680 Error *err = NULL;
1681 memory_region_init(mr, owner, name, size);
1682 mr->ram = true;
1683 mr->terminates = true;
1684 mr->destructor = memory_region_destructor_ram;
1685 mr->ram_block = qemu_ram_alloc_from_fd(size, mr, ram_flags, fd, offset,
1686 false, &err);
1687 if (err) {
1688 mr->size = int128_zero();
1689 object_unparent(OBJECT(mr));
1690 error_propagate(errp, err);
1691 }
1692 }
1693 #endif
1694
1695 void memory_region_init_ram_ptr(MemoryRegion *mr,
1696 Object *owner,
1697 const char *name,
1698 uint64_t size,
1699 void *ptr)
1700 {
1701 memory_region_init(mr, owner, name, size);
1702 mr->ram = true;
1703 mr->terminates = true;
1704 mr->destructor = memory_region_destructor_ram;
1705
1706 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1707 assert(ptr != NULL);
1708 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1709 }
1710
1711 void memory_region_init_ram_device_ptr(MemoryRegion *mr,
1712 Object *owner,
1713 const char *name,
1714 uint64_t size,
1715 void *ptr)
1716 {
1717 memory_region_init(mr, owner, name, size);
1718 mr->ram = true;
1719 mr->terminates = true;
1720 mr->ram_device = true;
1721 mr->ops = &ram_device_mem_ops;
1722 mr->opaque = mr;
1723 mr->destructor = memory_region_destructor_ram;
1724
1725 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1726 assert(ptr != NULL);
1727 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1728 }
1729
1730 void memory_region_init_alias(MemoryRegion *mr,
1731 Object *owner,
1732 const char *name,
1733 MemoryRegion *orig,
1734 hwaddr offset,
1735 uint64_t size)
1736 {
1737 memory_region_init(mr, owner, name, size);
1738 mr->alias = orig;
1739 mr->alias_offset = offset;
1740 }
1741
1742 void memory_region_init_rom_nomigrate(MemoryRegion *mr,
1743 Object *owner,
1744 const char *name,
1745 uint64_t size,
1746 Error **errp)
1747 {
1748 memory_region_init_ram_flags_nomigrate(mr, owner, name, size, 0, errp);
1749 mr->readonly = true;
1750 }
1751
1752 void memory_region_init_rom_device_nomigrate(MemoryRegion *mr,
1753 Object *owner,
1754 const MemoryRegionOps *ops,
1755 void *opaque,
1756 const char *name,
1757 uint64_t size,
1758 Error **errp)
1759 {
1760 Error *err = NULL;
1761 assert(ops);
1762 memory_region_init(mr, owner, name, size);
1763 mr->ops = ops;
1764 mr->opaque = opaque;
1765 mr->terminates = true;
1766 mr->rom_device = true;
1767 mr->destructor = memory_region_destructor_ram;
1768 mr->ram_block = qemu_ram_alloc(size, 0, mr, &err);
1769 if (err) {
1770 mr->size = int128_zero();
1771 object_unparent(OBJECT(mr));
1772 error_propagate(errp, err);
1773 }
1774 }
1775
1776 void memory_region_init_iommu(void *_iommu_mr,
1777 size_t instance_size,
1778 const char *mrtypename,
1779 Object *owner,
1780 const char *name,
1781 uint64_t size)
1782 {
1783 struct IOMMUMemoryRegion *iommu_mr;
1784 struct MemoryRegion *mr;
1785
1786 object_initialize(_iommu_mr, instance_size, mrtypename);
1787 mr = MEMORY_REGION(_iommu_mr);
1788 memory_region_do_init(mr, owner, name, size);
1789 iommu_mr = IOMMU_MEMORY_REGION(mr);
1790 mr->terminates = true; /* then re-forwards */
1791 QLIST_INIT(&iommu_mr->iommu_notify);
1792 iommu_mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE;
1793 }
1794
1795 static void memory_region_finalize(Object *obj)
1796 {
1797 MemoryRegion *mr = MEMORY_REGION(obj);
1798
1799 assert(!mr->container);
1800
1801 /* We know the region is not visible in any address space (it
1802 * does not have a container and cannot be a root either because
1803 * it has no references, so we can blindly clear mr->enabled.
1804 * memory_region_set_enabled instead could trigger a transaction
1805 * and cause an infinite loop.
1806 */
1807 mr->enabled = false;
1808 memory_region_transaction_begin();
1809 while (!QTAILQ_EMPTY(&mr->subregions)) {
1810 MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1811 memory_region_del_subregion(mr, subregion);
1812 }
1813 memory_region_transaction_commit();
1814
1815 mr->destructor(mr);
1816 memory_region_clear_coalescing(mr);
1817 g_free((char *)mr->name);
1818 g_free(mr->ioeventfds);
1819 }
1820
1821 Object *memory_region_owner(MemoryRegion *mr)
1822 {
1823 Object *obj = OBJECT(mr);
1824 return obj->parent;
1825 }
1826
1827 void memory_region_ref(MemoryRegion *mr)
1828 {
1829 /* MMIO callbacks most likely will access data that belongs
1830 * to the owner, hence the need to ref/unref the owner whenever
1831 * the memory region is in use.
1832 *
1833 * The memory region is a child of its owner. As long as the
1834 * owner doesn't call unparent itself on the memory region,
1835 * ref-ing the owner will also keep the memory region alive.
1836 * Memory regions without an owner are supposed to never go away;
1837 * we do not ref/unref them because it slows down DMA sensibly.
1838 */
1839 if (mr && mr->owner) {
1840 object_ref(mr->owner);
1841 }
1842 }
1843
1844 void memory_region_unref(MemoryRegion *mr)
1845 {
1846 if (mr && mr->owner) {
1847 object_unref(mr->owner);
1848 }
1849 }
1850
1851 uint64_t memory_region_size(MemoryRegion *mr)
1852 {
1853 if (int128_eq(mr->size, int128_2_64())) {
1854 return UINT64_MAX;
1855 }
1856 return int128_get64(mr->size);
1857 }
1858
1859 const char *memory_region_name(const MemoryRegion *mr)
1860 {
1861 if (!mr->name) {
1862 ((MemoryRegion *)mr)->name =
1863 g_strdup(object_get_canonical_path_component(OBJECT(mr)));
1864 }
1865 return mr->name;
1866 }
1867
1868 bool memory_region_is_ram_device(MemoryRegion *mr)
1869 {
1870 return mr->ram_device;
1871 }
1872
1873 bool memory_region_is_protected(MemoryRegion *mr)
1874 {
1875 return mr->ram && (mr->ram_block->flags & RAM_PROTECTED);
1876 }
1877
1878 uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1879 {
1880 uint8_t mask = mr->dirty_log_mask;
1881 RAMBlock *rb = mr->ram_block;
1882
1883 if (global_dirty_tracking && ((rb && qemu_ram_is_migratable(rb)) ||
1884 memory_region_is_iommu(mr))) {
1885 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1886 }
1887
1888 if (tcg_enabled() && rb) {
1889 /* TCG only cares about dirty memory logging for RAM, not IOMMU. */
1890 mask |= (1 << DIRTY_MEMORY_CODE);
1891 }
1892 return mask;
1893 }
1894
1895 bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1896 {
1897 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1898 }
1899
1900 static int memory_region_update_iommu_notify_flags(IOMMUMemoryRegion *iommu_mr,
1901 Error **errp)
1902 {
1903 IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE;
1904 IOMMUNotifier *iommu_notifier;
1905 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1906 int ret = 0;
1907
1908 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
1909 flags |= iommu_notifier->notifier_flags;
1910 }
1911
1912 if (flags != iommu_mr->iommu_notify_flags && imrc->notify_flag_changed) {
1913 ret = imrc->notify_flag_changed(iommu_mr,
1914 iommu_mr->iommu_notify_flags,
1915 flags, errp);
1916 }
1917
1918 if (!ret) {
1919 iommu_mr->iommu_notify_flags = flags;
1920 }
1921 return ret;
1922 }
1923
1924 int memory_region_iommu_set_page_size_mask(IOMMUMemoryRegion *iommu_mr,
1925 uint64_t page_size_mask,
1926 Error **errp)
1927 {
1928 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1929 int ret = 0;
1930
1931 if (imrc->iommu_set_page_size_mask) {
1932 ret = imrc->iommu_set_page_size_mask(iommu_mr, page_size_mask, errp);
1933 }
1934 return ret;
1935 }
1936
1937 int memory_region_register_iommu_notifier(MemoryRegion *mr,
1938 IOMMUNotifier *n, Error **errp)
1939 {
1940 IOMMUMemoryRegion *iommu_mr;
1941 int ret;
1942
1943 if (mr->alias) {
1944 return memory_region_register_iommu_notifier(mr->alias, n, errp);
1945 }
1946
1947 /* We need to register for at least one bitfield */
1948 iommu_mr = IOMMU_MEMORY_REGION(mr);
1949 assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
1950 assert(n->start <= n->end);
1951 assert(n->iommu_idx >= 0 &&
1952 n->iommu_idx < memory_region_iommu_num_indexes(iommu_mr));
1953
1954 QLIST_INSERT_HEAD(&iommu_mr->iommu_notify, n, node);
1955 ret = memory_region_update_iommu_notify_flags(iommu_mr, errp);
1956 if (ret) {
1957 QLIST_REMOVE(n, node);
1958 }
1959 return ret;
1960 }
1961
1962 uint64_t memory_region_iommu_get_min_page_size(IOMMUMemoryRegion *iommu_mr)
1963 {
1964 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1965
1966 if (imrc->get_min_page_size) {
1967 return imrc->get_min_page_size(iommu_mr);
1968 }
1969 return TARGET_PAGE_SIZE;
1970 }
1971
1972 void memory_region_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n)
1973 {
1974 MemoryRegion *mr = MEMORY_REGION(iommu_mr);
1975 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1976 hwaddr addr, granularity;
1977 IOMMUTLBEntry iotlb;
1978
1979 /* If the IOMMU has its own replay callback, override */
1980 if (imrc->replay) {
1981 imrc->replay(iommu_mr, n);
1982 return;
1983 }
1984
1985 granularity = memory_region_iommu_get_min_page_size(iommu_mr);
1986
1987 for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1988 iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE, n->iommu_idx);
1989 if (iotlb.perm != IOMMU_NONE) {
1990 n->notify(n, &iotlb);
1991 }
1992
1993 /* if (2^64 - MR size) < granularity, it's possible to get an
1994 * infinite loop here. This should catch such a wraparound */
1995 if ((addr + granularity) < addr) {
1996 break;
1997 }
1998 }
1999 }
2000
2001 void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
2002 IOMMUNotifier *n)
2003 {
2004 IOMMUMemoryRegion *iommu_mr;
2005
2006 if (mr->alias) {
2007 memory_region_unregister_iommu_notifier(mr->alias, n);
2008 return;
2009 }
2010 QLIST_REMOVE(n, node);
2011 iommu_mr = IOMMU_MEMORY_REGION(mr);
2012 memory_region_update_iommu_notify_flags(iommu_mr, NULL);
2013 }
2014
2015 void memory_region_notify_iommu_one(IOMMUNotifier *notifier,
2016 IOMMUTLBEvent *event)
2017 {
2018 IOMMUTLBEntry *entry = &event->entry;
2019 hwaddr entry_end = entry->iova + entry->addr_mask;
2020 IOMMUTLBEntry tmp = *entry;
2021
2022 if (event->type == IOMMU_NOTIFIER_UNMAP) {
2023 assert(entry->perm == IOMMU_NONE);
2024 }
2025
2026 /*
2027 * Skip the notification if the notification does not overlap
2028 * with registered range.
2029 */
2030 if (notifier->start > entry_end || notifier->end < entry->iova) {
2031 return;
2032 }
2033
2034 if (notifier->notifier_flags & IOMMU_NOTIFIER_DEVIOTLB_UNMAP) {
2035 /* Crop (iova, addr_mask) to range */
2036 tmp.iova = MAX(tmp.iova, notifier->start);
2037 tmp.addr_mask = MIN(entry_end, notifier->end) - tmp.iova;
2038 } else {
2039 assert(entry->iova >= notifier->start && entry_end <= notifier->end);
2040 }
2041
2042 if (event->type & notifier->notifier_flags) {
2043 notifier->notify(notifier, &tmp);
2044 }
2045 }
2046
2047 void memory_region_unmap_iommu_notifier_range(IOMMUNotifier *notifier)
2048 {
2049 IOMMUTLBEvent event;
2050
2051 event.type = IOMMU_NOTIFIER_UNMAP;
2052 event.entry.target_as = &address_space_memory;
2053 event.entry.iova = notifier->start;
2054 event.entry.perm = IOMMU_NONE;
2055 event.entry.addr_mask = notifier->end - notifier->start;
2056
2057 memory_region_notify_iommu_one(notifier, &event);
2058 }
2059
2060 void memory_region_notify_iommu(IOMMUMemoryRegion *iommu_mr,
2061 int iommu_idx,
2062 IOMMUTLBEvent event)
2063 {
2064 IOMMUNotifier *iommu_notifier;
2065
2066 assert(memory_region_is_iommu(MEMORY_REGION(iommu_mr)));
2067
2068 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
2069 if (iommu_notifier->iommu_idx == iommu_idx) {
2070 memory_region_notify_iommu_one(iommu_notifier, &event);
2071 }
2072 }
2073 }
2074
2075 int memory_region_iommu_get_attr(IOMMUMemoryRegion *iommu_mr,
2076 enum IOMMUMemoryRegionAttr attr,
2077 void *data)
2078 {
2079 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2080
2081 if (!imrc->get_attr) {
2082 return -EINVAL;
2083 }
2084
2085 return imrc->get_attr(iommu_mr, attr, data);
2086 }
2087
2088 int memory_region_iommu_attrs_to_index(IOMMUMemoryRegion *iommu_mr,
2089 MemTxAttrs attrs)
2090 {
2091 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2092
2093 if (!imrc->attrs_to_index) {
2094 return 0;
2095 }
2096
2097 return imrc->attrs_to_index(iommu_mr, attrs);
2098 }
2099
2100 int memory_region_iommu_num_indexes(IOMMUMemoryRegion *iommu_mr)
2101 {
2102 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2103
2104 if (!imrc->num_indexes) {
2105 return 1;
2106 }
2107
2108 return imrc->num_indexes(iommu_mr);
2109 }
2110
2111 RamDiscardManager *memory_region_get_ram_discard_manager(MemoryRegion *mr)
2112 {
2113 if (!memory_region_is_mapped(mr) || !memory_region_is_ram(mr)) {
2114 return NULL;
2115 }
2116 return mr->rdm;
2117 }
2118
2119 void memory_region_set_ram_discard_manager(MemoryRegion *mr,
2120 RamDiscardManager *rdm)
2121 {
2122 g_assert(memory_region_is_ram(mr) && !memory_region_is_mapped(mr));
2123 g_assert(!rdm || !mr->rdm);
2124 mr->rdm = rdm;
2125 }
2126
2127 uint64_t ram_discard_manager_get_min_granularity(const RamDiscardManager *rdm,
2128 const MemoryRegion *mr)
2129 {
2130 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2131
2132 g_assert(rdmc->get_min_granularity);
2133 return rdmc->get_min_granularity(rdm, mr);
2134 }
2135
2136 bool ram_discard_manager_is_populated(const RamDiscardManager *rdm,
2137 const MemoryRegionSection *section)
2138 {
2139 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2140
2141 g_assert(rdmc->is_populated);
2142 return rdmc->is_populated(rdm, section);
2143 }
2144
2145 int ram_discard_manager_replay_populated(const RamDiscardManager *rdm,
2146 MemoryRegionSection *section,
2147 ReplayRamPopulate replay_fn,
2148 void *opaque)
2149 {
2150 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2151
2152 g_assert(rdmc->replay_populated);
2153 return rdmc->replay_populated(rdm, section, replay_fn, opaque);
2154 }
2155
2156 void ram_discard_manager_replay_discarded(const RamDiscardManager *rdm,
2157 MemoryRegionSection *section,
2158 ReplayRamDiscard replay_fn,
2159 void *opaque)
2160 {
2161 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2162
2163 g_assert(rdmc->replay_discarded);
2164 rdmc->replay_discarded(rdm, section, replay_fn, opaque);
2165 }
2166
2167 void ram_discard_manager_register_listener(RamDiscardManager *rdm,
2168 RamDiscardListener *rdl,
2169 MemoryRegionSection *section)
2170 {
2171 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2172
2173 g_assert(rdmc->register_listener);
2174 rdmc->register_listener(rdm, rdl, section);
2175 }
2176
2177 void ram_discard_manager_unregister_listener(RamDiscardManager *rdm,
2178 RamDiscardListener *rdl)
2179 {
2180 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2181
2182 g_assert(rdmc->unregister_listener);
2183 rdmc->unregister_listener(rdm, rdl);
2184 }
2185
2186 /* Called with rcu_read_lock held. */
2187 bool memory_get_xlat_addr(IOMMUTLBEntry *iotlb, void **vaddr,
2188 ram_addr_t *ram_addr, bool *read_only,
2189 bool *mr_has_discard_manager)
2190 {
2191 MemoryRegion *mr;
2192 hwaddr xlat;
2193 hwaddr len = iotlb->addr_mask + 1;
2194 bool writable = iotlb->perm & IOMMU_WO;
2195
2196 if (mr_has_discard_manager) {
2197 *mr_has_discard_manager = false;
2198 }
2199 /*
2200 * The IOMMU TLB entry we have just covers translation through
2201 * this IOMMU to its immediate target. We need to translate
2202 * it the rest of the way through to memory.
2203 */
2204 mr = address_space_translate(&address_space_memory, iotlb->translated_addr,
2205 &xlat, &len, writable, MEMTXATTRS_UNSPECIFIED);
2206 if (!memory_region_is_ram(mr)) {
2207 error_report("iommu map to non memory area %" HWADDR_PRIx "", xlat);
2208 return false;
2209 } else if (memory_region_has_ram_discard_manager(mr)) {
2210 RamDiscardManager *rdm = memory_region_get_ram_discard_manager(mr);
2211 MemoryRegionSection tmp = {
2212 .mr = mr,
2213 .offset_within_region = xlat,
2214 .size = int128_make64(len),
2215 };
2216 if (mr_has_discard_manager) {
2217 *mr_has_discard_manager = true;
2218 }
2219 /*
2220 * Malicious VMs can map memory into the IOMMU, which is expected
2221 * to remain discarded. vfio will pin all pages, populating memory.
2222 * Disallow that. vmstate priorities make sure any RamDiscardManager
2223 * were already restored before IOMMUs are restored.
2224 */
2225 if (!ram_discard_manager_is_populated(rdm, &tmp)) {
2226 error_report("iommu map to discarded memory (e.g., unplugged via"
2227 " virtio-mem): %" HWADDR_PRIx "",
2228 iotlb->translated_addr);
2229 return false;
2230 }
2231 }
2232
2233 /*
2234 * Translation truncates length to the IOMMU page size,
2235 * check that it did not truncate too much.
2236 */
2237 if (len & iotlb->addr_mask) {
2238 error_report("iommu has granularity incompatible with target AS");
2239 return false;
2240 }
2241
2242 if (vaddr) {
2243 *vaddr = memory_region_get_ram_ptr(mr) + xlat;
2244 }
2245
2246 if (ram_addr) {
2247 *ram_addr = memory_region_get_ram_addr(mr) + xlat;
2248 }
2249
2250 if (read_only) {
2251 *read_only = !writable || mr->readonly;
2252 }
2253
2254 return true;
2255 }
2256
2257 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
2258 {
2259 uint8_t mask = 1 << client;
2260 uint8_t old_logging;
2261
2262 assert(client == DIRTY_MEMORY_VGA);
2263 old_logging = mr->vga_logging_count;
2264 mr->vga_logging_count += log ? 1 : -1;
2265 if (!!old_logging == !!mr->vga_logging_count) {
2266 return;
2267 }
2268
2269 memory_region_transaction_begin();
2270 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
2271 memory_region_update_pending |= mr->enabled;
2272 memory_region_transaction_commit();
2273 }
2274
2275 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
2276 hwaddr size)
2277 {
2278 assert(mr->ram_block);
2279 cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
2280 size,
2281 memory_region_get_dirty_log_mask(mr));
2282 }
2283
2284 /*
2285 * If memory region `mr' is NULL, do global sync. Otherwise, sync
2286 * dirty bitmap for the specified memory region.
2287 */
2288 static void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
2289 {
2290 MemoryListener *listener;
2291 AddressSpace *as;
2292 FlatView *view;
2293 FlatRange *fr;
2294
2295 /* If the same address space has multiple log_sync listeners, we
2296 * visit that address space's FlatView multiple times. But because
2297 * log_sync listeners are rare, it's still cheaper than walking each
2298 * address space once.
2299 */
2300 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2301 if (listener->log_sync) {
2302 as = listener->address_space;
2303 view = address_space_get_flatview(as);
2304 FOR_EACH_FLAT_RANGE(fr, view) {
2305 if (fr->dirty_log_mask && (!mr || fr->mr == mr)) {
2306 MemoryRegionSection mrs = section_from_flat_range(fr, view);
2307 listener->log_sync(listener, &mrs);
2308 }
2309 }
2310 flatview_unref(view);
2311 trace_memory_region_sync_dirty(mr ? mr->name : "(all)", listener->name, 0);
2312 } else if (listener->log_sync_global) {
2313 /*
2314 * No matter whether MR is specified, what we can do here
2315 * is to do a global sync, because we are not capable to
2316 * sync in a finer granularity.
2317 */
2318 listener->log_sync_global(listener);
2319 trace_memory_region_sync_dirty(mr ? mr->name : "(all)", listener->name, 1);
2320 }
2321 }
2322 }
2323
2324 void memory_region_clear_dirty_bitmap(MemoryRegion *mr, hwaddr start,
2325 hwaddr len)
2326 {
2327 MemoryRegionSection mrs;
2328 MemoryListener *listener;
2329 AddressSpace *as;
2330 FlatView *view;
2331 FlatRange *fr;
2332 hwaddr sec_start, sec_end, sec_size;
2333
2334 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2335 if (!listener->log_clear) {
2336 continue;
2337 }
2338 as = listener->address_space;
2339 view = address_space_get_flatview(as);
2340 FOR_EACH_FLAT_RANGE(fr, view) {
2341 if (!fr->dirty_log_mask || fr->mr != mr) {
2342 /*
2343 * Clear dirty bitmap operation only applies to those
2344 * regions whose dirty logging is at least enabled
2345 */
2346 continue;
2347 }
2348
2349 mrs = section_from_flat_range(fr, view);
2350
2351 sec_start = MAX(mrs.offset_within_region, start);
2352 sec_end = mrs.offset_within_region + int128_get64(mrs.size);
2353 sec_end = MIN(sec_end, start + len);
2354
2355 if (sec_start >= sec_end) {
2356 /*
2357 * If this memory region section has no intersection
2358 * with the requested range, skip.
2359 */
2360 continue;
2361 }
2362
2363 /* Valid case; shrink the section if needed */
2364 mrs.offset_within_address_space +=
2365 sec_start - mrs.offset_within_region;
2366 mrs.offset_within_region = sec_start;
2367 sec_size = sec_end - sec_start;
2368 mrs.size = int128_make64(sec_size);
2369 listener->log_clear(listener, &mrs);
2370 }
2371 flatview_unref(view);
2372 }
2373 }
2374
2375 DirtyBitmapSnapshot *memory_region_snapshot_and_clear_dirty(MemoryRegion *mr,
2376 hwaddr addr,
2377 hwaddr size,
2378 unsigned client)
2379 {
2380 DirtyBitmapSnapshot *snapshot;
2381 assert(mr->ram_block);
2382 memory_region_sync_dirty_bitmap(mr);
2383 snapshot = cpu_physical_memory_snapshot_and_clear_dirty(mr, addr, size, client);
2384 memory_global_after_dirty_log_sync();
2385 return snapshot;
2386 }
2387
2388 bool memory_region_snapshot_get_dirty(MemoryRegion *mr, DirtyBitmapSnapshot *snap,
2389 hwaddr addr, hwaddr size)
2390 {
2391 assert(mr->ram_block);
2392 return cpu_physical_memory_snapshot_get_dirty(snap,
2393 memory_region_get_ram_addr(mr) + addr, size);
2394 }
2395
2396 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
2397 {
2398 if (mr->readonly != readonly) {
2399 memory_region_transaction_begin();
2400 mr->readonly = readonly;
2401 memory_region_update_pending |= mr->enabled;
2402 memory_region_transaction_commit();
2403 }
2404 }
2405
2406 void memory_region_set_nonvolatile(MemoryRegion *mr, bool nonvolatile)
2407 {
2408 if (mr->nonvolatile != nonvolatile) {
2409 memory_region_transaction_begin();
2410 mr->nonvolatile = nonvolatile;
2411 memory_region_update_pending |= mr->enabled;
2412 memory_region_transaction_commit();
2413 }
2414 }
2415
2416 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
2417 {
2418 if (mr->romd_mode != romd_mode) {
2419 memory_region_transaction_begin();
2420 mr->romd_mode = romd_mode;
2421 memory_region_update_pending |= mr->enabled;
2422 memory_region_transaction_commit();
2423 }
2424 }
2425
2426 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
2427 hwaddr size, unsigned client)
2428 {
2429 assert(mr->ram_block);
2430 cpu_physical_memory_test_and_clear_dirty(
2431 memory_region_get_ram_addr(mr) + addr, size, client);
2432 }
2433
2434 int memory_region_get_fd(MemoryRegion *mr)
2435 {
2436 RCU_READ_LOCK_GUARD();
2437 while (mr->alias) {
2438 mr = mr->alias;
2439 }
2440 return mr->ram_block->fd;
2441 }
2442
2443 void *memory_region_get_ram_ptr(MemoryRegion *mr)
2444 {
2445 uint64_t offset = 0;
2446
2447 RCU_READ_LOCK_GUARD();
2448 while (mr->alias) {
2449 offset += mr->alias_offset;
2450 mr = mr->alias;
2451 }
2452 assert(mr->ram_block);
2453 return qemu_map_ram_ptr(mr->ram_block, offset);
2454 }
2455
2456 MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
2457 {
2458 RAMBlock *block;
2459
2460 block = qemu_ram_block_from_host(ptr, false, offset);
2461 if (!block) {
2462 return NULL;
2463 }
2464
2465 return block->mr;
2466 }
2467
2468 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
2469 {
2470 return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
2471 }
2472
2473 void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
2474 {
2475 assert(mr->ram_block);
2476
2477 qemu_ram_resize(mr->ram_block, newsize, errp);
2478 }
2479
2480 void memory_region_msync(MemoryRegion *mr, hwaddr addr, hwaddr size)
2481 {
2482 if (mr->ram_block) {
2483 qemu_ram_msync(mr->ram_block, addr, size);
2484 }
2485 }
2486
2487 void memory_region_writeback(MemoryRegion *mr, hwaddr addr, hwaddr size)
2488 {
2489 /*
2490 * Might be extended case needed to cover
2491 * different types of memory regions
2492 */
2493 if (mr->dirty_log_mask) {
2494 memory_region_msync(mr, addr, size);
2495 }
2496 }
2497
2498 /*
2499 * Call proper memory listeners about the change on the newly
2500 * added/removed CoalescedMemoryRange.
2501 */
2502 static void memory_region_update_coalesced_range(MemoryRegion *mr,
2503 CoalescedMemoryRange *cmr,
2504 bool add)
2505 {
2506 AddressSpace *as;
2507 FlatView *view;
2508 FlatRange *fr;
2509
2510 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2511 view = address_space_get_flatview(as);
2512 FOR_EACH_FLAT_RANGE(fr, view) {
2513 if (fr->mr == mr) {
2514 flat_range_coalesced_io_notify(fr, as, cmr, add);
2515 }
2516 }
2517 flatview_unref(view);
2518 }
2519 }
2520
2521 void memory_region_set_coalescing(MemoryRegion *mr)
2522 {
2523 memory_region_clear_coalescing(mr);
2524 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
2525 }
2526
2527 void memory_region_add_coalescing(MemoryRegion *mr,
2528 hwaddr offset,
2529 uint64_t size)
2530 {
2531 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
2532
2533 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
2534 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
2535 memory_region_update_coalesced_range(mr, cmr, true);
2536 memory_region_set_flush_coalesced(mr);
2537 }
2538
2539 void memory_region_clear_coalescing(MemoryRegion *mr)
2540 {
2541 CoalescedMemoryRange *cmr;
2542
2543 if (QTAILQ_EMPTY(&mr->coalesced)) {
2544 return;
2545 }
2546
2547 qemu_flush_coalesced_mmio_buffer();
2548 mr->flush_coalesced_mmio = false;
2549
2550 while (!QTAILQ_EMPTY(&mr->coalesced)) {
2551 cmr = QTAILQ_FIRST(&mr->coalesced);
2552 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
2553 memory_region_update_coalesced_range(mr, cmr, false);
2554 g_free(cmr);
2555 }
2556 }
2557
2558 void memory_region_set_flush_coalesced(MemoryRegion *mr)
2559 {
2560 mr->flush_coalesced_mmio = true;
2561 }
2562
2563 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
2564 {
2565 qemu_flush_coalesced_mmio_buffer();
2566 if (QTAILQ_EMPTY(&mr->coalesced)) {
2567 mr->flush_coalesced_mmio = false;
2568 }
2569 }
2570
2571 static bool userspace_eventfd_warning;
2572
2573 void memory_region_add_eventfd(MemoryRegion *mr,
2574 hwaddr addr,
2575 unsigned size,
2576 bool match_data,
2577 uint64_t data,
2578 EventNotifier *e)
2579 {
2580 MemoryRegionIoeventfd mrfd = {
2581 .addr.start = int128_make64(addr),
2582 .addr.size = int128_make64(size),
2583 .match_data = match_data,
2584 .data = data,
2585 .e = e,
2586 };
2587 unsigned i;
2588
2589 if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
2590 userspace_eventfd_warning))) {
2591 userspace_eventfd_warning = true;
2592 error_report("Using eventfd without MMIO binding in KVM. "
2593 "Suboptimal performance expected");
2594 }
2595
2596 if (size) {
2597 adjust_endianness(mr, &mrfd.data, size_memop(size) | MO_TE);
2598 }
2599 memory_region_transaction_begin();
2600 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2601 if (memory_region_ioeventfd_before(&mrfd, &mr->ioeventfds[i])) {
2602 break;
2603 }
2604 }
2605 ++mr->ioeventfd_nb;
2606 mr->ioeventfds = g_realloc(mr->ioeventfds,
2607 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
2608 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
2609 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
2610 mr->ioeventfds[i] = mrfd;
2611 ioeventfd_update_pending |= mr->enabled;
2612 memory_region_transaction_commit();
2613 }
2614
2615 void memory_region_del_eventfd(MemoryRegion *mr,
2616 hwaddr addr,
2617 unsigned size,
2618 bool match_data,
2619 uint64_t data,
2620 EventNotifier *e)
2621 {
2622 MemoryRegionIoeventfd mrfd = {
2623 .addr.start = int128_make64(addr),
2624 .addr.size = int128_make64(size),
2625 .match_data = match_data,
2626 .data = data,
2627 .e = e,
2628 };
2629 unsigned i;
2630
2631 if (size) {
2632 adjust_endianness(mr, &mrfd.data, size_memop(size) | MO_TE);
2633 }
2634 memory_region_transaction_begin();
2635 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2636 if (memory_region_ioeventfd_equal(&mrfd, &mr->ioeventfds[i])) {
2637 break;
2638 }
2639 }
2640 assert(i != mr->ioeventfd_nb);
2641 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
2642 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
2643 --mr->ioeventfd_nb;
2644 mr->ioeventfds = g_realloc(mr->ioeventfds,
2645 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
2646 ioeventfd_update_pending |= mr->enabled;
2647 memory_region_transaction_commit();
2648 }
2649
2650 static void memory_region_update_container_subregions(MemoryRegion *subregion)
2651 {
2652 MemoryRegion *mr = subregion->container;
2653 MemoryRegion *other;
2654
2655 memory_region_transaction_begin();
2656
2657 memory_region_ref(subregion);
2658 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
2659 if (subregion->priority >= other->priority) {
2660 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
2661 goto done;
2662 }
2663 }
2664 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
2665 done:
2666 memory_region_update_pending |= mr->enabled && subregion->enabled;
2667 memory_region_transaction_commit();
2668 }
2669
2670 static void memory_region_add_subregion_common(MemoryRegion *mr,
2671 hwaddr offset,
2672 MemoryRegion *subregion)
2673 {
2674 MemoryRegion *alias;
2675
2676 assert(!subregion->container);
2677 subregion->container = mr;
2678 for (alias = subregion->alias; alias; alias = alias->alias) {
2679 alias->mapped_via_alias++;
2680 }
2681 subregion->addr = offset;
2682 memory_region_update_container_subregions(subregion);
2683 }
2684
2685 void memory_region_add_subregion(MemoryRegion *mr,
2686 hwaddr offset,
2687 MemoryRegion *subregion)
2688 {
2689 subregion->priority = 0;
2690 memory_region_add_subregion_common(mr, offset, subregion);
2691 }
2692
2693 void memory_region_add_subregion_overlap(MemoryRegion *mr,
2694 hwaddr offset,
2695 MemoryRegion *subregion,
2696 int priority)
2697 {
2698 subregion->priority = priority;
2699 memory_region_add_subregion_common(mr, offset, subregion);
2700 }
2701
2702 void memory_region_del_subregion(MemoryRegion *mr,
2703 MemoryRegion *subregion)
2704 {
2705 MemoryRegion *alias;
2706
2707 memory_region_transaction_begin();
2708 assert(subregion->container == mr);
2709 subregion->container = NULL;
2710 for (alias = subregion->alias; alias; alias = alias->alias) {
2711 alias->mapped_via_alias--;
2712 assert(alias->mapped_via_alias >= 0);
2713 }
2714 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
2715 memory_region_unref(subregion);
2716 memory_region_update_pending |= mr->enabled && subregion->enabled;
2717 memory_region_transaction_commit();
2718 }
2719
2720 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
2721 {
2722 if (enabled == mr->enabled) {
2723 return;
2724 }
2725 memory_region_transaction_begin();
2726 mr->enabled = enabled;
2727 memory_region_update_pending = true;
2728 memory_region_transaction_commit();
2729 }
2730
2731 void memory_region_set_size(MemoryRegion *mr, uint64_t size)
2732 {
2733 Int128 s = int128_make64(size);
2734
2735 if (size == UINT64_MAX) {
2736 s = int128_2_64();
2737 }
2738 if (int128_eq(s, mr->size)) {
2739 return;
2740 }
2741 memory_region_transaction_begin();
2742 mr->size = s;
2743 memory_region_update_pending = true;
2744 memory_region_transaction_commit();
2745 }
2746
2747 static void memory_region_readd_subregion(MemoryRegion *mr)
2748 {
2749 MemoryRegion *container = mr->container;
2750
2751 if (container) {
2752 memory_region_transaction_begin();
2753 memory_region_ref(mr);
2754 memory_region_del_subregion(container, mr);
2755 memory_region_add_subregion_common(container, mr->addr, mr);
2756 memory_region_unref(mr);
2757 memory_region_transaction_commit();
2758 }
2759 }
2760
2761 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2762 {
2763 if (addr != mr->addr) {
2764 mr->addr = addr;
2765 memory_region_readd_subregion(mr);
2766 }
2767 }
2768
2769 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
2770 {
2771 assert(mr->alias);
2772
2773 if (offset == mr->alias_offset) {
2774 return;
2775 }
2776
2777 memory_region_transaction_begin();
2778 mr->alias_offset = offset;
2779 memory_region_update_pending |= mr->enabled;
2780 memory_region_transaction_commit();
2781 }
2782
2783 uint64_t memory_region_get_alignment(const MemoryRegion *mr)
2784 {
2785 return mr->align;
2786 }
2787
2788 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
2789 {
2790 const AddrRange *addr = addr_;
2791 const FlatRange *fr = fr_;
2792
2793 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2794 return -1;
2795 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2796 return 1;
2797 }
2798 return 0;
2799 }
2800
2801 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
2802 {
2803 return bsearch(&addr, view->ranges, view->nr,
2804 sizeof(FlatRange), cmp_flatrange_addr);
2805 }
2806
2807 bool memory_region_is_mapped(MemoryRegion *mr)
2808 {
2809 return !!mr->container || mr->mapped_via_alias;
2810 }
2811
2812 /* Same as memory_region_find, but it does not add a reference to the
2813 * returned region. It must be called from an RCU critical section.
2814 */
2815 static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2816 hwaddr addr, uint64_t size)
2817 {
2818 MemoryRegionSection ret = { .mr = NULL };
2819 MemoryRegion *root;
2820 AddressSpace *as;
2821 AddrRange range;
2822 FlatView *view;
2823 FlatRange *fr;
2824
2825 addr += mr->addr;
2826 for (root = mr; root->container; ) {
2827 root = root->container;
2828 addr += root->addr;
2829 }
2830
2831 as = memory_region_to_address_space(root);
2832 if (!as) {
2833 return ret;
2834 }
2835 range = addrrange_make(int128_make64(addr), int128_make64(size));
2836
2837 view = address_space_to_flatview(as);
2838 fr = flatview_lookup(view, range);
2839 if (!fr) {
2840 return ret;
2841 }
2842
2843 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
2844 --fr;
2845 }
2846
2847 ret.mr = fr->mr;
2848 ret.fv = view;
2849 range = addrrange_intersection(range, fr->addr);
2850 ret.offset_within_region = fr->offset_in_region;
2851 ret.offset_within_region += int128_get64(int128_sub(range.start,
2852 fr->addr.start));
2853 ret.size = range.size;
2854 ret.offset_within_address_space = int128_get64(range.start);
2855 ret.readonly = fr->readonly;
2856 ret.nonvolatile = fr->nonvolatile;
2857 return ret;
2858 }
2859
2860 MemoryRegionSection memory_region_find(MemoryRegion *mr,
2861 hwaddr addr, uint64_t size)
2862 {
2863 MemoryRegionSection ret;
2864 RCU_READ_LOCK_GUARD();
2865 ret = memory_region_find_rcu(mr, addr, size);
2866 if (ret.mr) {
2867 memory_region_ref(ret.mr);
2868 }
2869 return ret;
2870 }
2871
2872 MemoryRegionSection *memory_region_section_new_copy(MemoryRegionSection *s)
2873 {
2874 MemoryRegionSection *tmp = g_new(MemoryRegionSection, 1);
2875
2876 *tmp = *s;
2877 if (tmp->mr) {
2878 memory_region_ref(tmp->mr);
2879 }
2880 if (tmp->fv) {
2881 bool ret = flatview_ref(tmp->fv);
2882
2883 g_assert(ret);
2884 }
2885 return tmp;
2886 }
2887
2888 void memory_region_section_free_copy(MemoryRegionSection *s)
2889 {
2890 if (s->fv) {
2891 flatview_unref(s->fv);
2892 }
2893 if (s->mr) {
2894 memory_region_unref(s->mr);
2895 }
2896 g_free(s);
2897 }
2898
2899 bool memory_region_present(MemoryRegion *container, hwaddr addr)
2900 {
2901 MemoryRegion *mr;
2902
2903 RCU_READ_LOCK_GUARD();
2904 mr = memory_region_find_rcu(container, addr, 1).mr;
2905 return mr && mr != container;
2906 }
2907
2908 void memory_global_dirty_log_sync(void)
2909 {
2910 memory_region_sync_dirty_bitmap(NULL);
2911 }
2912
2913 void memory_global_after_dirty_log_sync(void)
2914 {
2915 MEMORY_LISTENER_CALL_GLOBAL(log_global_after_sync, Forward);
2916 }
2917
2918 /*
2919 * Dirty track stop flags that are postponed due to VM being stopped. Should
2920 * only be used within vmstate_change hook.
2921 */
2922 static unsigned int postponed_stop_flags;
2923 static VMChangeStateEntry *vmstate_change;
2924 static void memory_global_dirty_log_stop_postponed_run(void);
2925
2926 void memory_global_dirty_log_start(unsigned int flags)
2927 {
2928 unsigned int old_flags;
2929
2930 assert(flags && !(flags & (~GLOBAL_DIRTY_MASK)));
2931
2932 if (vmstate_change) {
2933 /* If there is postponed stop(), operate on it first */
2934 postponed_stop_flags &= ~flags;
2935 memory_global_dirty_log_stop_postponed_run();
2936 }
2937
2938 flags &= ~global_dirty_tracking;
2939 if (!flags) {
2940 return;
2941 }
2942
2943 old_flags = global_dirty_tracking;
2944 global_dirty_tracking |= flags;
2945 trace_global_dirty_changed(global_dirty_tracking);
2946
2947 if (!old_flags) {
2948 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
2949 memory_region_transaction_begin();
2950 memory_region_update_pending = true;
2951 memory_region_transaction_commit();
2952 }
2953 }
2954
2955 static void memory_global_dirty_log_do_stop(unsigned int flags)
2956 {
2957 assert(flags && !(flags & (~GLOBAL_DIRTY_MASK)));
2958 assert((global_dirty_tracking & flags) == flags);
2959 global_dirty_tracking &= ~flags;
2960
2961 trace_global_dirty_changed(global_dirty_tracking);
2962
2963 if (!global_dirty_tracking) {
2964 memory_region_transaction_begin();
2965 memory_region_update_pending = true;
2966 memory_region_transaction_commit();
2967 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2968 }
2969 }
2970
2971 /*
2972 * Execute the postponed dirty log stop operations if there is, then reset
2973 * everything (including the flags and the vmstate change hook).
2974 */
2975 static void memory_global_dirty_log_stop_postponed_run(void)
2976 {
2977 /* This must be called with the vmstate handler registered */
2978 assert(vmstate_change);
2979
2980 /* Note: postponed_stop_flags can be cleared in log start routine */
2981 if (postponed_stop_flags) {
2982 memory_global_dirty_log_do_stop(postponed_stop_flags);
2983 postponed_stop_flags = 0;
2984 }
2985
2986 qemu_del_vm_change_state_handler(vmstate_change);
2987 vmstate_change = NULL;
2988 }
2989
2990 static void memory_vm_change_state_handler(void *opaque, bool running,
2991 RunState state)
2992 {
2993 if (running) {
2994 memory_global_dirty_log_stop_postponed_run();
2995 }
2996 }
2997
2998 void memory_global_dirty_log_stop(unsigned int flags)
2999 {
3000 if (!runstate_is_running()) {
3001 /* Postpone the dirty log stop, e.g., to when VM starts again */
3002 if (vmstate_change) {
3003 /* Batch with previous postponed flags */
3004 postponed_stop_flags |= flags;
3005 } else {
3006 postponed_stop_flags = flags;
3007 vmstate_change = qemu_add_vm_change_state_handler(
3008 memory_vm_change_state_handler, NULL);
3009 }
3010 return;
3011 }
3012
3013 memory_global_dirty_log_do_stop(flags);
3014 }
3015
3016 static void listener_add_address_space(MemoryListener *listener,
3017 AddressSpace *as)
3018 {
3019 FlatView *view;
3020 FlatRange *fr;
3021
3022 if (listener->begin) {
3023 listener->begin(listener);
3024 }
3025 if (global_dirty_tracking) {
3026 if (listener->log_global_start) {
3027 listener->log_global_start(listener);
3028 }
3029 }
3030
3031 view = address_space_get_flatview(as);
3032 FOR_EACH_FLAT_RANGE(fr, view) {
3033 MemoryRegionSection section = section_from_flat_range(fr, view);
3034
3035 if (listener->region_add) {
3036 listener->region_add(listener, &section);
3037 }
3038 if (fr->dirty_log_mask && listener->log_start) {
3039 listener->log_start(listener, &section, 0, fr->dirty_log_mask);
3040 }
3041 }
3042 if (listener->commit) {
3043 listener->commit(listener);
3044 }
3045 flatview_unref(view);
3046 }
3047
3048 static void listener_del_address_space(MemoryListener *listener,
3049 AddressSpace *as)
3050 {
3051 FlatView *view;
3052 FlatRange *fr;
3053
3054 if (listener->begin) {
3055 listener->begin(listener);
3056 }
3057 view = address_space_get_flatview(as);
3058 FOR_EACH_FLAT_RANGE(fr, view) {
3059 MemoryRegionSection section = section_from_flat_range(fr, view);
3060
3061 if (fr->dirty_log_mask && listener->log_stop) {
3062 listener->log_stop(listener, &section, fr->dirty_log_mask, 0);
3063 }
3064 if (listener->region_del) {
3065 listener->region_del(listener, &section);
3066 }
3067 }
3068 if (listener->commit) {
3069 listener->commit(listener);
3070 }
3071 flatview_unref(view);
3072 }
3073
3074 void memory_listener_register(MemoryListener *listener, AddressSpace *as)
3075 {
3076 MemoryListener *other = NULL;
3077
3078 /* Only one of them can be defined for a listener */
3079 assert(!(listener->log_sync && listener->log_sync_global));
3080
3081 listener->address_space = as;
3082 if (QTAILQ_EMPTY(&memory_listeners)
3083 || listener->priority >= QTAILQ_LAST(&memory_listeners)->priority) {
3084 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
3085 } else {
3086 QTAILQ_FOREACH(other, &memory_listeners, link) {
3087 if (listener->priority < other->priority) {
3088 break;
3089 }
3090 }
3091 QTAILQ_INSERT_BEFORE(other, listener, link);
3092 }
3093
3094 if (QTAILQ_EMPTY(&as->listeners)
3095 || listener->priority >= QTAILQ_LAST(&as->listeners)->priority) {
3096 QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as);
3097 } else {
3098 QTAILQ_FOREACH(other, &as->listeners, link_as) {
3099 if (listener->priority < other->priority) {
3100 break;
3101 }
3102 }
3103 QTAILQ_INSERT_BEFORE(other, listener, link_as);
3104 }
3105
3106 listener_add_address_space(listener, as);
3107 }
3108
3109 void memory_listener_unregister(MemoryListener *listener)
3110 {
3111 if (!listener->address_space) {
3112 return;
3113 }
3114
3115 listener_del_address_space(listener, listener->address_space);
3116 QTAILQ_REMOVE(&memory_listeners, listener, link);
3117 QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as);
3118 listener->address_space = NULL;
3119 }
3120
3121 void address_space_remove_listeners(AddressSpace *as)
3122 {
3123 while (!QTAILQ_EMPTY(&as->listeners)) {
3124 memory_listener_unregister(QTAILQ_FIRST(&as->listeners));
3125 }
3126 }
3127
3128 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
3129 {
3130 memory_region_ref(root);
3131 as->root = root;
3132 as->current_map = NULL;
3133 as->ioeventfd_nb = 0;
3134 as->ioeventfds = NULL;
3135 QTAILQ_INIT(&as->listeners);
3136 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
3137 as->name = g_strdup(name ? name : "anonymous");
3138 address_space_update_topology(as);
3139 address_space_update_ioeventfds(as);
3140 }
3141
3142 static void do_address_space_destroy(AddressSpace *as)
3143 {
3144 assert(QTAILQ_EMPTY(&as->listeners));
3145
3146 flatview_unref(as->current_map);
3147 g_free(as->name);
3148 g_free(as->ioeventfds);
3149 memory_region_unref(as->root);
3150 }
3151
3152 void address_space_destroy(AddressSpace *as)
3153 {
3154 MemoryRegion *root = as->root;
3155
3156 /* Flush out anything from MemoryListeners listening in on this */
3157 memory_region_transaction_begin();
3158 as->root = NULL;
3159 memory_region_transaction_commit();
3160 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
3161
3162 /* At this point, as->dispatch and as->current_map are dummy
3163 * entries that the guest should never use. Wait for the old
3164 * values to expire before freeing the data.
3165 */
3166 as->root = root;
3167 call_rcu(as, do_address_space_destroy, rcu);
3168 }
3169
3170 static const char *memory_region_type(MemoryRegion *mr)
3171 {
3172 if (mr->alias) {
3173 return memory_region_type(mr->alias);
3174 }
3175 if (memory_region_is_ram_device(mr)) {
3176 return "ramd";
3177 } else if (memory_region_is_romd(mr)) {
3178 return "romd";
3179 } else if (memory_region_is_rom(mr)) {
3180 return "rom";
3181 } else if (memory_region_is_ram(mr)) {
3182 return "ram";
3183 } else {
3184 return "i/o";
3185 }
3186 }
3187
3188 typedef struct MemoryRegionList MemoryRegionList;
3189
3190 struct MemoryRegionList {
3191 const MemoryRegion *mr;
3192 QTAILQ_ENTRY(MemoryRegionList) mrqueue;
3193 };
3194
3195 typedef QTAILQ_HEAD(, MemoryRegionList) MemoryRegionListHead;
3196
3197 #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
3198 int128_sub((size), int128_one())) : 0)
3199 #define MTREE_INDENT " "
3200
3201 static void mtree_expand_owner(const char *label, Object *obj)
3202 {
3203 DeviceState *dev = (DeviceState *) object_dynamic_cast(obj, TYPE_DEVICE);
3204
3205 qemu_printf(" %s:{%s", label, dev ? "dev" : "obj");
3206 if (dev && dev->id) {
3207 qemu_printf(" id=%s", dev->id);
3208 } else {
3209 char *canonical_path = object_get_canonical_path(obj);
3210 if (canonical_path) {
3211 qemu_printf(" path=%s", canonical_path);
3212 g_free(canonical_path);
3213 } else {
3214 qemu_printf(" type=%s", object_get_typename(obj));
3215 }
3216 }
3217 qemu_printf("}");
3218 }
3219
3220 static void mtree_print_mr_owner(const MemoryRegion *mr)
3221 {
3222 Object *owner = mr->owner;
3223 Object *parent = memory_region_owner((MemoryRegion *)mr);
3224
3225 if (!owner && !parent) {
3226 qemu_printf(" orphan");
3227 return;
3228 }
3229 if (owner) {
3230 mtree_expand_owner("owner", owner);
3231 }
3232 if (parent && parent != owner) {
3233 mtree_expand_owner("parent", parent);
3234 }
3235 }
3236
3237 static void mtree_print_mr(const MemoryRegion *mr, unsigned int level,
3238 hwaddr base,
3239 MemoryRegionListHead *alias_print_queue,
3240 bool owner, bool display_disabled)
3241 {
3242 MemoryRegionList *new_ml, *ml, *next_ml;
3243 MemoryRegionListHead submr_print_queue;
3244 const MemoryRegion *submr;
3245 unsigned int i;
3246 hwaddr cur_start, cur_end;
3247
3248 if (!mr) {
3249 return;
3250 }
3251
3252 cur_start = base + mr->addr;
3253 cur_end = cur_start + MR_SIZE(mr->size);
3254
3255 /*
3256 * Try to detect overflow of memory region. This should never
3257 * happen normally. When it happens, we dump something to warn the
3258 * user who is observing this.
3259 */
3260 if (cur_start < base || cur_end < cur_start) {
3261 qemu_printf("[DETECTED OVERFLOW!] ");
3262 }
3263
3264 if (mr->alias) {
3265 MemoryRegionList *ml;
3266 bool found = false;
3267
3268 /* check if the alias is already in the queue */
3269 QTAILQ_FOREACH(ml, alias_print_queue, mrqueue) {
3270 if (ml->mr == mr->alias) {
3271 found = true;
3272 }
3273 }
3274
3275 if (!found) {
3276 ml = g_new(MemoryRegionList, 1);
3277 ml->mr = mr->alias;
3278 QTAILQ_INSERT_TAIL(alias_print_queue, ml, mrqueue);
3279 }
3280 if (mr->enabled || display_disabled) {
3281 for (i = 0; i < level; i++) {
3282 qemu_printf(MTREE_INDENT);
3283 }
3284 qemu_printf(HWADDR_FMT_plx "-" HWADDR_FMT_plx
3285 " (prio %d, %s%s): alias %s @%s " HWADDR_FMT_plx
3286 "-" HWADDR_FMT_plx "%s",
3287 cur_start, cur_end,
3288 mr->priority,
3289 mr->nonvolatile ? "nv-" : "",
3290 memory_region_type((MemoryRegion *)mr),
3291 memory_region_name(mr),
3292 memory_region_name(mr->alias),
3293 mr->alias_offset,
3294 mr->alias_offset + MR_SIZE(mr->size),
3295 mr->enabled ? "" : " [disabled]");
3296 if (owner) {
3297 mtree_print_mr_owner(mr);
3298 }
3299 qemu_printf("\n");
3300 }
3301 } else {
3302 if (mr->enabled || display_disabled) {
3303 for (i = 0; i < level; i++) {
3304 qemu_printf(MTREE_INDENT);
3305 }
3306 qemu_printf(HWADDR_FMT_plx "-" HWADDR_FMT_plx
3307 " (prio %d, %s%s): %s%s",
3308 cur_start, cur_end,
3309 mr->priority,
3310 mr->nonvolatile ? "nv-" : "",
3311 memory_region_type((MemoryRegion *)mr),
3312 memory_region_name(mr),
3313 mr->enabled ? "" : " [disabled]");
3314 if (owner) {
3315 mtree_print_mr_owner(mr);
3316 }
3317 qemu_printf("\n");
3318 }
3319 }
3320
3321 QTAILQ_INIT(&submr_print_queue);
3322
3323 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
3324 new_ml = g_new(MemoryRegionList, 1);
3325 new_ml->mr = submr;
3326 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
3327 if (new_ml->mr->addr < ml->mr->addr ||
3328 (new_ml->mr->addr == ml->mr->addr &&
3329 new_ml->mr->priority > ml->mr->priority)) {
3330 QTAILQ_INSERT_BEFORE(ml, new_ml, mrqueue);
3331 new_ml = NULL;
3332 break;
3333 }
3334 }
3335 if (new_ml) {
3336 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, mrqueue);
3337 }
3338 }
3339
3340 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
3341 mtree_print_mr(ml->mr, level + 1, cur_start,
3342 alias_print_queue, owner, display_disabled);
3343 }
3344
3345 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, mrqueue, next_ml) {
3346 g_free(ml);
3347 }
3348 }
3349
3350 struct FlatViewInfo {
3351 int counter;
3352 bool dispatch_tree;
3353 bool owner;
3354 AccelClass *ac;
3355 };
3356
3357 static void mtree_print_flatview(gpointer key, gpointer value,
3358 gpointer user_data)
3359 {
3360 FlatView *view = key;
3361 GArray *fv_address_spaces = value;
3362 struct FlatViewInfo *fvi = user_data;
3363 FlatRange *range = &view->ranges[0];
3364 MemoryRegion *mr;
3365 int n = view->nr;
3366 int i;
3367 AddressSpace *as;
3368
3369 qemu_printf("FlatView #%d\n", fvi->counter);
3370 ++fvi->counter;
3371
3372 for (i = 0; i < fv_address_spaces->len; ++i) {
3373 as = g_array_index(fv_address_spaces, AddressSpace*, i);
3374 qemu_printf(" AS \"%s\", root: %s",
3375 as->name, memory_region_name(as->root));
3376 if (as->root->alias) {
3377 qemu_printf(", alias %s", memory_region_name(as->root->alias));
3378 }
3379 qemu_printf("\n");
3380 }
3381
3382 qemu_printf(" Root memory region: %s\n",
3383 view->root ? memory_region_name(view->root) : "(none)");
3384
3385 if (n <= 0) {
3386 qemu_printf(MTREE_INDENT "No rendered FlatView\n\n");
3387 return;
3388 }
3389
3390 while (n--) {
3391 mr = range->mr;
3392 if (range->offset_in_region) {
3393 qemu_printf(MTREE_INDENT HWADDR_FMT_plx "-" HWADDR_FMT_plx
3394 " (prio %d, %s%s): %s @" HWADDR_FMT_plx,
3395 int128_get64(range->addr.start),
3396 int128_get64(range->addr.start)
3397 + MR_SIZE(range->addr.size),
3398 mr->priority,
3399 range->nonvolatile ? "nv-" : "",
3400 range->readonly ? "rom" : memory_region_type(mr),
3401 memory_region_name(mr),
3402 range->offset_in_region);
3403 } else {
3404 qemu_printf(MTREE_INDENT HWADDR_FMT_plx "-" HWADDR_FMT_plx
3405 " (prio %d, %s%s): %s",
3406 int128_get64(range->addr.start),
3407 int128_get64(range->addr.start)
3408 + MR_SIZE(range->addr.size),
3409 mr->priority,
3410 range->nonvolatile ? "nv-" : "",
3411 range->readonly ? "rom" : memory_region_type(mr),
3412 memory_region_name(mr));
3413 }
3414 if (fvi->owner) {
3415 mtree_print_mr_owner(mr);
3416 }
3417
3418 if (fvi->ac) {
3419 for (i = 0; i < fv_address_spaces->len; ++i) {
3420 as = g_array_index(fv_address_spaces, AddressSpace*, i);
3421 if (fvi->ac->has_memory(current_machine, as,
3422 int128_get64(range->addr.start),
3423 MR_SIZE(range->addr.size) + 1)) {
3424 qemu_printf(" %s", fvi->ac->name);
3425 }
3426 }
3427 }
3428 qemu_printf("\n");
3429 range++;
3430 }
3431
3432 #if !defined(CONFIG_USER_ONLY)
3433 if (fvi->dispatch_tree && view->root) {
3434 mtree_print_dispatch(view->dispatch, view->root);
3435 }
3436 #endif
3437
3438 qemu_printf("\n");
3439 }
3440
3441 static gboolean mtree_info_flatview_free(gpointer key, gpointer value,
3442 gpointer user_data)
3443 {
3444 FlatView *view = key;
3445 GArray *fv_address_spaces = value;
3446
3447 g_array_unref(fv_address_spaces);
3448 flatview_unref(view);
3449
3450 return true;
3451 }
3452
3453 static void mtree_info_flatview(bool dispatch_tree, bool owner)
3454 {
3455 struct FlatViewInfo fvi = {
3456 .counter = 0,
3457 .dispatch_tree = dispatch_tree,
3458 .owner = owner,
3459 };
3460 AddressSpace *as;
3461 FlatView *view;
3462 GArray *fv_address_spaces;
3463 GHashTable *views = g_hash_table_new(g_direct_hash, g_direct_equal);
3464 AccelClass *ac = ACCEL_GET_CLASS(current_accel());
3465
3466 if (ac->has_memory) {
3467 fvi.ac = ac;
3468 }
3469
3470 /* Gather all FVs in one table */
3471 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3472 view = address_space_get_flatview(as);
3473
3474 fv_address_spaces = g_hash_table_lookup(views, view);
3475 if (!fv_address_spaces) {
3476 fv_address_spaces = g_array_new(false, false, sizeof(as));
3477 g_hash_table_insert(views, view, fv_address_spaces);
3478 }
3479
3480 g_array_append_val(fv_address_spaces, as);
3481 }
3482
3483 /* Print */
3484 g_hash_table_foreach(views, mtree_print_flatview, &fvi);
3485
3486 /* Free */
3487 g_hash_table_foreach_remove(views, mtree_info_flatview_free, 0);
3488 g_hash_table_unref(views);
3489 }
3490
3491 struct AddressSpaceInfo {
3492 MemoryRegionListHead *ml_head;
3493 bool owner;
3494 bool disabled;
3495 };
3496
3497 /* Returns negative value if a < b; zero if a = b; positive value if a > b. */
3498 static gint address_space_compare_name(gconstpointer a, gconstpointer b)
3499 {
3500 const AddressSpace *as_a = a;
3501 const AddressSpace *as_b = b;
3502
3503 return g_strcmp0(as_a->name, as_b->name);
3504 }
3505
3506 static void mtree_print_as_name(gpointer data, gpointer user_data)
3507 {
3508 AddressSpace *as = data;
3509
3510 qemu_printf("address-space: %s\n", as->name);
3511 }
3512
3513 static void mtree_print_as(gpointer key, gpointer value, gpointer user_data)
3514 {
3515 MemoryRegion *mr = key;
3516 GSList *as_same_root_mr_list = value;
3517 struct AddressSpaceInfo *asi = user_data;
3518
3519 g_slist_foreach(as_same_root_mr_list, mtree_print_as_name, NULL);
3520 mtree_print_mr(mr, 1, 0, asi->ml_head, asi->owner, asi->disabled);
3521 qemu_printf("\n");
3522 }
3523
3524 static gboolean mtree_info_as_free(gpointer key, gpointer value,
3525 gpointer user_data)
3526 {
3527 GSList *as_same_root_mr_list = value;
3528
3529 g_slist_free(as_same_root_mr_list);
3530
3531 return true;
3532 }
3533
3534 static void mtree_info_as(bool dispatch_tree, bool owner, bool disabled)
3535 {
3536 MemoryRegionListHead ml_head;
3537 MemoryRegionList *ml, *ml2;
3538 AddressSpace *as;
3539 GHashTable *views = g_hash_table_new(g_direct_hash, g_direct_equal);
3540 GSList *as_same_root_mr_list;
3541 struct AddressSpaceInfo asi = {
3542 .ml_head = &ml_head,
3543 .owner = owner,
3544 .disabled = disabled,
3545 };
3546
3547 QTAILQ_INIT(&ml_head);
3548
3549 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3550 /* Create hashtable, key=AS root MR, value = list of AS */
3551 as_same_root_mr_list = g_hash_table_lookup(views, as->root);
3552 as_same_root_mr_list = g_slist_insert_sorted(as_same_root_mr_list, as,
3553 address_space_compare_name);
3554 g_hash_table_insert(views, as->root, as_same_root_mr_list);
3555 }
3556
3557 /* print address spaces */
3558 g_hash_table_foreach(views, mtree_print_as, &asi);
3559 g_hash_table_foreach_remove(views, mtree_info_as_free, 0);
3560 g_hash_table_unref(views);
3561
3562 /* print aliased regions */
3563 QTAILQ_FOREACH(ml, &ml_head, mrqueue) {
3564 qemu_printf("memory-region: %s\n", memory_region_name(ml->mr));
3565 mtree_print_mr(ml->mr, 1, 0, &ml_head, owner, disabled);
3566 qemu_printf("\n");
3567 }
3568
3569 QTAILQ_FOREACH_SAFE(ml, &ml_head, mrqueue, ml2) {
3570 g_free(ml);
3571 }
3572 }
3573
3574 void mtree_info(bool flatview, bool dispatch_tree, bool owner, bool disabled)
3575 {
3576 if (flatview) {
3577 mtree_info_flatview(dispatch_tree, owner);
3578 } else {
3579 mtree_info_as(dispatch_tree, owner, disabled);
3580 }
3581 }
3582
3583 void memory_region_init_ram(MemoryRegion *mr,
3584 Object *owner,
3585 const char *name,
3586 uint64_t size,
3587 Error **errp)
3588 {
3589 DeviceState *owner_dev;
3590 Error *err = NULL;
3591
3592 memory_region_init_ram_nomigrate(mr, owner, name, size, &err);
3593 if (err) {
3594 error_propagate(errp, err);
3595 return;
3596 }
3597 /* This will assert if owner is neither NULL nor a DeviceState.
3598 * We only want the owner here for the purposes of defining a
3599 * unique name for migration. TODO: Ideally we should implement
3600 * a naming scheme for Objects which are not DeviceStates, in
3601 * which case we can relax this restriction.
3602 */
3603 owner_dev = DEVICE(owner);
3604 vmstate_register_ram(mr, owner_dev);
3605 }
3606
3607 void memory_region_init_rom(MemoryRegion *mr,
3608 Object *owner,
3609 const char *name,
3610 uint64_t size,
3611 Error **errp)
3612 {
3613 DeviceState *owner_dev;
3614 Error *err = NULL;
3615
3616 memory_region_init_rom_nomigrate(mr, owner, name, size, &err);
3617 if (err) {
3618 error_propagate(errp, err);
3619 return;
3620 }
3621 /* This will assert if owner is neither NULL nor a DeviceState.
3622 * We only want the owner here for the purposes of defining a
3623 * unique name for migration. TODO: Ideally we should implement
3624 * a naming scheme for Objects which are not DeviceStates, in
3625 * which case we can relax this restriction.
3626 */
3627 owner_dev = DEVICE(owner);
3628 vmstate_register_ram(mr, owner_dev);
3629 }
3630
3631 void memory_region_init_rom_device(MemoryRegion *mr,
3632 Object *owner,
3633 const MemoryRegionOps *ops,
3634 void *opaque,
3635 const char *name,
3636 uint64_t size,
3637 Error **errp)
3638 {
3639 DeviceState *owner_dev;
3640 Error *err = NULL;
3641
3642 memory_region_init_rom_device_nomigrate(mr, owner, ops, opaque,
3643 name, size, &err);
3644 if (err) {
3645 error_propagate(errp, err);
3646 return;
3647 }
3648 /* This will assert if owner is neither NULL nor a DeviceState.
3649 * We only want the owner here for the purposes of defining a
3650 * unique name for migration. TODO: Ideally we should implement
3651 * a naming scheme for Objects which are not DeviceStates, in
3652 * which case we can relax this restriction.
3653 */
3654 owner_dev = DEVICE(owner);
3655 vmstate_register_ram(mr, owner_dev);
3656 }
3657
3658 /*
3659 * Support softmmu builds with CONFIG_FUZZ using a weak symbol and a stub for
3660 * the fuzz_dma_read_cb callback
3661 */
3662 #ifdef CONFIG_FUZZ
3663 void __attribute__((weak)) fuzz_dma_read_cb(size_t addr,
3664 size_t len,
3665 MemoryRegion *mr)
3666 {
3667 }
3668 #endif
3669
3670 static const TypeInfo memory_region_info = {
3671 .parent = TYPE_OBJECT,
3672 .name = TYPE_MEMORY_REGION,
3673 .class_size = sizeof(MemoryRegionClass),
3674 .instance_size = sizeof(MemoryRegion),
3675 .instance_init = memory_region_initfn,
3676 .instance_finalize = memory_region_finalize,
3677 };
3678
3679 static const TypeInfo iommu_memory_region_info = {
3680 .parent = TYPE_MEMORY_REGION,
3681 .name = TYPE_IOMMU_MEMORY_REGION,
3682 .class_size = sizeof(IOMMUMemoryRegionClass),
3683 .instance_size = sizeof(IOMMUMemoryRegion),
3684 .instance_init = iommu_memory_region_initfn,
3685 .abstract = true,
3686 };
3687
3688 static const TypeInfo ram_discard_manager_info = {
3689 .parent = TYPE_INTERFACE,
3690 .name = TYPE_RAM_DISCARD_MANAGER,
3691 .class_size = sizeof(RamDiscardManagerClass),
3692 };
3693
3694 static void memory_register_types(void)
3695 {
3696 type_register_static(&memory_region_info);
3697 type_register_static(&iommu_memory_region_info);
3698 type_register_static(&ram_discard_manager_info);
3699 }
3700
3701 type_init(memory_register_types)
AR7 emulation for QEMU