1 #include "qemu/osdep.h"
2 #include "qemu-common.h"
3 #include "qapi/qmp/qdict.h"
4 #include "qapi/qmp/qlist.h"
5 #include "qapi/qmp/qnum.h"
6 #include "qapi/qmp/qbool.h"
9 static char *get_cpu0_qom_path(void)
16 resp
= qmp("{'execute': 'query-cpus', 'arguments': {}}");
17 g_assert(qdict_haskey(resp
, "return"));
18 ret
= qdict_get_qlist(resp
, "return");
20 cpu0
= qobject_to(QDict
, qlist_peek(ret
));
21 path
= g_strdup(qdict_get_str(cpu0
, "qom_path"));
26 static QObject
*qom_get(const char *path
, const char *prop
)
28 QDict
*resp
= qmp("{ 'execute': 'qom-get',"
29 " 'arguments': { 'path': %s,"
30 " 'property': %s } }",
32 QObject
*ret
= qdict_get(resp
, "return");
38 #ifdef CONFIG_HAS_GLIB_SUBPROCESS_TESTS
39 static bool qom_get_bool(const char *path
, const char *prop
)
41 QBool
*value
= qobject_to(QBool
, qom_get(path
, prop
));
42 bool b
= qbool_get_bool(value
);
49 typedef struct CpuidTestArgs
{
52 int64_t expected_value
;
55 static void test_cpuid_prop(const void *data
)
57 const CpuidTestArgs
*args
= data
;
62 qtest_start(args
->cmdline
);
63 path
= get_cpu0_qom_path();
64 value
= qobject_to(QNum
, qom_get(path
, args
->property
));
65 g_assert(qnum_get_try_int(value
, &val
));
66 g_assert_cmpint(val
, ==, args
->expected_value
);
73 static void add_cpuid_test(const char *name
, const char *cmdline
,
74 const char *property
, int64_t expected_value
)
76 CpuidTestArgs
*args
= g_new0(CpuidTestArgs
, 1);
77 args
->cmdline
= cmdline
;
78 args
->property
= property
;
79 args
->expected_value
= expected_value
;
80 qtest_add_data_func(name
, args
, test_cpuid_prop
);
84 /* Parameters to a add_feature_test() test case */
85 typedef struct FeatureTestArgs
{
86 /* cmdline to start QEMU */
89 * cpuid-input-eax and cpuid-input-ecx values to look for,
90 * in "feature-words" and "filtered-features" properties.
92 uint32_t in_eax
, in_ecx
;
93 /* The register name to look for, in the X86CPUFeatureWordInfo array */
95 /* The bit to check in X86CPUFeatureWordInfo.features */
97 /* The expected value for the bit in (X86CPUFeatureWordInfo.features) */
101 /* Get the value for a feature word in a X86CPUFeatureWordInfo list */
102 static uint32_t get_feature_word(QList
*features
, uint32_t eax
, uint32_t ecx
,
107 for (e
= qlist_first(features
); e
; e
= qlist_next(e
)) {
108 QDict
*w
= qobject_to(QDict
, qlist_entry_obj(e
));
109 const char *rreg
= qdict_get_str(w
, "cpuid-register");
110 uint32_t reax
= qdict_get_int(w
, "cpuid-input-eax");
111 bool has_ecx
= qdict_haskey(w
, "cpuid-input-ecx");
116 recx
= qdict_get_int(w
, "cpuid-input-ecx");
118 if (eax
== reax
&& (!has_ecx
|| ecx
== recx
) && !strcmp(rreg
, reg
)) {
119 g_assert(qnum_get_try_int(qobject_to(QNum
,
120 qdict_get(w
, "features")),
128 static void test_feature_flag(const void *data
)
130 const FeatureTestArgs
*args
= data
;
132 QList
*present
, *filtered
;
135 qtest_start(args
->cmdline
);
136 path
= get_cpu0_qom_path();
137 present
= qobject_to(QList
, qom_get(path
, "feature-words"));
138 filtered
= qobject_to(QList
, qom_get(path
, "filtered-features"));
139 value
= get_feature_word(present
, args
->in_eax
, args
->in_ecx
, args
->reg
);
140 value
|= get_feature_word(filtered
, args
->in_eax
, args
->in_ecx
, args
->reg
);
143 g_assert(!!(value
& (1U << args
->bitnr
)) == args
->expected_value
);
145 qobject_unref(present
);
146 qobject_unref(filtered
);
151 * Add test case to ensure that a given feature flag is set in
152 * either "feature-words" or "filtered-features", when running QEMU
155 static FeatureTestArgs
*add_feature_test(const char *name
, const char *cmdline
,
156 uint32_t eax
, uint32_t ecx
,
157 const char *reg
, int bitnr
,
160 FeatureTestArgs
*args
= g_new0(FeatureTestArgs
, 1);
161 args
->cmdline
= cmdline
;
166 args
->expected_value
= expected_value
;
167 qtest_add_data_func(name
, args
, test_feature_flag
);
171 #ifdef CONFIG_HAS_GLIB_SUBPROCESS_TESTS
172 static void test_plus_minus_subprocess(void)
177 * 1)"-foo" overrides "+foo"
178 * 2) "[+-]foo" overrides "foo=..."
179 * 3) Old feature names with underscores (e.g. "sse4_2")
180 * should keep working
182 * Note: rules 1 and 2 are planned to be removed soon, and
183 * should generate a warning.
185 qtest_start("-cpu pentium,-fpu,+fpu,-mce,mce=on,+cx8,cx8=off,+sse4_1,sse4_2=on");
186 path
= get_cpu0_qom_path();
188 g_assert_false(qom_get_bool(path
, "fpu"));
189 g_assert_false(qom_get_bool(path
, "mce"));
190 g_assert_true(qom_get_bool(path
, "cx8"));
192 /* Test both the original and the alias feature names: */
193 g_assert_true(qom_get_bool(path
, "sse4-1"));
194 g_assert_true(qom_get_bool(path
, "sse4.1"));
196 g_assert_true(qom_get_bool(path
, "sse4-2"));
197 g_assert_true(qom_get_bool(path
, "sse4.2"));
203 static void test_plus_minus(void)
205 g_test_trap_subprocess("/x86/cpuid/parsing-plus-minus/subprocess", 0, 0);
206 g_test_trap_assert_passed();
207 g_test_trap_assert_stderr("*Ambiguous CPU model string. "
208 "Don't mix both \"-mce\" and \"mce=on\"*");
209 g_test_trap_assert_stderr("*Ambiguous CPU model string. "
210 "Don't mix both \"+cx8\" and \"cx8=off\"*");
211 g_test_trap_assert_stdout("");
215 int main(int argc
, char **argv
)
217 g_test_init(&argc
, &argv
, NULL
);
219 #ifdef CONFIG_HAS_GLIB_SUBPROCESS_TESTS
220 g_test_add_func("/x86/cpuid/parsing-plus-minus/subprocess",
221 test_plus_minus_subprocess
);
222 g_test_add_func("/x86/cpuid/parsing-plus-minus", test_plus_minus
);
225 /* Original level values for CPU models: */
226 add_cpuid_test("x86/cpuid/phenom/level",
227 "-cpu phenom", "level", 5);
228 add_cpuid_test("x86/cpuid/Conroe/level",
229 "-cpu Conroe", "level", 10);
230 add_cpuid_test("x86/cpuid/SandyBridge/level",
231 "-cpu SandyBridge", "level", 0xd);
232 add_cpuid_test("x86/cpuid/486/xlevel",
233 "-cpu 486", "xlevel", 0);
234 add_cpuid_test("x86/cpuid/core2duo/xlevel",
235 "-cpu core2duo", "xlevel", 0x80000008);
236 add_cpuid_test("x86/cpuid/phenom/xlevel",
237 "-cpu phenom", "xlevel", 0x8000001A);
238 add_cpuid_test("x86/cpuid/athlon/xlevel",
239 "-cpu athlon", "xlevel", 0x80000008);
241 /* If level is not large enough, it should increase automatically: */
243 add_cpuid_test("x86/cpuid/auto-level/phenom/arat",
244 "-cpu 486,+arat", "level", 6);
245 /* CPUID[EAX=7,ECX=0].EBX: */
246 add_cpuid_test("x86/cpuid/auto-level/phenom/fsgsbase",
247 "-cpu phenom,+fsgsbase", "level", 7);
248 /* CPUID[EAX=7,ECX=0].ECX: */
249 add_cpuid_test("x86/cpuid/auto-level/phenom/avx512vbmi",
250 "-cpu phenom,+avx512vbmi", "level", 7);
251 /* CPUID[EAX=0xd,ECX=1].EAX: */
252 add_cpuid_test("x86/cpuid/auto-level/phenom/xsaveopt",
253 "-cpu phenom,+xsaveopt", "level", 0xd);
254 /* CPUID[8000_0001].EDX: */
255 add_cpuid_test("x86/cpuid/auto-xlevel/486/3dnow",
256 "-cpu 486,+3dnow", "xlevel", 0x80000001);
257 /* CPUID[8000_0001].ECX: */
258 add_cpuid_test("x86/cpuid/auto-xlevel/486/sse4a",
259 "-cpu 486,+sse4a", "xlevel", 0x80000001);
260 /* CPUID[8000_0007].EDX: */
261 add_cpuid_test("x86/cpuid/auto-xlevel/486/invtsc",
262 "-cpu 486,+invtsc", "xlevel", 0x80000007);
263 /* CPUID[8000_000A].EDX: */
264 add_cpuid_test("x86/cpuid/auto-xlevel/486/npt",
265 "-cpu 486,+npt", "xlevel", 0x8000000A);
266 /* CPUID[C000_0001].EDX: */
267 add_cpuid_test("x86/cpuid/auto-xlevel2/phenom/xstore",
268 "-cpu phenom,+xstore", "xlevel2", 0xC0000001);
269 /* SVM needs CPUID[0x8000000A] */
270 add_cpuid_test("x86/cpuid/auto-xlevel/athlon/svm",
271 "-cpu athlon,+svm", "xlevel", 0x8000000A);
274 /* If level is already large enough, it shouldn't change: */
275 add_cpuid_test("x86/cpuid/auto-level/SandyBridge/multiple",
276 "-cpu SandyBridge,+arat,+fsgsbase,+avx512vbmi",
278 /* If level is explicitly set, it shouldn't change: */
279 add_cpuid_test("x86/cpuid/auto-level/486/fixed/0xF",
280 "-cpu 486,level=0xF,+arat,+fsgsbase,+avx512vbmi,+xsaveopt",
282 add_cpuid_test("x86/cpuid/auto-level/486/fixed/2",
283 "-cpu 486,level=2,+arat,+fsgsbase,+avx512vbmi,+xsaveopt",
285 add_cpuid_test("x86/cpuid/auto-level/486/fixed/0",
286 "-cpu 486,level=0,+arat,+fsgsbase,+avx512vbmi,+xsaveopt",
289 /* if xlevel is already large enough, it shouldn't change: */
290 add_cpuid_test("x86/cpuid/auto-xlevel/phenom/3dnow",
291 "-cpu phenom,+3dnow,+sse4a,+invtsc,+npt,+svm",
292 "xlevel", 0x8000001A);
293 /* If xlevel is explicitly set, it shouldn't change: */
294 add_cpuid_test("x86/cpuid/auto-xlevel/486/fixed/80000002",
295 "-cpu 486,xlevel=0x80000002,+3dnow,+sse4a,+invtsc,+npt,+svm",
296 "xlevel", 0x80000002);
297 add_cpuid_test("x86/cpuid/auto-xlevel/486/fixed/8000001A",
298 "-cpu 486,xlevel=0x8000001A,+3dnow,+sse4a,+invtsc,+npt,+svm",
299 "xlevel", 0x8000001A);
300 add_cpuid_test("x86/cpuid/auto-xlevel/phenom/fixed/0",
301 "-cpu 486,xlevel=0,+3dnow,+sse4a,+invtsc,+npt,+svm",
304 /* if xlevel2 is already large enough, it shouldn't change: */
305 add_cpuid_test("x86/cpuid/auto-xlevel2/486/fixed",
306 "-cpu 486,xlevel2=0xC0000002,+xstore",
307 "xlevel2", 0xC0000002);
309 /* Check compatibility of old machine-types that didn't
310 * auto-increase level/xlevel/xlevel2: */
312 add_cpuid_test("x86/cpuid/auto-level/pc-2.7",
313 "-machine pc-i440fx-2.7 -cpu 486,+arat,+avx512vbmi,+xsaveopt",
315 add_cpuid_test("x86/cpuid/auto-xlevel/pc-2.7",
316 "-machine pc-i440fx-2.7 -cpu 486,+3dnow,+sse4a,+invtsc,+npt,+svm",
318 add_cpuid_test("x86/cpuid/auto-xlevel2/pc-2.7",
319 "-machine pc-i440fx-2.7 -cpu 486,+xstore",
322 * QEMU 1.4.0 had auto-level enabled for CPUID[7], already,
323 * and the compat code that sets default level shouldn't
324 * disable the auto-level=7 code:
326 add_cpuid_test("x86/cpuid/auto-level7/pc-i440fx-1.4/off",
327 "-machine pc-i440fx-1.4 -cpu Nehalem",
329 add_cpuid_test("x86/cpuid/auto-level7/pc-i440fx-1.5/on",
330 "-machine pc-i440fx-1.4 -cpu Nehalem,+smap",
332 add_cpuid_test("x86/cpuid/auto-level7/pc-i440fx-2.3/off",
333 "-machine pc-i440fx-2.3 -cpu Penryn",
335 add_cpuid_test("x86/cpuid/auto-level7/pc-i440fx-2.3/on",
336 "-machine pc-i440fx-2.3 -cpu Penryn,+erms",
338 add_cpuid_test("x86/cpuid/auto-level7/pc-i440fx-2.9/off",
339 "-machine pc-i440fx-2.9 -cpu Conroe",
341 add_cpuid_test("x86/cpuid/auto-level7/pc-i440fx-2.9/on",
342 "-machine pc-i440fx-2.9 -cpu Conroe,+erms",
346 * xlevel doesn't have any feature that triggers auto-level
347 * code on old machine-types. Just check that the compat code
348 * is working correctly:
350 add_cpuid_test("x86/cpuid/xlevel-compat/pc-i440fx-2.3",
351 "-machine pc-i440fx-2.3 -cpu SandyBridge",
352 "xlevel", 0x8000000a);
353 add_cpuid_test("x86/cpuid/xlevel-compat/pc-i440fx-2.4/npt-off",
354 "-machine pc-i440fx-2.4 -cpu SandyBridge,",
355 "xlevel", 0x80000008);
356 add_cpuid_test("x86/cpuid/xlevel-compat/pc-i440fx-2.4/npt-on",
357 "-machine pc-i440fx-2.4 -cpu SandyBridge,+npt",
358 "xlevel", 0x80000008);
360 /* Test feature parsing */
361 add_feature_test("x86/cpuid/features/plus",
363 6, 0, "EAX", 2, true);
364 add_feature_test("x86/cpuid/features/minus",
366 1, 0, "EDX", 23, false);
367 add_feature_test("x86/cpuid/features/on",
369 6, 0, "EAX", 2, true);
370 add_feature_test("x86/cpuid/features/off",
371 "-cpu pentium,mmx=off",
372 1, 0, "EDX", 23, false);
373 add_feature_test("x86/cpuid/features/max-plus-invtsc",
375 0x80000007, 0, "EDX", 8, true);
376 add_feature_test("x86/cpuid/features/max-invtsc-on",
377 "-cpu max,invtsc=on",
378 0x80000007, 0, "EDX", 8, true);
379 add_feature_test("x86/cpuid/features/max-minus-mmx",
381 1, 0, "EDX", 23, false);
382 add_feature_test("x86/cpuid/features/max-invtsc-on,mmx=off",
384 1, 0, "EDX", 23, false);