cpu: flush TB cache when loading VMState
[qemu/ar7.git] / hw / tpm / tpm_int.h
blobabbca5191a12ffb330066f7da08787ae3efb3959
1 /*
2 * TPM configuration
4 * Copyright (C) 2011-2013 IBM Corporation
6 * Authors:
7 * Stefan Berger <stefanb@us.ibm.com>
9 * This work is licensed under the terms of the GNU GPL, version 2 or later.
10 * See the COPYING file in the top-level directory.
12 #ifndef TPM_TPM_INT_H
13 #define TPM_TPM_INT_H
15 #include "qemu/osdep.h"
17 #define TPM_STANDARD_CMDLINE_OPTS \
18 { \
19 .name = "type", \
20 .type = QEMU_OPT_STRING, \
21 .help = "Type of TPM backend", \
24 struct tpm_req_hdr {
25 uint16_t tag;
26 uint32_t len;
27 uint32_t ordinal;
28 } QEMU_PACKED;
30 struct tpm_resp_hdr {
31 uint16_t tag;
32 uint32_t len;
33 uint32_t errcode;
34 } QEMU_PACKED;
36 #define TPM_TAG_RQU_COMMAND 0xc1
37 #define TPM_TAG_RQU_AUTH1_COMMAND 0xc2
38 #define TPM_TAG_RQU_AUTH2_COMMAND 0xc3
40 #define TPM_TAG_RSP_COMMAND 0xc4
41 #define TPM_TAG_RSP_AUTH1_COMMAND 0xc5
42 #define TPM_TAG_RSP_AUTH2_COMMAND 0xc6
44 #define TPM_FAIL 9
46 #define TPM_ORD_ContinueSelfTest 0x53
47 #define TPM_ORD_GetTicks 0xf1
48 #define TPM_ORD_GetCapability 0x65
50 #define TPM_CAP_PROPERTY 0x05
52 #define TPM_CAP_PROP_INPUT_BUFFER 0x124
54 /* TPM2 defines */
55 #define TPM2_ST_NO_SESSIONS 0x8001
57 #define TPM2_CC_ReadClock 0x00000181
58 #define TPM2_CC_GetCapability 0x0000017a
60 #define TPM2_CAP_TPM_PROPERTIES 0x6
62 #define TPM2_PT_MAX_COMMAND_SIZE 0x11e
64 #endif /* TPM_TPM_INT_H */