hw/arm/omap_sx1.c

   1 /* omap_sx1.c Support for the Siemens SX1 smartphone emulation.
   2  *
   3  *   Copyright (C) 2008
   4  *      Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
   5  *   Copyright (C) 2007 Vladimir Ananiev <vovan888@gmail.com>
   6  *
   7  *   based on PalmOne's (TM) PDAs support (palm.c)
   8  */
   9
  10 /*
  11  * PalmOne's (TM) PDAs.
  12  *
  13  * Copyright (C) 2006-2007 Andrzej Zaborowski <balrog@zabor.org>
  14  *
  15  * This program is free software; you can redistribute it and/or
  16  * modify it under the terms of the GNU General Public License as
  17  * published by the Free Software Foundation; either version 2 of
  18  * the License, or (at your option) any later version.
  19  *
  20  * This program is distributed in the hope that it will be useful,
  21  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  23  * GNU General Public License for more details.
  24  *
  25  * You should have received a copy of the GNU General Public License along
  26  * with this program; if not, see <http://www.gnu.org/licenses/>.
  27  */
  28 #include "qemu/osdep.h"
  29 #include "qapi/error.h"
  30 #include "ui/console.h"
  31 #include "hw/arm/omap.h"
  32 #include "hw/boards.h"
  33 #include "hw/arm/boot.h"
  34 #include "hw/block/flash.h"
  35 #include "sysemu/qtest.h"
  36 #include "exec/address-spaces.h"
  37 #include "cpu.h"
  38
  39 /*****************************************************************************/
  40 /* Siemens SX1 Cellphone V1 */
  41 /* - ARM OMAP310 processor
  42  * - SRAM                192 kB
  43  * - SDRAM                32 MB at 0x10000000
  44  * - Boot flash           16 MB at 0x00000000
  45  * - Application flash     8 MB at 0x04000000
  46  * - 3 serial ports
  47  * - 1 SecureDigital
  48  * - 1 LCD display
  49  * - 1 RTC
  50  */
  51
  52 /*****************************************************************************/
  53 /* Siemens SX1 Cellphone V2 */
  54 /* - ARM OMAP310 processor
  55  * - SRAM                192 kB
  56  * - SDRAM                32 MB at 0x10000000
  57  * - Boot flash           32 MB at 0x00000000
  58  * - 3 serial ports
  59  * - 1 SecureDigital
  60  * - 1 LCD display
  61  * - 1 RTC
  62  */
  63
  64 static uint64_t static_read(void *opaque, hwaddr offset,
  65                             unsigned size)
  66 {
  67     uint32_t *val = (uint32_t *) opaque;
  68     uint32_t mask = (4 / size) - 1;
  69
  70     return *val >> ((offset & mask) << 3);
  71 }
  72
  73 static void static_write(void *opaque, hwaddr offset,
  74                          uint64_t value, unsigned size)
  75 {
  76 #ifdef SPY
  77     printf("%s: value %" PRIx64 " %u bytes written at 0x%x\n",
  78                     __func__, value, size, (int)offset);
  79 #endif
  80 }
  81
  82 static const MemoryRegionOps static_ops = {
  83     .read = static_read,
  84     .write = static_write,
  85     .endianness = DEVICE_NATIVE_ENDIAN,
  86 };
  87
  88 #define sdram_size      0x02000000
  89 #define sector_size     (128 * 1024)
  90 #define flash0_size     (16 * 1024 * 1024)
  91 #define flash1_size     ( 8 * 1024 * 1024)
  92 #define flash2_size     (32 * 1024 * 1024)
  93 #define total_ram_v1    (sdram_size + flash0_size + flash1_size + OMAP15XX_SRAM_SIZE)
  94 #define total_ram_v2    (sdram_size + flash2_size + OMAP15XX_SRAM_SIZE)
  95
  96 static struct arm_boot_info sx1_binfo = {
  97     .loader_start = OMAP_EMIFF_BASE,
  98     .ram_size = sdram_size,
  99     .board_id = 0x265,
 100 };
 101
 102 static void sx1_init(MachineState *machine, const int version)
 103 {
 104     struct omap_mpu_state_s *mpu;
 105     MemoryRegion *address_space = get_system_memory();
 106     MemoryRegion *dram = g_new(MemoryRegion, 1);
 107     MemoryRegion *flash = g_new(MemoryRegion, 1);
 108     MemoryRegion *cs = g_new(MemoryRegion, 4);
 109     static uint32_t cs0val = 0x00213090;
 110     static uint32_t cs1val = 0x00215070;
 111     static uint32_t cs2val = 0x00001139;
 112     static uint32_t cs3val = 0x00001139;
 113     DriveInfo *dinfo;
 114     int fl_idx;
 115     uint32_t flash_size = flash0_size;
 116     int be;
 117
 118     if (version == 2) {
 119         flash_size = flash2_size;
 120     }
 121
 122     memory_region_allocate_system_memory(dram, NULL, "omap1.dram",
 123                                          sx1_binfo.ram_size);
 124     memory_region_add_subregion(address_space, OMAP_EMIFF_BASE, dram);
 125
 126     mpu = omap310_mpu_init(dram, machine->cpu_type);
 127
 128     /* External Flash (EMIFS) */
 129     memory_region_init_ram(flash, NULL, "omap_sx1.flash0-0", flash_size,
 130                            &error_fatal);
 131     memory_region_set_readonly(flash, true);
 132     memory_region_add_subregion(address_space, OMAP_CS0_BASE, flash);
 133
 134     memory_region_init_io(&cs[0], NULL, &static_ops, &cs0val,
 135                           "sx1.cs0", OMAP_CS0_SIZE - flash_size);
 136     memory_region_add_subregion(address_space,
 137                                 OMAP_CS0_BASE + flash_size, &cs[0]);
 138
 139
 140     memory_region_init_io(&cs[2], NULL, &static_ops, &cs2val,
 141                           "sx1.cs2", OMAP_CS2_SIZE);
 142     memory_region_add_subregion(address_space,
 143                                 OMAP_CS2_BASE, &cs[2]);
 144
 145     memory_region_init_io(&cs[3], NULL, &static_ops, &cs3val,
 146                           "sx1.cs3", OMAP_CS3_SIZE);
 147     memory_region_add_subregion(address_space,
 148                                 OMAP_CS2_BASE, &cs[3]);
 149
 150     fl_idx = 0;
 151 #ifdef TARGET_WORDS_BIGENDIAN
 152     be = 1;
 153 #else
 154     be = 0;
 155 #endif
 156
 157     if ((dinfo = drive_get(IF_PFLASH, 0, fl_idx)) != NULL) {
 158         if (!pflash_cfi01_register(OMAP_CS0_BASE,
 159                                    "omap_sx1.flash0-1", flash_size,
 160                                    blk_by_legacy_dinfo(dinfo),
 161                                    sector_size, 4, 0, 0, 0, 0, be)) {
 162             fprintf(stderr, "qemu: Error registering flash memory %d.\n",
 163                            fl_idx);
 164         }
 165         fl_idx++;
 166     }
 167
 168     if ((version == 1) &&
 169             (dinfo = drive_get(IF_PFLASH, 0, fl_idx)) != NULL) {
 170         MemoryRegion *flash_1 = g_new(MemoryRegion, 1);
 171         memory_region_init_ram(flash_1, NULL, "omap_sx1.flash1-0",
 172                                flash1_size, &error_fatal);
 173         memory_region_set_readonly(flash_1, true);
 174         memory_region_add_subregion(address_space, OMAP_CS1_BASE, flash_1);
 175
 176         memory_region_init_io(&cs[1], NULL, &static_ops, &cs1val,
 177                               "sx1.cs1", OMAP_CS1_SIZE - flash1_size);
 178         memory_region_add_subregion(address_space,
 179                                 OMAP_CS1_BASE + flash1_size, &cs[1]);
 180
 181         if (!pflash_cfi01_register(OMAP_CS1_BASE,
 182                                    "omap_sx1.flash1-1", flash1_size,
 183                                    blk_by_legacy_dinfo(dinfo),
 184                                    sector_size, 4, 0, 0, 0, 0, be)) {
 185             fprintf(stderr, "qemu: Error registering flash memory %d.\n",
 186                            fl_idx);
 187         }
 188         fl_idx++;
 189     } else {
 190         memory_region_init_io(&cs[1], NULL, &static_ops, &cs1val,
 191                               "sx1.cs1", OMAP_CS1_SIZE);
 192         memory_region_add_subregion(address_space,
 193                                 OMAP_CS1_BASE, &cs[1]);
 194     }
 195
 196     if (!machine->kernel_filename && !fl_idx && !qtest_enabled()) {
 197         error_report("Kernel or Flash image must be specified");
 198         exit(1);
 199     }
 200
 201     /* Load the kernel.  */
 202     arm_load_kernel(mpu->cpu, machine, &sx1_binfo);
 203
 204     /* TODO: fix next line */
 205     //~ qemu_console_resize(ds, 640, 480);
 206 }
 207
 208 static void sx1_init_v1(MachineState *machine)
 209 {
 210     sx1_init(machine, 1);
 211 }
 212
 213 static void sx1_init_v2(MachineState *machine)
 214 {
 215     sx1_init(machine, 2);
 216 }
 217
 218 static void sx1_machine_v2_class_init(ObjectClass *oc, void *data)
 219 {
 220     MachineClass *mc = MACHINE_CLASS(oc);
 221
 222     mc->desc = "Siemens SX1 (OMAP310) V2";
 223     mc->init = sx1_init_v2;
 224     mc->ignore_memory_transaction_failures = true;
 225     mc->default_cpu_type = ARM_CPU_TYPE_NAME("ti925t");
 226 }
 227
 228 static const TypeInfo sx1_machine_v2_type = {
 229     .name = MACHINE_TYPE_NAME("sx1"),
 230     .parent = TYPE_MACHINE,
 231     .class_init = sx1_machine_v2_class_init,
 232 };
 233
 234 static void sx1_machine_v1_class_init(ObjectClass *oc, void *data)
 235 {
 236     MachineClass *mc = MACHINE_CLASS(oc);
 237
 238     mc->desc = "Siemens SX1 (OMAP310) V1";
 239     mc->init = sx1_init_v1;
 240     mc->ignore_memory_transaction_failures = true;
 241     mc->default_cpu_type = ARM_CPU_TYPE_NAME("ti925t");
 242 }
 243
 244 static const TypeInfo sx1_machine_v1_type = {
 245     .name = MACHINE_TYPE_NAME("sx1-v1"),
 246     .parent = TYPE_MACHINE,
 247     .class_init = sx1_machine_v1_class_init,
 248 };
 249
 250 static void sx1_machine_init(void)
 251 {
 252     type_register_static(&sx1_machine_v1_type);
 253     type_register_static(&sx1_machine_v2_type);
 254 }
 255
 256 type_init(sx1_machine_init)